xref: /onnv-gate/usr/src/uts/sun4/os/intr.c (revision 522)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
50Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
60Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
70Sstevel@tonic-gate  * with the License.
80Sstevel@tonic-gate  *
90Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
100Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
110Sstevel@tonic-gate  * See the License for the specific language governing permissions
120Sstevel@tonic-gate  * and limitations under the License.
130Sstevel@tonic-gate  *
140Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
150Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
160Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
170Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
180Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
190Sstevel@tonic-gate  *
200Sstevel@tonic-gate  * CDDL HEADER END
210Sstevel@tonic-gate  */
220Sstevel@tonic-gate /*
230Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
240Sstevel@tonic-gate  * Use is subject to license terms.
250Sstevel@tonic-gate  */
260Sstevel@tonic-gate 
270Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
280Sstevel@tonic-gate 
290Sstevel@tonic-gate #include <sys/sysmacros.h>
300Sstevel@tonic-gate #include <sys/stack.h>
310Sstevel@tonic-gate #include <sys/cpuvar.h>
320Sstevel@tonic-gate #include <sys/ivintr.h>
330Sstevel@tonic-gate #include <sys/intreg.h>
340Sstevel@tonic-gate #include <sys/membar.h>
350Sstevel@tonic-gate #include <sys/kmem.h>
360Sstevel@tonic-gate #include <sys/intr.h>
370Sstevel@tonic-gate #include <sys/sunndi.h>
380Sstevel@tonic-gate #include <sys/cmn_err.h>
390Sstevel@tonic-gate #include <sys/privregs.h>
400Sstevel@tonic-gate #include <sys/systm.h>
410Sstevel@tonic-gate #include <sys/archsystm.h>
420Sstevel@tonic-gate #include <sys/machsystm.h>
430Sstevel@tonic-gate #include <sys/x_call.h>
440Sstevel@tonic-gate #include <vm/seg_kp.h>
450Sstevel@tonic-gate #include <sys/debug.h>
460Sstevel@tonic-gate #include <sys/cyclic.h>
470Sstevel@tonic-gate 
480Sstevel@tonic-gate #include <sys/cpu_sgnblk_defs.h>
490Sstevel@tonic-gate 
500Sstevel@tonic-gate kmutex_t soft_iv_lock;	/* protect software interrupt vector table */
510Sstevel@tonic-gate /* Global locks which protect the interrupt distribution lists */
520Sstevel@tonic-gate static kmutex_t intr_dist_lock;
530Sstevel@tonic-gate static kmutex_t intr_dist_cpu_lock;
540Sstevel@tonic-gate 
550Sstevel@tonic-gate /* Head of the interrupt distribution lists */
560Sstevel@tonic-gate static struct intr_dist *intr_dist_head = NULL;
570Sstevel@tonic-gate static struct intr_dist *intr_dist_whead = NULL;
580Sstevel@tonic-gate 
590Sstevel@tonic-gate uint_t swinum_base;
600Sstevel@tonic-gate uint_t maxswinum;
610Sstevel@tonic-gate uint_t siron_inum;
620Sstevel@tonic-gate uint_t poke_cpu_inum;
63*522Ssudheer /*
64*522Ssudheer  * Note:-
65*522Ssudheer  * siron_pending was originally created to prevent a resource over consumption
66*522Ssudheer  * bug in setsoftint(exhaustion of interrupt pool free list).
67*522Ssudheer  * It's original intention is obsolete with the use of iv_pending in
68*522Ssudheer  * setsoftint. However, siron_pending stayed around, acting as a second
69*522Ssudheer  * gatekeeper preventing soft interrupts from being queued. In this capacity,
70*522Ssudheer  * it can lead to hangs on MP systems, where due to global visibility issues
71*522Ssudheer  * it can end up set while iv_pending is reset, preventing soft interrupts from
72*522Ssudheer  * ever being processed. In addition to its gatekeeper role, init_intr also
73*522Ssudheer  * uses it to flag the situation where siron() was called before siron_inum has
74*522Ssudheer  * been defined.
75*522Ssudheer  *
76*522Ssudheer  * siron() does not need an extra gatekeeper; any cpu that wishes should be
77*522Ssudheer  * allowed to queue a soft interrupt. It is softint()'s job to ensure
78*522Ssudheer  * correct handling of the queues. Therefore, siron_pending has been
79*522Ssudheer  * stripped of its gatekeeper task, retaining only its intr_init job, where
80*522Ssudheer  * it indicates that there is a pending need to call siron().
81*522Ssudheer  */
820Sstevel@tonic-gate int siron_pending;
830Sstevel@tonic-gate 
840Sstevel@tonic-gate int intr_policy = INTR_WEIGHTED_DIST;	/* interrupt distribution policy */
850Sstevel@tonic-gate int intr_dist_debug = 0;
860Sstevel@tonic-gate int32_t intr_dist_weight_max = 1;
870Sstevel@tonic-gate int32_t intr_dist_weight_maxmax = 1000;
880Sstevel@tonic-gate int intr_dist_weight_maxfactor = 2;
890Sstevel@tonic-gate #define	INTR_DEBUG(args) if (intr_dist_debug) cmn_err args
900Sstevel@tonic-gate 
910Sstevel@tonic-gate static void sw_ivintr_init(cpu_t *);
920Sstevel@tonic-gate 
930Sstevel@tonic-gate /*
940Sstevel@tonic-gate  * intr_init() - interrupt initialization
950Sstevel@tonic-gate  *	Initialize the system's software interrupt vector table and
960Sstevel@tonic-gate  *	CPU's interrupt free list
970Sstevel@tonic-gate  */
980Sstevel@tonic-gate void
990Sstevel@tonic-gate intr_init(cpu_t *cp)
1000Sstevel@tonic-gate {
1010Sstevel@tonic-gate 	init_ivintr();
1020Sstevel@tonic-gate 	sw_ivintr_init(cp);
1030Sstevel@tonic-gate 	init_intr_pool(cp);
1040Sstevel@tonic-gate 
1050Sstevel@tonic-gate 	mutex_init(&intr_dist_lock, NULL, MUTEX_DEFAULT, NULL);
1060Sstevel@tonic-gate 	mutex_init(&intr_dist_cpu_lock, NULL, MUTEX_DEFAULT, NULL);
1070Sstevel@tonic-gate 
1080Sstevel@tonic-gate 	/*
1090Sstevel@tonic-gate 	 * A soft interrupt may have been requested prior to the initialization
1100Sstevel@tonic-gate 	 * of soft interrupts.  Soft interrupts can't be dispatched until after
1110Sstevel@tonic-gate 	 * init_intr_pool, so we have to wait until now before we can dispatch
1120Sstevel@tonic-gate 	 * the pending soft interrupt (if any).
1130Sstevel@tonic-gate 	 */
114*522Ssudheer 	if (siron_pending) {
115*522Ssudheer 		siron_pending = 0;
116*522Ssudheer 		siron();
117*522Ssudheer 	}
1180Sstevel@tonic-gate }
1190Sstevel@tonic-gate 
1200Sstevel@tonic-gate /*
1210Sstevel@tonic-gate  * poke_cpu_intr - fall through when poke_cpu calls
1220Sstevel@tonic-gate  */
1230Sstevel@tonic-gate 
1240Sstevel@tonic-gate /* ARGSUSED */
1250Sstevel@tonic-gate uint_t
1260Sstevel@tonic-gate poke_cpu_intr(caddr_t arg1, caddr_t arg2)
1270Sstevel@tonic-gate {
1280Sstevel@tonic-gate 	CPU->cpu_m.poke_cpu_outstanding = B_FALSE;
1290Sstevel@tonic-gate 	membar_stld_stst();
1300Sstevel@tonic-gate 	return (1);
1310Sstevel@tonic-gate }
1320Sstevel@tonic-gate 
1330Sstevel@tonic-gate /*
1340Sstevel@tonic-gate  * sw_ivintr_init() - software interrupt vector initialization
1350Sstevel@tonic-gate  *	called after CPU is active
1360Sstevel@tonic-gate  *	the software interrupt vector table is part of the intr_vector[]
1370Sstevel@tonic-gate  */
1380Sstevel@tonic-gate static void
1390Sstevel@tonic-gate sw_ivintr_init(cpu_t *cp)
1400Sstevel@tonic-gate {
1410Sstevel@tonic-gate 	extern uint_t softlevel1();
1420Sstevel@tonic-gate 
1430Sstevel@tonic-gate 	mutex_init(&soft_iv_lock, NULL, MUTEX_DEFAULT, NULL);
1440Sstevel@tonic-gate 
1450Sstevel@tonic-gate 	swinum_base = SOFTIVNUM;
1460Sstevel@tonic-gate 
1470Sstevel@tonic-gate 	/*
1480Sstevel@tonic-gate 	 * the maximum software interrupt == MAX_SOFT_INO
1490Sstevel@tonic-gate 	 */
1500Sstevel@tonic-gate 	maxswinum = swinum_base + MAX_SOFT_INO;
1510Sstevel@tonic-gate 
1520Sstevel@tonic-gate 	REGISTER_BBUS_INTR();
1530Sstevel@tonic-gate 
1540Sstevel@tonic-gate 	siron_inum = add_softintr(PIL_1, softlevel1, 0);
1550Sstevel@tonic-gate 	poke_cpu_inum = add_softintr(PIL_13, poke_cpu_intr, 0);
1560Sstevel@tonic-gate 	cp->cpu_m.poke_cpu_outstanding = B_FALSE;
1570Sstevel@tonic-gate }
1580Sstevel@tonic-gate 
1590Sstevel@tonic-gate cpuset_t intr_add_pools_inuse;
1600Sstevel@tonic-gate 
1610Sstevel@tonic-gate /*
1620Sstevel@tonic-gate  * cleanup_intr_pool()
1630Sstevel@tonic-gate  *	Free up the extra intr request pool for this cpu.
1640Sstevel@tonic-gate  */
1650Sstevel@tonic-gate void
1660Sstevel@tonic-gate cleanup_intr_pool(cpu_t *cp)
1670Sstevel@tonic-gate {
1680Sstevel@tonic-gate 	extern struct intr_req *intr_add_head;
1690Sstevel@tonic-gate 	int poolno;
1700Sstevel@tonic-gate 	struct intr_req *pool;
1710Sstevel@tonic-gate 
1720Sstevel@tonic-gate 	poolno = cp->cpu_m.intr_pool_added;
1730Sstevel@tonic-gate 	if (poolno >= 0) {
1740Sstevel@tonic-gate 		cp->cpu_m.intr_pool_added = -1;
1750Sstevel@tonic-gate 		pool = (poolno * INTR_PENDING_MAX * intr_add_pools) +
1760Sstevel@tonic-gate 
1770Sstevel@tonic-gate 			intr_add_head;	/* not byte arithmetic */
1780Sstevel@tonic-gate 		bzero(pool, INTR_PENDING_MAX * intr_add_pools *
1790Sstevel@tonic-gate 		    sizeof (struct intr_req));
1800Sstevel@tonic-gate 
1810Sstevel@tonic-gate 		CPUSET_DEL(intr_add_pools_inuse, poolno);
1820Sstevel@tonic-gate 	}
1830Sstevel@tonic-gate }
1840Sstevel@tonic-gate 
1850Sstevel@tonic-gate /*
1860Sstevel@tonic-gate  * init_intr_pool()
1870Sstevel@tonic-gate  *	initialize the intr request pool for the cpu
1880Sstevel@tonic-gate  * 	should be called for each cpu
1890Sstevel@tonic-gate  */
1900Sstevel@tonic-gate void
1910Sstevel@tonic-gate init_intr_pool(cpu_t *cp)
1920Sstevel@tonic-gate {
1930Sstevel@tonic-gate 	extern struct intr_req *intr_add_head;
1940Sstevel@tonic-gate #ifdef	DEBUG
1950Sstevel@tonic-gate 	extern struct intr_req *intr_add_tail;
1960Sstevel@tonic-gate #endif	/* DEBUG */
1970Sstevel@tonic-gate 	int i, pool;
1980Sstevel@tonic-gate 
1990Sstevel@tonic-gate 	cp->cpu_m.intr_pool_added = -1;
2000Sstevel@tonic-gate 
2010Sstevel@tonic-gate 	for (i = 0; i < INTR_PENDING_MAX-1; i++) {
2020Sstevel@tonic-gate 		cp->cpu_m.intr_pool[i].intr_next =
2030Sstevel@tonic-gate 		    &cp->cpu_m.intr_pool[i+1];
2040Sstevel@tonic-gate 	}
2050Sstevel@tonic-gate 	cp->cpu_m.intr_pool[INTR_PENDING_MAX-1].intr_next = NULL;
2060Sstevel@tonic-gate 
2070Sstevel@tonic-gate 	cp->cpu_m.intr_head[0] = &cp->cpu_m.intr_pool[0];
2080Sstevel@tonic-gate 	cp->cpu_m.intr_tail[0] = &cp->cpu_m.intr_pool[INTR_PENDING_MAX-1];
2090Sstevel@tonic-gate 
2100Sstevel@tonic-gate 	if (intr_add_pools != 0) {
2110Sstevel@tonic-gate 
2120Sstevel@tonic-gate 		/*
2130Sstevel@tonic-gate 		 * If additional interrupt pools have been allocated,
2140Sstevel@tonic-gate 		 * initialize those too and add them to the free list.
2150Sstevel@tonic-gate 		 */
2160Sstevel@tonic-gate 
2170Sstevel@tonic-gate 		struct intr_req *trace;
2180Sstevel@tonic-gate 
2190Sstevel@tonic-gate 		for (pool = 0; pool < max_ncpus; pool++) {
2200Sstevel@tonic-gate 			if (!(CPU_IN_SET(intr_add_pools_inuse, pool)))
2210Sstevel@tonic-gate 			    break;
2220Sstevel@tonic-gate 		}
2230Sstevel@tonic-gate 		if (pool >= max_ncpus) {
2240Sstevel@tonic-gate 			/*
2250Sstevel@tonic-gate 			 * XXX - intr pools are alloc'd, just not as
2260Sstevel@tonic-gate 			 * much as we would like.
2270Sstevel@tonic-gate 			 */
2280Sstevel@tonic-gate 			cmn_err(CE_WARN, "Failed to alloc all requested intr "
2290Sstevel@tonic-gate 			    "pools for cpu%d", cp->cpu_id);
2300Sstevel@tonic-gate 			return;
2310Sstevel@tonic-gate 		}
2320Sstevel@tonic-gate 		CPUSET_ADD(intr_add_pools_inuse, pool);
2330Sstevel@tonic-gate 		cp->cpu_m.intr_pool_added = pool;
2340Sstevel@tonic-gate 
2350Sstevel@tonic-gate 		trace = (pool * INTR_PENDING_MAX * intr_add_pools) +
2360Sstevel@tonic-gate 			intr_add_head;	/* not byte arithmetic */
2370Sstevel@tonic-gate 
2380Sstevel@tonic-gate 		cp->cpu_m.intr_pool[INTR_PENDING_MAX-1].intr_next = trace;
2390Sstevel@tonic-gate 
2400Sstevel@tonic-gate 		for (i = 1; i < intr_add_pools * INTR_PENDING_MAX; i++, trace++)
2410Sstevel@tonic-gate 			trace->intr_next = trace + 1;
2420Sstevel@tonic-gate 		trace->intr_next = NULL;
2430Sstevel@tonic-gate 
2440Sstevel@tonic-gate 		ASSERT(trace >= intr_add_head && trace <= intr_add_tail);
2450Sstevel@tonic-gate 
2460Sstevel@tonic-gate 		cp->cpu_m.intr_tail[0] = trace;
2470Sstevel@tonic-gate 	}
2480Sstevel@tonic-gate }
2490Sstevel@tonic-gate 
2500Sstevel@tonic-gate 
2510Sstevel@tonic-gate /*
2520Sstevel@tonic-gate  * siron - primitive for sun/os/softint.c
2530Sstevel@tonic-gate  */
2540Sstevel@tonic-gate void
2550Sstevel@tonic-gate siron(void)
2560Sstevel@tonic-gate {
257*522Ssudheer 	if (siron_inum != 0)
258*522Ssudheer 		setsoftint(siron_inum);
259*522Ssudheer 	else
2600Sstevel@tonic-gate 		siron_pending = 1;
2610Sstevel@tonic-gate }
2620Sstevel@tonic-gate 
2630Sstevel@tonic-gate /*
2640Sstevel@tonic-gate  * no_ivintr()
2650Sstevel@tonic-gate  * 	called by vec_interrupt() through sys_trap()
2660Sstevel@tonic-gate  *	vector interrupt received but not valid or not
2670Sstevel@tonic-gate  *	registered in intr_vector[]
2680Sstevel@tonic-gate  *	considered as a spurious mondo interrupt
2690Sstevel@tonic-gate  */
2700Sstevel@tonic-gate /* ARGSUSED */
2710Sstevel@tonic-gate void
2720Sstevel@tonic-gate no_ivintr(struct regs *rp, int inum, int pil)
2730Sstevel@tonic-gate {
2740Sstevel@tonic-gate 	cmn_err(CE_WARN, "invalid vector intr: number 0x%x, pil 0x%x",
2750Sstevel@tonic-gate 	    inum, pil);
2760Sstevel@tonic-gate 
2770Sstevel@tonic-gate 
2780Sstevel@tonic-gate #ifdef DEBUG_VEC_INTR
2790Sstevel@tonic-gate 	prom_enter_mon();
2800Sstevel@tonic-gate #endif /* DEBUG_VEC_INTR */
2810Sstevel@tonic-gate }
2820Sstevel@tonic-gate 
2830Sstevel@tonic-gate /*
2840Sstevel@tonic-gate  * no_intr_pool()
2850Sstevel@tonic-gate  * 	called by vec_interrupt() through sys_trap()
2860Sstevel@tonic-gate  *	vector interrupt received but no intr_req entries
2870Sstevel@tonic-gate  */
2880Sstevel@tonic-gate /* ARGSUSED */
2890Sstevel@tonic-gate void
2900Sstevel@tonic-gate no_intr_pool(struct regs *rp, int inum, int pil)
2910Sstevel@tonic-gate {
2920Sstevel@tonic-gate #ifdef DEBUG_VEC_INTR
2930Sstevel@tonic-gate 	cmn_err(CE_WARN, "intr_req pool empty: num 0x%x, pil 0x%x",
2940Sstevel@tonic-gate 		inum, pil);
2950Sstevel@tonic-gate 	prom_enter_mon();
2960Sstevel@tonic-gate #else
2970Sstevel@tonic-gate 	cmn_err(CE_PANIC, "intr_req pool empty: num 0x%x, pil 0x%x",
2980Sstevel@tonic-gate 		inum, pil);
2990Sstevel@tonic-gate #endif /* DEBUG_VEC_INTR */
3000Sstevel@tonic-gate }
3010Sstevel@tonic-gate 
3020Sstevel@tonic-gate void
3030Sstevel@tonic-gate intr_dequeue_req(uint_t pil, uint32_t inum)
3040Sstevel@tonic-gate {
3050Sstevel@tonic-gate 	struct intr_req *ir, *prev;
3060Sstevel@tonic-gate 	struct machcpu *mcpu;
3070Sstevel@tonic-gate 	uint32_t clr;
3080Sstevel@tonic-gate 	extern uint_t getpstate(void);
3090Sstevel@tonic-gate 
3100Sstevel@tonic-gate 	ASSERT((getpstate() & PSTATE_IE) == 0);
3110Sstevel@tonic-gate 
3120Sstevel@tonic-gate 	mcpu = &CPU->cpu_m;
3130Sstevel@tonic-gate 
3140Sstevel@tonic-gate 	/* Find a matching entry in the list */
3150Sstevel@tonic-gate 	prev = NULL;
3160Sstevel@tonic-gate 	ir = mcpu->intr_head[pil];
3170Sstevel@tonic-gate 	while (ir != NULL) {
3180Sstevel@tonic-gate 		if (ir->intr_number == inum)
3190Sstevel@tonic-gate 			break;
3200Sstevel@tonic-gate 		prev = ir;
3210Sstevel@tonic-gate 		ir = ir->intr_next;
3220Sstevel@tonic-gate 	}
3230Sstevel@tonic-gate 	if (ir != NULL) {
3240Sstevel@tonic-gate 		/*
3250Sstevel@tonic-gate 		 * Remove entry from list
3260Sstevel@tonic-gate 		 */
3270Sstevel@tonic-gate 		if (prev != NULL)
3280Sstevel@tonic-gate 			prev->intr_next = ir->intr_next;	/* non-head */
3290Sstevel@tonic-gate 		else
3300Sstevel@tonic-gate 			mcpu->intr_head[pil] = ir->intr_next;	/* head */
3310Sstevel@tonic-gate 
3320Sstevel@tonic-gate 		if (ir->intr_next == NULL)
3330Sstevel@tonic-gate 			mcpu->intr_tail[pil] = prev;		/* tail */
3340Sstevel@tonic-gate 
3350Sstevel@tonic-gate 		/*
3360Sstevel@tonic-gate 		 * Place on free list
3370Sstevel@tonic-gate 		 */
3380Sstevel@tonic-gate 		ir->intr_next = mcpu->intr_head[0];
3390Sstevel@tonic-gate 		mcpu->intr_head[0] = ir;
3400Sstevel@tonic-gate 	}
3410Sstevel@tonic-gate 
3420Sstevel@tonic-gate 	/*
3430Sstevel@tonic-gate 	 * clear pending interrupts at this level if the list is empty
3440Sstevel@tonic-gate 	 */
3450Sstevel@tonic-gate 	if (mcpu->intr_head[pil] == NULL) {
3460Sstevel@tonic-gate 		clr = 1 << pil;
3470Sstevel@tonic-gate 		if (pil == PIL_14)
3480Sstevel@tonic-gate 			clr |= (TICK_INT_MASK | STICK_INT_MASK);
3490Sstevel@tonic-gate 		wr_clr_softint(clr);
3500Sstevel@tonic-gate 	}
3510Sstevel@tonic-gate }
3520Sstevel@tonic-gate 
3530Sstevel@tonic-gate 
3540Sstevel@tonic-gate /*
3550Sstevel@tonic-gate  * Send a directed interrupt of specified interrupt number id to a cpu.
3560Sstevel@tonic-gate  */
3570Sstevel@tonic-gate void
3580Sstevel@tonic-gate send_dirint(
3590Sstevel@tonic-gate 	int cpuix,		/* cpu to be interrupted */
3600Sstevel@tonic-gate 	int intr_id)		/* interrupt number id */
3610Sstevel@tonic-gate {
3620Sstevel@tonic-gate 	xt_one(cpuix, setsoftint_tl1, intr_id, 0);
3630Sstevel@tonic-gate }
3640Sstevel@tonic-gate 
3650Sstevel@tonic-gate void
3660Sstevel@tonic-gate init_intr_threads(struct cpu *cp)
3670Sstevel@tonic-gate {
3680Sstevel@tonic-gate 	int i;
3690Sstevel@tonic-gate 
3700Sstevel@tonic-gate 	for (i = 0; i < NINTR_THREADS; i++)
3710Sstevel@tonic-gate 		thread_create_intr(cp);
3720Sstevel@tonic-gate 
3730Sstevel@tonic-gate 	cp->cpu_intr_stack = (caddr_t)segkp_get(segkp, INTR_STACK_SIZE,
3740Sstevel@tonic-gate 		KPD_HASREDZONE | KPD_NO_ANON | KPD_LOCKED) +
3750Sstevel@tonic-gate 		INTR_STACK_SIZE - SA(MINFRAME);
3760Sstevel@tonic-gate }
3770Sstevel@tonic-gate 
3780Sstevel@tonic-gate /*
3790Sstevel@tonic-gate  * Take the specified CPU out of participation in interrupts.
3800Sstevel@tonic-gate  *	Called by p_online(2) when a processor is being taken off-line.
3810Sstevel@tonic-gate  *	This allows interrupt threads being handled on the processor to
3820Sstevel@tonic-gate  *	complete before the processor is idled.
3830Sstevel@tonic-gate  */
3840Sstevel@tonic-gate int
3850Sstevel@tonic-gate cpu_disable_intr(struct cpu *cp)
3860Sstevel@tonic-gate {
3870Sstevel@tonic-gate 	ASSERT(MUTEX_HELD(&cpu_lock));
3880Sstevel@tonic-gate 
3890Sstevel@tonic-gate 	/*
3900Sstevel@tonic-gate 	 * Turn off the CPU_ENABLE flag before calling the redistribution
3910Sstevel@tonic-gate 	 * function, since it checks for this in the cpu flags.
3920Sstevel@tonic-gate 	 */
3930Sstevel@tonic-gate 	cp->cpu_flags &= ~CPU_ENABLE;
3940Sstevel@tonic-gate 
3950Sstevel@tonic-gate 	intr_redist_all_cpus();
3960Sstevel@tonic-gate 
3970Sstevel@tonic-gate 	return (0);
3980Sstevel@tonic-gate }
3990Sstevel@tonic-gate 
4000Sstevel@tonic-gate /*
4010Sstevel@tonic-gate  * Allow the specified CPU to participate in interrupts.
4020Sstevel@tonic-gate  *	Called by p_online(2) if a processor could not be taken off-line
4030Sstevel@tonic-gate  *	because of bound threads, in order to resume processing interrupts.
4040Sstevel@tonic-gate  *	Also called after starting a processor.
4050Sstevel@tonic-gate  */
4060Sstevel@tonic-gate void
4070Sstevel@tonic-gate cpu_enable_intr(struct cpu *cp)
4080Sstevel@tonic-gate {
4090Sstevel@tonic-gate 	ASSERT(MUTEX_HELD(&cpu_lock));
4100Sstevel@tonic-gate 
4110Sstevel@tonic-gate 	cp->cpu_flags |= CPU_ENABLE;
4120Sstevel@tonic-gate 
4130Sstevel@tonic-gate 	intr_redist_all_cpus();
4140Sstevel@tonic-gate }
4150Sstevel@tonic-gate 
4160Sstevel@tonic-gate /*
4170Sstevel@tonic-gate  * Add function to callback list for intr_redist_all_cpus.  We keep two lists,
4180Sstevel@tonic-gate  * one for weighted callbacks and one for normal callbacks. Weighted callbacks
4190Sstevel@tonic-gate  * are issued to redirect interrupts of a specified weight, from heavy to
4200Sstevel@tonic-gate  * light.  This allows all the interrupts of a given weight to be redistributed
4210Sstevel@tonic-gate  * for all weighted nexus drivers prior to those of less weight.
4220Sstevel@tonic-gate  */
4230Sstevel@tonic-gate static void
4240Sstevel@tonic-gate intr_dist_add_list(struct intr_dist **phead, void (*func)(void *), void *arg)
4250Sstevel@tonic-gate {
4260Sstevel@tonic-gate 	struct intr_dist *new = kmem_alloc(sizeof (*new), KM_SLEEP);
4270Sstevel@tonic-gate 	struct intr_dist *iptr;
4280Sstevel@tonic-gate 	struct intr_dist **pptr;
4290Sstevel@tonic-gate 
4300Sstevel@tonic-gate 	ASSERT(func);
4310Sstevel@tonic-gate 	new->func = func;
4320Sstevel@tonic-gate 	new->arg = arg;
4330Sstevel@tonic-gate 	new->next = NULL;
4340Sstevel@tonic-gate 
4350Sstevel@tonic-gate 	/* Add to tail so that redistribution occurs in original order. */
4360Sstevel@tonic-gate 	mutex_enter(&intr_dist_lock);
4370Sstevel@tonic-gate 	for (iptr = *phead, pptr = phead; iptr != NULL;
4380Sstevel@tonic-gate 	    pptr = &iptr->next, iptr = iptr->next) {
4390Sstevel@tonic-gate 		/* check for problems as we locate the tail */
4400Sstevel@tonic-gate 		if ((iptr->func == func) && (iptr->arg == arg)) {
4410Sstevel@tonic-gate 			cmn_err(CE_PANIC, "intr_dist_add_list(): duplicate");
4420Sstevel@tonic-gate 			/*NOTREACHED*/
4430Sstevel@tonic-gate 		}
4440Sstevel@tonic-gate 	}
4450Sstevel@tonic-gate 	*pptr = new;
4460Sstevel@tonic-gate 
4470Sstevel@tonic-gate 	mutex_exit(&intr_dist_lock);
4480Sstevel@tonic-gate }
4490Sstevel@tonic-gate 
4500Sstevel@tonic-gate void
4510Sstevel@tonic-gate intr_dist_add(void (*func)(void *), void *arg)
4520Sstevel@tonic-gate {
4530Sstevel@tonic-gate 	intr_dist_add_list(&intr_dist_head, (void (*)(void *))func, arg);
4540Sstevel@tonic-gate }
4550Sstevel@tonic-gate 
4560Sstevel@tonic-gate void
4570Sstevel@tonic-gate intr_dist_add_weighted(void (*func)(void *, int32_t, int32_t), void *arg)
4580Sstevel@tonic-gate {
4590Sstevel@tonic-gate 	intr_dist_add_list(&intr_dist_whead, (void (*)(void *))func, arg);
4600Sstevel@tonic-gate }
4610Sstevel@tonic-gate 
4620Sstevel@tonic-gate /*
4630Sstevel@tonic-gate  * Search for the interrupt distribution structure with the specified
4640Sstevel@tonic-gate  * mondo vec reg in the interrupt distribution list. If a match is found,
4650Sstevel@tonic-gate  * then delete the entry from the list. The caller is responsible for
4660Sstevel@tonic-gate  * modifying the mondo vector registers.
4670Sstevel@tonic-gate  */
4680Sstevel@tonic-gate static void
4690Sstevel@tonic-gate intr_dist_rem_list(struct intr_dist **headp, void (*func)(void *), void *arg)
4700Sstevel@tonic-gate {
4710Sstevel@tonic-gate 	struct intr_dist *iptr;
4720Sstevel@tonic-gate 	struct intr_dist **vect;
4730Sstevel@tonic-gate 
4740Sstevel@tonic-gate 	mutex_enter(&intr_dist_lock);
4750Sstevel@tonic-gate 	for (iptr = *headp, vect = headp;
4760Sstevel@tonic-gate 	    iptr != NULL; vect = &iptr->next, iptr = iptr->next) {
4770Sstevel@tonic-gate 		if ((iptr->func == func) && (iptr->arg == arg)) {
4780Sstevel@tonic-gate 			*vect = iptr->next;
4790Sstevel@tonic-gate 			kmem_free(iptr, sizeof (struct intr_dist));
4800Sstevel@tonic-gate 			mutex_exit(&intr_dist_lock);
4810Sstevel@tonic-gate 			return;
4820Sstevel@tonic-gate 		}
4830Sstevel@tonic-gate 	}
4840Sstevel@tonic-gate 
4850Sstevel@tonic-gate 	if (!panicstr)
4860Sstevel@tonic-gate 		cmn_err(CE_PANIC, "intr_dist_rem_list: not found");
4870Sstevel@tonic-gate 	mutex_exit(&intr_dist_lock);
4880Sstevel@tonic-gate }
4890Sstevel@tonic-gate 
4900Sstevel@tonic-gate void
4910Sstevel@tonic-gate intr_dist_rem(void (*func)(void *), void *arg)
4920Sstevel@tonic-gate {
4930Sstevel@tonic-gate 	intr_dist_rem_list(&intr_dist_head, (void (*)(void *))func, arg);
4940Sstevel@tonic-gate }
4950Sstevel@tonic-gate 
4960Sstevel@tonic-gate void
4970Sstevel@tonic-gate intr_dist_rem_weighted(void (*func)(void *, int32_t, int32_t), void *arg)
4980Sstevel@tonic-gate {
4990Sstevel@tonic-gate 	intr_dist_rem_list(&intr_dist_whead, (void (*)(void *))func, arg);
5000Sstevel@tonic-gate }
5010Sstevel@tonic-gate 
5020Sstevel@tonic-gate /*
5030Sstevel@tonic-gate  * Initiate interrupt redistribution.  Redistribution improves the isolation
5040Sstevel@tonic-gate  * associated with interrupt weights by ordering operations from heavy weight
5050Sstevel@tonic-gate  * to light weight.  When a CPUs orientation changes relative to interrupts,
5060Sstevel@tonic-gate  * there is *always* a redistribution to accommodate this change (call to
5070Sstevel@tonic-gate  * intr_redist_all_cpus()).  As devices (not CPUs) attach/detach it is possible
5080Sstevel@tonic-gate  * that a redistribution could improve the quality of an initialization. For
5090Sstevel@tonic-gate  * example, if you are not using a NIC it may not be attached with s10 (devfs).
5100Sstevel@tonic-gate  * If you then configure the NIC (ifconfig), this may cause the NIC to attach
5110Sstevel@tonic-gate  * and plumb interrupts.  The CPU assignment for the NIC's interrupts is
5120Sstevel@tonic-gate  * occurring late, so optimal "isolation" relative to weight is not occurring.
5130Sstevel@tonic-gate  * The same applies to detach, although in this case doing the redistribution
5140Sstevel@tonic-gate  * might improve "spread" for medium weight devices since the "isolation" of
5150Sstevel@tonic-gate  * a higher weight device may no longer be present.
5160Sstevel@tonic-gate  *
5170Sstevel@tonic-gate  * NB: We should provide a utility to trigger redistribution (ala "intradm -r").
5180Sstevel@tonic-gate  *
5190Sstevel@tonic-gate  * NB: There is risk associated with automatically triggering execution of the
5200Sstevel@tonic-gate  * redistribution code at arbitrary times. The risk comes from the fact that
5210Sstevel@tonic-gate  * there is a lot of low-level hardware interaction associated with a
5220Sstevel@tonic-gate  * redistribution.  At some point we may want this code to perform automatic
5230Sstevel@tonic-gate  * redistribution (redistribution thread; trigger timeout when add/remove
5240Sstevel@tonic-gate  * weight delta is large enough, and call cv_signal from timeout - causing
5250Sstevel@tonic-gate  * thead to call i_ddi_intr_redist_all_cpus()) but this is considered too
5260Sstevel@tonic-gate  * risky at this time.
5270Sstevel@tonic-gate  */
5280Sstevel@tonic-gate void
5290Sstevel@tonic-gate i_ddi_intr_redist_all_cpus()
5300Sstevel@tonic-gate {
5310Sstevel@tonic-gate 	mutex_enter(&cpu_lock);
5320Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: i_ddi_intr_redist_all_cpus\n"));
5330Sstevel@tonic-gate 	intr_redist_all_cpus();
5340Sstevel@tonic-gate 	mutex_exit(&cpu_lock);
5350Sstevel@tonic-gate }
5360Sstevel@tonic-gate 
5370Sstevel@tonic-gate /*
5380Sstevel@tonic-gate  * Redistribute all interrupts
5390Sstevel@tonic-gate  *
5400Sstevel@tonic-gate  * This function redistributes all interrupting devices, running the
5410Sstevel@tonic-gate  * parent callback functions for each node.
5420Sstevel@tonic-gate  */
5430Sstevel@tonic-gate void
5440Sstevel@tonic-gate intr_redist_all_cpus(void)
5450Sstevel@tonic-gate {
5460Sstevel@tonic-gate 	struct cpu *cp;
5470Sstevel@tonic-gate 	struct intr_dist *iptr;
5480Sstevel@tonic-gate 	int32_t weight, max_weight;
5490Sstevel@tonic-gate 
5500Sstevel@tonic-gate 	ASSERT(MUTEX_HELD(&cpu_lock));
5510Sstevel@tonic-gate 	mutex_enter(&intr_dist_lock);
5520Sstevel@tonic-gate 
5530Sstevel@tonic-gate 	/*
5540Sstevel@tonic-gate 	 * zero cpu_intr_weight on all cpus - it is safe to traverse
5550Sstevel@tonic-gate 	 * cpu_list since we hold cpu_lock.
5560Sstevel@tonic-gate 	 */
5570Sstevel@tonic-gate 	cp = cpu_list;
5580Sstevel@tonic-gate 	do {
5590Sstevel@tonic-gate 		cp->cpu_intr_weight = 0;
5600Sstevel@tonic-gate 	} while ((cp = cp->cpu_next) != cpu_list);
5610Sstevel@tonic-gate 
5620Sstevel@tonic-gate 	/*
5630Sstevel@tonic-gate 	 * Assume that this redistribution may encounter a device weight
5640Sstevel@tonic-gate 	 * via driver.conf tuning of "ddi-intr-weight" that is at most
5650Sstevel@tonic-gate 	 * intr_dist_weight_maxfactor times larger.
5660Sstevel@tonic-gate 	 */
5670Sstevel@tonic-gate 	max_weight = intr_dist_weight_max * intr_dist_weight_maxfactor;
5680Sstevel@tonic-gate 	if (max_weight > intr_dist_weight_maxmax)
5690Sstevel@tonic-gate 		max_weight = intr_dist_weight_maxmax;
5700Sstevel@tonic-gate 	intr_dist_weight_max = 1;
5710Sstevel@tonic-gate 
5720Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: "
5730Sstevel@tonic-gate 	    "intr_redist_all_cpus: %d-0\n", max_weight));
5740Sstevel@tonic-gate 
5750Sstevel@tonic-gate 	/*
5760Sstevel@tonic-gate 	 * Redistribute weighted, from heavy to light.  The callback that
5770Sstevel@tonic-gate 	 * specifies a weight equal to weight_max should redirect all
5780Sstevel@tonic-gate 	 * interrupts of weight weight_max or greater [weight_max, inf.).
5790Sstevel@tonic-gate 	 * Interrupts of lesser weight should be processed on the call with
5800Sstevel@tonic-gate 	 * the matching weight. This allows all the heaver weight interrupts
5810Sstevel@tonic-gate 	 * on all weighted busses (multiple pci busses) to be redirected prior
5820Sstevel@tonic-gate 	 * to any lesser weight interrupts.
5830Sstevel@tonic-gate 	 */
5840Sstevel@tonic-gate 	for (weight = max_weight; weight >= 0; weight--)
5850Sstevel@tonic-gate 		for (iptr = intr_dist_whead; iptr != NULL; iptr = iptr->next)
5860Sstevel@tonic-gate 			((void (*)(void *, int32_t, int32_t))iptr->func)
5870Sstevel@tonic-gate 			    (iptr->arg, max_weight, weight);
5880Sstevel@tonic-gate 
5890Sstevel@tonic-gate 	/* redistribute normal (non-weighted) interrupts */
5900Sstevel@tonic-gate 	for (iptr = intr_dist_head; iptr != NULL; iptr = iptr->next)
5910Sstevel@tonic-gate 		((void (*)(void *))iptr->func)(iptr->arg);
5920Sstevel@tonic-gate 	mutex_exit(&intr_dist_lock);
5930Sstevel@tonic-gate }
5940Sstevel@tonic-gate 
5950Sstevel@tonic-gate void
5960Sstevel@tonic-gate intr_redist_all_cpus_shutdown(void)
5970Sstevel@tonic-gate {
5980Sstevel@tonic-gate 	intr_policy = INTR_CURRENT_CPU;
5990Sstevel@tonic-gate 	intr_redist_all_cpus();
6000Sstevel@tonic-gate }
6010Sstevel@tonic-gate 
6020Sstevel@tonic-gate /*
6030Sstevel@tonic-gate  * Determine what CPU to target, based on interrupt policy.
6040Sstevel@tonic-gate  *
6050Sstevel@tonic-gate  * INTR_FLAT_DIST: hold a current CPU pointer in a static variable and
6060Sstevel@tonic-gate  *	advance through interrupt enabled cpus (round-robin).
6070Sstevel@tonic-gate  *
6080Sstevel@tonic-gate  * INTR_WEIGHTED_DIST: search for an enabled CPU with the lowest
6090Sstevel@tonic-gate  *	cpu_intr_weight, round robin when all equal.
6100Sstevel@tonic-gate  *
6110Sstevel@tonic-gate  *	Weighted interrupt distribution provides two things: "spread" of weight
6120Sstevel@tonic-gate  *	(associated with algorithm itself) and "isolation" (associated with a
6130Sstevel@tonic-gate  *	particular device weight). A redistribution is what provides optimal
6140Sstevel@tonic-gate  *	"isolation" of heavy weight interrupts, optimal "spread" of weight
6150Sstevel@tonic-gate  *	(relative to what came before) is always occurring.
6160Sstevel@tonic-gate  *
6170Sstevel@tonic-gate  *	An interrupt weight is a subjective number that represents the
6180Sstevel@tonic-gate  *	percentage of a CPU required to service a device's interrupts: the
6190Sstevel@tonic-gate  *	default weight is 0% (however the algorithm still maintains
6200Sstevel@tonic-gate  *	round-robin), a network interface controller (NIC) may have a large
6210Sstevel@tonic-gate  *	weight (35%). Interrupt weight only has meaning relative to the
6220Sstevel@tonic-gate  *	interrupt weight of other devices: a CPU can be weighted more than
6230Sstevel@tonic-gate  *	100%, and a single device might consume more than 100% of a CPU.
6240Sstevel@tonic-gate  *
6250Sstevel@tonic-gate  *	A coarse interrupt weight can be defined by the parent nexus driver
6260Sstevel@tonic-gate  *	based on bus specific information, like pci class codes. A nexus
6270Sstevel@tonic-gate  *	driver that supports device interrupt weighting for its children
6280Sstevel@tonic-gate  *	should call intr_dist_cpuid_add/rem_device_weight(), which adds
6290Sstevel@tonic-gate  *	and removes the weight of a device from the CPU that an interrupt
6300Sstevel@tonic-gate  *	is directed at.  The quality of initialization improves when the
6310Sstevel@tonic-gate  *	device interrupt weights more accuracy reflect actual run-time weights,
6320Sstevel@tonic-gate  *	and as the assignments are ordered from is heavy to light.
6330Sstevel@tonic-gate  *
6340Sstevel@tonic-gate  *	The implementation also supports interrupt weight being specified in
6350Sstevel@tonic-gate  *	driver.conf files via the property "ddi-intr-weight", which takes
6360Sstevel@tonic-gate  *	precedence over the nexus supplied weight.  This support is added to
6370Sstevel@tonic-gate  *	permit possible tweaking in the product in response to customer
6380Sstevel@tonic-gate  *	problems. This is not a formal or committed interface.
6390Sstevel@tonic-gate  *
6400Sstevel@tonic-gate  *	While a weighted approach chooses the CPU providing the best spread
6410Sstevel@tonic-gate  *	given past weights, less than optimal isolation can result in cases
6420Sstevel@tonic-gate  *	where heavy weight devices show up last. The nexus driver's interrupt
6430Sstevel@tonic-gate  *	redistribution logic should use intr_dist_add/rem_weighted so that
6440Sstevel@tonic-gate  *	interrupts can be redistributed heavy first for optimal isolation.
6450Sstevel@tonic-gate  */
6460Sstevel@tonic-gate uint32_t
6470Sstevel@tonic-gate intr_dist_cpuid(void)
6480Sstevel@tonic-gate {
6490Sstevel@tonic-gate 	static struct cpu	*curr_cpu;
6500Sstevel@tonic-gate 	struct cpu		*start_cpu;
6510Sstevel@tonic-gate 	struct cpu		*new_cpu;
6520Sstevel@tonic-gate 	struct cpu		*cp;
6530Sstevel@tonic-gate 	int			cpuid = -1;
6540Sstevel@tonic-gate 
6550Sstevel@tonic-gate 	/* Establish exclusion for curr_cpu and cpu_intr_weight manipulation */
6560Sstevel@tonic-gate 	mutex_enter(&intr_dist_cpu_lock);
6570Sstevel@tonic-gate 
6580Sstevel@tonic-gate 	switch (intr_policy) {
6590Sstevel@tonic-gate 	case INTR_CURRENT_CPU:
6600Sstevel@tonic-gate 		cpuid = CPU->cpu_id;
6610Sstevel@tonic-gate 		break;
6620Sstevel@tonic-gate 
6630Sstevel@tonic-gate 	case INTR_BOOT_CPU:
6640Sstevel@tonic-gate 		panic("INTR_BOOT_CPU no longer supported.");
6650Sstevel@tonic-gate 		/*NOTREACHED*/
6660Sstevel@tonic-gate 
6670Sstevel@tonic-gate 	case INTR_FLAT_DIST:
6680Sstevel@tonic-gate 	case INTR_WEIGHTED_DIST:
6690Sstevel@tonic-gate 	default:
6700Sstevel@tonic-gate 		/*
6710Sstevel@tonic-gate 		 * Ensure that curr_cpu is valid - cpu_next will be NULL if
6720Sstevel@tonic-gate 		 * the cpu has been deleted (cpu structs are never freed).
6730Sstevel@tonic-gate 		 */
6740Sstevel@tonic-gate 		if (curr_cpu == NULL || curr_cpu->cpu_next == NULL)
6750Sstevel@tonic-gate 			curr_cpu = CPU;
6760Sstevel@tonic-gate 
6770Sstevel@tonic-gate 		/*
6780Sstevel@tonic-gate 		 * Advance to online CPU after curr_cpu (round-robin). For
6790Sstevel@tonic-gate 		 * INTR_WEIGHTED_DIST we choose the cpu with the lightest
6800Sstevel@tonic-gate 		 * weight.  For a nexus that does not support weight the
6810Sstevel@tonic-gate 		 * default weight of zero is used. We degrade to round-robin
6820Sstevel@tonic-gate 		 * behavior among equal weightes.  The default weight is zero
6830Sstevel@tonic-gate 		 * and round-robin behavior continues.
6840Sstevel@tonic-gate 		 *
6850Sstevel@tonic-gate 		 * Disable preemption while traversing cpu_next_onln to
6860Sstevel@tonic-gate 		 * ensure the list does not change.  This works because
6870Sstevel@tonic-gate 		 * modifiers of this list and other lists in a struct cpu
6880Sstevel@tonic-gate 		 * call pause_cpus() before making changes.
6890Sstevel@tonic-gate 		 */
6900Sstevel@tonic-gate 		kpreempt_disable();
6910Sstevel@tonic-gate 		cp = start_cpu = curr_cpu->cpu_next_onln;
6920Sstevel@tonic-gate 		new_cpu = NULL;
6930Sstevel@tonic-gate 		do {
6940Sstevel@tonic-gate 			/* Skip CPUs with interrupts disabled */
6950Sstevel@tonic-gate 			if ((cp->cpu_flags & CPU_ENABLE) == 0)
6960Sstevel@tonic-gate 				continue;
6970Sstevel@tonic-gate 
6980Sstevel@tonic-gate 			if (intr_policy == INTR_FLAT_DIST) {
6990Sstevel@tonic-gate 				/* select CPU */
7000Sstevel@tonic-gate 				new_cpu = cp;
7010Sstevel@tonic-gate 				break;
7020Sstevel@tonic-gate 			} else if ((new_cpu == NULL) ||
7030Sstevel@tonic-gate 			    (cp->cpu_intr_weight < new_cpu->cpu_intr_weight)) {
7040Sstevel@tonic-gate 				/* Choose if lighter weight */
7050Sstevel@tonic-gate 				new_cpu = cp;
7060Sstevel@tonic-gate 			}
7070Sstevel@tonic-gate 		} while ((cp = cp->cpu_next_onln) != start_cpu);
7080Sstevel@tonic-gate 		ASSERT(new_cpu);
7090Sstevel@tonic-gate 		cpuid = new_cpu->cpu_id;
7100Sstevel@tonic-gate 
7110Sstevel@tonic-gate 		INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: "
7120Sstevel@tonic-gate 		    "targeted\n", cpuid, new_cpu->cpu_intr_weight));
7130Sstevel@tonic-gate 
7140Sstevel@tonic-gate 		/* update static pointer for next round-robin */
7150Sstevel@tonic-gate 		curr_cpu = new_cpu;
7160Sstevel@tonic-gate 		kpreempt_enable();
7170Sstevel@tonic-gate 		break;
7180Sstevel@tonic-gate 	}
7190Sstevel@tonic-gate 	mutex_exit(&intr_dist_cpu_lock);
7200Sstevel@tonic-gate 	return (cpuid);
7210Sstevel@tonic-gate }
7220Sstevel@tonic-gate 
7230Sstevel@tonic-gate /*
7240Sstevel@tonic-gate  * Add or remove the the weight of a device from a CPUs interrupt weight.
7250Sstevel@tonic-gate  *
7260Sstevel@tonic-gate  * We expect nexus drivers to call intr_dist_cpuid_add/rem_device_weight for
7270Sstevel@tonic-gate  * their children to improve the overall quality of interrupt initialization.
7280Sstevel@tonic-gate  *
7290Sstevel@tonic-gate  * If a nexues shares the CPU returned by a single intr_dist_cpuid() call
7300Sstevel@tonic-gate  * among multiple devices (sharing ino) then the nexus should call
7310Sstevel@tonic-gate  * intr_dist_cpuid_add/rem_device_weight for each device separately. Devices
7320Sstevel@tonic-gate  * that share must specify the same cpuid.
7330Sstevel@tonic-gate  *
7340Sstevel@tonic-gate  * If a nexus driver is unable to determine the cpu at remove_intr time
7350Sstevel@tonic-gate  * for some of its interrupts, then it should not call add_device_weight -
7360Sstevel@tonic-gate  * intr_dist_cpuid will still provide round-robin.
7370Sstevel@tonic-gate  *
7380Sstevel@tonic-gate  * An established device weight (from dev_info node) takes precedence over
7390Sstevel@tonic-gate  * the weight passed in.  If a device weight is not already established
7400Sstevel@tonic-gate  * then the passed in nexus weight is established.
7410Sstevel@tonic-gate  */
7420Sstevel@tonic-gate void
7430Sstevel@tonic-gate intr_dist_cpuid_add_device_weight(uint32_t cpuid,
7440Sstevel@tonic-gate     dev_info_t *dip, int32_t nweight)
7450Sstevel@tonic-gate {
7460Sstevel@tonic-gate 	int32_t		eweight;
7470Sstevel@tonic-gate 
7480Sstevel@tonic-gate 	/*
7490Sstevel@tonic-gate 	 * For non-weighted policy everything has weight of zero (and we get
7500Sstevel@tonic-gate 	 * round-robin distribution from intr_dist_cpuid).
7510Sstevel@tonic-gate 	 * NB: intr_policy is limited to this file. A weighted nexus driver is
7520Sstevel@tonic-gate 	 * calls this rouitne even if intr_policy has been patched to
7530Sstevel@tonic-gate 	 * INTR_FLAG_DIST.
7540Sstevel@tonic-gate 	 */
7550Sstevel@tonic-gate 	ASSERT(dip);
7560Sstevel@tonic-gate 	if (intr_policy != INTR_WEIGHTED_DIST)
7570Sstevel@tonic-gate 		return;
7580Sstevel@tonic-gate 
7590Sstevel@tonic-gate 	eweight = i_ddi_get_intr_weight(dip);
7600Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: +%2d/%2d for "
7610Sstevel@tonic-gate 	    "%s#%d/%s#%d\n", cpuid, cpu[cpuid]->cpu_intr_weight,
7620Sstevel@tonic-gate 	    nweight, eweight, ddi_driver_name(ddi_get_parent(dip)),
7630Sstevel@tonic-gate 	    ddi_get_instance(ddi_get_parent(dip)),
7640Sstevel@tonic-gate 	    ddi_driver_name(dip), ddi_get_instance(dip)));
7650Sstevel@tonic-gate 
7660Sstevel@tonic-gate 	/* if no establish weight, establish nexus weight */
7670Sstevel@tonic-gate 	if (eweight < 0) {
7680Sstevel@tonic-gate 		if (nweight > 0)
7690Sstevel@tonic-gate 			(void) i_ddi_set_intr_weight(dip, nweight);
7700Sstevel@tonic-gate 		else
7710Sstevel@tonic-gate 			nweight = 0;
7720Sstevel@tonic-gate 	} else
7730Sstevel@tonic-gate 		nweight = eweight;	/* use established weight */
7740Sstevel@tonic-gate 
7750Sstevel@tonic-gate 	/* Establish exclusion for cpu_intr_weight manipulation */
7760Sstevel@tonic-gate 	mutex_enter(&intr_dist_cpu_lock);
7770Sstevel@tonic-gate 	cpu[cpuid]->cpu_intr_weight += nweight;
7780Sstevel@tonic-gate 
7790Sstevel@tonic-gate 	/* update intr_dist_weight_max */
7800Sstevel@tonic-gate 	if (nweight > intr_dist_weight_max)
7810Sstevel@tonic-gate 		intr_dist_weight_max = nweight;
7820Sstevel@tonic-gate 	mutex_exit(&intr_dist_cpu_lock);
7830Sstevel@tonic-gate }
7840Sstevel@tonic-gate 
7850Sstevel@tonic-gate void
7860Sstevel@tonic-gate intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip)
7870Sstevel@tonic-gate {
7880Sstevel@tonic-gate 	struct cpu	*cp;
7890Sstevel@tonic-gate 	int32_t		weight;
7900Sstevel@tonic-gate 
7910Sstevel@tonic-gate 	ASSERT(dip);
7920Sstevel@tonic-gate 	if (intr_policy != INTR_WEIGHTED_DIST)
7930Sstevel@tonic-gate 		return;
7940Sstevel@tonic-gate 
7950Sstevel@tonic-gate 	/* remove weight of device from cpu */
7960Sstevel@tonic-gate 	weight = i_ddi_get_intr_weight(dip);
7970Sstevel@tonic-gate 	if (weight < 0)
7980Sstevel@tonic-gate 		weight = 0;
7990Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: -%2d    for "
8000Sstevel@tonic-gate 	    "%s#%d/%s#%d\n", cpuid, cpu[cpuid]->cpu_intr_weight, weight,
8010Sstevel@tonic-gate 	    ddi_driver_name(ddi_get_parent(dip)),
8020Sstevel@tonic-gate 	    ddi_get_instance(ddi_get_parent(dip)),
8030Sstevel@tonic-gate 	    ddi_driver_name(dip), ddi_get_instance(dip)));
8040Sstevel@tonic-gate 
8050Sstevel@tonic-gate 	/* Establish exclusion for cpu_intr_weight manipulation */
8060Sstevel@tonic-gate 	mutex_enter(&intr_dist_cpu_lock);
8070Sstevel@tonic-gate 	cp = cpu[cpuid];
8080Sstevel@tonic-gate 	cp->cpu_intr_weight -= weight;
8090Sstevel@tonic-gate 	if (cp->cpu_intr_weight < 0)
8100Sstevel@tonic-gate 		cp->cpu_intr_weight = 0;	/* sanity */
8110Sstevel@tonic-gate 	mutex_exit(&intr_dist_cpu_lock);
8120Sstevel@tonic-gate }
813