10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 51455Sandrei * Common Development and Distribution License (the "License"). 61455Sandrei * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 224652Scwb * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 270Sstevel@tonic-gate 280Sstevel@tonic-gate #include <sys/sysmacros.h> 290Sstevel@tonic-gate #include <sys/stack.h> 300Sstevel@tonic-gate #include <sys/cpuvar.h> 310Sstevel@tonic-gate #include <sys/ivintr.h> 320Sstevel@tonic-gate #include <sys/intreg.h> 330Sstevel@tonic-gate #include <sys/membar.h> 340Sstevel@tonic-gate #include <sys/kmem.h> 350Sstevel@tonic-gate #include <sys/intr.h> 360Sstevel@tonic-gate #include <sys/sunndi.h> 370Sstevel@tonic-gate #include <sys/cmn_err.h> 380Sstevel@tonic-gate #include <sys/privregs.h> 390Sstevel@tonic-gate #include <sys/systm.h> 400Sstevel@tonic-gate #include <sys/archsystm.h> 410Sstevel@tonic-gate #include <sys/machsystm.h> 420Sstevel@tonic-gate #include <sys/x_call.h> 430Sstevel@tonic-gate #include <vm/seg_kp.h> 440Sstevel@tonic-gate #include <sys/debug.h> 450Sstevel@tonic-gate #include <sys/cyclic.h> 464652Scwb #include <sys/kdi_impl.h> 470Sstevel@tonic-gate 480Sstevel@tonic-gate #include <sys/cpu_sgnblk_defs.h> 490Sstevel@tonic-gate 500Sstevel@tonic-gate /* Global locks which protect the interrupt distribution lists */ 510Sstevel@tonic-gate static kmutex_t intr_dist_lock; 520Sstevel@tonic-gate static kmutex_t intr_dist_cpu_lock; 530Sstevel@tonic-gate 540Sstevel@tonic-gate /* Head of the interrupt distribution lists */ 550Sstevel@tonic-gate static struct intr_dist *intr_dist_head = NULL; 560Sstevel@tonic-gate static struct intr_dist *intr_dist_whead = NULL; 570Sstevel@tonic-gate 582973Sgovinda uint64_t siron_inum; 59*5076Smishra uint64_t *siron_cpu_inum = NULL; 60*5076Smishra uint64_t siron_poke_cpu_inum; 61*5076Smishra static int siron_cpu_setup(cpu_setup_t, int, void *); 62*5076Smishra extern uint_t softlevel1(); 63*5076Smishra 642973Sgovinda uint64_t poke_cpu_inum; 652973Sgovinda uint_t poke_cpu_intr(caddr_t arg1, caddr_t arg2); 66*5076Smishra uint_t siron_poke_cpu_intr(caddr_t arg1, caddr_t arg2); 672973Sgovinda 68522Ssudheer /* 69522Ssudheer * Note:- 70522Ssudheer * siron_pending was originally created to prevent a resource over consumption 71522Ssudheer * bug in setsoftint(exhaustion of interrupt pool free list). 72522Ssudheer * It's original intention is obsolete with the use of iv_pending in 73522Ssudheer * setsoftint. However, siron_pending stayed around, acting as a second 74522Ssudheer * gatekeeper preventing soft interrupts from being queued. In this capacity, 75522Ssudheer * it can lead to hangs on MP systems, where due to global visibility issues 76522Ssudheer * it can end up set while iv_pending is reset, preventing soft interrupts from 77522Ssudheer * ever being processed. In addition to its gatekeeper role, init_intr also 78522Ssudheer * uses it to flag the situation where siron() was called before siron_inum has 79522Ssudheer * been defined. 80522Ssudheer * 81522Ssudheer * siron() does not need an extra gatekeeper; any cpu that wishes should be 82522Ssudheer * allowed to queue a soft interrupt. It is softint()'s job to ensure 83522Ssudheer * correct handling of the queues. Therefore, siron_pending has been 84522Ssudheer * stripped of its gatekeeper task, retaining only its intr_init job, where 85522Ssudheer * it indicates that there is a pending need to call siron(). 86522Ssudheer */ 870Sstevel@tonic-gate int siron_pending; 880Sstevel@tonic-gate 890Sstevel@tonic-gate int intr_policy = INTR_WEIGHTED_DIST; /* interrupt distribution policy */ 900Sstevel@tonic-gate int intr_dist_debug = 0; 910Sstevel@tonic-gate int32_t intr_dist_weight_max = 1; 920Sstevel@tonic-gate int32_t intr_dist_weight_maxmax = 1000; 930Sstevel@tonic-gate int intr_dist_weight_maxfactor = 2; 940Sstevel@tonic-gate #define INTR_DEBUG(args) if (intr_dist_debug) cmn_err args 950Sstevel@tonic-gate 960Sstevel@tonic-gate /* 972973Sgovinda * intr_init() - Interrupt initialization 982973Sgovinda * Initialize the system's interrupt vector table. 990Sstevel@tonic-gate */ 1000Sstevel@tonic-gate void 1010Sstevel@tonic-gate intr_init(cpu_t *cp) 1020Sstevel@tonic-gate { 1032973Sgovinda extern uint_t softlevel1(); 1042973Sgovinda 1050Sstevel@tonic-gate init_ivintr(); 1062973Sgovinda REGISTER_BBUS_INTR(); 1072973Sgovinda 108*5076Smishra /* 109*5076Smishra * We just allocate memory for per-cpu siron right now. Rest of 110*5076Smishra * the work is done when CPU is configured. 111*5076Smishra */ 112*5076Smishra siron_cpu_inum = kmem_zalloc(sizeof (uint64_t) * NCPU, KM_SLEEP); 1132973Sgovinda siron_inum = add_softintr(PIL_1, softlevel1, 0, SOFTINT_ST); 1142973Sgovinda poke_cpu_inum = add_softintr(PIL_13, poke_cpu_intr, 0, SOFTINT_MT); 115*5076Smishra siron_poke_cpu_inum = add_softintr(PIL_13, 116*5076Smishra siron_poke_cpu_intr, 0, SOFTINT_MT); 1172973Sgovinda cp->cpu_m.poke_cpu_outstanding = B_FALSE; 1180Sstevel@tonic-gate 1190Sstevel@tonic-gate mutex_init(&intr_dist_lock, NULL, MUTEX_DEFAULT, NULL); 1200Sstevel@tonic-gate mutex_init(&intr_dist_cpu_lock, NULL, MUTEX_DEFAULT, NULL); 1210Sstevel@tonic-gate 1220Sstevel@tonic-gate /* 1230Sstevel@tonic-gate * A soft interrupt may have been requested prior to the initialization 1240Sstevel@tonic-gate * of soft interrupts. Soft interrupts can't be dispatched until after 1252973Sgovinda * init_intr(), so we have to wait until now before we can dispatch the 1262973Sgovinda * pending soft interrupt (if any). 1270Sstevel@tonic-gate */ 128522Ssudheer if (siron_pending) { 129522Ssudheer siron_pending = 0; 130522Ssudheer siron(); 131522Ssudheer } 1320Sstevel@tonic-gate } 1330Sstevel@tonic-gate 1340Sstevel@tonic-gate /* 1350Sstevel@tonic-gate * poke_cpu_intr - fall through when poke_cpu calls 1360Sstevel@tonic-gate */ 1370Sstevel@tonic-gate /* ARGSUSED */ 1380Sstevel@tonic-gate uint_t 1390Sstevel@tonic-gate poke_cpu_intr(caddr_t arg1, caddr_t arg2) 1400Sstevel@tonic-gate { 1410Sstevel@tonic-gate CPU->cpu_m.poke_cpu_outstanding = B_FALSE; 1420Sstevel@tonic-gate membar_stld_stst(); 1430Sstevel@tonic-gate return (1); 1440Sstevel@tonic-gate } 1450Sstevel@tonic-gate 1460Sstevel@tonic-gate /* 1474652Scwb * kmdb uses siron (and thus setsoftint) while the world is stopped in order to 1484652Scwb * inform its driver component that there's work to be done. We need to keep 1494652Scwb * DTrace from instrumenting kmdb's siron and setsoftint. We duplicate siron, 1504652Scwb * giving kmdb's version a kdi_ prefix to keep DTrace at bay. The 1514652Scwb * implementation of setsoftint is complicated enough that we don't want to 1524652Scwb * duplicate it, but at the same time we don't want to preclude tracing either. 1534652Scwb * The meat of setsoftint() therefore goes into kdi_setsoftint, with 1544652Scwb * setsoftint() implemented as a wrapper. This allows tracing, while still 1554652Scwb * providing a way for kmdb to sneak in unmolested. 1560Sstevel@tonic-gate */ 1570Sstevel@tonic-gate void 1584652Scwb kdi_siron(void) 1594652Scwb { 1604652Scwb if (siron_inum != 0) 1614652Scwb kdi_setsoftint(siron_inum); 1624652Scwb else 1634652Scwb siron_pending = 1; 1644652Scwb } 1654652Scwb 1664652Scwb void 1674652Scwb setsoftint(uint64_t inum) 1684652Scwb { 1694652Scwb kdi_setsoftint(inum); 1704652Scwb } 1714652Scwb 172*5076Smishra /* 173*5076Smishra * Generates softlevel1 interrupt on current CPU if it 174*5076Smishra * is not pending already. 175*5076Smishra */ 1764652Scwb void 1770Sstevel@tonic-gate siron(void) 1780Sstevel@tonic-gate { 179*5076Smishra uint64_t inum; 180*5076Smishra 181*5076Smishra if (siron_inum != 0) { 182*5076Smishra if (siron_cpu_inum[CPU->cpu_id] != 0) 183*5076Smishra inum = siron_cpu_inum[CPU->cpu_id]; 184*5076Smishra else 185*5076Smishra inum = siron_inum; 186*5076Smishra 187*5076Smishra setsoftint(inum); 188*5076Smishra } else 1890Sstevel@tonic-gate siron_pending = 1; 1900Sstevel@tonic-gate } 1910Sstevel@tonic-gate 1920Sstevel@tonic-gate /* 193*5076Smishra * This routine creates per-CPU siron inum for CPUs which are 194*5076Smishra * configured during boot. 195*5076Smishra */ 196*5076Smishra void 197*5076Smishra siron_mp_init() 198*5076Smishra { 199*5076Smishra cpu_t *c; 200*5076Smishra 201*5076Smishra mutex_enter(&cpu_lock); 202*5076Smishra c = cpu_list; 203*5076Smishra do { 204*5076Smishra (void) siron_cpu_setup(CPU_CONFIG, c->cpu_id, NULL); 205*5076Smishra } while ((c = c->cpu_next) != cpu_list); 206*5076Smishra 207*5076Smishra register_cpu_setup_func(siron_cpu_setup, NULL); 208*5076Smishra mutex_exit(&cpu_lock); 209*5076Smishra } 210*5076Smishra 211*5076Smishra /* 212*5076Smishra * siron_poke_cpu_intr - cross-call handler. 213*5076Smishra */ 214*5076Smishra /* ARGSUSED */ 215*5076Smishra uint_t 216*5076Smishra siron_poke_cpu_intr(caddr_t arg1, caddr_t arg2) 217*5076Smishra { 218*5076Smishra /* generate level1 softint */ 219*5076Smishra siron(); 220*5076Smishra return (1); 221*5076Smishra } 222*5076Smishra 223*5076Smishra /* 224*5076Smishra * This routine generates a cross-call on target CPU(s). 225*5076Smishra */ 226*5076Smishra void 227*5076Smishra siron_poke_cpu(cpuset_t poke) 228*5076Smishra { 229*5076Smishra int cpuid = CPU->cpu_id; 230*5076Smishra 231*5076Smishra if (CPU_IN_SET(poke, cpuid)) { 232*5076Smishra siron(); 233*5076Smishra CPUSET_DEL(poke, cpuid); 234*5076Smishra if (CPUSET_ISNULL(poke)) 235*5076Smishra return; 236*5076Smishra } 237*5076Smishra 238*5076Smishra xt_some(poke, setsoftint_tl1, siron_poke_cpu_inum, 0); 239*5076Smishra } 240*5076Smishra 241*5076Smishra /* 242*5076Smishra * This callback function allows us to create per-CPU siron inum. 243*5076Smishra */ 244*5076Smishra /* ARGSUSED */ 245*5076Smishra static int 246*5076Smishra siron_cpu_setup(cpu_setup_t what, int id, void *arg) 247*5076Smishra { 248*5076Smishra cpu_t *cp = cpu[id]; 249*5076Smishra 250*5076Smishra ASSERT(MUTEX_HELD(&cpu_lock)); 251*5076Smishra ASSERT(cp != NULL); 252*5076Smishra 253*5076Smishra switch (what) { 254*5076Smishra case CPU_CONFIG: 255*5076Smishra siron_cpu_inum[cp->cpu_id] = add_softintr(PIL_1, 256*5076Smishra (softintrfunc)softlevel1, 0, SOFTINT_ST); 257*5076Smishra break; 258*5076Smishra case CPU_UNCONFIG: 259*5076Smishra (void) rem_softintr(siron_cpu_inum[cp->cpu_id]); 260*5076Smishra siron_cpu_inum[cp->cpu_id] = 0; 261*5076Smishra break; 262*5076Smishra default: 263*5076Smishra break; 264*5076Smishra } 265*5076Smishra 266*5076Smishra return (0); 267*5076Smishra } 268*5076Smishra 269*5076Smishra /* 2700Sstevel@tonic-gate * no_ivintr() 2712973Sgovinda * called by setvecint_tl1() through sys_trap() 2720Sstevel@tonic-gate * vector interrupt received but not valid or not 2732973Sgovinda * registered in intr_vec_table 2740Sstevel@tonic-gate * considered as a spurious mondo interrupt 2750Sstevel@tonic-gate */ 2760Sstevel@tonic-gate /* ARGSUSED */ 2770Sstevel@tonic-gate void 2780Sstevel@tonic-gate no_ivintr(struct regs *rp, int inum, int pil) 2790Sstevel@tonic-gate { 2800Sstevel@tonic-gate cmn_err(CE_WARN, "invalid vector intr: number 0x%x, pil 0x%x", 2810Sstevel@tonic-gate inum, pil); 2820Sstevel@tonic-gate 2830Sstevel@tonic-gate #ifdef DEBUG_VEC_INTR 2840Sstevel@tonic-gate prom_enter_mon(); 2850Sstevel@tonic-gate #endif /* DEBUG_VEC_INTR */ 2860Sstevel@tonic-gate } 2870Sstevel@tonic-gate 2880Sstevel@tonic-gate void 2892973Sgovinda intr_dequeue_req(uint_t pil, uint64_t inum) 2900Sstevel@tonic-gate { 2912973Sgovinda intr_vec_t *iv, *next, *prev; 2922973Sgovinda struct machcpu *mcpu; 2932973Sgovinda uint32_t clr; 2942973Sgovinda processorid_t cpu_id; 2952973Sgovinda extern uint_t getpstate(void); 2960Sstevel@tonic-gate 2970Sstevel@tonic-gate ASSERT((getpstate() & PSTATE_IE) == 0); 2980Sstevel@tonic-gate 2990Sstevel@tonic-gate mcpu = &CPU->cpu_m; 3002973Sgovinda cpu_id = CPU->cpu_id; 3012973Sgovinda 3022973Sgovinda iv = (intr_vec_t *)inum; 3032973Sgovinda prev = NULL; 3042973Sgovinda next = mcpu->intr_head[pil]; 3050Sstevel@tonic-gate 3060Sstevel@tonic-gate /* Find a matching entry in the list */ 3072973Sgovinda while (next != NULL) { 3082973Sgovinda if (next == iv) 3090Sstevel@tonic-gate break; 3102973Sgovinda prev = next; 3112973Sgovinda next = IV_GET_PIL_NEXT(next, cpu_id); 3120Sstevel@tonic-gate } 3130Sstevel@tonic-gate 3142973Sgovinda if (next != NULL) { 3152973Sgovinda intr_vec_t *next_iv = IV_GET_PIL_NEXT(next, cpu_id); 3162973Sgovinda 3172973Sgovinda /* Remove entry from list */ 3182973Sgovinda if (prev != NULL) 3192973Sgovinda IV_SET_PIL_NEXT(prev, cpu_id, next_iv); /* non-head */ 3202973Sgovinda else 3212973Sgovinda mcpu->intr_head[pil] = next_iv; /* head */ 3222973Sgovinda 3232973Sgovinda if (next_iv == NULL) 3242973Sgovinda mcpu->intr_tail[pil] = prev; /* tail */ 3252973Sgovinda } 3262973Sgovinda 3272973Sgovinda /* Clear pending interrupts at this level if the list is empty */ 3280Sstevel@tonic-gate if (mcpu->intr_head[pil] == NULL) { 3290Sstevel@tonic-gate clr = 1 << pil; 3300Sstevel@tonic-gate if (pil == PIL_14) 3310Sstevel@tonic-gate clr |= (TICK_INT_MASK | STICK_INT_MASK); 3320Sstevel@tonic-gate wr_clr_softint(clr); 3330Sstevel@tonic-gate } 3340Sstevel@tonic-gate } 3350Sstevel@tonic-gate 3360Sstevel@tonic-gate 3370Sstevel@tonic-gate /* 3380Sstevel@tonic-gate * Send a directed interrupt of specified interrupt number id to a cpu. 3390Sstevel@tonic-gate */ 3400Sstevel@tonic-gate void 3410Sstevel@tonic-gate send_dirint( 3420Sstevel@tonic-gate int cpuix, /* cpu to be interrupted */ 3430Sstevel@tonic-gate int intr_id) /* interrupt number id */ 3440Sstevel@tonic-gate { 3450Sstevel@tonic-gate xt_one(cpuix, setsoftint_tl1, intr_id, 0); 3460Sstevel@tonic-gate } 3470Sstevel@tonic-gate 3480Sstevel@tonic-gate /* 3490Sstevel@tonic-gate * Take the specified CPU out of participation in interrupts. 3500Sstevel@tonic-gate * Called by p_online(2) when a processor is being taken off-line. 3510Sstevel@tonic-gate * This allows interrupt threads being handled on the processor to 3520Sstevel@tonic-gate * complete before the processor is idled. 3530Sstevel@tonic-gate */ 3540Sstevel@tonic-gate int 3550Sstevel@tonic-gate cpu_disable_intr(struct cpu *cp) 3560Sstevel@tonic-gate { 3570Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 3580Sstevel@tonic-gate 3590Sstevel@tonic-gate /* 3600Sstevel@tonic-gate * Turn off the CPU_ENABLE flag before calling the redistribution 3610Sstevel@tonic-gate * function, since it checks for this in the cpu flags. 3620Sstevel@tonic-gate */ 3630Sstevel@tonic-gate cp->cpu_flags &= ~CPU_ENABLE; 3640Sstevel@tonic-gate 3650Sstevel@tonic-gate intr_redist_all_cpus(); 3660Sstevel@tonic-gate 3670Sstevel@tonic-gate return (0); 3680Sstevel@tonic-gate } 3690Sstevel@tonic-gate 3700Sstevel@tonic-gate /* 3710Sstevel@tonic-gate * Allow the specified CPU to participate in interrupts. 3720Sstevel@tonic-gate * Called by p_online(2) if a processor could not be taken off-line 3730Sstevel@tonic-gate * because of bound threads, in order to resume processing interrupts. 3740Sstevel@tonic-gate * Also called after starting a processor. 3750Sstevel@tonic-gate */ 3760Sstevel@tonic-gate void 3770Sstevel@tonic-gate cpu_enable_intr(struct cpu *cp) 3780Sstevel@tonic-gate { 3790Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 3800Sstevel@tonic-gate 3810Sstevel@tonic-gate cp->cpu_flags |= CPU_ENABLE; 3820Sstevel@tonic-gate 3830Sstevel@tonic-gate intr_redist_all_cpus(); 3840Sstevel@tonic-gate } 3850Sstevel@tonic-gate 3860Sstevel@tonic-gate /* 3870Sstevel@tonic-gate * Add function to callback list for intr_redist_all_cpus. We keep two lists, 3880Sstevel@tonic-gate * one for weighted callbacks and one for normal callbacks. Weighted callbacks 3890Sstevel@tonic-gate * are issued to redirect interrupts of a specified weight, from heavy to 3900Sstevel@tonic-gate * light. This allows all the interrupts of a given weight to be redistributed 3910Sstevel@tonic-gate * for all weighted nexus drivers prior to those of less weight. 3920Sstevel@tonic-gate */ 3930Sstevel@tonic-gate static void 3940Sstevel@tonic-gate intr_dist_add_list(struct intr_dist **phead, void (*func)(void *), void *arg) 3950Sstevel@tonic-gate { 3960Sstevel@tonic-gate struct intr_dist *new = kmem_alloc(sizeof (*new), KM_SLEEP); 3970Sstevel@tonic-gate struct intr_dist *iptr; 3980Sstevel@tonic-gate struct intr_dist **pptr; 3990Sstevel@tonic-gate 4000Sstevel@tonic-gate ASSERT(func); 4010Sstevel@tonic-gate new->func = func; 4020Sstevel@tonic-gate new->arg = arg; 4030Sstevel@tonic-gate new->next = NULL; 4040Sstevel@tonic-gate 4050Sstevel@tonic-gate /* Add to tail so that redistribution occurs in original order. */ 4060Sstevel@tonic-gate mutex_enter(&intr_dist_lock); 4070Sstevel@tonic-gate for (iptr = *phead, pptr = phead; iptr != NULL; 4080Sstevel@tonic-gate pptr = &iptr->next, iptr = iptr->next) { 4090Sstevel@tonic-gate /* check for problems as we locate the tail */ 4100Sstevel@tonic-gate if ((iptr->func == func) && (iptr->arg == arg)) { 4110Sstevel@tonic-gate cmn_err(CE_PANIC, "intr_dist_add_list(): duplicate"); 4120Sstevel@tonic-gate /*NOTREACHED*/ 4130Sstevel@tonic-gate } 4140Sstevel@tonic-gate } 4150Sstevel@tonic-gate *pptr = new; 4160Sstevel@tonic-gate 4170Sstevel@tonic-gate mutex_exit(&intr_dist_lock); 4180Sstevel@tonic-gate } 4190Sstevel@tonic-gate 4200Sstevel@tonic-gate void 4210Sstevel@tonic-gate intr_dist_add(void (*func)(void *), void *arg) 4220Sstevel@tonic-gate { 4230Sstevel@tonic-gate intr_dist_add_list(&intr_dist_head, (void (*)(void *))func, arg); 4240Sstevel@tonic-gate } 4250Sstevel@tonic-gate 4260Sstevel@tonic-gate void 4270Sstevel@tonic-gate intr_dist_add_weighted(void (*func)(void *, int32_t, int32_t), void *arg) 4280Sstevel@tonic-gate { 4290Sstevel@tonic-gate intr_dist_add_list(&intr_dist_whead, (void (*)(void *))func, arg); 4300Sstevel@tonic-gate } 4310Sstevel@tonic-gate 4320Sstevel@tonic-gate /* 4330Sstevel@tonic-gate * Search for the interrupt distribution structure with the specified 4340Sstevel@tonic-gate * mondo vec reg in the interrupt distribution list. If a match is found, 4350Sstevel@tonic-gate * then delete the entry from the list. The caller is responsible for 4360Sstevel@tonic-gate * modifying the mondo vector registers. 4370Sstevel@tonic-gate */ 4380Sstevel@tonic-gate static void 4390Sstevel@tonic-gate intr_dist_rem_list(struct intr_dist **headp, void (*func)(void *), void *arg) 4400Sstevel@tonic-gate { 4410Sstevel@tonic-gate struct intr_dist *iptr; 4420Sstevel@tonic-gate struct intr_dist **vect; 4430Sstevel@tonic-gate 4440Sstevel@tonic-gate mutex_enter(&intr_dist_lock); 4450Sstevel@tonic-gate for (iptr = *headp, vect = headp; 4460Sstevel@tonic-gate iptr != NULL; vect = &iptr->next, iptr = iptr->next) { 4470Sstevel@tonic-gate if ((iptr->func == func) && (iptr->arg == arg)) { 4480Sstevel@tonic-gate *vect = iptr->next; 4490Sstevel@tonic-gate kmem_free(iptr, sizeof (struct intr_dist)); 4500Sstevel@tonic-gate mutex_exit(&intr_dist_lock); 4510Sstevel@tonic-gate return; 4520Sstevel@tonic-gate } 4530Sstevel@tonic-gate } 4540Sstevel@tonic-gate 4550Sstevel@tonic-gate if (!panicstr) 4560Sstevel@tonic-gate cmn_err(CE_PANIC, "intr_dist_rem_list: not found"); 4570Sstevel@tonic-gate mutex_exit(&intr_dist_lock); 4580Sstevel@tonic-gate } 4590Sstevel@tonic-gate 4600Sstevel@tonic-gate void 4610Sstevel@tonic-gate intr_dist_rem(void (*func)(void *), void *arg) 4620Sstevel@tonic-gate { 4630Sstevel@tonic-gate intr_dist_rem_list(&intr_dist_head, (void (*)(void *))func, arg); 4640Sstevel@tonic-gate } 4650Sstevel@tonic-gate 4660Sstevel@tonic-gate void 4670Sstevel@tonic-gate intr_dist_rem_weighted(void (*func)(void *, int32_t, int32_t), void *arg) 4680Sstevel@tonic-gate { 4690Sstevel@tonic-gate intr_dist_rem_list(&intr_dist_whead, (void (*)(void *))func, arg); 4700Sstevel@tonic-gate } 4710Sstevel@tonic-gate 4720Sstevel@tonic-gate /* 4730Sstevel@tonic-gate * Initiate interrupt redistribution. Redistribution improves the isolation 4740Sstevel@tonic-gate * associated with interrupt weights by ordering operations from heavy weight 4750Sstevel@tonic-gate * to light weight. When a CPUs orientation changes relative to interrupts, 4760Sstevel@tonic-gate * there is *always* a redistribution to accommodate this change (call to 4770Sstevel@tonic-gate * intr_redist_all_cpus()). As devices (not CPUs) attach/detach it is possible 4780Sstevel@tonic-gate * that a redistribution could improve the quality of an initialization. For 4790Sstevel@tonic-gate * example, if you are not using a NIC it may not be attached with s10 (devfs). 4800Sstevel@tonic-gate * If you then configure the NIC (ifconfig), this may cause the NIC to attach 4810Sstevel@tonic-gate * and plumb interrupts. The CPU assignment for the NIC's interrupts is 4820Sstevel@tonic-gate * occurring late, so optimal "isolation" relative to weight is not occurring. 4830Sstevel@tonic-gate * The same applies to detach, although in this case doing the redistribution 4840Sstevel@tonic-gate * might improve "spread" for medium weight devices since the "isolation" of 4850Sstevel@tonic-gate * a higher weight device may no longer be present. 4860Sstevel@tonic-gate * 4870Sstevel@tonic-gate * NB: We should provide a utility to trigger redistribution (ala "intradm -r"). 4880Sstevel@tonic-gate * 4890Sstevel@tonic-gate * NB: There is risk associated with automatically triggering execution of the 4900Sstevel@tonic-gate * redistribution code at arbitrary times. The risk comes from the fact that 4910Sstevel@tonic-gate * there is a lot of low-level hardware interaction associated with a 4920Sstevel@tonic-gate * redistribution. At some point we may want this code to perform automatic 4930Sstevel@tonic-gate * redistribution (redistribution thread; trigger timeout when add/remove 4940Sstevel@tonic-gate * weight delta is large enough, and call cv_signal from timeout - causing 4950Sstevel@tonic-gate * thead to call i_ddi_intr_redist_all_cpus()) but this is considered too 4960Sstevel@tonic-gate * risky at this time. 4970Sstevel@tonic-gate */ 4980Sstevel@tonic-gate void 4990Sstevel@tonic-gate i_ddi_intr_redist_all_cpus() 5000Sstevel@tonic-gate { 5010Sstevel@tonic-gate mutex_enter(&cpu_lock); 5020Sstevel@tonic-gate INTR_DEBUG((CE_CONT, "intr_dist: i_ddi_intr_redist_all_cpus\n")); 5030Sstevel@tonic-gate intr_redist_all_cpus(); 5040Sstevel@tonic-gate mutex_exit(&cpu_lock); 5050Sstevel@tonic-gate } 5060Sstevel@tonic-gate 5070Sstevel@tonic-gate /* 5080Sstevel@tonic-gate * Redistribute all interrupts 5090Sstevel@tonic-gate * 5100Sstevel@tonic-gate * This function redistributes all interrupting devices, running the 5110Sstevel@tonic-gate * parent callback functions for each node. 5120Sstevel@tonic-gate */ 5130Sstevel@tonic-gate void 5140Sstevel@tonic-gate intr_redist_all_cpus(void) 5150Sstevel@tonic-gate { 5160Sstevel@tonic-gate struct cpu *cp; 5170Sstevel@tonic-gate struct intr_dist *iptr; 5180Sstevel@tonic-gate int32_t weight, max_weight; 5190Sstevel@tonic-gate 5200Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 5210Sstevel@tonic-gate mutex_enter(&intr_dist_lock); 5220Sstevel@tonic-gate 5230Sstevel@tonic-gate /* 5240Sstevel@tonic-gate * zero cpu_intr_weight on all cpus - it is safe to traverse 5250Sstevel@tonic-gate * cpu_list since we hold cpu_lock. 5260Sstevel@tonic-gate */ 5270Sstevel@tonic-gate cp = cpu_list; 5280Sstevel@tonic-gate do { 5290Sstevel@tonic-gate cp->cpu_intr_weight = 0; 5300Sstevel@tonic-gate } while ((cp = cp->cpu_next) != cpu_list); 5310Sstevel@tonic-gate 5320Sstevel@tonic-gate /* 5330Sstevel@tonic-gate * Assume that this redistribution may encounter a device weight 5340Sstevel@tonic-gate * via driver.conf tuning of "ddi-intr-weight" that is at most 5350Sstevel@tonic-gate * intr_dist_weight_maxfactor times larger. 5360Sstevel@tonic-gate */ 5370Sstevel@tonic-gate max_weight = intr_dist_weight_max * intr_dist_weight_maxfactor; 5380Sstevel@tonic-gate if (max_weight > intr_dist_weight_maxmax) 5390Sstevel@tonic-gate max_weight = intr_dist_weight_maxmax; 5400Sstevel@tonic-gate intr_dist_weight_max = 1; 5410Sstevel@tonic-gate 5420Sstevel@tonic-gate INTR_DEBUG((CE_CONT, "intr_dist: " 5430Sstevel@tonic-gate "intr_redist_all_cpus: %d-0\n", max_weight)); 5440Sstevel@tonic-gate 5450Sstevel@tonic-gate /* 5460Sstevel@tonic-gate * Redistribute weighted, from heavy to light. The callback that 5470Sstevel@tonic-gate * specifies a weight equal to weight_max should redirect all 5480Sstevel@tonic-gate * interrupts of weight weight_max or greater [weight_max, inf.). 5490Sstevel@tonic-gate * Interrupts of lesser weight should be processed on the call with 5500Sstevel@tonic-gate * the matching weight. This allows all the heaver weight interrupts 5510Sstevel@tonic-gate * on all weighted busses (multiple pci busses) to be redirected prior 5520Sstevel@tonic-gate * to any lesser weight interrupts. 5530Sstevel@tonic-gate */ 5540Sstevel@tonic-gate for (weight = max_weight; weight >= 0; weight--) 5550Sstevel@tonic-gate for (iptr = intr_dist_whead; iptr != NULL; iptr = iptr->next) 5560Sstevel@tonic-gate ((void (*)(void *, int32_t, int32_t))iptr->func) 5570Sstevel@tonic-gate (iptr->arg, max_weight, weight); 5580Sstevel@tonic-gate 5590Sstevel@tonic-gate /* redistribute normal (non-weighted) interrupts */ 5600Sstevel@tonic-gate for (iptr = intr_dist_head; iptr != NULL; iptr = iptr->next) 5610Sstevel@tonic-gate ((void (*)(void *))iptr->func)(iptr->arg); 5620Sstevel@tonic-gate mutex_exit(&intr_dist_lock); 5630Sstevel@tonic-gate } 5640Sstevel@tonic-gate 5650Sstevel@tonic-gate void 5660Sstevel@tonic-gate intr_redist_all_cpus_shutdown(void) 5670Sstevel@tonic-gate { 5680Sstevel@tonic-gate intr_policy = INTR_CURRENT_CPU; 5690Sstevel@tonic-gate intr_redist_all_cpus(); 5700Sstevel@tonic-gate } 5710Sstevel@tonic-gate 5720Sstevel@tonic-gate /* 5730Sstevel@tonic-gate * Determine what CPU to target, based on interrupt policy. 5740Sstevel@tonic-gate * 5750Sstevel@tonic-gate * INTR_FLAT_DIST: hold a current CPU pointer in a static variable and 5760Sstevel@tonic-gate * advance through interrupt enabled cpus (round-robin). 5770Sstevel@tonic-gate * 5780Sstevel@tonic-gate * INTR_WEIGHTED_DIST: search for an enabled CPU with the lowest 5790Sstevel@tonic-gate * cpu_intr_weight, round robin when all equal. 5800Sstevel@tonic-gate * 5810Sstevel@tonic-gate * Weighted interrupt distribution provides two things: "spread" of weight 5820Sstevel@tonic-gate * (associated with algorithm itself) and "isolation" (associated with a 5830Sstevel@tonic-gate * particular device weight). A redistribution is what provides optimal 5840Sstevel@tonic-gate * "isolation" of heavy weight interrupts, optimal "spread" of weight 5850Sstevel@tonic-gate * (relative to what came before) is always occurring. 5860Sstevel@tonic-gate * 5870Sstevel@tonic-gate * An interrupt weight is a subjective number that represents the 5880Sstevel@tonic-gate * percentage of a CPU required to service a device's interrupts: the 5890Sstevel@tonic-gate * default weight is 0% (however the algorithm still maintains 5900Sstevel@tonic-gate * round-robin), a network interface controller (NIC) may have a large 5910Sstevel@tonic-gate * weight (35%). Interrupt weight only has meaning relative to the 5920Sstevel@tonic-gate * interrupt weight of other devices: a CPU can be weighted more than 5930Sstevel@tonic-gate * 100%, and a single device might consume more than 100% of a CPU. 5940Sstevel@tonic-gate * 5950Sstevel@tonic-gate * A coarse interrupt weight can be defined by the parent nexus driver 5960Sstevel@tonic-gate * based on bus specific information, like pci class codes. A nexus 5970Sstevel@tonic-gate * driver that supports device interrupt weighting for its children 5980Sstevel@tonic-gate * should call intr_dist_cpuid_add/rem_device_weight(), which adds 5990Sstevel@tonic-gate * and removes the weight of a device from the CPU that an interrupt 6000Sstevel@tonic-gate * is directed at. The quality of initialization improves when the 6010Sstevel@tonic-gate * device interrupt weights more accuracy reflect actual run-time weights, 6020Sstevel@tonic-gate * and as the assignments are ordered from is heavy to light. 6030Sstevel@tonic-gate * 6040Sstevel@tonic-gate * The implementation also supports interrupt weight being specified in 6050Sstevel@tonic-gate * driver.conf files via the property "ddi-intr-weight", which takes 6060Sstevel@tonic-gate * precedence over the nexus supplied weight. This support is added to 6070Sstevel@tonic-gate * permit possible tweaking in the product in response to customer 6080Sstevel@tonic-gate * problems. This is not a formal or committed interface. 6090Sstevel@tonic-gate * 6100Sstevel@tonic-gate * While a weighted approach chooses the CPU providing the best spread 6110Sstevel@tonic-gate * given past weights, less than optimal isolation can result in cases 6120Sstevel@tonic-gate * where heavy weight devices show up last. The nexus driver's interrupt 6130Sstevel@tonic-gate * redistribution logic should use intr_dist_add/rem_weighted so that 6140Sstevel@tonic-gate * interrupts can be redistributed heavy first for optimal isolation. 6150Sstevel@tonic-gate */ 6160Sstevel@tonic-gate uint32_t 6170Sstevel@tonic-gate intr_dist_cpuid(void) 6180Sstevel@tonic-gate { 6190Sstevel@tonic-gate static struct cpu *curr_cpu; 6200Sstevel@tonic-gate struct cpu *start_cpu; 6210Sstevel@tonic-gate struct cpu *new_cpu; 6220Sstevel@tonic-gate struct cpu *cp; 6230Sstevel@tonic-gate int cpuid = -1; 6240Sstevel@tonic-gate 6250Sstevel@tonic-gate /* Establish exclusion for curr_cpu and cpu_intr_weight manipulation */ 6260Sstevel@tonic-gate mutex_enter(&intr_dist_cpu_lock); 6270Sstevel@tonic-gate 6280Sstevel@tonic-gate switch (intr_policy) { 6290Sstevel@tonic-gate case INTR_CURRENT_CPU: 6300Sstevel@tonic-gate cpuid = CPU->cpu_id; 6310Sstevel@tonic-gate break; 6320Sstevel@tonic-gate 6330Sstevel@tonic-gate case INTR_BOOT_CPU: 6340Sstevel@tonic-gate panic("INTR_BOOT_CPU no longer supported."); 6350Sstevel@tonic-gate /*NOTREACHED*/ 6360Sstevel@tonic-gate 6370Sstevel@tonic-gate case INTR_FLAT_DIST: 6380Sstevel@tonic-gate case INTR_WEIGHTED_DIST: 6390Sstevel@tonic-gate default: 6400Sstevel@tonic-gate /* 6410Sstevel@tonic-gate * Ensure that curr_cpu is valid - cpu_next will be NULL if 6420Sstevel@tonic-gate * the cpu has been deleted (cpu structs are never freed). 6430Sstevel@tonic-gate */ 6440Sstevel@tonic-gate if (curr_cpu == NULL || curr_cpu->cpu_next == NULL) 6450Sstevel@tonic-gate curr_cpu = CPU; 6460Sstevel@tonic-gate 6470Sstevel@tonic-gate /* 6480Sstevel@tonic-gate * Advance to online CPU after curr_cpu (round-robin). For 6490Sstevel@tonic-gate * INTR_WEIGHTED_DIST we choose the cpu with the lightest 6500Sstevel@tonic-gate * weight. For a nexus that does not support weight the 6510Sstevel@tonic-gate * default weight of zero is used. We degrade to round-robin 6520Sstevel@tonic-gate * behavior among equal weightes. The default weight is zero 6530Sstevel@tonic-gate * and round-robin behavior continues. 6540Sstevel@tonic-gate * 6550Sstevel@tonic-gate * Disable preemption while traversing cpu_next_onln to 6560Sstevel@tonic-gate * ensure the list does not change. This works because 6570Sstevel@tonic-gate * modifiers of this list and other lists in a struct cpu 6580Sstevel@tonic-gate * call pause_cpus() before making changes. 6590Sstevel@tonic-gate */ 6600Sstevel@tonic-gate kpreempt_disable(); 6610Sstevel@tonic-gate cp = start_cpu = curr_cpu->cpu_next_onln; 6620Sstevel@tonic-gate new_cpu = NULL; 6630Sstevel@tonic-gate do { 6640Sstevel@tonic-gate /* Skip CPUs with interrupts disabled */ 6650Sstevel@tonic-gate if ((cp->cpu_flags & CPU_ENABLE) == 0) 6660Sstevel@tonic-gate continue; 6670Sstevel@tonic-gate 6680Sstevel@tonic-gate if (intr_policy == INTR_FLAT_DIST) { 6690Sstevel@tonic-gate /* select CPU */ 6700Sstevel@tonic-gate new_cpu = cp; 6710Sstevel@tonic-gate break; 6720Sstevel@tonic-gate } else if ((new_cpu == NULL) || 6730Sstevel@tonic-gate (cp->cpu_intr_weight < new_cpu->cpu_intr_weight)) { 6740Sstevel@tonic-gate /* Choose if lighter weight */ 6750Sstevel@tonic-gate new_cpu = cp; 6760Sstevel@tonic-gate } 6770Sstevel@tonic-gate } while ((cp = cp->cpu_next_onln) != start_cpu); 6780Sstevel@tonic-gate ASSERT(new_cpu); 6790Sstevel@tonic-gate cpuid = new_cpu->cpu_id; 6800Sstevel@tonic-gate 6810Sstevel@tonic-gate INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: " 6820Sstevel@tonic-gate "targeted\n", cpuid, new_cpu->cpu_intr_weight)); 6830Sstevel@tonic-gate 6840Sstevel@tonic-gate /* update static pointer for next round-robin */ 6850Sstevel@tonic-gate curr_cpu = new_cpu; 6860Sstevel@tonic-gate kpreempt_enable(); 6870Sstevel@tonic-gate break; 6880Sstevel@tonic-gate } 6890Sstevel@tonic-gate mutex_exit(&intr_dist_cpu_lock); 6900Sstevel@tonic-gate return (cpuid); 6910Sstevel@tonic-gate } 6920Sstevel@tonic-gate 6930Sstevel@tonic-gate /* 6940Sstevel@tonic-gate * Add or remove the the weight of a device from a CPUs interrupt weight. 6950Sstevel@tonic-gate * 6960Sstevel@tonic-gate * We expect nexus drivers to call intr_dist_cpuid_add/rem_device_weight for 6970Sstevel@tonic-gate * their children to improve the overall quality of interrupt initialization. 6980Sstevel@tonic-gate * 6990Sstevel@tonic-gate * If a nexues shares the CPU returned by a single intr_dist_cpuid() call 7000Sstevel@tonic-gate * among multiple devices (sharing ino) then the nexus should call 7010Sstevel@tonic-gate * intr_dist_cpuid_add/rem_device_weight for each device separately. Devices 7020Sstevel@tonic-gate * that share must specify the same cpuid. 7030Sstevel@tonic-gate * 7040Sstevel@tonic-gate * If a nexus driver is unable to determine the cpu at remove_intr time 7050Sstevel@tonic-gate * for some of its interrupts, then it should not call add_device_weight - 7060Sstevel@tonic-gate * intr_dist_cpuid will still provide round-robin. 7070Sstevel@tonic-gate * 7080Sstevel@tonic-gate * An established device weight (from dev_info node) takes precedence over 7090Sstevel@tonic-gate * the weight passed in. If a device weight is not already established 7100Sstevel@tonic-gate * then the passed in nexus weight is established. 7110Sstevel@tonic-gate */ 7120Sstevel@tonic-gate void 7130Sstevel@tonic-gate intr_dist_cpuid_add_device_weight(uint32_t cpuid, 7140Sstevel@tonic-gate dev_info_t *dip, int32_t nweight) 7150Sstevel@tonic-gate { 7160Sstevel@tonic-gate int32_t eweight; 7170Sstevel@tonic-gate 7180Sstevel@tonic-gate /* 7190Sstevel@tonic-gate * For non-weighted policy everything has weight of zero (and we get 7200Sstevel@tonic-gate * round-robin distribution from intr_dist_cpuid). 7210Sstevel@tonic-gate * NB: intr_policy is limited to this file. A weighted nexus driver is 7220Sstevel@tonic-gate * calls this rouitne even if intr_policy has been patched to 7230Sstevel@tonic-gate * INTR_FLAG_DIST. 7240Sstevel@tonic-gate */ 7250Sstevel@tonic-gate ASSERT(dip); 7260Sstevel@tonic-gate if (intr_policy != INTR_WEIGHTED_DIST) 7270Sstevel@tonic-gate return; 7280Sstevel@tonic-gate 7290Sstevel@tonic-gate eweight = i_ddi_get_intr_weight(dip); 7300Sstevel@tonic-gate INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: +%2d/%2d for " 7310Sstevel@tonic-gate "%s#%d/%s#%d\n", cpuid, cpu[cpuid]->cpu_intr_weight, 7320Sstevel@tonic-gate nweight, eweight, ddi_driver_name(ddi_get_parent(dip)), 7330Sstevel@tonic-gate ddi_get_instance(ddi_get_parent(dip)), 7340Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip))); 7350Sstevel@tonic-gate 7360Sstevel@tonic-gate /* if no establish weight, establish nexus weight */ 7370Sstevel@tonic-gate if (eweight < 0) { 7380Sstevel@tonic-gate if (nweight > 0) 7390Sstevel@tonic-gate (void) i_ddi_set_intr_weight(dip, nweight); 7400Sstevel@tonic-gate else 7410Sstevel@tonic-gate nweight = 0; 7420Sstevel@tonic-gate } else 7430Sstevel@tonic-gate nweight = eweight; /* use established weight */ 7440Sstevel@tonic-gate 7450Sstevel@tonic-gate /* Establish exclusion for cpu_intr_weight manipulation */ 7460Sstevel@tonic-gate mutex_enter(&intr_dist_cpu_lock); 7470Sstevel@tonic-gate cpu[cpuid]->cpu_intr_weight += nweight; 7480Sstevel@tonic-gate 7490Sstevel@tonic-gate /* update intr_dist_weight_max */ 7500Sstevel@tonic-gate if (nweight > intr_dist_weight_max) 7510Sstevel@tonic-gate intr_dist_weight_max = nweight; 7520Sstevel@tonic-gate mutex_exit(&intr_dist_cpu_lock); 7530Sstevel@tonic-gate } 7540Sstevel@tonic-gate 7550Sstevel@tonic-gate void 7560Sstevel@tonic-gate intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip) 7570Sstevel@tonic-gate { 7580Sstevel@tonic-gate struct cpu *cp; 7590Sstevel@tonic-gate int32_t weight; 7600Sstevel@tonic-gate 7610Sstevel@tonic-gate ASSERT(dip); 7620Sstevel@tonic-gate if (intr_policy != INTR_WEIGHTED_DIST) 7630Sstevel@tonic-gate return; 7640Sstevel@tonic-gate 7650Sstevel@tonic-gate /* remove weight of device from cpu */ 7660Sstevel@tonic-gate weight = i_ddi_get_intr_weight(dip); 7670Sstevel@tonic-gate if (weight < 0) 7680Sstevel@tonic-gate weight = 0; 7690Sstevel@tonic-gate INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: -%2d for " 7700Sstevel@tonic-gate "%s#%d/%s#%d\n", cpuid, cpu[cpuid]->cpu_intr_weight, weight, 7710Sstevel@tonic-gate ddi_driver_name(ddi_get_parent(dip)), 7720Sstevel@tonic-gate ddi_get_instance(ddi_get_parent(dip)), 7730Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip))); 7740Sstevel@tonic-gate 7750Sstevel@tonic-gate /* Establish exclusion for cpu_intr_weight manipulation */ 7760Sstevel@tonic-gate mutex_enter(&intr_dist_cpu_lock); 7770Sstevel@tonic-gate cp = cpu[cpuid]; 7780Sstevel@tonic-gate cp->cpu_intr_weight -= weight; 7790Sstevel@tonic-gate if (cp->cpu_intr_weight < 0) 7800Sstevel@tonic-gate cp->cpu_intr_weight = 0; /* sanity */ 7810Sstevel@tonic-gate mutex_exit(&intr_dist_cpu_lock); 7820Sstevel@tonic-gate } 783