xref: /onnv-gate/usr/src/uts/sun4/os/intr.c (revision 4652)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
51455Sandrei  * Common Development and Distribution License (the "License").
61455Sandrei  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
210Sstevel@tonic-gate /*
22*4652Scwb  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
230Sstevel@tonic-gate  * Use is subject to license terms.
240Sstevel@tonic-gate  */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
270Sstevel@tonic-gate 
280Sstevel@tonic-gate #include <sys/sysmacros.h>
290Sstevel@tonic-gate #include <sys/stack.h>
300Sstevel@tonic-gate #include <sys/cpuvar.h>
310Sstevel@tonic-gate #include <sys/ivintr.h>
320Sstevel@tonic-gate #include <sys/intreg.h>
330Sstevel@tonic-gate #include <sys/membar.h>
340Sstevel@tonic-gate #include <sys/kmem.h>
350Sstevel@tonic-gate #include <sys/intr.h>
360Sstevel@tonic-gate #include <sys/sunndi.h>
370Sstevel@tonic-gate #include <sys/cmn_err.h>
380Sstevel@tonic-gate #include <sys/privregs.h>
390Sstevel@tonic-gate #include <sys/systm.h>
400Sstevel@tonic-gate #include <sys/archsystm.h>
410Sstevel@tonic-gate #include <sys/machsystm.h>
420Sstevel@tonic-gate #include <sys/x_call.h>
430Sstevel@tonic-gate #include <vm/seg_kp.h>
440Sstevel@tonic-gate #include <sys/debug.h>
450Sstevel@tonic-gate #include <sys/cyclic.h>
46*4652Scwb #include <sys/kdi_impl.h>
470Sstevel@tonic-gate 
480Sstevel@tonic-gate #include <sys/cpu_sgnblk_defs.h>
490Sstevel@tonic-gate 
500Sstevel@tonic-gate /* Global locks which protect the interrupt distribution lists */
510Sstevel@tonic-gate static kmutex_t intr_dist_lock;
520Sstevel@tonic-gate static kmutex_t intr_dist_cpu_lock;
530Sstevel@tonic-gate 
540Sstevel@tonic-gate /* Head of the interrupt distribution lists */
550Sstevel@tonic-gate static struct intr_dist *intr_dist_head = NULL;
560Sstevel@tonic-gate static struct intr_dist *intr_dist_whead = NULL;
570Sstevel@tonic-gate 
582973Sgovinda uint64_t siron_inum;
592973Sgovinda uint64_t poke_cpu_inum;
602973Sgovinda uint_t poke_cpu_intr(caddr_t arg1, caddr_t arg2);
612973Sgovinda 
62522Ssudheer /*
63522Ssudheer  * Note:-
64522Ssudheer  * siron_pending was originally created to prevent a resource over consumption
65522Ssudheer  * bug in setsoftint(exhaustion of interrupt pool free list).
66522Ssudheer  * It's original intention is obsolete with the use of iv_pending in
67522Ssudheer  * setsoftint. However, siron_pending stayed around, acting as a second
68522Ssudheer  * gatekeeper preventing soft interrupts from being queued. In this capacity,
69522Ssudheer  * it can lead to hangs on MP systems, where due to global visibility issues
70522Ssudheer  * it can end up set while iv_pending is reset, preventing soft interrupts from
71522Ssudheer  * ever being processed. In addition to its gatekeeper role, init_intr also
72522Ssudheer  * uses it to flag the situation where siron() was called before siron_inum has
73522Ssudheer  * been defined.
74522Ssudheer  *
75522Ssudheer  * siron() does not need an extra gatekeeper; any cpu that wishes should be
76522Ssudheer  * allowed to queue a soft interrupt. It is softint()'s job to ensure
77522Ssudheer  * correct handling of the queues. Therefore, siron_pending has been
78522Ssudheer  * stripped of its gatekeeper task, retaining only its intr_init job, where
79522Ssudheer  * it indicates that there is a pending need to call siron().
80522Ssudheer  */
810Sstevel@tonic-gate int siron_pending;
820Sstevel@tonic-gate 
830Sstevel@tonic-gate int intr_policy = INTR_WEIGHTED_DIST;	/* interrupt distribution policy */
840Sstevel@tonic-gate int intr_dist_debug = 0;
850Sstevel@tonic-gate int32_t intr_dist_weight_max = 1;
860Sstevel@tonic-gate int32_t intr_dist_weight_maxmax = 1000;
870Sstevel@tonic-gate int intr_dist_weight_maxfactor = 2;
880Sstevel@tonic-gate #define	INTR_DEBUG(args) if (intr_dist_debug) cmn_err args
890Sstevel@tonic-gate 
900Sstevel@tonic-gate /*
912973Sgovinda  * intr_init() - Interrupt initialization
922973Sgovinda  *	Initialize the system's interrupt vector table.
930Sstevel@tonic-gate  */
940Sstevel@tonic-gate void
950Sstevel@tonic-gate intr_init(cpu_t *cp)
960Sstevel@tonic-gate {
972973Sgovinda 	extern uint_t softlevel1();
982973Sgovinda 
990Sstevel@tonic-gate 	init_ivintr();
1002973Sgovinda 	REGISTER_BBUS_INTR();
1012973Sgovinda 
1022973Sgovinda 	siron_inum = add_softintr(PIL_1, softlevel1, 0, SOFTINT_ST);
1032973Sgovinda 	poke_cpu_inum = add_softintr(PIL_13, poke_cpu_intr, 0, SOFTINT_MT);
1042973Sgovinda 	cp->cpu_m.poke_cpu_outstanding = B_FALSE;
1050Sstevel@tonic-gate 
1060Sstevel@tonic-gate 	mutex_init(&intr_dist_lock, NULL, MUTEX_DEFAULT, NULL);
1070Sstevel@tonic-gate 	mutex_init(&intr_dist_cpu_lock, NULL, MUTEX_DEFAULT, NULL);
1080Sstevel@tonic-gate 
1090Sstevel@tonic-gate 	/*
1100Sstevel@tonic-gate 	 * A soft interrupt may have been requested prior to the initialization
1110Sstevel@tonic-gate 	 * of soft interrupts.  Soft interrupts can't be dispatched until after
1122973Sgovinda 	 * init_intr(), so we have to wait until now before we can dispatch the
1132973Sgovinda 	 * pending soft interrupt (if any).
1140Sstevel@tonic-gate 	 */
115522Ssudheer 	if (siron_pending) {
116522Ssudheer 		siron_pending = 0;
117522Ssudheer 		siron();
118522Ssudheer 	}
1190Sstevel@tonic-gate }
1200Sstevel@tonic-gate 
1210Sstevel@tonic-gate /*
1220Sstevel@tonic-gate  * poke_cpu_intr - fall through when poke_cpu calls
1230Sstevel@tonic-gate  */
1240Sstevel@tonic-gate /* ARGSUSED */
1250Sstevel@tonic-gate uint_t
1260Sstevel@tonic-gate poke_cpu_intr(caddr_t arg1, caddr_t arg2)
1270Sstevel@tonic-gate {
1280Sstevel@tonic-gate 	CPU->cpu_m.poke_cpu_outstanding = B_FALSE;
1290Sstevel@tonic-gate 	membar_stld_stst();
1300Sstevel@tonic-gate 	return (1);
1310Sstevel@tonic-gate }
1320Sstevel@tonic-gate 
1330Sstevel@tonic-gate /*
134*4652Scwb  * kmdb uses siron (and thus setsoftint) while the world is stopped in order to
135*4652Scwb  * inform its driver component that there's work to be done.  We need to keep
136*4652Scwb  * DTrace from instrumenting kmdb's siron and setsoftint.  We duplicate siron,
137*4652Scwb  * giving kmdb's version a kdi_ prefix to keep DTrace at bay.  The
138*4652Scwb  * implementation of setsoftint is complicated enough that we don't want to
139*4652Scwb  * duplicate it, but at the same time we don't want to preclude tracing either.
140*4652Scwb  * The meat of setsoftint() therefore goes into kdi_setsoftint, with
141*4652Scwb  * setsoftint() implemented as a wrapper.  This allows tracing, while still
142*4652Scwb  * providing a way for kmdb to sneak in unmolested.
1430Sstevel@tonic-gate  */
1440Sstevel@tonic-gate void
145*4652Scwb kdi_siron(void)
146*4652Scwb {
147*4652Scwb 	if (siron_inum != 0)
148*4652Scwb 		kdi_setsoftint(siron_inum);
149*4652Scwb 	else
150*4652Scwb 		siron_pending = 1;
151*4652Scwb }
152*4652Scwb 
153*4652Scwb void
154*4652Scwb setsoftint(uint64_t inum)
155*4652Scwb {
156*4652Scwb 	kdi_setsoftint(inum);
157*4652Scwb }
158*4652Scwb 
159*4652Scwb void
1600Sstevel@tonic-gate siron(void)
1610Sstevel@tonic-gate {
162522Ssudheer 	if (siron_inum != 0)
163522Ssudheer 		setsoftint(siron_inum);
164522Ssudheer 	else
1650Sstevel@tonic-gate 		siron_pending = 1;
1660Sstevel@tonic-gate }
1670Sstevel@tonic-gate 
1680Sstevel@tonic-gate /*
1690Sstevel@tonic-gate  * no_ivintr()
1702973Sgovinda  * 	called by setvecint_tl1() through sys_trap()
1710Sstevel@tonic-gate  *	vector interrupt received but not valid or not
1722973Sgovinda  *	registered in intr_vec_table
1730Sstevel@tonic-gate  *	considered as a spurious mondo interrupt
1740Sstevel@tonic-gate  */
1750Sstevel@tonic-gate /* ARGSUSED */
1760Sstevel@tonic-gate void
1770Sstevel@tonic-gate no_ivintr(struct regs *rp, int inum, int pil)
1780Sstevel@tonic-gate {
1790Sstevel@tonic-gate 	cmn_err(CE_WARN, "invalid vector intr: number 0x%x, pil 0x%x",
1800Sstevel@tonic-gate 	    inum, pil);
1810Sstevel@tonic-gate 
1820Sstevel@tonic-gate #ifdef DEBUG_VEC_INTR
1830Sstevel@tonic-gate 	prom_enter_mon();
1840Sstevel@tonic-gate #endif /* DEBUG_VEC_INTR */
1850Sstevel@tonic-gate }
1860Sstevel@tonic-gate 
1870Sstevel@tonic-gate void
1882973Sgovinda intr_dequeue_req(uint_t pil, uint64_t inum)
1890Sstevel@tonic-gate {
1902973Sgovinda 	intr_vec_t	*iv, *next, *prev;
1912973Sgovinda 	struct machcpu	*mcpu;
1922973Sgovinda 	uint32_t	clr;
1932973Sgovinda 	processorid_t	cpu_id;
1942973Sgovinda 	extern uint_t	getpstate(void);
1950Sstevel@tonic-gate 
1960Sstevel@tonic-gate 	ASSERT((getpstate() & PSTATE_IE) == 0);
1970Sstevel@tonic-gate 
1980Sstevel@tonic-gate 	mcpu = &CPU->cpu_m;
1992973Sgovinda 	cpu_id = CPU->cpu_id;
2002973Sgovinda 
2012973Sgovinda 	iv = (intr_vec_t *)inum;
2022973Sgovinda 	prev = NULL;
2032973Sgovinda 	next = mcpu->intr_head[pil];
2040Sstevel@tonic-gate 
2050Sstevel@tonic-gate 	/* Find a matching entry in the list */
2062973Sgovinda 	while (next != NULL) {
2072973Sgovinda 		if (next == iv)
2080Sstevel@tonic-gate 			break;
2092973Sgovinda 		prev = next;
2102973Sgovinda 		next = IV_GET_PIL_NEXT(next, cpu_id);
2110Sstevel@tonic-gate 	}
2120Sstevel@tonic-gate 
2132973Sgovinda 	if (next != NULL) {
2142973Sgovinda 		intr_vec_t	*next_iv = IV_GET_PIL_NEXT(next, cpu_id);
2152973Sgovinda 
2162973Sgovinda 		/* Remove entry from list */
2172973Sgovinda 		if (prev != NULL)
2182973Sgovinda 			IV_SET_PIL_NEXT(prev, cpu_id, next_iv); /* non-head */
2192973Sgovinda 		else
2202973Sgovinda 			mcpu->intr_head[pil] = next_iv; /* head */
2212973Sgovinda 
2222973Sgovinda 		if (next_iv == NULL)
2232973Sgovinda 			mcpu->intr_tail[pil] = prev; /* tail */
2242973Sgovinda 	}
2252973Sgovinda 
2262973Sgovinda 	/* Clear pending interrupts at this level if the list is empty */
2270Sstevel@tonic-gate 	if (mcpu->intr_head[pil] == NULL) {
2280Sstevel@tonic-gate 		clr = 1 << pil;
2290Sstevel@tonic-gate 		if (pil == PIL_14)
2300Sstevel@tonic-gate 			clr |= (TICK_INT_MASK | STICK_INT_MASK);
2310Sstevel@tonic-gate 		wr_clr_softint(clr);
2320Sstevel@tonic-gate 	}
2330Sstevel@tonic-gate }
2340Sstevel@tonic-gate 
2350Sstevel@tonic-gate 
2360Sstevel@tonic-gate /*
2370Sstevel@tonic-gate  * Send a directed interrupt of specified interrupt number id to a cpu.
2380Sstevel@tonic-gate  */
2390Sstevel@tonic-gate void
2400Sstevel@tonic-gate send_dirint(
2410Sstevel@tonic-gate 	int cpuix,		/* cpu to be interrupted */
2420Sstevel@tonic-gate 	int intr_id)		/* interrupt number id */
2430Sstevel@tonic-gate {
2440Sstevel@tonic-gate 	xt_one(cpuix, setsoftint_tl1, intr_id, 0);
2450Sstevel@tonic-gate }
2460Sstevel@tonic-gate 
2470Sstevel@tonic-gate /*
2480Sstevel@tonic-gate  * Take the specified CPU out of participation in interrupts.
2490Sstevel@tonic-gate  *	Called by p_online(2) when a processor is being taken off-line.
2500Sstevel@tonic-gate  *	This allows interrupt threads being handled on the processor to
2510Sstevel@tonic-gate  *	complete before the processor is idled.
2520Sstevel@tonic-gate  */
2530Sstevel@tonic-gate int
2540Sstevel@tonic-gate cpu_disable_intr(struct cpu *cp)
2550Sstevel@tonic-gate {
2560Sstevel@tonic-gate 	ASSERT(MUTEX_HELD(&cpu_lock));
2570Sstevel@tonic-gate 
2580Sstevel@tonic-gate 	/*
2590Sstevel@tonic-gate 	 * Turn off the CPU_ENABLE flag before calling the redistribution
2600Sstevel@tonic-gate 	 * function, since it checks for this in the cpu flags.
2610Sstevel@tonic-gate 	 */
2620Sstevel@tonic-gate 	cp->cpu_flags &= ~CPU_ENABLE;
2630Sstevel@tonic-gate 
2640Sstevel@tonic-gate 	intr_redist_all_cpus();
2650Sstevel@tonic-gate 
2660Sstevel@tonic-gate 	return (0);
2670Sstevel@tonic-gate }
2680Sstevel@tonic-gate 
2690Sstevel@tonic-gate /*
2700Sstevel@tonic-gate  * Allow the specified CPU to participate in interrupts.
2710Sstevel@tonic-gate  *	Called by p_online(2) if a processor could not be taken off-line
2720Sstevel@tonic-gate  *	because of bound threads, in order to resume processing interrupts.
2730Sstevel@tonic-gate  *	Also called after starting a processor.
2740Sstevel@tonic-gate  */
2750Sstevel@tonic-gate void
2760Sstevel@tonic-gate cpu_enable_intr(struct cpu *cp)
2770Sstevel@tonic-gate {
2780Sstevel@tonic-gate 	ASSERT(MUTEX_HELD(&cpu_lock));
2790Sstevel@tonic-gate 
2800Sstevel@tonic-gate 	cp->cpu_flags |= CPU_ENABLE;
2810Sstevel@tonic-gate 
2820Sstevel@tonic-gate 	intr_redist_all_cpus();
2830Sstevel@tonic-gate }
2840Sstevel@tonic-gate 
2850Sstevel@tonic-gate /*
2860Sstevel@tonic-gate  * Add function to callback list for intr_redist_all_cpus.  We keep two lists,
2870Sstevel@tonic-gate  * one for weighted callbacks and one for normal callbacks. Weighted callbacks
2880Sstevel@tonic-gate  * are issued to redirect interrupts of a specified weight, from heavy to
2890Sstevel@tonic-gate  * light.  This allows all the interrupts of a given weight to be redistributed
2900Sstevel@tonic-gate  * for all weighted nexus drivers prior to those of less weight.
2910Sstevel@tonic-gate  */
2920Sstevel@tonic-gate static void
2930Sstevel@tonic-gate intr_dist_add_list(struct intr_dist **phead, void (*func)(void *), void *arg)
2940Sstevel@tonic-gate {
2950Sstevel@tonic-gate 	struct intr_dist *new = kmem_alloc(sizeof (*new), KM_SLEEP);
2960Sstevel@tonic-gate 	struct intr_dist *iptr;
2970Sstevel@tonic-gate 	struct intr_dist **pptr;
2980Sstevel@tonic-gate 
2990Sstevel@tonic-gate 	ASSERT(func);
3000Sstevel@tonic-gate 	new->func = func;
3010Sstevel@tonic-gate 	new->arg = arg;
3020Sstevel@tonic-gate 	new->next = NULL;
3030Sstevel@tonic-gate 
3040Sstevel@tonic-gate 	/* Add to tail so that redistribution occurs in original order. */
3050Sstevel@tonic-gate 	mutex_enter(&intr_dist_lock);
3060Sstevel@tonic-gate 	for (iptr = *phead, pptr = phead; iptr != NULL;
3070Sstevel@tonic-gate 	    pptr = &iptr->next, iptr = iptr->next) {
3080Sstevel@tonic-gate 		/* check for problems as we locate the tail */
3090Sstevel@tonic-gate 		if ((iptr->func == func) && (iptr->arg == arg)) {
3100Sstevel@tonic-gate 			cmn_err(CE_PANIC, "intr_dist_add_list(): duplicate");
3110Sstevel@tonic-gate 			/*NOTREACHED*/
3120Sstevel@tonic-gate 		}
3130Sstevel@tonic-gate 	}
3140Sstevel@tonic-gate 	*pptr = new;
3150Sstevel@tonic-gate 
3160Sstevel@tonic-gate 	mutex_exit(&intr_dist_lock);
3170Sstevel@tonic-gate }
3180Sstevel@tonic-gate 
3190Sstevel@tonic-gate void
3200Sstevel@tonic-gate intr_dist_add(void (*func)(void *), void *arg)
3210Sstevel@tonic-gate {
3220Sstevel@tonic-gate 	intr_dist_add_list(&intr_dist_head, (void (*)(void *))func, arg);
3230Sstevel@tonic-gate }
3240Sstevel@tonic-gate 
3250Sstevel@tonic-gate void
3260Sstevel@tonic-gate intr_dist_add_weighted(void (*func)(void *, int32_t, int32_t), void *arg)
3270Sstevel@tonic-gate {
3280Sstevel@tonic-gate 	intr_dist_add_list(&intr_dist_whead, (void (*)(void *))func, arg);
3290Sstevel@tonic-gate }
3300Sstevel@tonic-gate 
3310Sstevel@tonic-gate /*
3320Sstevel@tonic-gate  * Search for the interrupt distribution structure with the specified
3330Sstevel@tonic-gate  * mondo vec reg in the interrupt distribution list. If a match is found,
3340Sstevel@tonic-gate  * then delete the entry from the list. The caller is responsible for
3350Sstevel@tonic-gate  * modifying the mondo vector registers.
3360Sstevel@tonic-gate  */
3370Sstevel@tonic-gate static void
3380Sstevel@tonic-gate intr_dist_rem_list(struct intr_dist **headp, void (*func)(void *), void *arg)
3390Sstevel@tonic-gate {
3400Sstevel@tonic-gate 	struct intr_dist *iptr;
3410Sstevel@tonic-gate 	struct intr_dist **vect;
3420Sstevel@tonic-gate 
3430Sstevel@tonic-gate 	mutex_enter(&intr_dist_lock);
3440Sstevel@tonic-gate 	for (iptr = *headp, vect = headp;
3450Sstevel@tonic-gate 	    iptr != NULL; vect = &iptr->next, iptr = iptr->next) {
3460Sstevel@tonic-gate 		if ((iptr->func == func) && (iptr->arg == arg)) {
3470Sstevel@tonic-gate 			*vect = iptr->next;
3480Sstevel@tonic-gate 			kmem_free(iptr, sizeof (struct intr_dist));
3490Sstevel@tonic-gate 			mutex_exit(&intr_dist_lock);
3500Sstevel@tonic-gate 			return;
3510Sstevel@tonic-gate 		}
3520Sstevel@tonic-gate 	}
3530Sstevel@tonic-gate 
3540Sstevel@tonic-gate 	if (!panicstr)
3550Sstevel@tonic-gate 		cmn_err(CE_PANIC, "intr_dist_rem_list: not found");
3560Sstevel@tonic-gate 	mutex_exit(&intr_dist_lock);
3570Sstevel@tonic-gate }
3580Sstevel@tonic-gate 
3590Sstevel@tonic-gate void
3600Sstevel@tonic-gate intr_dist_rem(void (*func)(void *), void *arg)
3610Sstevel@tonic-gate {
3620Sstevel@tonic-gate 	intr_dist_rem_list(&intr_dist_head, (void (*)(void *))func, arg);
3630Sstevel@tonic-gate }
3640Sstevel@tonic-gate 
3650Sstevel@tonic-gate void
3660Sstevel@tonic-gate intr_dist_rem_weighted(void (*func)(void *, int32_t, int32_t), void *arg)
3670Sstevel@tonic-gate {
3680Sstevel@tonic-gate 	intr_dist_rem_list(&intr_dist_whead, (void (*)(void *))func, arg);
3690Sstevel@tonic-gate }
3700Sstevel@tonic-gate 
3710Sstevel@tonic-gate /*
3720Sstevel@tonic-gate  * Initiate interrupt redistribution.  Redistribution improves the isolation
3730Sstevel@tonic-gate  * associated with interrupt weights by ordering operations from heavy weight
3740Sstevel@tonic-gate  * to light weight.  When a CPUs orientation changes relative to interrupts,
3750Sstevel@tonic-gate  * there is *always* a redistribution to accommodate this change (call to
3760Sstevel@tonic-gate  * intr_redist_all_cpus()).  As devices (not CPUs) attach/detach it is possible
3770Sstevel@tonic-gate  * that a redistribution could improve the quality of an initialization. For
3780Sstevel@tonic-gate  * example, if you are not using a NIC it may not be attached with s10 (devfs).
3790Sstevel@tonic-gate  * If you then configure the NIC (ifconfig), this may cause the NIC to attach
3800Sstevel@tonic-gate  * and plumb interrupts.  The CPU assignment for the NIC's interrupts is
3810Sstevel@tonic-gate  * occurring late, so optimal "isolation" relative to weight is not occurring.
3820Sstevel@tonic-gate  * The same applies to detach, although in this case doing the redistribution
3830Sstevel@tonic-gate  * might improve "spread" for medium weight devices since the "isolation" of
3840Sstevel@tonic-gate  * a higher weight device may no longer be present.
3850Sstevel@tonic-gate  *
3860Sstevel@tonic-gate  * NB: We should provide a utility to trigger redistribution (ala "intradm -r").
3870Sstevel@tonic-gate  *
3880Sstevel@tonic-gate  * NB: There is risk associated with automatically triggering execution of the
3890Sstevel@tonic-gate  * redistribution code at arbitrary times. The risk comes from the fact that
3900Sstevel@tonic-gate  * there is a lot of low-level hardware interaction associated with a
3910Sstevel@tonic-gate  * redistribution.  At some point we may want this code to perform automatic
3920Sstevel@tonic-gate  * redistribution (redistribution thread; trigger timeout when add/remove
3930Sstevel@tonic-gate  * weight delta is large enough, and call cv_signal from timeout - causing
3940Sstevel@tonic-gate  * thead to call i_ddi_intr_redist_all_cpus()) but this is considered too
3950Sstevel@tonic-gate  * risky at this time.
3960Sstevel@tonic-gate  */
3970Sstevel@tonic-gate void
3980Sstevel@tonic-gate i_ddi_intr_redist_all_cpus()
3990Sstevel@tonic-gate {
4000Sstevel@tonic-gate 	mutex_enter(&cpu_lock);
4010Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: i_ddi_intr_redist_all_cpus\n"));
4020Sstevel@tonic-gate 	intr_redist_all_cpus();
4030Sstevel@tonic-gate 	mutex_exit(&cpu_lock);
4040Sstevel@tonic-gate }
4050Sstevel@tonic-gate 
4060Sstevel@tonic-gate /*
4070Sstevel@tonic-gate  * Redistribute all interrupts
4080Sstevel@tonic-gate  *
4090Sstevel@tonic-gate  * This function redistributes all interrupting devices, running the
4100Sstevel@tonic-gate  * parent callback functions for each node.
4110Sstevel@tonic-gate  */
4120Sstevel@tonic-gate void
4130Sstevel@tonic-gate intr_redist_all_cpus(void)
4140Sstevel@tonic-gate {
4150Sstevel@tonic-gate 	struct cpu *cp;
4160Sstevel@tonic-gate 	struct intr_dist *iptr;
4170Sstevel@tonic-gate 	int32_t weight, max_weight;
4180Sstevel@tonic-gate 
4190Sstevel@tonic-gate 	ASSERT(MUTEX_HELD(&cpu_lock));
4200Sstevel@tonic-gate 	mutex_enter(&intr_dist_lock);
4210Sstevel@tonic-gate 
4220Sstevel@tonic-gate 	/*
4230Sstevel@tonic-gate 	 * zero cpu_intr_weight on all cpus - it is safe to traverse
4240Sstevel@tonic-gate 	 * cpu_list since we hold cpu_lock.
4250Sstevel@tonic-gate 	 */
4260Sstevel@tonic-gate 	cp = cpu_list;
4270Sstevel@tonic-gate 	do {
4280Sstevel@tonic-gate 		cp->cpu_intr_weight = 0;
4290Sstevel@tonic-gate 	} while ((cp = cp->cpu_next) != cpu_list);
4300Sstevel@tonic-gate 
4310Sstevel@tonic-gate 	/*
4320Sstevel@tonic-gate 	 * Assume that this redistribution may encounter a device weight
4330Sstevel@tonic-gate 	 * via driver.conf tuning of "ddi-intr-weight" that is at most
4340Sstevel@tonic-gate 	 * intr_dist_weight_maxfactor times larger.
4350Sstevel@tonic-gate 	 */
4360Sstevel@tonic-gate 	max_weight = intr_dist_weight_max * intr_dist_weight_maxfactor;
4370Sstevel@tonic-gate 	if (max_weight > intr_dist_weight_maxmax)
4380Sstevel@tonic-gate 		max_weight = intr_dist_weight_maxmax;
4390Sstevel@tonic-gate 	intr_dist_weight_max = 1;
4400Sstevel@tonic-gate 
4410Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: "
4420Sstevel@tonic-gate 	    "intr_redist_all_cpus: %d-0\n", max_weight));
4430Sstevel@tonic-gate 
4440Sstevel@tonic-gate 	/*
4450Sstevel@tonic-gate 	 * Redistribute weighted, from heavy to light.  The callback that
4460Sstevel@tonic-gate 	 * specifies a weight equal to weight_max should redirect all
4470Sstevel@tonic-gate 	 * interrupts of weight weight_max or greater [weight_max, inf.).
4480Sstevel@tonic-gate 	 * Interrupts of lesser weight should be processed on the call with
4490Sstevel@tonic-gate 	 * the matching weight. This allows all the heaver weight interrupts
4500Sstevel@tonic-gate 	 * on all weighted busses (multiple pci busses) to be redirected prior
4510Sstevel@tonic-gate 	 * to any lesser weight interrupts.
4520Sstevel@tonic-gate 	 */
4530Sstevel@tonic-gate 	for (weight = max_weight; weight >= 0; weight--)
4540Sstevel@tonic-gate 		for (iptr = intr_dist_whead; iptr != NULL; iptr = iptr->next)
4550Sstevel@tonic-gate 			((void (*)(void *, int32_t, int32_t))iptr->func)
4560Sstevel@tonic-gate 			    (iptr->arg, max_weight, weight);
4570Sstevel@tonic-gate 
4580Sstevel@tonic-gate 	/* redistribute normal (non-weighted) interrupts */
4590Sstevel@tonic-gate 	for (iptr = intr_dist_head; iptr != NULL; iptr = iptr->next)
4600Sstevel@tonic-gate 		((void (*)(void *))iptr->func)(iptr->arg);
4610Sstevel@tonic-gate 	mutex_exit(&intr_dist_lock);
4620Sstevel@tonic-gate }
4630Sstevel@tonic-gate 
4640Sstevel@tonic-gate void
4650Sstevel@tonic-gate intr_redist_all_cpus_shutdown(void)
4660Sstevel@tonic-gate {
4670Sstevel@tonic-gate 	intr_policy = INTR_CURRENT_CPU;
4680Sstevel@tonic-gate 	intr_redist_all_cpus();
4690Sstevel@tonic-gate }
4700Sstevel@tonic-gate 
4710Sstevel@tonic-gate /*
4720Sstevel@tonic-gate  * Determine what CPU to target, based on interrupt policy.
4730Sstevel@tonic-gate  *
4740Sstevel@tonic-gate  * INTR_FLAT_DIST: hold a current CPU pointer in a static variable and
4750Sstevel@tonic-gate  *	advance through interrupt enabled cpus (round-robin).
4760Sstevel@tonic-gate  *
4770Sstevel@tonic-gate  * INTR_WEIGHTED_DIST: search for an enabled CPU with the lowest
4780Sstevel@tonic-gate  *	cpu_intr_weight, round robin when all equal.
4790Sstevel@tonic-gate  *
4800Sstevel@tonic-gate  *	Weighted interrupt distribution provides two things: "spread" of weight
4810Sstevel@tonic-gate  *	(associated with algorithm itself) and "isolation" (associated with a
4820Sstevel@tonic-gate  *	particular device weight). A redistribution is what provides optimal
4830Sstevel@tonic-gate  *	"isolation" of heavy weight interrupts, optimal "spread" of weight
4840Sstevel@tonic-gate  *	(relative to what came before) is always occurring.
4850Sstevel@tonic-gate  *
4860Sstevel@tonic-gate  *	An interrupt weight is a subjective number that represents the
4870Sstevel@tonic-gate  *	percentage of a CPU required to service a device's interrupts: the
4880Sstevel@tonic-gate  *	default weight is 0% (however the algorithm still maintains
4890Sstevel@tonic-gate  *	round-robin), a network interface controller (NIC) may have a large
4900Sstevel@tonic-gate  *	weight (35%). Interrupt weight only has meaning relative to the
4910Sstevel@tonic-gate  *	interrupt weight of other devices: a CPU can be weighted more than
4920Sstevel@tonic-gate  *	100%, and a single device might consume more than 100% of a CPU.
4930Sstevel@tonic-gate  *
4940Sstevel@tonic-gate  *	A coarse interrupt weight can be defined by the parent nexus driver
4950Sstevel@tonic-gate  *	based on bus specific information, like pci class codes. A nexus
4960Sstevel@tonic-gate  *	driver that supports device interrupt weighting for its children
4970Sstevel@tonic-gate  *	should call intr_dist_cpuid_add/rem_device_weight(), which adds
4980Sstevel@tonic-gate  *	and removes the weight of a device from the CPU that an interrupt
4990Sstevel@tonic-gate  *	is directed at.  The quality of initialization improves when the
5000Sstevel@tonic-gate  *	device interrupt weights more accuracy reflect actual run-time weights,
5010Sstevel@tonic-gate  *	and as the assignments are ordered from is heavy to light.
5020Sstevel@tonic-gate  *
5030Sstevel@tonic-gate  *	The implementation also supports interrupt weight being specified in
5040Sstevel@tonic-gate  *	driver.conf files via the property "ddi-intr-weight", which takes
5050Sstevel@tonic-gate  *	precedence over the nexus supplied weight.  This support is added to
5060Sstevel@tonic-gate  *	permit possible tweaking in the product in response to customer
5070Sstevel@tonic-gate  *	problems. This is not a formal or committed interface.
5080Sstevel@tonic-gate  *
5090Sstevel@tonic-gate  *	While a weighted approach chooses the CPU providing the best spread
5100Sstevel@tonic-gate  *	given past weights, less than optimal isolation can result in cases
5110Sstevel@tonic-gate  *	where heavy weight devices show up last. The nexus driver's interrupt
5120Sstevel@tonic-gate  *	redistribution logic should use intr_dist_add/rem_weighted so that
5130Sstevel@tonic-gate  *	interrupts can be redistributed heavy first for optimal isolation.
5140Sstevel@tonic-gate  */
5150Sstevel@tonic-gate uint32_t
5160Sstevel@tonic-gate intr_dist_cpuid(void)
5170Sstevel@tonic-gate {
5180Sstevel@tonic-gate 	static struct cpu	*curr_cpu;
5190Sstevel@tonic-gate 	struct cpu		*start_cpu;
5200Sstevel@tonic-gate 	struct cpu		*new_cpu;
5210Sstevel@tonic-gate 	struct cpu		*cp;
5220Sstevel@tonic-gate 	int			cpuid = -1;
5230Sstevel@tonic-gate 
5240Sstevel@tonic-gate 	/* Establish exclusion for curr_cpu and cpu_intr_weight manipulation */
5250Sstevel@tonic-gate 	mutex_enter(&intr_dist_cpu_lock);
5260Sstevel@tonic-gate 
5270Sstevel@tonic-gate 	switch (intr_policy) {
5280Sstevel@tonic-gate 	case INTR_CURRENT_CPU:
5290Sstevel@tonic-gate 		cpuid = CPU->cpu_id;
5300Sstevel@tonic-gate 		break;
5310Sstevel@tonic-gate 
5320Sstevel@tonic-gate 	case INTR_BOOT_CPU:
5330Sstevel@tonic-gate 		panic("INTR_BOOT_CPU no longer supported.");
5340Sstevel@tonic-gate 		/*NOTREACHED*/
5350Sstevel@tonic-gate 
5360Sstevel@tonic-gate 	case INTR_FLAT_DIST:
5370Sstevel@tonic-gate 	case INTR_WEIGHTED_DIST:
5380Sstevel@tonic-gate 	default:
5390Sstevel@tonic-gate 		/*
5400Sstevel@tonic-gate 		 * Ensure that curr_cpu is valid - cpu_next will be NULL if
5410Sstevel@tonic-gate 		 * the cpu has been deleted (cpu structs are never freed).
5420Sstevel@tonic-gate 		 */
5430Sstevel@tonic-gate 		if (curr_cpu == NULL || curr_cpu->cpu_next == NULL)
5440Sstevel@tonic-gate 			curr_cpu = CPU;
5450Sstevel@tonic-gate 
5460Sstevel@tonic-gate 		/*
5470Sstevel@tonic-gate 		 * Advance to online CPU after curr_cpu (round-robin). For
5480Sstevel@tonic-gate 		 * INTR_WEIGHTED_DIST we choose the cpu with the lightest
5490Sstevel@tonic-gate 		 * weight.  For a nexus that does not support weight the
5500Sstevel@tonic-gate 		 * default weight of zero is used. We degrade to round-robin
5510Sstevel@tonic-gate 		 * behavior among equal weightes.  The default weight is zero
5520Sstevel@tonic-gate 		 * and round-robin behavior continues.
5530Sstevel@tonic-gate 		 *
5540Sstevel@tonic-gate 		 * Disable preemption while traversing cpu_next_onln to
5550Sstevel@tonic-gate 		 * ensure the list does not change.  This works because
5560Sstevel@tonic-gate 		 * modifiers of this list and other lists in a struct cpu
5570Sstevel@tonic-gate 		 * call pause_cpus() before making changes.
5580Sstevel@tonic-gate 		 */
5590Sstevel@tonic-gate 		kpreempt_disable();
5600Sstevel@tonic-gate 		cp = start_cpu = curr_cpu->cpu_next_onln;
5610Sstevel@tonic-gate 		new_cpu = NULL;
5620Sstevel@tonic-gate 		do {
5630Sstevel@tonic-gate 			/* Skip CPUs with interrupts disabled */
5640Sstevel@tonic-gate 			if ((cp->cpu_flags & CPU_ENABLE) == 0)
5650Sstevel@tonic-gate 				continue;
5660Sstevel@tonic-gate 
5670Sstevel@tonic-gate 			if (intr_policy == INTR_FLAT_DIST) {
5680Sstevel@tonic-gate 				/* select CPU */
5690Sstevel@tonic-gate 				new_cpu = cp;
5700Sstevel@tonic-gate 				break;
5710Sstevel@tonic-gate 			} else if ((new_cpu == NULL) ||
5720Sstevel@tonic-gate 			    (cp->cpu_intr_weight < new_cpu->cpu_intr_weight)) {
5730Sstevel@tonic-gate 				/* Choose if lighter weight */
5740Sstevel@tonic-gate 				new_cpu = cp;
5750Sstevel@tonic-gate 			}
5760Sstevel@tonic-gate 		} while ((cp = cp->cpu_next_onln) != start_cpu);
5770Sstevel@tonic-gate 		ASSERT(new_cpu);
5780Sstevel@tonic-gate 		cpuid = new_cpu->cpu_id;
5790Sstevel@tonic-gate 
5800Sstevel@tonic-gate 		INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: "
5810Sstevel@tonic-gate 		    "targeted\n", cpuid, new_cpu->cpu_intr_weight));
5820Sstevel@tonic-gate 
5830Sstevel@tonic-gate 		/* update static pointer for next round-robin */
5840Sstevel@tonic-gate 		curr_cpu = new_cpu;
5850Sstevel@tonic-gate 		kpreempt_enable();
5860Sstevel@tonic-gate 		break;
5870Sstevel@tonic-gate 	}
5880Sstevel@tonic-gate 	mutex_exit(&intr_dist_cpu_lock);
5890Sstevel@tonic-gate 	return (cpuid);
5900Sstevel@tonic-gate }
5910Sstevel@tonic-gate 
5920Sstevel@tonic-gate /*
5930Sstevel@tonic-gate  * Add or remove the the weight of a device from a CPUs interrupt weight.
5940Sstevel@tonic-gate  *
5950Sstevel@tonic-gate  * We expect nexus drivers to call intr_dist_cpuid_add/rem_device_weight for
5960Sstevel@tonic-gate  * their children to improve the overall quality of interrupt initialization.
5970Sstevel@tonic-gate  *
5980Sstevel@tonic-gate  * If a nexues shares the CPU returned by a single intr_dist_cpuid() call
5990Sstevel@tonic-gate  * among multiple devices (sharing ino) then the nexus should call
6000Sstevel@tonic-gate  * intr_dist_cpuid_add/rem_device_weight for each device separately. Devices
6010Sstevel@tonic-gate  * that share must specify the same cpuid.
6020Sstevel@tonic-gate  *
6030Sstevel@tonic-gate  * If a nexus driver is unable to determine the cpu at remove_intr time
6040Sstevel@tonic-gate  * for some of its interrupts, then it should not call add_device_weight -
6050Sstevel@tonic-gate  * intr_dist_cpuid will still provide round-robin.
6060Sstevel@tonic-gate  *
6070Sstevel@tonic-gate  * An established device weight (from dev_info node) takes precedence over
6080Sstevel@tonic-gate  * the weight passed in.  If a device weight is not already established
6090Sstevel@tonic-gate  * then the passed in nexus weight is established.
6100Sstevel@tonic-gate  */
6110Sstevel@tonic-gate void
6120Sstevel@tonic-gate intr_dist_cpuid_add_device_weight(uint32_t cpuid,
6130Sstevel@tonic-gate     dev_info_t *dip, int32_t nweight)
6140Sstevel@tonic-gate {
6150Sstevel@tonic-gate 	int32_t		eweight;
6160Sstevel@tonic-gate 
6170Sstevel@tonic-gate 	/*
6180Sstevel@tonic-gate 	 * For non-weighted policy everything has weight of zero (and we get
6190Sstevel@tonic-gate 	 * round-robin distribution from intr_dist_cpuid).
6200Sstevel@tonic-gate 	 * NB: intr_policy is limited to this file. A weighted nexus driver is
6210Sstevel@tonic-gate 	 * calls this rouitne even if intr_policy has been patched to
6220Sstevel@tonic-gate 	 * INTR_FLAG_DIST.
6230Sstevel@tonic-gate 	 */
6240Sstevel@tonic-gate 	ASSERT(dip);
6250Sstevel@tonic-gate 	if (intr_policy != INTR_WEIGHTED_DIST)
6260Sstevel@tonic-gate 		return;
6270Sstevel@tonic-gate 
6280Sstevel@tonic-gate 	eweight = i_ddi_get_intr_weight(dip);
6290Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: +%2d/%2d for "
6300Sstevel@tonic-gate 	    "%s#%d/%s#%d\n", cpuid, cpu[cpuid]->cpu_intr_weight,
6310Sstevel@tonic-gate 	    nweight, eweight, ddi_driver_name(ddi_get_parent(dip)),
6320Sstevel@tonic-gate 	    ddi_get_instance(ddi_get_parent(dip)),
6330Sstevel@tonic-gate 	    ddi_driver_name(dip), ddi_get_instance(dip)));
6340Sstevel@tonic-gate 
6350Sstevel@tonic-gate 	/* if no establish weight, establish nexus weight */
6360Sstevel@tonic-gate 	if (eweight < 0) {
6370Sstevel@tonic-gate 		if (nweight > 0)
6380Sstevel@tonic-gate 			(void) i_ddi_set_intr_weight(dip, nweight);
6390Sstevel@tonic-gate 		else
6400Sstevel@tonic-gate 			nweight = 0;
6410Sstevel@tonic-gate 	} else
6420Sstevel@tonic-gate 		nweight = eweight;	/* use established weight */
6430Sstevel@tonic-gate 
6440Sstevel@tonic-gate 	/* Establish exclusion for cpu_intr_weight manipulation */
6450Sstevel@tonic-gate 	mutex_enter(&intr_dist_cpu_lock);
6460Sstevel@tonic-gate 	cpu[cpuid]->cpu_intr_weight += nweight;
6470Sstevel@tonic-gate 
6480Sstevel@tonic-gate 	/* update intr_dist_weight_max */
6490Sstevel@tonic-gate 	if (nweight > intr_dist_weight_max)
6500Sstevel@tonic-gate 		intr_dist_weight_max = nweight;
6510Sstevel@tonic-gate 	mutex_exit(&intr_dist_cpu_lock);
6520Sstevel@tonic-gate }
6530Sstevel@tonic-gate 
6540Sstevel@tonic-gate void
6550Sstevel@tonic-gate intr_dist_cpuid_rem_device_weight(uint32_t cpuid, dev_info_t *dip)
6560Sstevel@tonic-gate {
6570Sstevel@tonic-gate 	struct cpu	*cp;
6580Sstevel@tonic-gate 	int32_t		weight;
6590Sstevel@tonic-gate 
6600Sstevel@tonic-gate 	ASSERT(dip);
6610Sstevel@tonic-gate 	if (intr_policy != INTR_WEIGHTED_DIST)
6620Sstevel@tonic-gate 		return;
6630Sstevel@tonic-gate 
6640Sstevel@tonic-gate 	/* remove weight of device from cpu */
6650Sstevel@tonic-gate 	weight = i_ddi_get_intr_weight(dip);
6660Sstevel@tonic-gate 	if (weight < 0)
6670Sstevel@tonic-gate 		weight = 0;
6680Sstevel@tonic-gate 	INTR_DEBUG((CE_CONT, "intr_dist: cpu %2d weight %3d: -%2d    for "
6690Sstevel@tonic-gate 	    "%s#%d/%s#%d\n", cpuid, cpu[cpuid]->cpu_intr_weight, weight,
6700Sstevel@tonic-gate 	    ddi_driver_name(ddi_get_parent(dip)),
6710Sstevel@tonic-gate 	    ddi_get_instance(ddi_get_parent(dip)),
6720Sstevel@tonic-gate 	    ddi_driver_name(dip), ddi_get_instance(dip)));
6730Sstevel@tonic-gate 
6740Sstevel@tonic-gate 	/* Establish exclusion for cpu_intr_weight manipulation */
6750Sstevel@tonic-gate 	mutex_enter(&intr_dist_cpu_lock);
6760Sstevel@tonic-gate 	cp = cpu[cpuid];
6770Sstevel@tonic-gate 	cp->cpu_intr_weight -= weight;
6780Sstevel@tonic-gate 	if (cp->cpu_intr_weight < 0)
6790Sstevel@tonic-gate 		cp->cpu_intr_weight = 0;	/* sanity */
6800Sstevel@tonic-gate 	mutex_exit(&intr_dist_cpu_lock);
6810Sstevel@tonic-gate }
682