xref: /onnv-gate/usr/src/uts/sun4/io/px/px_fm.h (revision 12458:8a6b6f4699c0)
127Sjchu /*
227Sjchu  * CDDL HEADER START
327Sjchu  *
427Sjchu  * The contents of this file are subject to the terms of the
53274Set142600  * Common Development and Distribution License (the "License").
63274Set142600  * You may not use this file except in compliance with the License.
727Sjchu  *
827Sjchu  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
927Sjchu  * or http://www.opensolaris.org/os/licensing.
1027Sjchu  * See the License for the specific language governing permissions
1127Sjchu  * and limitations under the License.
1227Sjchu  *
1327Sjchu  * When distributing Covered Code, include this CDDL HEADER in each
1427Sjchu  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1527Sjchu  * If applicable, add the following below this CDDL HEADER, with the
1627Sjchu  * fields enclosed by brackets "[]" replaced with your own identifying
1727Sjchu  * information: Portions Copyright [yyyy] [name of copyright owner]
1827Sjchu  *
1927Sjchu  * CDDL HEADER END
2027Sjchu  */
2127Sjchu /*
2212076SKrishna.Elango@Sun.COM  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
2327Sjchu  */
2427Sjchu 
2527Sjchu #ifndef _SYS_PX_FM_H
2627Sjchu #define	_SYS_PX_FM_H
2727Sjchu 
2827Sjchu #ifdef	__cplusplus
2927Sjchu extern "C" {
3027Sjchu #endif
3127Sjchu 
3227Sjchu #define	PX_ERR_PIL	14
3327Sjchu #define	PX_ERR_LOW_PIL  9
3427Sjchu 
3527Sjchu /*
3627Sjchu  * Error handlers maybe called due to trap or interrupts
3727Sjchu  * occured.
3827Sjchu  */
3927Sjchu #define	PX_TRAP_CALL	0
4027Sjchu #define	PX_INTR_CALL	1
4127Sjchu #define	PX_LIB_CALL	2
4227Sjchu 
4327Sjchu /*
4427Sjchu  * Definition of Fire internal error severity -
453274Set142600  * HW Reset     Errors that cause hardware to automatically reset. Software is
463274Set142600  *              being reset along, sticky status bits need to be cleaned up upon
473274Set142600  *              system initialization.
483274Set142600  * Panic        Errors that definitely result in panic'ing the system.
493274Set142600  * Expected     Expected error, do not panic, plus do not send ereport.
503274Set142600  * Protected    Errors SW to determine panic or not, forgivable for safe access.
513274Set142600  *              Set when SW determines this error is forgivable during safe acc.
523274Set142600  * No-panic     Errors that don't directly result in panic'ing the system.
533274Set142600  * No-Error     When an interrupt occured and no errors were seen
5412076SKrishna.Elango@Sun.COM  * Fabric Scan	Indicates that fabric scan will determine final severity of a
5512076SKrishna.Elango@Sun.COM  *		panicable error.
5627Sjchu  */
5712076SKrishna.Elango@Sun.COM #define	PX_FABRIC_SCAN		(0x1 << 6)
583274Set142600 #define	PX_HW_RESET		(0x1 << 5)
593274Set142600 #define	PX_PANIC		(0x1 << 4)
603274Set142600 #define	PX_EXPECTED		(0x1 << 3)
613274Set142600 #define	PX_PROTECTED		(0x1 << 2)
623274Set142600 #define	PX_NO_PANIC		(0x1 << 1)
633274Set142600 #define	PX_NO_ERROR		(0x1 << 0)
643274Set142600 
653274Set142600 #define	PX_HB		(0x1 << 2)
663274Set142600 #define	PX_RP		(0x1 << 1)
673274Set142600 #define	PX_RC		(0x1 << 0)
6827Sjchu 
693274Set142600 /*
703274Set142600  * Generic PCIe Root Port Error Handling
713274Set142600  * This struct must align with px_pec_err_t in sun4v/io/px/px_err.h
723274Set142600  */
733274Set142600 typedef struct px_err_pcie {
743274Set142600 	uint32_t tx_hdr1;	/* sysino */
753274Set142600 	uint32_t tx_hdr2;	/* sysino */
763274Set142600 	uint32_t tx_hdr3;	/* ehdl */
773274Set142600 	uint32_t tx_hdr4;	/* ehdl */
783274Set142600 	uint32_t primary_ue;	/* stick */
793274Set142600 	uint32_t rsvd0;		/* stick */
803274Set142600 	uint32_t rsvd1;		/* pec_desc */
813274Set142600 	uint16_t pci_err_status;
823274Set142600 	uint16_t pcie_err_status;
833274Set142600 	uint32_t ce_reg;
843274Set142600 	uint32_t ue_reg;
853274Set142600 	uint32_t rx_hdr1;	/* hdr[0] */
863274Set142600 	uint32_t rx_hdr2;	/* hdr[0] */
873274Set142600 	uint32_t rx_hdr3;	/* hdr[1] */
883274Set142600 	uint32_t rx_hdr4;	/* hdr[1] */
893274Set142600 	uint32_t rsvd3;		/* err_src_reg */
903274Set142600 	uint32_t rsvd4;		/* root err status */
913274Set142600 } px_err_pcie_t;
92383Set142600 
933274Set142600 #define	PX_FM_BLOCK_HOST	(0x1 << 0)
943274Set142600 #define	PX_FM_BLOCK_PCIE	(0x1 << 1)
953274Set142600 #define	PX_FM_BLOCK_ALL		(PX_FM_BLOCK_HOST | PX_FM_BLOCK_PCIE)
96383Set142600 
9727Sjchu /*
9827Sjchu  * Error handling FMA hook
9927Sjchu  */
10027Sjchu extern void px_bus_enter(dev_info_t *dip, ddi_acc_handle_t handle);
10127Sjchu extern void px_bus_exit(dev_info_t *dip, ddi_acc_handle_t handle);
10227Sjchu extern int px_fm_attach(px_t *px_p);
10327Sjchu extern void px_fm_detach(px_t *px_p);
104*12458SErwin.Tsaur@Sun.COM extern void px_fm_cb_enable(px_t *px_p);
105*12458SErwin.Tsaur@Sun.COM extern void px_fm_cb_disable(px_t *px_p);
10627Sjchu extern int px_fm_init_child(dev_info_t *, dev_info_t *, int,
10727Sjchu     ddi_iblock_cookie_t *);
1086313Skrishnae extern void px_fm_acc_setup(ddi_map_req_t *, dev_info_t *, pci_regspec_t *rp);
10927Sjchu extern int px_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *);
1103274Set142600 extern int px_err_cmn_intr(px_t *, ddi_fm_error_t *, int, int);
11127Sjchu 
11227Sjchu /*
11327Sjchu  * Fire interrupt handlers
11427Sjchu  */
11527Sjchu extern uint_t px_err_cb_intr(caddr_t arg);
11627Sjchu extern uint_t px_err_dmc_pec_intr(caddr_t arg);
11727Sjchu extern uint_t px_err_fabric_intr(px_t *px_p, msgcode_t msg_code,
11827Sjchu     pcie_req_id_t rid);
11927Sjchu 
12027Sjchu /*
12127Sjchu  * Common error handling functions
12227Sjchu  */
1236313Skrishnae extern int px_scan_fabric(px_t *px_p, dev_info_t *rdip, ddi_fm_error_t *derr);
12427Sjchu extern void px_err_safeacc_check(px_t *px_p, ddi_fm_error_t *derr);
1253274Set142600 extern int px_err_check_eq(dev_info_t *dip);
1263274Set142600 extern int px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr,
12711654SKrishna.Elango@Sun.COM     px_err_pcie_t *regs, pf_intr_type_t intr_type);
1286313Skrishnae extern int px_fm_enter(px_t *px_p);
1296313Skrishnae extern void px_fm_exit(px_t *px_p);
1306313Skrishnae extern void px_err_panic(int err, int msg, int fab_err, boolean_t isTest);
13111596SJason.Beloro@Sun.COM extern pf_data_t *px_rp_en_q(px_t *px_p, pcie_req_id_t fault_bdf,
1323274Set142600     uint32_t fault_addr, uint16_t s_status);
13311596SJason.Beloro@Sun.COM extern pf_data_t *px_get_pfd(px_t *px_p);
13427Sjchu 
1356313Skrishnae /*
1366313Skrishnae  * Sparc specific cfg, pio and dma handle lookup/check functions
1376313Skrishnae  */
1386313Skrishnae extern int px_err_cfg_hdl_check(dev_info_t *dip, const void *handle,
1396313Skrishnae     const void *addr, const void *not_used);
1406313Skrishnae extern int px_err_pio_hdl_check(dev_info_t *dip, const void *handle,
1416313Skrishnae     const void *addr, const void *not_used);
1426313Skrishnae extern int px_err_dma_hdl_check(dev_info_t *dip, const void *handle,
1436313Skrishnae     const void *addr, const void *not_used);
1446313Skrishnae 
14527Sjchu #ifdef	__cplusplus
14627Sjchu }
14727Sjchu #endif
14827Sjchu 
14927Sjchu #endif	/* _SYS_PX_FM_H */
150