xref: /onnv-gate/usr/src/uts/sun/sys/scsi/adapters/fasvar.h (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #ifndef	_SYS_SCSI_ADAPTERS_FASVAR_H
28*0Sstevel@tonic-gate #define	_SYS_SCSI_ADAPTERS_FASVAR_H
29*0Sstevel@tonic-gate 
30*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*0Sstevel@tonic-gate 
32*0Sstevel@tonic-gate /*
33*0Sstevel@tonic-gate  * QLogic FAS (Enhanced	Scsi Processor)	Definitions,
34*0Sstevel@tonic-gate  * Software && Hardware.
35*0Sstevel@tonic-gate  */
36*0Sstevel@tonic-gate 
37*0Sstevel@tonic-gate #ifdef	__cplusplus
38*0Sstevel@tonic-gate extern "C" {
39*0Sstevel@tonic-gate #endif
40*0Sstevel@tonic-gate 
41*0Sstevel@tonic-gate #include <sys/note.h>
42*0Sstevel@tonic-gate 
43*0Sstevel@tonic-gate /*
44*0Sstevel@tonic-gate  * Compile options
45*0Sstevel@tonic-gate  */
46*0Sstevel@tonic-gate #if DEBUG
47*0Sstevel@tonic-gate #define	FASDEBUG		/* turn	on debugging code */
48*0Sstevel@tonic-gate #define	FASTEST
49*0Sstevel@tonic-gate #endif /* DEBUG	*/
50*0Sstevel@tonic-gate 
51*0Sstevel@tonic-gate /*
52*0Sstevel@tonic-gate  * Software Definitions
53*0Sstevel@tonic-gate  */
54*0Sstevel@tonic-gate #define	POLL_TIMEOUT		(2 * SCSI_POLL_TIMEOUT * 1000000)
55*0Sstevel@tonic-gate #define	SHORT_POLL_TIMEOUT	(1000000) /* in	usec, about 1 secs */
56*0Sstevel@tonic-gate #define	FAS_MUTEX(fas)		(&(fas)->f_mutex)
57*0Sstevel@tonic-gate #define	FAS_CV(fas)		(&(fas)->f_cv)
58*0Sstevel@tonic-gate #define	FAS_INITIAL_SOFT_SPACE	4	/* Used	for the	softstate_init func */
59*0Sstevel@tonic-gate #define	FAS_QUIESCE_TIMEOUT	1	/* 1 sec */
60*0Sstevel@tonic-gate 
61*0Sstevel@tonic-gate /*
62*0Sstevel@tonic-gate  * Data	Structure for this Host	Adapter.
63*0Sstevel@tonic-gate  *
64*0Sstevel@tonic-gate  * structure to	hold active outstanding	cmds
65*0Sstevel@tonic-gate  */
66*0Sstevel@tonic-gate struct f_slots {
67*0Sstevel@tonic-gate 	ushort_t		f_dups;
68*0Sstevel@tonic-gate 	ushort_t		f_tags;
69*0Sstevel@tonic-gate 	int			f_timeout;
70*0Sstevel@tonic-gate 	int			f_timebase;
71*0Sstevel@tonic-gate 				/* t_slot size is 1 for	non-tagged, and	*/
72*0Sstevel@tonic-gate 				/* 256 for tagged targets		*/
73*0Sstevel@tonic-gate 	ushort_t		f_n_slots; /* number of	a_slots		*/
74*0Sstevel@tonic-gate 	ushort_t		f_size;
75*0Sstevel@tonic-gate 	struct fas_cmd		*f_slot[1];	/* may be for 256 for TQ */
76*0Sstevel@tonic-gate };
77*0Sstevel@tonic-gate 
78*0Sstevel@tonic-gate #define	FAS_F_SLOTS_SIZE_TQ	(sizeof	(struct	f_slots) + \
79*0Sstevel@tonic-gate 			(sizeof	(struct	fas_cmd	*) * (NTAGS -1)))
80*0Sstevel@tonic-gate #define	FAS_F_SLOT_SIZE		(sizeof	(struct	f_slots))
81*0Sstevel@tonic-gate 
82*0Sstevel@tonic-gate /*
83*0Sstevel@tonic-gate  * HBA interface macros
84*0Sstevel@tonic-gate  */
85*0Sstevel@tonic-gate #define	SDEV2TRAN(sd)		((sd)->sd_address.a_hba_tran)
86*0Sstevel@tonic-gate #define	SDEV2ADDR(sd)		(&((sd)->sd_address))
87*0Sstevel@tonic-gate #define	PKT2TRAN(pkt)		((pkt)->pkt_address.a_hba_tran)
88*0Sstevel@tonic-gate #define	ADDR2TRAN(ap)		((ap)->a_hba_tran)
89*0Sstevel@tonic-gate 
90*0Sstevel@tonic-gate #define	TRAN2FAS(tran)		((struct fas *)(tran)->tran_hba_private)
91*0Sstevel@tonic-gate #define	SDEV2FAS(sd)		(TRAN2FAS(SDEV2TRAN(sd)))
92*0Sstevel@tonic-gate #define	PKT2FAS(pkt)		(TRAN2FAS(PKT2TRAN(pkt)))
93*0Sstevel@tonic-gate #define	ADDR2FAS(ap)		(TRAN2FAS(ADDR2TRAN(ap)))
94*0Sstevel@tonic-gate 
95*0Sstevel@tonic-gate 
96*0Sstevel@tonic-gate /*
97*0Sstevel@tonic-gate  * soft	state information for this host	adapter
98*0Sstevel@tonic-gate  */
99*0Sstevel@tonic-gate #define	N_SLOTS			(NTARGETS_WIDE*NLUNS_PER_TARGET)
100*0Sstevel@tonic-gate #define	REG_TRACE_BUF_SIZE	1024
101*0Sstevel@tonic-gate 
102*0Sstevel@tonic-gate struct fas {
103*0Sstevel@tonic-gate 	int		f_instance;
104*0Sstevel@tonic-gate 	/*
105*0Sstevel@tonic-gate 	 * Transport structure for this	instance of the	hba
106*0Sstevel@tonic-gate 	 */
107*0Sstevel@tonic-gate 	scsi_hba_tran_t	*f_tran;
108*0Sstevel@tonic-gate 
109*0Sstevel@tonic-gate 	/*
110*0Sstevel@tonic-gate 	 * dev_info_t reference
111*0Sstevel@tonic-gate 	 */
112*0Sstevel@tonic-gate 	dev_info_t	*f_dev;
113*0Sstevel@tonic-gate 
114*0Sstevel@tonic-gate 	/*
115*0Sstevel@tonic-gate 	 * mutex to protect softstate and hw regs
116*0Sstevel@tonic-gate 	 */
117*0Sstevel@tonic-gate 	kmutex_t	f_mutex;
118*0Sstevel@tonic-gate 
119*0Sstevel@tonic-gate 	/*
120*0Sstevel@tonic-gate 	 * Interrupt block cookie
121*0Sstevel@tonic-gate 	 */
122*0Sstevel@tonic-gate 	ddi_iblock_cookie_t	f_iblock;
123*0Sstevel@tonic-gate 
124*0Sstevel@tonic-gate 	/*
125*0Sstevel@tonic-gate 	 * Next	in a linked list of host adapters
126*0Sstevel@tonic-gate 	 */
127*0Sstevel@tonic-gate 	struct fas	*f_next;
128*0Sstevel@tonic-gate 
129*0Sstevel@tonic-gate 	/*
130*0Sstevel@tonic-gate 	 * Type	byte for this host adapter
131*0Sstevel@tonic-gate 	 * and rev of the FEPS chip
132*0Sstevel@tonic-gate 	 */
133*0Sstevel@tonic-gate 	uchar_t		f_type;
134*0Sstevel@tonic-gate 	uchar_t		f_hm_rev;
135*0Sstevel@tonic-gate 
136*0Sstevel@tonic-gate 	/*
137*0Sstevel@tonic-gate 	 * value for configuration register 1.
138*0Sstevel@tonic-gate 	 * Also	contains Initiator Id.
139*0Sstevel@tonic-gate 	 */
140*0Sstevel@tonic-gate 	uint8_t		f_fasconf;
141*0Sstevel@tonic-gate 
142*0Sstevel@tonic-gate 	/*
143*0Sstevel@tonic-gate 	 * value for configuration register 2
144*0Sstevel@tonic-gate 	 */
145*0Sstevel@tonic-gate 	uint8_t		f_fasconf2;
146*0Sstevel@tonic-gate 
147*0Sstevel@tonic-gate 	/*
148*0Sstevel@tonic-gate 	 * value for configuration register 3
149*0Sstevel@tonic-gate 	 */
150*0Sstevel@tonic-gate 	uint8_t		f_fasconf3[NTARGETS_WIDE];
151*0Sstevel@tonic-gate 	uint8_t		f_fasconf3_reg_last;
152*0Sstevel@tonic-gate 
153*0Sstevel@tonic-gate 	/*
154*0Sstevel@tonic-gate 	 * clock conversion register value for this host adapter.
155*0Sstevel@tonic-gate 	 * clock cycle value * 1000 for	this host adapter,
156*0Sstevel@tonic-gate 	 * to retain 5 significant digits.
157*0Sstevel@tonic-gate 	 */
158*0Sstevel@tonic-gate 	uchar_t		f_clock_conv;
159*0Sstevel@tonic-gate 	ushort_t	f_clock_cycle;
160*0Sstevel@tonic-gate 
161*0Sstevel@tonic-gate 	/*
162*0Sstevel@tonic-gate 	 * selection timeout register value
163*0Sstevel@tonic-gate 	 */
164*0Sstevel@tonic-gate 	uint8_t		f_stval;
165*0Sstevel@tonic-gate 
166*0Sstevel@tonic-gate 	/*
167*0Sstevel@tonic-gate 	 * State of the	host adapter
168*0Sstevel@tonic-gate 	 */
169*0Sstevel@tonic-gate 	uchar_t	f_sdtr_sent;	/* Count of sync data negotiation messages: */
170*0Sstevel@tonic-gate 				/* zeroed for every selection attempt, */
171*0Sstevel@tonic-gate 				/* every reconnection, and every disconnect */
172*0Sstevel@tonic-gate 				/* interrupt. Each SYNCHRONOUS DATA TRANSFER */
173*0Sstevel@tonic-gate 				/* message, both coming	from the target, and */
174*0Sstevel@tonic-gate 				/* sent	to the target, causes this tag to be */
175*0Sstevel@tonic-gate 				/* incremented.	This allows the	received */
176*0Sstevel@tonic-gate 				/* message handling to determine whether */
177*0Sstevel@tonic-gate 				/* a received SYNCHRONOUS DATA TRANSFER	*/
178*0Sstevel@tonic-gate 				/* message is in response to one that we */
179*0Sstevel@tonic-gate 				/* sent. */
180*0Sstevel@tonic-gate 	uchar_t	f_wdtr_sent;	/* same	for wide negotations */
181*0Sstevel@tonic-gate 	uchar_t	f_stat;		/* soft	copy of	status register	*/
182*0Sstevel@tonic-gate 	uchar_t	f_stat2;	/* soft	copy of	status2	register */
183*0Sstevel@tonic-gate 	uchar_t	f_intr;		/* soft	copy of	interrupt register */
184*0Sstevel@tonic-gate 	uchar_t	f_step;		/* soft	copy of	step register */
185*0Sstevel@tonic-gate 	uchar_t	f_abort_msg_sent; /* indicates that abort message went out */
186*0Sstevel@tonic-gate 	uchar_t	f_reset_msg_sent; /* indicates that device reset message */
187*0Sstevel@tonic-gate 				/* went	out */
188*0Sstevel@tonic-gate 	uchar_t	f_last_cmd;	/* last	cmd sent to fas	chip */
189*0Sstevel@tonic-gate 
190*0Sstevel@tonic-gate 	ushort_t f_state;	/* state of the	driver */
191*0Sstevel@tonic-gate 	ushort_t f_laststate;	/* last	state of the driver */
192*0Sstevel@tonic-gate 	uchar_t	f_suspended;	/* true	if driver is suspended */
193*0Sstevel@tonic-gate 	uchar_t	f_dslot;	/* delta to next slot */
194*0Sstevel@tonic-gate 	uchar_t	f_idcode;	/* chips idcode	*/
195*0Sstevel@tonic-gate 	uchar_t	f_polled_intr;	/* current interrupt was polled. */
196*0Sstevel@tonic-gate 
197*0Sstevel@tonic-gate 	/*
198*0Sstevel@tonic-gate 	 * Message handling: enough space is reserved for the expected length
199*0Sstevel@tonic-gate 	 * of all messages we could either send	or receive.
200*0Sstevel@tonic-gate 	 *
201*0Sstevel@tonic-gate 	 * For sending,	we expect to send only SYNCHRONOUS extended messages
202*0Sstevel@tonic-gate 	 * (5 bytes). We keep a	history	of the last message sent, and in order
203*0Sstevel@tonic-gate 	 * to control which message to send, an	output message length is set
204*0Sstevel@tonic-gate 	 * to indicate whether and how much of the message area	is to be used
205*0Sstevel@tonic-gate 	 * in sending a	message. If a target shifts to message out phase
206*0Sstevel@tonic-gate 	 * unexpectedly, the default action will be to send a MSG_NOP message.
207*0Sstevel@tonic-gate 	 *
208*0Sstevel@tonic-gate 	 * After the successful	transmission of	a message, the initial message
209*0Sstevel@tonic-gate 	 * byte	is moved to the	f_last_msgout area for tracking	what was the
210*0Sstevel@tonic-gate 	 * last	message	sent.
211*0Sstevel@tonic-gate 	 */
212*0Sstevel@tonic-gate 
213*0Sstevel@tonic-gate #define	OMSGSIZE	12
214*0Sstevel@tonic-gate 	uchar_t		f_cur_msgout[OMSGSIZE];
215*0Sstevel@tonic-gate 	uchar_t		f_last_msgout;
216*0Sstevel@tonic-gate 	uchar_t		f_omsglen;
217*0Sstevel@tonic-gate 
218*0Sstevel@tonic-gate 
219*0Sstevel@tonic-gate 	/*
220*0Sstevel@tonic-gate 	 * We expect, at, most,	to receive a maximum of	7 bytes
221*0Sstevel@tonic-gate 	 * of an incoming extended message (MODIFY DATA	POINTER),
222*0Sstevel@tonic-gate 	 * and thus reserve enough space for that.
223*0Sstevel@tonic-gate 	 */
224*0Sstevel@tonic-gate #define	IMSGSIZE	8
225*0Sstevel@tonic-gate 	uchar_t		f_imsgarea[IMSGSIZE];
226*0Sstevel@tonic-gate 
227*0Sstevel@tonic-gate 	/*
228*0Sstevel@tonic-gate 	 * These are used to index how far we've
229*0Sstevel@tonic-gate 	 * gone	in receiving incoming  messages.
230*0Sstevel@tonic-gate 	 */
231*0Sstevel@tonic-gate 	uchar_t		f_imsglen;
232*0Sstevel@tonic-gate 	uchar_t		f_imsgindex;
233*0Sstevel@tonic-gate 
234*0Sstevel@tonic-gate 	/*
235*0Sstevel@tonic-gate 	 * Saved last msgin.
236*0Sstevel@tonic-gate 	 */
237*0Sstevel@tonic-gate 	uchar_t		f_last_msgin;
238*0Sstevel@tonic-gate 
239*0Sstevel@tonic-gate 	/*
240*0Sstevel@tonic-gate 	 * round robin scheduling of requests in fas_ustart()
241*0Sstevel@tonic-gate 	 */
242*0Sstevel@tonic-gate 	uchar_t		f_next_slot;
243*0Sstevel@tonic-gate 
244*0Sstevel@tonic-gate 	/*
245*0Sstevel@tonic-gate 	 * save	reselecting slot when waiting for tag bytes
246*0Sstevel@tonic-gate 	 */
247*0Sstevel@tonic-gate 	uchar_t		f_resel_slot;
248*0Sstevel@tonic-gate 
249*0Sstevel@tonic-gate 	/*
250*0Sstevel@tonic-gate 	 * Target information
251*0Sstevel@tonic-gate 	 *	Synchronous SCSI Information,
252*0Sstevel@tonic-gate 	 *	Disconnect/reconnect capabilities
253*0Sstevel@tonic-gate 	 *	Noise Susceptibility
254*0Sstevel@tonic-gate 	 */
255*0Sstevel@tonic-gate 	uchar_t	f_offset[NTARGETS_WIDE]; /* synch offset + req-ack delay */
256*0Sstevel@tonic-gate 	uchar_t	f_sync_period[NTARGETS_WIDE]; /* synch period reg val */
257*0Sstevel@tonic-gate 	uchar_t	f_neg_period[NTARGETS_WIDE]; /*	synch periods (negotiated) */
258*0Sstevel@tonic-gate 	ushort_t f_backoff;		/* sync/wide backoff bit mask */
259*0Sstevel@tonic-gate 	uchar_t	f_req_ack_delay;	/* req ack delay in offset reg */
260*0Sstevel@tonic-gate 	uchar_t	f_offset_reg_last;	/* save	last offset value */
261*0Sstevel@tonic-gate 	uchar_t	f_period_reg_last;	/* save	last period value */
262*0Sstevel@tonic-gate 
263*0Sstevel@tonic-gate 	/*
264*0Sstevel@tonic-gate 	 * fifo	length and fifo	contents stored	here before reading intr reg
265*0Sstevel@tonic-gate 	 */
266*0Sstevel@tonic-gate 	uchar_t		f_fifolen;
267*0Sstevel@tonic-gate 	uchar_t		f_fifo[2*FIFOSIZE];
268*0Sstevel@tonic-gate 
269*0Sstevel@tonic-gate 	/*
270*0Sstevel@tonic-gate 	 * These ushort_t's are  bit maps	for targets
271*0Sstevel@tonic-gate 	 */
272*0Sstevel@tonic-gate 	ushort_t	f_wide_known;	/* wide	negotiate on	next cmd */
273*0Sstevel@tonic-gate 	ushort_t	f_nowide;	/* no wide for this target */
274*0Sstevel@tonic-gate 	ushort_t	f_wide_enabled;	/* wide	enabled	for this target	*/
275*0Sstevel@tonic-gate 
276*0Sstevel@tonic-gate 	ushort_t	f_sync_known;	/* sync	negotiate on next cmd */
277*0Sstevel@tonic-gate 	ushort_t	f_nosync;	/* no sync for this target */
278*0Sstevel@tonic-gate 	ushort_t	f_sync_enabled;	/* sync	enabled	for this target	*/
279*0Sstevel@tonic-gate 
280*0Sstevel@tonic-gate 	/*
281*0Sstevel@tonic-gate 	 * This ushort_t is a bit map for targets to
282*0Sstevel@tonic-gate 	 * disable sync on request from the target driver
283*0Sstevel@tonic-gate 	 */
284*0Sstevel@tonic-gate 	ushort_t	f_force_async;
285*0Sstevel@tonic-gate 	ushort_t	f_force_narrow;
286*0Sstevel@tonic-gate 
287*0Sstevel@tonic-gate 	/*
288*0Sstevel@tonic-gate 	 * This	ushort_t is a bit map for targets who don't appear
289*0Sstevel@tonic-gate 	 * to be able to support tagged	commands.
290*0Sstevel@tonic-gate 	 */
291*0Sstevel@tonic-gate 	ushort_t	f_notag;
292*0Sstevel@tonic-gate 
293*0Sstevel@tonic-gate 	/*
294*0Sstevel@tonic-gate 	 * This ushort_t is a bit map for targets who need to have
295*0Sstevel@tonic-gate 	 * their properties update deferred.
296*0Sstevel@tonic-gate 	 */
297*0Sstevel@tonic-gate 	ushort_t	f_props_update;
298*0Sstevel@tonic-gate 
299*0Sstevel@tonic-gate 	/*
300*0Sstevel@tonic-gate 	 * scsi_options	for bus	and per	target
301*0Sstevel@tonic-gate 	 */
302*0Sstevel@tonic-gate 	int		f_target_scsi_options_defined;
303*0Sstevel@tonic-gate 	int		f_scsi_options;
304*0Sstevel@tonic-gate 	int		f_target_scsi_options[NTARGETS_WIDE];
305*0Sstevel@tonic-gate 
306*0Sstevel@tonic-gate 	/*
307*0Sstevel@tonic-gate 	 * tag age limit per bus
308*0Sstevel@tonic-gate 	 */
309*0Sstevel@tonic-gate 	int		f_scsi_tag_age_limit;
310*0Sstevel@tonic-gate 
311*0Sstevel@tonic-gate 	/*
312*0Sstevel@tonic-gate 	 * scsi	reset delay per	bus
313*0Sstevel@tonic-gate 	 */
314*0Sstevel@tonic-gate 	uint_t		f_scsi_reset_delay;
315*0Sstevel@tonic-gate 
316*0Sstevel@tonic-gate 	/*
317*0Sstevel@tonic-gate 	 * Scratch Buffer, allocated out of iopbmap for	commands
318*0Sstevel@tonic-gate 	 * The same size as the	FAS's fifo.
319*0Sstevel@tonic-gate 	 */
320*0Sstevel@tonic-gate 	uchar_t		*f_cmdarea;
321*0Sstevel@tonic-gate 
322*0Sstevel@tonic-gate 	/*
323*0Sstevel@tonic-gate 	 * shadow copy of dma_csr to avoid unnecessary I/O reads which are
324*0Sstevel@tonic-gate 	 * expensive
325*0Sstevel@tonic-gate 	 */
326*0Sstevel@tonic-gate 	uint32_t	f_dma_csr;
327*0Sstevel@tonic-gate 
328*0Sstevel@tonic-gate 	/*
329*0Sstevel@tonic-gate 	 * Scratch Buffer DMA cookie and handle	for cmdarea
330*0Sstevel@tonic-gate 	 */
331*0Sstevel@tonic-gate 	ddi_dma_cookie_t	f_dmacookie;
332*0Sstevel@tonic-gate 	ddi_dma_handle_t	f_dmahandle;
333*0Sstevel@tonic-gate 
334*0Sstevel@tonic-gate 	/*
335*0Sstevel@tonic-gate 	 * dma attrs for fas scsi engine
336*0Sstevel@tonic-gate 	 */
337*0Sstevel@tonic-gate 	ddi_dma_attr_t		*f_dma_attr;
338*0Sstevel@tonic-gate 
339*0Sstevel@tonic-gate 	/*
340*0Sstevel@tonic-gate 	 * critical counters
341*0Sstevel@tonic-gate 	 */
342*0Sstevel@tonic-gate 	short	f_ncmds;	/* number of commands stored here at present */
343*0Sstevel@tonic-gate 	short	f_ndisc;	/* number of disconnected cmds at present */
344*0Sstevel@tonic-gate 
345*0Sstevel@tonic-gate 	/*
346*0Sstevel@tonic-gate 	 * Hardware pointers
347*0Sstevel@tonic-gate 	 *
348*0Sstevel@tonic-gate 	 * Pointer to mapped in	FAS registers
349*0Sstevel@tonic-gate 	 */
350*0Sstevel@tonic-gate 	volatile struct	fasreg *f_reg;
351*0Sstevel@tonic-gate 
352*0Sstevel@tonic-gate 	/*
353*0Sstevel@tonic-gate 	 * Pointer to mapped in	DMA Gate Array registers
354*0Sstevel@tonic-gate 	 */
355*0Sstevel@tonic-gate 
356*0Sstevel@tonic-gate 	volatile struct	dma    *f_dma;
357*0Sstevel@tonic-gate 
358*0Sstevel@tonic-gate 	/*
359*0Sstevel@tonic-gate 	 * last	and current state, queues
360*0Sstevel@tonic-gate 	 */
361*0Sstevel@tonic-gate 	uint32_t		f_lastdma;	/* last	dma address */
362*0Sstevel@tonic-gate 	uint32_t		f_lastcount;	/* last	dma count */
363*0Sstevel@tonic-gate 
364*0Sstevel@tonic-gate 	struct fas_cmd		*f_current_sp;	/* currently active cmd	*/
365*0Sstevel@tonic-gate 	struct f_slots		*f_active[N_SLOTS]; /* outstanding cmds	*/
366*0Sstevel@tonic-gate 
367*0Sstevel@tonic-gate 	struct fas_cmd		*f_readyf[N_SLOTS]; /* waiting cmds */
368*0Sstevel@tonic-gate 	struct fas_cmd		*f_readyb[N_SLOTS];
369*0Sstevel@tonic-gate 
370*0Sstevel@tonic-gate 				/*
371*0Sstevel@tonic-gate 				 * if throttle >= 0 then
372*0Sstevel@tonic-gate 				 * continue submitting cmds
373*0Sstevel@tonic-gate 				 * if throttle == 0 then hold cmds
374*0Sstevel@tonic-gate 				 * if throttle == -1 then drain
375*0Sstevel@tonic-gate 				 * if throttle == -2 do special handling
376*0Sstevel@tonic-gate 				 * for queue full
377*0Sstevel@tonic-gate 				 * f_throttle and f_tcmds are not part of
378*0Sstevel@tonic-gate 				 * f_active so fas_ustart() can	walk thru
379*0Sstevel@tonic-gate 				 * these more efficiently
380*0Sstevel@tonic-gate 				 */
381*0Sstevel@tonic-gate 	short			f_throttle[N_SLOTS];
382*0Sstevel@tonic-gate 
383*0Sstevel@tonic-gate 				/*
384*0Sstevel@tonic-gate 				 * number of disconnected + active commands
385*0Sstevel@tonic-gate 				 * (i.e. stored in the f_active list) for
386*0Sstevel@tonic-gate 				 * the slot
387*0Sstevel@tonic-gate 				 */
388*0Sstevel@tonic-gate 	short			f_tcmds[N_SLOTS];
389*0Sstevel@tonic-gate 
390*0Sstevel@tonic-gate 				/*
391*0Sstevel@tonic-gate 				 * if a	device reset has been performed, a
392*0Sstevel@tonic-gate 				 * delay is required before accessing the target
393*0Sstevel@tonic-gate 				 * again; reset	delays are in milli secs
394*0Sstevel@tonic-gate 				 * (assuming that reset	watchdog runs every
395*0Sstevel@tonic-gate 				 * scsi-watchdog-tick  milli secs;
396*0Sstevel@tonic-gate 				 * the watchdog	decrements the reset delay)
397*0Sstevel@tonic-gate 				 */
398*0Sstevel@tonic-gate 	int			f_reset_delay[NTARGETS_WIDE];
399*0Sstevel@tonic-gate 
400*0Sstevel@tonic-gate 	/*
401*0Sstevel@tonic-gate 	 * list	for auto request sense packets
402*0Sstevel@tonic-gate 	 */
403*0Sstevel@tonic-gate 	struct fas_cmd		*f_arq_pkt[N_SLOTS];
404*0Sstevel@tonic-gate 
405*0Sstevel@tonic-gate 	/*
406*0Sstevel@tonic-gate 	 * queue of packets that need callback and other callback info
407*0Sstevel@tonic-gate 	 */
408*0Sstevel@tonic-gate 	struct fas_cmd		*f_c_qf;
409*0Sstevel@tonic-gate 	struct fas_cmd		*f_c_qb;
410*0Sstevel@tonic-gate 	kmutex_t		f_c_mutex;
411*0Sstevel@tonic-gate 	int			f_c_in_callback;
412*0Sstevel@tonic-gate 
413*0Sstevel@tonic-gate 	/*
414*0Sstevel@tonic-gate 	 * a queue for packets in case the fas mutex is	locked
415*0Sstevel@tonic-gate 	 */
416*0Sstevel@tonic-gate 	kmutex_t		f_waitQ_mutex;
417*0Sstevel@tonic-gate 	struct fas_cmd		*f_waitf;
418*0Sstevel@tonic-gate 	struct fas_cmd		*f_waitb;
419*0Sstevel@tonic-gate 
420*0Sstevel@tonic-gate 	/*
421*0Sstevel@tonic-gate 	 * list	of reset notification requests
422*0Sstevel@tonic-gate 	 */
423*0Sstevel@tonic-gate 	struct scsi_reset_notify_entry	 *f_reset_notify_listf;
424*0Sstevel@tonic-gate 
425*0Sstevel@tonic-gate 	/*
426*0Sstevel@tonic-gate 	 * qfull handling
427*0Sstevel@tonic-gate 	 */
428*0Sstevel@tonic-gate 	uchar_t			f_qfull_retries[NTARGETS_WIDE];
429*0Sstevel@tonic-gate 	ushort_t		f_qfull_retry_interval[NTARGETS_WIDE];
430*0Sstevel@tonic-gate 	timeout_id_t		f_restart_cmd_timeid;
431*0Sstevel@tonic-gate 
432*0Sstevel@tonic-gate 	/*
433*0Sstevel@tonic-gate 	 * kmem	cache for packets
434*0Sstevel@tonic-gate 	 */
435*0Sstevel@tonic-gate 	struct kmem_cache	*f_kmem_cache;
436*0Sstevel@tonic-gate 
437*0Sstevel@tonic-gate 	/*
438*0Sstevel@tonic-gate 	 * data access handle for register mapping
439*0Sstevel@tonic-gate 	 */
440*0Sstevel@tonic-gate 	ddi_acc_handle_t	f_regs_acc_handle;
441*0Sstevel@tonic-gate 	/*
442*0Sstevel@tonic-gate 	 * data access handle for cmd area
443*0Sstevel@tonic-gate 	 */
444*0Sstevel@tonic-gate 	ddi_acc_handle_t	f_cmdarea_acc_handle;
445*0Sstevel@tonic-gate 	/*
446*0Sstevel@tonic-gate 	 * data access handle for dma
447*0Sstevel@tonic-gate 	 */
448*0Sstevel@tonic-gate 	ddi_acc_handle_t	f_dmar_acc_handle;
449*0Sstevel@tonic-gate 
450*0Sstevel@tonic-gate 	/*
451*0Sstevel@tonic-gate 	 * state flags
452*0Sstevel@tonic-gate 	 */
453*0Sstevel@tonic-gate 	uint_t			f_flags;
454*0Sstevel@tonic-gate 
455*0Sstevel@tonic-gate 	/*
456*0Sstevel@tonic-gate 	 * cv for bus quiesce/unquiesce
457*0Sstevel@tonic-gate 	 */
458*0Sstevel@tonic-gate 	kcondvar_t		f_cv;
459*0Sstevel@tonic-gate 
460*0Sstevel@tonic-gate 	/*
461*0Sstevel@tonic-gate 	 * soft state flags
462*0Sstevel@tonic-gate 	 */
463*0Sstevel@tonic-gate 	uint_t			f_softstate;
464*0Sstevel@tonic-gate 
465*0Sstevel@tonic-gate 	/*
466*0Sstevel@tonic-gate 	 * quiesce timeout ID
467*0Sstevel@tonic-gate 	 */
468*0Sstevel@tonic-gate 	timeout_id_t		f_quiesce_timeid;
469*0Sstevel@tonic-gate 
470*0Sstevel@tonic-gate 	/*
471*0Sstevel@tonic-gate 	 * kstat_intr support
472*0Sstevel@tonic-gate 	 */
473*0Sstevel@tonic-gate 	struct kstat		*f_intr_kstat;
474*0Sstevel@tonic-gate 
475*0Sstevel@tonic-gate #ifdef FASDEBUG
476*0Sstevel@tonic-gate 	/*
477*0Sstevel@tonic-gate 	 * register trace for debugging
478*0Sstevel@tonic-gate 	 */
479*0Sstevel@tonic-gate 	uint_t			f_reg_trace_index;
480*0Sstevel@tonic-gate 	uint_t			f_reg_trace[REG_TRACE_BUF_SIZE+1];
481*0Sstevel@tonic-gate 
482*0Sstevel@tonic-gate 	uint_t			f_reserved[256];
483*0Sstevel@tonic-gate 
484*0Sstevel@tonic-gate 	uint_t			f_reg_reads;
485*0Sstevel@tonic-gate 	uint_t			f_reg_dma_reads;
486*0Sstevel@tonic-gate 	uint_t			f_reg_writes;
487*0Sstevel@tonic-gate 	uint_t			f_reg_dma_writes;
488*0Sstevel@tonic-gate 	uint_t			f_reg_cmds;
489*0Sstevel@tonic-gate 	uint_t			f_total_cmds;
490*0Sstevel@tonic-gate #endif
491*0Sstevel@tonic-gate };
492*0Sstevel@tonic-gate _NOTE(MUTEX_PROTECTS_DATA(fas::f_mutex,	fas))
493*0Sstevel@tonic-gate _NOTE(MUTEX_PROTECTS_DATA(fas::f_waitQ_mutex, fas::f_waitf fas::f_waitb))
494*0Sstevel@tonic-gate _NOTE(MUTEX_PROTECTS_DATA(fas::f_c_mutex, fas::f_c_qf fas::f_c_qb
495*0Sstevel@tonic-gate 	fas::f_c_in_callback))
496*0Sstevel@tonic-gate _NOTE(DATA_READABLE_WITHOUT_LOCK(fas::f_flags))
497*0Sstevel@tonic-gate 
498*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("unique per packet or safe sharing",
499*0Sstevel@tonic-gate     scsi_cdb scsi_status scsi_pkt buf))
500*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("stable data", scsi_device scsi_address))
501*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("safe sharing", fas::f_next fas::f_state))
502*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("safe sharing",
503*0Sstevel@tonic-gate 	fas::f_dma fas::f_dma_attr fas::f_hm_rev))
504*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("stable data",
505*0Sstevel@tonic-gate 	fas::f_target_scsi_options fas::f_scsi_options))
506*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("stable data", fas::f_instance))
507*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("only debugging",
508*0Sstevel@tonic-gate 	fas::f_reg_trace_index fas::f_reg_trace))
509*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("protected by kmem lock", fas::f_kmem_cache))
510*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("safe sharing",
511*0Sstevel@tonic-gate 	fas::f_notag fas::f_suspended fas::f_ndisc))
512*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("stable data", fas::f_dev fas::f_tran))
513*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("only debugging", fas::f_reg_dma_reads))
514*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("safe sharing", fas::f_quiesce_timeid))
515*0Sstevel@tonic-gate 
516*0Sstevel@tonic-gate /*
517*0Sstevel@tonic-gate  * kstat_intr support
518*0Sstevel@tonic-gate  */
519*0Sstevel@tonic-gate 
520*0Sstevel@tonic-gate #define	FAS_KSTAT_INTR(fas)  KSTAT_INTR_PTR(fas->f_intr_kstat)->\
521*0Sstevel@tonic-gate 					intrs[KSTAT_INTR_HARD]++
522*0Sstevel@tonic-gate 
523*0Sstevel@tonic-gate /*
524*0Sstevel@tonic-gate  * defaults for	the global properties
525*0Sstevel@tonic-gate  */
526*0Sstevel@tonic-gate #define	DEFAULT_SCSI_OPTIONS	SCSI_OPTIONS_DR
527*0Sstevel@tonic-gate #define	DEFAULT_TAG_AGE_LIMIT	2
528*0Sstevel@tonic-gate #define	DEFAULT_WD_TICK		10
529*0Sstevel@tonic-gate 
530*0Sstevel@tonic-gate /*
531*0Sstevel@tonic-gate  * define for f_flags
532*0Sstevel@tonic-gate  */
533*0Sstevel@tonic-gate #define	FAS_FLG_NOTIMEOUTS	0x0001	/* disallow timeout rescheduling */
534*0Sstevel@tonic-gate 
535*0Sstevel@tonic-gate #define	FAS_CAN_SCHED	((fas->f_flags & FAS_FLG_NOTIMEOUTS) == 0)
536*0Sstevel@tonic-gate 
537*0Sstevel@tonic-gate /*
538*0Sstevel@tonic-gate  * f_req_ack_delay:
539*0Sstevel@tonic-gate  */
540*0Sstevel@tonic-gate #define	DEFAULT_REQ_ACK_DELAY	0x50	/* delay assert	period by 1/2 cycle */
541*0Sstevel@tonic-gate 
542*0Sstevel@tonic-gate /*
543*0Sstevel@tonic-gate  * Representations of Driver states (stored in tags f_state && f_laststate).
544*0Sstevel@tonic-gate  *
545*0Sstevel@tonic-gate  * Totally idle. There may or may not disconnected commands still
546*0Sstevel@tonic-gate  * running on targets.
547*0Sstevel@tonic-gate  */
548*0Sstevel@tonic-gate #define	STATE_FREE	0x00
549*0Sstevel@tonic-gate 
550*0Sstevel@tonic-gate /*
551*0Sstevel@tonic-gate  * Selecting States. These states represent a selection	attempt
552*0Sstevel@tonic-gate  * for a target.
553*0Sstevel@tonic-gate  */
554*0Sstevel@tonic-gate #define	STATE_SELECT_NORMAL	0x0100
555*0Sstevel@tonic-gate #define	STATE_SELECT_N_STOP	0x0200
556*0Sstevel@tonic-gate #define	STATE_SELECT_N_SENDMSG	0x0400
557*0Sstevel@tonic-gate #define	STATE_SYNC_ASKING	0x0800
558*0Sstevel@tonic-gate #define	STATE_SELECT_N_TAG	0x1000
559*0Sstevel@tonic-gate #define	STATE_SELECTING		0xFF00	/* Select mask */
560*0Sstevel@tonic-gate 
561*0Sstevel@tonic-gate 
562*0Sstevel@tonic-gate /*
563*0Sstevel@tonic-gate  * When	the driver is neither idle nor selecting, it is	in one of
564*0Sstevel@tonic-gate  * the information transfer phases. These states are not unique
565*0Sstevel@tonic-gate  * bit patterns- they are simple numbers used to mark transitions.
566*0Sstevel@tonic-gate  * They	must start at 1	and proceed sequentially upwards and
567*0Sstevel@tonic-gate  * match the indexing of function vectors declared in the function
568*0Sstevel@tonic-gate  * fas_phasemanage().
569*0Sstevel@tonic-gate  */
570*0Sstevel@tonic-gate #define	STATE_ITPHASES		0x00FF	/* Phase mask */
571*0Sstevel@tonic-gate 
572*0Sstevel@tonic-gate /*
573*0Sstevel@tonic-gate  * These states	cover finishing	sending	a command out (if it wasn't
574*0Sstevel@tonic-gate  * sent	as a side-effect of selecting),	or the case of starting
575*0Sstevel@tonic-gate  * a command that was linked to	the previous command (i.e., no
576*0Sstevel@tonic-gate  * selection phase for this particular command as the target
577*0Sstevel@tonic-gate  * remained connected when the previous	command	completed).
578*0Sstevel@tonic-gate  */
579*0Sstevel@tonic-gate #define	ACTS_CMD_START		0x01
580*0Sstevel@tonic-gate #define	ACTS_CMD_DONE		0x02
581*0Sstevel@tonic-gate 
582*0Sstevel@tonic-gate /*
583*0Sstevel@tonic-gate  * These states	are the	begin and end of sending out a message.
584*0Sstevel@tonic-gate  * The message to be sent is stored in the field f_msgout (see above).
585*0Sstevel@tonic-gate  */
586*0Sstevel@tonic-gate #define	ACTS_MSG_OUT		0x03
587*0Sstevel@tonic-gate #define	ACTS_MSG_OUT_DONE	0x04
588*0Sstevel@tonic-gate 
589*0Sstevel@tonic-gate /*
590*0Sstevel@tonic-gate  * These states	are the	beginning, middle, and end of incoming messages.
591*0Sstevel@tonic-gate  *
592*0Sstevel@tonic-gate  */
593*0Sstevel@tonic-gate #define	ACTS_MSG_IN		0x05
594*0Sstevel@tonic-gate #define	ACTS_MSG_IN_MORE	0x06
595*0Sstevel@tonic-gate #define	ACTS_MSG_IN_DONE	0x07
596*0Sstevel@tonic-gate 
597*0Sstevel@tonic-gate /*
598*0Sstevel@tonic-gate  * This	state is reached when the target may be	getting
599*0Sstevel@tonic-gate  * ready to clear the bus (disconnect or command complete).
600*0Sstevel@tonic-gate  */
601*0Sstevel@tonic-gate #define	ACTS_CLEARING		0x08
602*0Sstevel@tonic-gate 
603*0Sstevel@tonic-gate /*
604*0Sstevel@tonic-gate  * These states	elide the begin	and end	of a DATA phase
605*0Sstevel@tonic-gate  */
606*0Sstevel@tonic-gate #define	ACTS_DATA		0x09
607*0Sstevel@tonic-gate #define	ACTS_DATA_DONE		0x0A
608*0Sstevel@tonic-gate 
609*0Sstevel@tonic-gate /*
610*0Sstevel@tonic-gate  * This	state indicates	that we	were in	status phase. We handle	status
611*0Sstevel@tonic-gate  * phase by issuing the	FAS command 'CMD_COMP_SEQ' which causes	the
612*0Sstevel@tonic-gate  * FAS to read the status byte,	and then to read a message in (presumably
613*0Sstevel@tonic-gate  * one of COMMAND COMPLETE, LINKED COMMAND COMPLETE or LINKED COMMAND
614*0Sstevel@tonic-gate  * COMPLETE WITH FLAG).
615*0Sstevel@tonic-gate  *
616*0Sstevel@tonic-gate  * This	state is what is expected to follow after the issuance of the
617*0Sstevel@tonic-gate  * FAS command 'CMD_COMP_SEQ'.
618*0Sstevel@tonic-gate  */
619*0Sstevel@tonic-gate #define	ACTS_C_CMPLT		0x0B
620*0Sstevel@tonic-gate 
621*0Sstevel@tonic-gate /*
622*0Sstevel@tonic-gate  * This	state is used by the driver to indicate	that it
623*0Sstevel@tonic-gate  * is in the middle of processing a reselection	attempt.
624*0Sstevel@tonic-gate  */
625*0Sstevel@tonic-gate #define	ACTS_RESEL		0x0C
626*0Sstevel@tonic-gate 
627*0Sstevel@tonic-gate /*
628*0Sstevel@tonic-gate  * This	state is used by the driver to indicate	that it	doesn't	know
629*0Sstevel@tonic-gate  * what	the next state is, and that it should look at the FAS's	status
630*0Sstevel@tonic-gate  * register to find out	what SCSI bus phase we are in in order to select
631*0Sstevel@tonic-gate  * the next state to transition	to.
632*0Sstevel@tonic-gate  */
633*0Sstevel@tonic-gate #define	ACTS_UNKNOWN		0x0D
634*0Sstevel@tonic-gate 
635*0Sstevel@tonic-gate /*
636*0Sstevel@tonic-gate  * This	state is used by the driver to indicate	that a self-inititated
637*0Sstevel@tonic-gate  * Bus reset is	in progress.
638*0Sstevel@tonic-gate  */
639*0Sstevel@tonic-gate #define	ACTS_RESET		0x0E
640*0Sstevel@tonic-gate 
641*0Sstevel@tonic-gate /*
642*0Sstevel@tonic-gate  * Hiwater mark	of vectored states
643*0Sstevel@tonic-gate  */
644*0Sstevel@tonic-gate #define	ACTS_ENDVEC		0x0E
645*0Sstevel@tonic-gate 
646*0Sstevel@tonic-gate /*
647*0Sstevel@tonic-gate  * XXX - needs to distinguish between bus states and internal states
648*0Sstevel@tonic-gate  */
649*0Sstevel@tonic-gate 
650*0Sstevel@tonic-gate /*
651*0Sstevel@tonic-gate  * This	state is used by the driver to indicate	to itself that it is
652*0Sstevel@tonic-gate  * in the middle of aborting things.
653*0Sstevel@tonic-gate  */
654*0Sstevel@tonic-gate #define	ACTS_ABORTING		0x1D
655*0Sstevel@tonic-gate 
656*0Sstevel@tonic-gate /*
657*0Sstevel@tonic-gate  * This	state is used by the driver to just hold the state of
658*0Sstevel@tonic-gate  * the softc structure while it	is either aborting or resetting
659*0Sstevel@tonic-gate  * everything.
660*0Sstevel@tonic-gate  */
661*0Sstevel@tonic-gate #define	ACTS_FROZEN		0x1F
662*0Sstevel@tonic-gate 
663*0Sstevel@tonic-gate 
664*0Sstevel@tonic-gate /*
665*0Sstevel@tonic-gate  * Interrupt dispatch actions
666*0Sstevel@tonic-gate  */
667*0Sstevel@tonic-gate #define	ACTION_RETURN		-1	/* return from interrupt */
668*0Sstevel@tonic-gate #define	ACTION_FINSEL		0x00	/* finish selection */
669*0Sstevel@tonic-gate #define	ACTION_RESEL		0x01	/* handle reselection */
670*0Sstevel@tonic-gate #define	ACTION_PHASEMANAGE	0x02	/* manage phases */
671*0Sstevel@tonic-gate #define	ACTION_FINISH		0x03	/* this	command	done */
672*0Sstevel@tonic-gate #define	ACTION_FINRST		0x04	/* finish reset	recovery */
673*0Sstevel@tonic-gate #define	ACTION_SEARCH		0x05	/* search for new command to start */
674*0Sstevel@tonic-gate #define	ACTION_ABORT_CURCMD	0x06	/* abort current command */
675*0Sstevel@tonic-gate #define	ACTION_ABORT_ALLCMDS	0x07	/* abort all commands */
676*0Sstevel@tonic-gate #define	ACTION_RESET		0x08	/* reset bus */
677*0Sstevel@tonic-gate #define	ACTION_SELECT		0x09	/* handle selection */
678*0Sstevel@tonic-gate 
679*0Sstevel@tonic-gate /*
680*0Sstevel@tonic-gate  * Proxy command definitions.
681*0Sstevel@tonic-gate  *
682*0Sstevel@tonic-gate  * At certain times, we	need to	run a proxy command for	a target
683*0Sstevel@tonic-gate  * (if only to select a	target and send	a message).
684*0Sstevel@tonic-gate  *
685*0Sstevel@tonic-gate  * We use the tail end of the cdb that is internal to the fas_cmd
686*0Sstevel@tonic-gate  * structure to	store the proxy	code, the proxy	data (e.g., the
687*0Sstevel@tonic-gate  * message to send).
688*0Sstevel@tonic-gate  *
689*0Sstevel@tonic-gate  * We also store a boolean result code in this area so that the
690*0Sstevel@tonic-gate  * user	of a proxy command knows whether it succeeded.
691*0Sstevel@tonic-gate  */
692*0Sstevel@tonic-gate 
693*0Sstevel@tonic-gate /*
694*0Sstevel@tonic-gate  * Offsets into	the cmd_cdb[] array (in fas_cmd) for proxy data
695*0Sstevel@tonic-gate  */
696*0Sstevel@tonic-gate #define	FAS_PROXY_TYPE		CDB_GROUP0
697*0Sstevel@tonic-gate #define	FAS_PROXY_RESULT	FAS_PROXY_TYPE+1
698*0Sstevel@tonic-gate #define	FAS_PROXY_DATA		FAS_PROXY_RESULT+1
699*0Sstevel@tonic-gate 
700*0Sstevel@tonic-gate /*
701*0Sstevel@tonic-gate  * Currently supported proxy types
702*0Sstevel@tonic-gate  */
703*0Sstevel@tonic-gate 
704*0Sstevel@tonic-gate #define	FAS_PROXY_SNDMSG	1
705*0Sstevel@tonic-gate 
706*0Sstevel@tonic-gate /*
707*0Sstevel@tonic-gate  * Reset actions
708*0Sstevel@tonic-gate  */
709*0Sstevel@tonic-gate #define	FAS_RESET_FAS		0x1	/* reset FAS chip */
710*0Sstevel@tonic-gate #define	FAS_RESET_DMA		0x2	/* reset DMA gate array	*/
711*0Sstevel@tonic-gate #define	FAS_RESET_BRESET	0x4	/* reset SCSI bus */
712*0Sstevel@tonic-gate #define	FAS_RESET_IGNORE_BRESET	0x8	/* ignore SCSI Bus RESET interrupt */
713*0Sstevel@tonic-gate 					/* while resetting bus.	*/
714*0Sstevel@tonic-gate #define	FAS_RESET_SCSIBUS	(FAS_RESET_BRESET|FAS_RESET_IGNORE_BRESET)
715*0Sstevel@tonic-gate #define	FAS_RESET_SOFTC		0x10	/* reset SOFTC structure */
716*0Sstevel@tonic-gate 
717*0Sstevel@tonic-gate #define	FAS_RESET_HW		(FAS_RESET_FAS|FAS_RESET_DMA|FAS_RESET_SCSIBUS)
718*0Sstevel@tonic-gate #define	FAS_RESET_ALL		(FAS_RESET_HW|FAS_RESET_SOFTC)
719*0Sstevel@tonic-gate 
720*0Sstevel@tonic-gate #define	FAS_RESET_MSG		0x20
721*0Sstevel@tonic-gate 
722*0Sstevel@tonic-gate #define	FAS_RESET_SPIN_DELAY_USEC	20
723*0Sstevel@tonic-gate #define	FAS_RESET_SPIN_MAX_LOOP		1000
724*0Sstevel@tonic-gate 
725*0Sstevel@tonic-gate /*
726*0Sstevel@tonic-gate  * f_softstate flags
727*0Sstevel@tonic-gate  */
728*0Sstevel@tonic-gate #define	FAS_SS_DRAINING		0x02
729*0Sstevel@tonic-gate #define	FAS_SS_QUIESCED		0x04
730*0Sstevel@tonic-gate 
731*0Sstevel@tonic-gate /*
732*0Sstevel@tonic-gate  * Debugging macros and	defines
733*0Sstevel@tonic-gate  */
734*0Sstevel@tonic-gate #ifdef	FASDEBUG
735*0Sstevel@tonic-gate /*PRINTFLIKE2*/
736*0Sstevel@tonic-gate extern void fas_dprintf(struct fas *fas, const char *fmt, ...)
737*0Sstevel@tonic-gate 	__KPRINTFLIKE(2);
738*0Sstevel@tonic-gate 
739*0Sstevel@tonic-gate #define	INFORMATIVE	(fasdebug)
740*0Sstevel@tonic-gate #define	IDEBUGGING	((fasdebug) && \
741*0Sstevel@tonic-gate 			((fas->f_instance == fasdebug_instance)	|| \
742*0Sstevel@tonic-gate 			(fasdebug_instance == -1)))
743*0Sstevel@tonic-gate #define	DDEBUGGING	((fasdebug > 1)	&& \
744*0Sstevel@tonic-gate 			((fas->f_instance == fasdebug_instance)	|| \
745*0Sstevel@tonic-gate 			(fasdebug_instance == -1)))
746*0Sstevel@tonic-gate 
747*0Sstevel@tonic-gate #define	EDEBUGGING	((fasdebug > 2)	&& \
748*0Sstevel@tonic-gate 			((fas->f_instance == fasdebug_instance)	|| \
749*0Sstevel@tonic-gate 			(fasdebug_instance == -1)))
750*0Sstevel@tonic-gate 
751*0Sstevel@tonic-gate #define	EPRINTF(str)		if (EDEBUGGING)	fas_dprintf(fas, str)
752*0Sstevel@tonic-gate #define	EPRINTF1(str, a)	if (EDEBUGGING)	fas_dprintf(fas, str, a)
753*0Sstevel@tonic-gate #define	EPRINTF2(str, a, b)	if (EDEBUGGING)	fas_dprintf(fas, str, a, b)
754*0Sstevel@tonic-gate #define	EPRINTF3(str, a, b, c)	if (EDEBUGGING)	fas_dprintf(fas, str, a, b, c)
755*0Sstevel@tonic-gate #define	EPRINTF4(str, a, b, c, d)	\
756*0Sstevel@tonic-gate 	if (EDEBUGGING)	fas_dprintf(fas, str, a, b, c, d)
757*0Sstevel@tonic-gate #define	EPRINTF5(str, a, b, c, d, e)	\
758*0Sstevel@tonic-gate 	if (EDEBUGGING)	fas_dprintf(fas, str, a, b, c, d, e)
759*0Sstevel@tonic-gate #define	EPRINTF6(str, a, b, c, d, e, f)	\
760*0Sstevel@tonic-gate 	if (EDEBUGGING)	fas_dprintf(fas, str, a, b, c, d, e, f)
761*0Sstevel@tonic-gate 
762*0Sstevel@tonic-gate #define	DPRINTF(str)		if (DDEBUGGING)	fas_dprintf(fas, str)
763*0Sstevel@tonic-gate #define	DPRINTF1(str, a)	if (DDEBUGGING)	fas_dprintf(fas, str, a)
764*0Sstevel@tonic-gate #define	DPRINTF2(str, a, b)	if (DDEBUGGING)	fas_dprintf(fas, str, a, b)
765*0Sstevel@tonic-gate #define	DPRINTF3(str, a, b, c)	if (DDEBUGGING)	fas_dprintf(fas, str, a, b, c)
766*0Sstevel@tonic-gate #define	DPRINTF4(str, a, b, c, d)	\
767*0Sstevel@tonic-gate 	if (DDEBUGGING)	fas_dprintf(fas, str, a, b, c, d)
768*0Sstevel@tonic-gate #define	DPRINTF5(str, a, b, c, d, e)	\
769*0Sstevel@tonic-gate 	if (DDEBUGGING)	fas_dprintf(fas, str, a, b, c, d, e)
770*0Sstevel@tonic-gate #define	DPRINTF6(str, a, b, c, d, e, f)	\
771*0Sstevel@tonic-gate 	if (DDEBUGGING)	fas_dprintf(fas, str, a, b, c, d, e, f)
772*0Sstevel@tonic-gate 
773*0Sstevel@tonic-gate #define	IPRINTF(str)		if (IDEBUGGING)	fas_dprintf(fas, str)
774*0Sstevel@tonic-gate #define	IPRINTF1(str, a)	if (IDEBUGGING)	fas_dprintf(fas, str, a)
775*0Sstevel@tonic-gate #define	IPRINTF2(str, a, b)	if (IDEBUGGING)	fas_dprintf(fas, str, a, b)
776*0Sstevel@tonic-gate #define	IPRINTF3(str, a, b, c)	if (IDEBUGGING)	fas_dprintf(fas, str, a, b, c)
777*0Sstevel@tonic-gate #define	IPRINTF4(str, a, b, c, d)	\
778*0Sstevel@tonic-gate 	if (IDEBUGGING)	fas_dprintf(fas, str, a, b, c, d)
779*0Sstevel@tonic-gate #define	IPRINTF5(str, a, b, c, d, e)	\
780*0Sstevel@tonic-gate 	if (IDEBUGGING)	fas_dprintf(fas, str, a, b, c, d, e)
781*0Sstevel@tonic-gate #define	IPRINTF6(str, a, b, c, d, e, f)	\
782*0Sstevel@tonic-gate 	if (IDEBUGGING)	fas_dprintf(fas, str, a, b, c, d, e, f)
783*0Sstevel@tonic-gate 
784*0Sstevel@tonic-gate #else	/* FASDEBUG */
785*0Sstevel@tonic-gate 
786*0Sstevel@tonic-gate #define	EPRINTF(str)
787*0Sstevel@tonic-gate #define	EPRINTF1(str, a)
788*0Sstevel@tonic-gate #define	EPRINTF2(str, a, b)
789*0Sstevel@tonic-gate #define	EPRINTF3(str, a, b, c)
790*0Sstevel@tonic-gate #define	EPRINTF4(str, a, b, c, d)
791*0Sstevel@tonic-gate #define	EPRINTF5(str, a, b, c, d, e)
792*0Sstevel@tonic-gate #define	EPRINTF6(str, a, b, c, d, e, f)
793*0Sstevel@tonic-gate #define	DPRINTF(str)
794*0Sstevel@tonic-gate #define	DPRINTF1(str, a)
795*0Sstevel@tonic-gate #define	DPRINTF2(str, a, b)
796*0Sstevel@tonic-gate #define	DPRINTF3(str, a, b, c)
797*0Sstevel@tonic-gate #define	DPRINTF4(str, a, b, c, d)
798*0Sstevel@tonic-gate #define	DPRINTF5(str, a, b, c, d, e)
799*0Sstevel@tonic-gate #define	DPRINTF6(str, a, b, c, d, e, f)
800*0Sstevel@tonic-gate #define	IPRINTF(str)
801*0Sstevel@tonic-gate #define	IPRINTF1(str, a)
802*0Sstevel@tonic-gate #define	IPRINTF2(str, a, b)
803*0Sstevel@tonic-gate #define	IPRINTF3(str, a, b, c)
804*0Sstevel@tonic-gate #define	IPRINTF4(str, a, b, c, d)
805*0Sstevel@tonic-gate #define	IPRINTF5(str, a, b, c, d, e)
806*0Sstevel@tonic-gate #define	IPRINTF6(str, a, b, c, d, e, f)
807*0Sstevel@tonic-gate 
808*0Sstevel@tonic-gate #endif	/* FASDEBUG */
809*0Sstevel@tonic-gate 
810*0Sstevel@tonic-gate /*
811*0Sstevel@tonic-gate  * Shorthand macros and	defines
812*0Sstevel@tonic-gate  */
813*0Sstevel@tonic-gate 
814*0Sstevel@tonic-gate /*
815*0Sstevel@tonic-gate  * Short hand defines
816*0Sstevel@tonic-gate  */
817*0Sstevel@tonic-gate #define	ALL_TARGETS	0xffff
818*0Sstevel@tonic-gate 
819*0Sstevel@tonic-gate #define	MAX_THROTTLE	254	/* 1 tag used for non-tagged cmds, 1 rsvd */
820*0Sstevel@tonic-gate #define	HOLD_THROTTLE	0
821*0Sstevel@tonic-gate #define	DRAIN_THROTTLE	-1
822*0Sstevel@tonic-gate #define	QFULL_THROTTLE	-2
823*0Sstevel@tonic-gate 
824*0Sstevel@tonic-gate #define	NODISC(tgt)		(fas->f_nodisc & (1<<(tgt)))
825*0Sstevel@tonic-gate #define	NOTAG(tgt)		(fas->f_notag &	(1<<(tgt)))
826*0Sstevel@tonic-gate #define	TAGGED(tgt)		((fas->f_notag & (1<<(tgt))) ==	0)
827*0Sstevel@tonic-gate #define	SYNC_KNOWN(tgt)		(fas->f_sync_known & (1<<(tgt)))
828*0Sstevel@tonic-gate 
829*0Sstevel@tonic-gate #define	NEXTSLOT(slot, d)	((slot)+(d)) & ((N_SLOTS)-1)
830*0Sstevel@tonic-gate #define	MY_ID(fas)		((fas)->f_fasconf & FAS_CONF_BUSID)
831*0Sstevel@tonic-gate #define	INTPENDING(fas)		(fas_dma_reg_read((fas), \
832*0Sstevel@tonic-gate 				    &((fas)->f_dma->dma_csr))&DMA_INT_MASK)
833*0Sstevel@tonic-gate 
834*0Sstevel@tonic-gate #define	Tgt(sp)	((sp)->cmd_pkt->pkt_address.a_target)
835*0Sstevel@tonic-gate #define	Lun(sp)	((sp)->cmd_pkt->pkt_address.a_lun)
836*0Sstevel@tonic-gate 
837*0Sstevel@tonic-gate #define	New_state(fas, state)\
838*0Sstevel@tonic-gate 	(fas)->f_laststate = (fas)->f_state, (fas)->f_state = (state)
839*0Sstevel@tonic-gate 
840*0Sstevel@tonic-gate #define	CNUM		(fas->f_instance)
841*0Sstevel@tonic-gate #define	TRUE		1
842*0Sstevel@tonic-gate #define	FALSE		0
843*0Sstevel@tonic-gate #define	UNDEFINED	-1
844*0Sstevel@tonic-gate #define	INVALID_MSG	0x7f
845*0Sstevel@tonic-gate 
846*0Sstevel@tonic-gate /*
847*0Sstevel@tonic-gate  * Default is to have 10 retries on receiving QFULL status and
848*0Sstevel@tonic-gate  * each retry to be after 100 ms.
849*0Sstevel@tonic-gate  */
850*0Sstevel@tonic-gate #define	QFULL_RETRIES		10
851*0Sstevel@tonic-gate #define	QFULL_RETRY_INTERVAL	100
852*0Sstevel@tonic-gate 
853*0Sstevel@tonic-gate /*
854*0Sstevel@tonic-gate  * FEPS chip revision
855*0Sstevel@tonic-gate  */
856*0Sstevel@tonic-gate #define	FAS_HM_REV(fas)		(fas)->f_hm_rev
857*0Sstevel@tonic-gate 
858*0Sstevel@tonic-gate /*
859*0Sstevel@tonic-gate  * Some	manifest miscellaneous constants
860*0Sstevel@tonic-gate  */
861*0Sstevel@tonic-gate 
862*0Sstevel@tonic-gate #define	MEG		(1000 *	1000)
863*0Sstevel@tonic-gate #define	FIVE_MEG	(5 * MEG)
864*0Sstevel@tonic-gate #define	TEN_MEG		(10 * MEG)
865*0Sstevel@tonic-gate #define	TWENTY_MEG	(20 * MEG)
866*0Sstevel@tonic-gate #define	TWENTYFIVE_MEG	(25 * MEG)
867*0Sstevel@tonic-gate #define	FORTY_MEG	(40 * MEG)
868*0Sstevel@tonic-gate #define	FAS_FREQ_SLOP	(25000)
869*0Sstevel@tonic-gate 
870*0Sstevel@tonic-gate /*
871*0Sstevel@tonic-gate  * wide	support
872*0Sstevel@tonic-gate  */
873*0Sstevel@tonic-gate #define	FAS_XFER_WIDTH	1
874*0Sstevel@tonic-gate 
875*0Sstevel@tonic-gate #define	FAS_EMPTY_CALLBACKQ(fas)  fas_empty_callbackQ(fas)
876*0Sstevel@tonic-gate 
877*0Sstevel@tonic-gate #define	FAS_CHECK_WAITQ_AND_FAS_MUTEX_EXIT(fas)	\
878*0Sstevel@tonic-gate 	mutex_enter(&fas->f_waitQ_mutex); \
879*0Sstevel@tonic-gate 	if (fas->f_waitf) { \
880*0Sstevel@tonic-gate 		fas_empty_waitQ(fas); \
881*0Sstevel@tonic-gate 	} \
882*0Sstevel@tonic-gate 	mutex_exit(FAS_MUTEX(fas)); \
883*0Sstevel@tonic-gate 	mutex_exit(&fas->f_waitQ_mutex);
884*0Sstevel@tonic-gate 
885*0Sstevel@tonic-gate /*
886*0Sstevel@tonic-gate  * flags for fas_accept_pkt
887*0Sstevel@tonic-gate  */
888*0Sstevel@tonic-gate #define	NO_TRAN_BUSY	0	/* fas_accept_pkt may not bounce these pkts */
889*0Sstevel@tonic-gate #define	TRAN_BUSY_OK	1	/* fas_accept_pkt may bounce these pkts */
890*0Sstevel@tonic-gate 
891*0Sstevel@tonic-gate /*
892*0Sstevel@tonic-gate  * reset delay tick
893*0Sstevel@tonic-gate  */
894*0Sstevel@tonic-gate #define	FAS_WATCH_RESET_DELAY_TICK 50	/* specified in	milli seconds */
895*0Sstevel@tonic-gate 
896*0Sstevel@tonic-gate /*
897*0Sstevel@tonic-gate  * 2 ms timeout on receiving tag on reconnect
898*0Sstevel@tonic-gate  */
899*0Sstevel@tonic-gate #define	RECONNECT_TAG_RCV_TIMEOUT 2000	/* allow up to 2 ms */
900*0Sstevel@tonic-gate 
901*0Sstevel@tonic-gate 
902*0Sstevel@tonic-gate /*
903*0Sstevel@tonic-gate  * auto	request	sense
904*0Sstevel@tonic-gate  */
905*0Sstevel@tonic-gate #define	RQ_MAKECOM_COMMON(pktp,	flag, cmd)   \
906*0Sstevel@tonic-gate 	(pktp)->pkt_flags = (flag), \
907*0Sstevel@tonic-gate 	((union	scsi_cdb *)(pktp)->pkt_cdbp)->scc_cmd =	(cmd), \
908*0Sstevel@tonic-gate 	((union	scsi_cdb *)(pktp)->pkt_cdbp)->scc_lun =	\
909*0Sstevel@tonic-gate 	    (pktp)->pkt_address.a_lun
910*0Sstevel@tonic-gate 
911*0Sstevel@tonic-gate #define	RQ_MAKECOM_G0(pktp, flag, cmd, addr, cnt)    \
912*0Sstevel@tonic-gate 	RQ_MAKECOM_COMMON((pktp), (flag), (cmd)), \
913*0Sstevel@tonic-gate 	FORMG0ADDR(((union scsi_cdb *)(pktp)->pkt_cdbp), (addr)), \
914*0Sstevel@tonic-gate 	FORMG0COUNT(((union scsi_cdb *)(pktp)->pkt_cdbp), (cnt))
915*0Sstevel@tonic-gate 
916*0Sstevel@tonic-gate #define	NEW_TIMEOUT	1
917*0Sstevel@tonic-gate 
918*0Sstevel@tonic-gate #ifdef	__cplusplus
919*0Sstevel@tonic-gate }
920*0Sstevel@tonic-gate #endif
921*0Sstevel@tonic-gate 
922*0Sstevel@tonic-gate #endif	/* _SYS_SCSI_ADAPTERS_FASVAR_H */
923