1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate * CDDL HEADER START
3*0Sstevel@tonic-gate *
4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance
7*0Sstevel@tonic-gate * with the License.
8*0Sstevel@tonic-gate *
9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate * and limitations under the License.
13*0Sstevel@tonic-gate *
14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate *
20*0Sstevel@tonic-gate * CDDL HEADER END
21*0Sstevel@tonic-gate */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate * Copyright 1994-1998,2003 Sun Microsystems, Inc. All rights reserved.
24*0Sstevel@tonic-gate * Use is subject to license terms.
25*0Sstevel@tonic-gate */
26*0Sstevel@tonic-gate
27*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI"
28*0Sstevel@tonic-gate
29*0Sstevel@tonic-gate #include <sys/types.h>
30*0Sstevel@tonic-gate #include <sys/t_lock.h>
31*0Sstevel@tonic-gate #include <sys/klwp.h>
32*0Sstevel@tonic-gate #include <sys/ucontext.h>
33*0Sstevel@tonic-gate #include <sys/procfs.h>
34*0Sstevel@tonic-gate #include <sys/privregs.h>
35*0Sstevel@tonic-gate #include <sys/cpuvar.h>
36*0Sstevel@tonic-gate #include <sys/cmn_err.h>
37*0Sstevel@tonic-gate #include <sys/systm.h>
38*0Sstevel@tonic-gate #include <sys/archsystm.h>
39*0Sstevel@tonic-gate #include <sys/machsystm.h>
40*0Sstevel@tonic-gate #include <sys/fpu/fpusystm.h>
41*0Sstevel@tonic-gate
42*0Sstevel@tonic-gate /*
43*0Sstevel@tonic-gate * Association of extra register state with a struct ucontext is
44*0Sstevel@tonic-gate * done by placing an xrs_t within the uc_mcontext filler area.
45*0Sstevel@tonic-gate *
46*0Sstevel@tonic-gate * The following routines provide an interface for this association.
47*0Sstevel@tonic-gate */
48*0Sstevel@tonic-gate
49*0Sstevel@tonic-gate /*
50*0Sstevel@tonic-gate * clear the struct ucontext extra register state pointer
51*0Sstevel@tonic-gate */
52*0Sstevel@tonic-gate /* ARGSUSED */
53*0Sstevel@tonic-gate void
xregs_clrptr(klwp_id_t lwp,ucontext_t * uc)54*0Sstevel@tonic-gate xregs_clrptr(klwp_id_t lwp, ucontext_t *uc)
55*0Sstevel@tonic-gate {
56*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_id = 0;
57*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_ptr = NULL;
58*0Sstevel@tonic-gate }
59*0Sstevel@tonic-gate
60*0Sstevel@tonic-gate /*
61*0Sstevel@tonic-gate * indicate whether or not an extra register state
62*0Sstevel@tonic-gate * pointer is associated with a struct ucontext
63*0Sstevel@tonic-gate */
64*0Sstevel@tonic-gate /* ARGSUSED */
65*0Sstevel@tonic-gate int
xregs_hasptr(klwp_id_t lwp,ucontext_t * uc)66*0Sstevel@tonic-gate xregs_hasptr(klwp_id_t lwp, ucontext_t *uc)
67*0Sstevel@tonic-gate {
68*0Sstevel@tonic-gate return (uc->uc_mcontext.xrs.xrs_id == XRS_ID);
69*0Sstevel@tonic-gate }
70*0Sstevel@tonic-gate
71*0Sstevel@tonic-gate /*
72*0Sstevel@tonic-gate * get the struct ucontext extra register state pointer field
73*0Sstevel@tonic-gate */
74*0Sstevel@tonic-gate /* ARGSUSED */
75*0Sstevel@tonic-gate caddr_t
xregs_getptr(klwp_id_t lwp,ucontext_t * uc)76*0Sstevel@tonic-gate xregs_getptr(klwp_id_t lwp, ucontext_t *uc)
77*0Sstevel@tonic-gate {
78*0Sstevel@tonic-gate if (uc->uc_mcontext.xrs.xrs_id == XRS_ID)
79*0Sstevel@tonic-gate return (uc->uc_mcontext.xrs.xrs_ptr);
80*0Sstevel@tonic-gate return (NULL);
81*0Sstevel@tonic-gate }
82*0Sstevel@tonic-gate
83*0Sstevel@tonic-gate /*
84*0Sstevel@tonic-gate * set the struct ucontext extra register state pointer field
85*0Sstevel@tonic-gate */
86*0Sstevel@tonic-gate /* ARGSUSED */
87*0Sstevel@tonic-gate void
xregs_setptr(klwp_id_t lwp,ucontext_t * uc,caddr_t xrp)88*0Sstevel@tonic-gate xregs_setptr(klwp_id_t lwp, ucontext_t *uc, caddr_t xrp)
89*0Sstevel@tonic-gate {
90*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_id = XRS_ID;
91*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_ptr = xrp;
92*0Sstevel@tonic-gate }
93*0Sstevel@tonic-gate
94*0Sstevel@tonic-gate #ifdef _SYSCALL32_IMPL
95*0Sstevel@tonic-gate
96*0Sstevel@tonic-gate /* ARGSUSED */
97*0Sstevel@tonic-gate void
xregs_clrptr32(klwp_id_t lwp,ucontext32_t * uc)98*0Sstevel@tonic-gate xregs_clrptr32(klwp_id_t lwp, ucontext32_t *uc)
99*0Sstevel@tonic-gate {
100*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_id = 0;
101*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_ptr = 0;
102*0Sstevel@tonic-gate }
103*0Sstevel@tonic-gate
104*0Sstevel@tonic-gate /* ARGSUSED */
105*0Sstevel@tonic-gate int
xregs_hasptr32(klwp_id_t lwp,ucontext32_t * uc)106*0Sstevel@tonic-gate xregs_hasptr32(klwp_id_t lwp, ucontext32_t *uc)
107*0Sstevel@tonic-gate {
108*0Sstevel@tonic-gate return (uc->uc_mcontext.xrs.xrs_id == XRS_ID);
109*0Sstevel@tonic-gate }
110*0Sstevel@tonic-gate
111*0Sstevel@tonic-gate /* ARGSUSED */
112*0Sstevel@tonic-gate caddr32_t
xregs_getptr32(klwp_id_t lwp,ucontext32_t * uc)113*0Sstevel@tonic-gate xregs_getptr32(klwp_id_t lwp, ucontext32_t *uc)
114*0Sstevel@tonic-gate {
115*0Sstevel@tonic-gate if (uc->uc_mcontext.xrs.xrs_id == XRS_ID)
116*0Sstevel@tonic-gate return (uc->uc_mcontext.xrs.xrs_ptr);
117*0Sstevel@tonic-gate return (0);
118*0Sstevel@tonic-gate }
119*0Sstevel@tonic-gate
120*0Sstevel@tonic-gate /* ARGSUSED */
121*0Sstevel@tonic-gate void
xregs_setptr32(klwp_id_t lwp,ucontext32_t * uc,caddr32_t xrp)122*0Sstevel@tonic-gate xregs_setptr32(klwp_id_t lwp, ucontext32_t *uc, caddr32_t xrp)
123*0Sstevel@tonic-gate {
124*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_id = XRS_ID;
125*0Sstevel@tonic-gate uc->uc_mcontext.xrs.xrs_ptr = xrp;
126*0Sstevel@tonic-gate }
127*0Sstevel@tonic-gate
128*0Sstevel@tonic-gate #endif /* _SYSCALL32_IMPL */
129*0Sstevel@tonic-gate
130*0Sstevel@tonic-gate /*
131*0Sstevel@tonic-gate * Extra register state manipulation routines.
132*0Sstevel@tonic-gate * NOTE: 'lwp' might not correspond to 'curthread' in any of the
133*0Sstevel@tonic-gate * functions below since they are called from code in /proc to get
134*0Sstevel@tonic-gate * or set the extra registers of another lwp.
135*0Sstevel@tonic-gate */
136*0Sstevel@tonic-gate
137*0Sstevel@tonic-gate int xregs_exists = 1;
138*0Sstevel@tonic-gate
139*0Sstevel@tonic-gate #define GET_UPPER_32(all) (uint32_t)((uint64_t)(all) >> 32)
140*0Sstevel@tonic-gate #define SET_ALL_64(upper, lower) \
141*0Sstevel@tonic-gate (((uint64_t)(upper) << 32) | (uint32_t)(lower))
142*0Sstevel@tonic-gate
143*0Sstevel@tonic-gate
144*0Sstevel@tonic-gate /*
145*0Sstevel@tonic-gate * fill in the extra register state area specified with the
146*0Sstevel@tonic-gate * specified lwp's non-floating-point extra register state
147*0Sstevel@tonic-gate * information
148*0Sstevel@tonic-gate */
149*0Sstevel@tonic-gate void
xregs_getgregs(klwp_id_t lwp,caddr_t xrp)150*0Sstevel@tonic-gate xregs_getgregs(klwp_id_t lwp, caddr_t xrp)
151*0Sstevel@tonic-gate {
152*0Sstevel@tonic-gate prxregset_t *xregs = (prxregset_t *)xrp;
153*0Sstevel@tonic-gate struct regs *rp = lwptoregs(lwp);
154*0Sstevel@tonic-gate
155*0Sstevel@tonic-gate if (xregs == NULL)
156*0Sstevel@tonic-gate return;
157*0Sstevel@tonic-gate
158*0Sstevel@tonic-gate xregs->pr_type = XR_TYPE_V8P;
159*0Sstevel@tonic-gate
160*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G0] = 0;
161*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G1] = GET_UPPER_32(rp->r_g1);
162*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G2] = GET_UPPER_32(rp->r_g2);
163*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G3] = GET_UPPER_32(rp->r_g3);
164*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G4] = GET_UPPER_32(rp->r_g4);
165*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G5] = GET_UPPER_32(rp->r_g5);
166*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G6] = GET_UPPER_32(rp->r_g6);
167*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xg[XR_G7] = GET_UPPER_32(rp->r_g7);
168*0Sstevel@tonic-gate
169*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O0] = GET_UPPER_32(rp->r_o0);
170*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O1] = GET_UPPER_32(rp->r_o1);
171*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O2] = GET_UPPER_32(rp->r_o2);
172*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O3] = GET_UPPER_32(rp->r_o3);
173*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O4] = GET_UPPER_32(rp->r_o4);
174*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O5] = GET_UPPER_32(rp->r_o5);
175*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O6] = GET_UPPER_32(rp->r_o6);
176*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xo[XR_O7] = GET_UPPER_32(rp->r_o7);
177*0Sstevel@tonic-gate
178*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_tstate = rp->r_tstate;
179*0Sstevel@tonic-gate
180*0Sstevel@tonic-gate xregs_getgfiller(lwp, xrp);
181*0Sstevel@tonic-gate }
182*0Sstevel@tonic-gate
183*0Sstevel@tonic-gate /*
184*0Sstevel@tonic-gate * fill in the extra register state area specified with the
185*0Sstevel@tonic-gate * specified lwp's floating-point extra register state information
186*0Sstevel@tonic-gate */
187*0Sstevel@tonic-gate void
xregs_getfpregs(klwp_id_t lwp,caddr_t xrp)188*0Sstevel@tonic-gate xregs_getfpregs(klwp_id_t lwp, caddr_t xrp)
189*0Sstevel@tonic-gate {
190*0Sstevel@tonic-gate prxregset_t *xregs = (prxregset_t *)xrp;
191*0Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp);
192*0Sstevel@tonic-gate
193*0Sstevel@tonic-gate if (xregs == NULL)
194*0Sstevel@tonic-gate return;
195*0Sstevel@tonic-gate
196*0Sstevel@tonic-gate kpreempt_disable();
197*0Sstevel@tonic-gate
198*0Sstevel@tonic-gate xregs->pr_type = XR_TYPE_V8P;
199*0Sstevel@tonic-gate
200*0Sstevel@tonic-gate if (ttolwp(curthread) == lwp)
201*0Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs();
202*0Sstevel@tonic-gate if ((fp->fpu_en) || (fp->fpu_fprs & FPRS_FEF)) {
203*0Sstevel@tonic-gate /*
204*0Sstevel@tonic-gate * If we have an fpu and the current thread owns the fp
205*0Sstevel@tonic-gate * context, flush fp registers into the pcb.
206*0Sstevel@tonic-gate */
207*0Sstevel@tonic-gate if (fpu_exists && (ttolwp(curthread) == lwp)) {
208*0Sstevel@tonic-gate if ((fp->fpu_fprs & FPRS_FEF) != FPRS_FEF) {
209*0Sstevel@tonic-gate uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL);
210*0Sstevel@tonic-gate
211*0Sstevel@tonic-gate _fp_write_fprs(fprs);
212*0Sstevel@tonic-gate fp->fpu_fprs = fprs;
213*0Sstevel@tonic-gate #ifdef DEBUG
214*0Sstevel@tonic-gate if (fpdispr) {
215*0Sstevel@tonic-gate cmn_err(CE_NOTE, "xregs_getfpregs "
216*0Sstevel@tonic-gate "with fp disabled!");
217*0Sstevel@tonic-gate }
218*0Sstevel@tonic-gate #endif /* DEBUG */
219*0Sstevel@tonic-gate }
220*0Sstevel@tonic-gate fp_v8p_fksave(fp);
221*0Sstevel@tonic-gate }
222*0Sstevel@tonic-gate (void) kcopy(&fp->fpu_fr.fpu_dregs[16],
223*0Sstevel@tonic-gate &xregs->pr_un.pr_v8p.pr_xfr,
224*0Sstevel@tonic-gate sizeof (xregs->pr_un.pr_v8p.pr_xfr));
225*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xfsr = GET_UPPER_32(fp->fpu_fsr);
226*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_fprs = fp->fpu_fprs;
227*0Sstevel@tonic-gate
228*0Sstevel@tonic-gate xregs_getfpfiller(lwp, xrp);
229*0Sstevel@tonic-gate } else {
230*0Sstevel@tonic-gate int i;
231*0Sstevel@tonic-gate for (i = 0; i < 32; i++) /* Nan */
232*0Sstevel@tonic-gate xregs->pr_un.pr_v8p.pr_xfr.pr_regs[i] = (uint32_t)-1;
233*0Sstevel@tonic-gate }
234*0Sstevel@tonic-gate
235*0Sstevel@tonic-gate kpreempt_enable();
236*0Sstevel@tonic-gate }
237*0Sstevel@tonic-gate
238*0Sstevel@tonic-gate /*
239*0Sstevel@tonic-gate * fill in the extra register state area specified with
240*0Sstevel@tonic-gate * the specified lwp's extra register state information
241*0Sstevel@tonic-gate */
242*0Sstevel@tonic-gate void
xregs_get(klwp_id_t lwp,caddr_t xrp)243*0Sstevel@tonic-gate xregs_get(klwp_id_t lwp, caddr_t xrp)
244*0Sstevel@tonic-gate {
245*0Sstevel@tonic-gate if (xrp != NULL) {
246*0Sstevel@tonic-gate bzero(xrp, sizeof (prxregset_t));
247*0Sstevel@tonic-gate xregs_getgregs(lwp, xrp);
248*0Sstevel@tonic-gate xregs_getfpregs(lwp, xrp);
249*0Sstevel@tonic-gate }
250*0Sstevel@tonic-gate }
251*0Sstevel@tonic-gate
252*0Sstevel@tonic-gate /*
253*0Sstevel@tonic-gate * set the specified lwp's non-floating-point extra
254*0Sstevel@tonic-gate * register state based on the specified input
255*0Sstevel@tonic-gate */
256*0Sstevel@tonic-gate void
xregs_setgregs(klwp_id_t lwp,caddr_t xrp)257*0Sstevel@tonic-gate xregs_setgregs(klwp_id_t lwp, caddr_t xrp)
258*0Sstevel@tonic-gate {
259*0Sstevel@tonic-gate prxregset_t *xregs = (prxregset_t *)xrp;
260*0Sstevel@tonic-gate struct regs *rp = lwptoregs(lwp);
261*0Sstevel@tonic-gate int current = (lwp == curthread->t_lwp);
262*0Sstevel@tonic-gate
263*0Sstevel@tonic-gate if (xregs == NULL)
264*0Sstevel@tonic-gate return;
265*0Sstevel@tonic-gate
266*0Sstevel@tonic-gate #ifdef DEBUG
267*0Sstevel@tonic-gate if (xregs->pr_type != XR_TYPE_V8P) {
268*0Sstevel@tonic-gate cmn_err(CE_WARN,
269*0Sstevel@tonic-gate "xregs_setgregs: pr_type is %d and should be %d",
270*0Sstevel@tonic-gate xregs->pr_type, XR_TYPE_V8P);
271*0Sstevel@tonic-gate }
272*0Sstevel@tonic-gate #endif /* DEBUG */
273*0Sstevel@tonic-gate
274*0Sstevel@tonic-gate if (current) {
275*0Sstevel@tonic-gate /*
276*0Sstevel@tonic-gate * copy the args from the regs first
277*0Sstevel@tonic-gate */
278*0Sstevel@tonic-gate (void) save_syscall_args();
279*0Sstevel@tonic-gate }
280*0Sstevel@tonic-gate
281*0Sstevel@tonic-gate rp->r_g1 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G1], rp->r_g1);
282*0Sstevel@tonic-gate rp->r_g2 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G2], rp->r_g2);
283*0Sstevel@tonic-gate rp->r_g3 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G3], rp->r_g3);
284*0Sstevel@tonic-gate rp->r_g4 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G4], rp->r_g4);
285*0Sstevel@tonic-gate rp->r_g5 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G5], rp->r_g5);
286*0Sstevel@tonic-gate rp->r_g6 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G6], rp->r_g6);
287*0Sstevel@tonic-gate rp->r_g7 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xg[XR_G7], rp->r_g7);
288*0Sstevel@tonic-gate
289*0Sstevel@tonic-gate rp->r_o0 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O0], rp->r_o0);
290*0Sstevel@tonic-gate rp->r_o1 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O1], rp->r_o1);
291*0Sstevel@tonic-gate rp->r_o2 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O2], rp->r_o2);
292*0Sstevel@tonic-gate rp->r_o3 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O3], rp->r_o3);
293*0Sstevel@tonic-gate rp->r_o4 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O4], rp->r_o4);
294*0Sstevel@tonic-gate rp->r_o5 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O5], rp->r_o5);
295*0Sstevel@tonic-gate rp->r_o6 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O6], rp->r_o6);
296*0Sstevel@tonic-gate rp->r_o7 = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xo[XR_O7], rp->r_o7);
297*0Sstevel@tonic-gate
298*0Sstevel@tonic-gate rp->r_tstate &= ~((uint64_t)CCR_XCC << TSTATE_CCR_SHIFT);
299*0Sstevel@tonic-gate rp->r_tstate |= xregs->pr_un.pr_v8p.pr_tstate &
300*0Sstevel@tonic-gate ((uint64_t)CCR_XCC << TSTATE_CCR_SHIFT);
301*0Sstevel@tonic-gate rp->r_tstate &= ~((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT);
302*0Sstevel@tonic-gate rp->r_tstate |= xregs->pr_un.pr_v8p.pr_tstate &
303*0Sstevel@tonic-gate ((uint64_t)TSTATE_ASI_MASK << TSTATE_ASI_SHIFT);
304*0Sstevel@tonic-gate
305*0Sstevel@tonic-gate xregs_setgfiller(lwp, xrp);
306*0Sstevel@tonic-gate
307*0Sstevel@tonic-gate if (current) {
308*0Sstevel@tonic-gate /*
309*0Sstevel@tonic-gate * This was called from a system call, but we
310*0Sstevel@tonic-gate * do not want to return via the shared window;
311*0Sstevel@tonic-gate * restoring the CPU context changes everything.
312*0Sstevel@tonic-gate */
313*0Sstevel@tonic-gate lwp->lwp_eosys = JUSTRETURN;
314*0Sstevel@tonic-gate curthread->t_post_sys = 1;
315*0Sstevel@tonic-gate }
316*0Sstevel@tonic-gate }
317*0Sstevel@tonic-gate
318*0Sstevel@tonic-gate /*
319*0Sstevel@tonic-gate * set the specified lwp's floating-point extra
320*0Sstevel@tonic-gate * register state based on the specified input
321*0Sstevel@tonic-gate */
322*0Sstevel@tonic-gate void
xregs_setfpregs(klwp_id_t lwp,caddr_t xrp)323*0Sstevel@tonic-gate xregs_setfpregs(klwp_id_t lwp, caddr_t xrp)
324*0Sstevel@tonic-gate {
325*0Sstevel@tonic-gate prxregset_t *xregs = (prxregset_t *)xrp;
326*0Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp);
327*0Sstevel@tonic-gate
328*0Sstevel@tonic-gate if (xregs == NULL)
329*0Sstevel@tonic-gate return;
330*0Sstevel@tonic-gate
331*0Sstevel@tonic-gate #ifdef DEBUG
332*0Sstevel@tonic-gate if (xregs->pr_type != XR_TYPE_V8P) {
333*0Sstevel@tonic-gate cmn_err(CE_WARN,
334*0Sstevel@tonic-gate "xregs_setfpregs: pr_type is %d and should be %d",
335*0Sstevel@tonic-gate xregs->pr_type, XR_TYPE_V8P);
336*0Sstevel@tonic-gate }
337*0Sstevel@tonic-gate #endif /* DEBUG */
338*0Sstevel@tonic-gate if ((fp->fpu_en) || (xregs->pr_un.pr_v8p.pr_fprs & FPRS_FEF)) {
339*0Sstevel@tonic-gate kpreempt_disable();
340*0Sstevel@tonic-gate (void) kcopy(&xregs->pr_un.pr_v8p.pr_xfr,
341*0Sstevel@tonic-gate &fp->fpu_fr.fpu_dregs[16],
342*0Sstevel@tonic-gate sizeof (xregs->pr_un.pr_v8p.pr_xfr));
343*0Sstevel@tonic-gate fp->fpu_fprs = xregs->pr_un.pr_v8p.pr_fprs;
344*0Sstevel@tonic-gate fp->fpu_fsr = SET_ALL_64(xregs->pr_un.pr_v8p.pr_xfsr,
345*0Sstevel@tonic-gate fp->fpu_fsr);
346*0Sstevel@tonic-gate
347*0Sstevel@tonic-gate xregs_setfpfiller(lwp, xrp);
348*0Sstevel@tonic-gate
349*0Sstevel@tonic-gate /*
350*0Sstevel@tonic-gate * If not the current lwp then resume() will handle it
351*0Sstevel@tonic-gate */
352*0Sstevel@tonic-gate if (lwp != ttolwp(curthread)) {
353*0Sstevel@tonic-gate /* force resume to reload fp regs */
354*0Sstevel@tonic-gate kpreempt_enable();
355*0Sstevel@tonic-gate return;
356*0Sstevel@tonic-gate }
357*0Sstevel@tonic-gate
358*0Sstevel@tonic-gate if (fpu_exists) {
359*0Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs();
360*0Sstevel@tonic-gate if ((fp->fpu_fprs & FPRS_FEF) != FPRS_FEF) {
361*0Sstevel@tonic-gate uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL);
362*0Sstevel@tonic-gate
363*0Sstevel@tonic-gate _fp_write_fprs(fprs);
364*0Sstevel@tonic-gate fp->fpu_fprs = (V9_FPU_FPRS_TYPE)fprs;
365*0Sstevel@tonic-gate #ifdef DEBUG
366*0Sstevel@tonic-gate if (fpdispr) {
367*0Sstevel@tonic-gate cmn_err(CE_NOTE, "xregs_setfpregs "
368*0Sstevel@tonic-gate "with fp disabled!");
369*0Sstevel@tonic-gate }
370*0Sstevel@tonic-gate #endif /* DEBUG */
371*0Sstevel@tonic-gate }
372*0Sstevel@tonic-gate fp_v8p_load(fp);
373*0Sstevel@tonic-gate }
374*0Sstevel@tonic-gate
375*0Sstevel@tonic-gate kpreempt_enable();
376*0Sstevel@tonic-gate }
377*0Sstevel@tonic-gate }
378*0Sstevel@tonic-gate
379*0Sstevel@tonic-gate /*
380*0Sstevel@tonic-gate * set the specified lwp's extra register
381*0Sstevel@tonic-gate * state based on the specified input
382*0Sstevel@tonic-gate */
383*0Sstevel@tonic-gate void
xregs_set(klwp_id_t lwp,caddr_t xrp)384*0Sstevel@tonic-gate xregs_set(klwp_id_t lwp, caddr_t xrp)
385*0Sstevel@tonic-gate {
386*0Sstevel@tonic-gate if (xrp != NULL) {
387*0Sstevel@tonic-gate xregs_setgregs(lwp, xrp);
388*0Sstevel@tonic-gate xregs_setfpregs(lwp, xrp);
389*0Sstevel@tonic-gate }
390*0Sstevel@tonic-gate }
391*0Sstevel@tonic-gate
392*0Sstevel@tonic-gate /*
393*0Sstevel@tonic-gate * return the size of the extra register state
394*0Sstevel@tonic-gate */
395*0Sstevel@tonic-gate int
xregs_getsize(proc_t * p)396*0Sstevel@tonic-gate xregs_getsize(proc_t *p)
397*0Sstevel@tonic-gate {
398*0Sstevel@tonic-gate if (!xregs_exists || p->p_model == DATAMODEL_LP64)
399*0Sstevel@tonic-gate return (0);
400*0Sstevel@tonic-gate return (sizeof (prxregset_t));
401*0Sstevel@tonic-gate }
402