xref: /onnv-gate/usr/src/uts/sparc/io/pciex/pcieb_plx.h (revision 10187:ad62e2dfbe0c)
1*10187SKrishna.Elango@Sun.COM /*
2*10187SKrishna.Elango@Sun.COM  * CDDL HEADER START
3*10187SKrishna.Elango@Sun.COM  *
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8*10187SKrishna.Elango@Sun.COM  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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14*10187SKrishna.Elango@Sun.COM  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*10187SKrishna.Elango@Sun.COM  * If applicable, add the following below this CDDL HEADER, with the
16*10187SKrishna.Elango@Sun.COM  * fields enclosed by brackets "[]" replaced with your own identifying
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19*10187SKrishna.Elango@Sun.COM  * CDDL HEADER END
20*10187SKrishna.Elango@Sun.COM  */
21*10187SKrishna.Elango@Sun.COM /*
22*10187SKrishna.Elango@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23*10187SKrishna.Elango@Sun.COM  * Use is subject to license terms.
24*10187SKrishna.Elango@Sun.COM  */
25*10187SKrishna.Elango@Sun.COM 
26*10187SKrishna.Elango@Sun.COM #ifndef	_SYS_PCIEB_PLX_H
27*10187SKrishna.Elango@Sun.COM #define	_SYS_PCIEB_PLX_H
28*10187SKrishna.Elango@Sun.COM 
29*10187SKrishna.Elango@Sun.COM #ifdef	__cplusplus
30*10187SKrishna.Elango@Sun.COM extern "C" {
31*10187SKrishna.Elango@Sun.COM #endif
32*10187SKrishna.Elango@Sun.COM 
33*10187SKrishna.Elango@Sun.COM /* PLX Vendor/Device IDs */
34*10187SKrishna.Elango@Sun.COM #define	PXB_VENDOR_PLX		0x10B5
35*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_8516	0x8516
36*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_8532	0x8532
37*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_8533	0x8533
38*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_8548	0x8548
39*10187SKrishna.Elango@Sun.COM 
40*10187SKrishna.Elango@Sun.COM #define	PXB_VENDOR_SUN		0x108E
41*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_PCIX	0x9010
42*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_PCIE	0x9020
43*10187SKrishna.Elango@Sun.COM 
44*10187SKrishna.Elango@Sun.COM /* Last known bad rev for MSI and other issues */
45*10187SKrishna.Elango@Sun.COM #define	PXB_DEVICE_PLX_AA_REV	0xAA
46*10187SKrishna.Elango@Sun.COM 
47*10187SKrishna.Elango@Sun.COM /* Register offsets and bits specific to the 8548 and 8533 */
48*10187SKrishna.Elango@Sun.COM #define	PLX_INGRESS_CONTROL_SHADOW	0x664
49*10187SKrishna.Elango@Sun.COM #define	PLX_INGRESS_PORT_ENABLE		0x668
50*10187SKrishna.Elango@Sun.COM #define	PLX_CAM_PORT_8			0x2e8
51*10187SKrishna.Elango@Sun.COM #define	PLX_CAM_PORT_12			0x2f8
52*10187SKrishna.Elango@Sun.COM #define	PLX_RO_MODE_BIT			0x20
53*10187SKrishna.Elango@Sun.COM 
54*10187SKrishna.Elango@Sun.COM #define	IS_PLX_VENDORID(x)		(x == PXB_VENDOR_PLX)
55*10187SKrishna.Elango@Sun.COM 
56*10187SKrishna.Elango@Sun.COM static int pxb_tlp_count = 64;
57*10187SKrishna.Elango@Sun.COM 
58*10187SKrishna.Elango@Sun.COM #ifdef	__cplusplus
59*10187SKrishna.Elango@Sun.COM }
60*10187SKrishna.Elango@Sun.COM #endif
61*10187SKrishna.Elango@Sun.COM 
62*10187SKrishna.Elango@Sun.COM #endif	/* _SYS_PCIEB_PLX_H */
63