1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ 30*0Sstevel@tonic-gate /* All Rights Reserved */ 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate #ifndef _SYS_REGSET_H 33*0Sstevel@tonic-gate #define _SYS_REGSET_H 34*0Sstevel@tonic-gate 35*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 36*0Sstevel@tonic-gate 37*0Sstevel@tonic-gate #include <sys/feature_tests.h> 38*0Sstevel@tonic-gate 39*0Sstevel@tonic-gate #if !defined(_ASM) 40*0Sstevel@tonic-gate #include <sys/types.h> 41*0Sstevel@tonic-gate #endif 42*0Sstevel@tonic-gate 43*0Sstevel@tonic-gate #ifdef __cplusplus 44*0Sstevel@tonic-gate extern "C" { 45*0Sstevel@tonic-gate #endif 46*0Sstevel@tonic-gate 47*0Sstevel@tonic-gate #if !defined(_XPG4_2) || defined(__EXTENSIONS__) 48*0Sstevel@tonic-gate 49*0Sstevel@tonic-gate /* 50*0Sstevel@tonic-gate * The names and offsets defined here should be specified by the 51*0Sstevel@tonic-gate * AMD64 ABI suppl. 52*0Sstevel@tonic-gate * 53*0Sstevel@tonic-gate * We make fsbase and gsbase part of the lwp context (since they're 54*0Sstevel@tonic-gate * the only way to access the full 64-bit address range via the segment 55*0Sstevel@tonic-gate * registers) and thus belong here too. However we treat them as 56*0Sstevel@tonic-gate * read-only; if %fs or %gs are updated, the results of the descriptor 57*0Sstevel@tonic-gate * table lookup that those updates implicitly cause will be reflected 58*0Sstevel@tonic-gate * in the corresponding fsbase and/or gsbase values the next time the 59*0Sstevel@tonic-gate * context can be inspected. However it is NOT possible to override 60*0Sstevel@tonic-gate * the fsbase/gsbase settings via this interface. 61*0Sstevel@tonic-gate * 62*0Sstevel@tonic-gate * Direct modification of the base registers (thus overriding the 63*0Sstevel@tonic-gate * descriptor table base address) can be achieved with _lwp_setprivate. 64*0Sstevel@tonic-gate */ 65*0Sstevel@tonic-gate 66*0Sstevel@tonic-gate #define REG_GSBASE 27 67*0Sstevel@tonic-gate #define REG_FSBASE 26 68*0Sstevel@tonic-gate #define REG_DS 25 69*0Sstevel@tonic-gate #define REG_ES 24 70*0Sstevel@tonic-gate 71*0Sstevel@tonic-gate #define REG_GS 23 72*0Sstevel@tonic-gate #define REG_FS 22 73*0Sstevel@tonic-gate #define REG_SS 21 74*0Sstevel@tonic-gate #define REG_RSP 20 75*0Sstevel@tonic-gate #define REG_RFL 19 76*0Sstevel@tonic-gate #define REG_CS 18 77*0Sstevel@tonic-gate #define REG_RIP 17 78*0Sstevel@tonic-gate #define REG_ERR 16 79*0Sstevel@tonic-gate #define REG_TRAPNO 15 80*0Sstevel@tonic-gate #define REG_RAX 14 81*0Sstevel@tonic-gate #define REG_RCX 13 82*0Sstevel@tonic-gate #define REG_RDX 12 83*0Sstevel@tonic-gate #define REG_RBX 11 84*0Sstevel@tonic-gate #define REG_RBP 10 85*0Sstevel@tonic-gate #define REG_RSI 9 86*0Sstevel@tonic-gate #define REG_RDI 8 87*0Sstevel@tonic-gate #define REG_R8 7 88*0Sstevel@tonic-gate #define REG_R9 6 89*0Sstevel@tonic-gate #define REG_R10 5 90*0Sstevel@tonic-gate #define REG_R11 4 91*0Sstevel@tonic-gate #define REG_R12 3 92*0Sstevel@tonic-gate #define REG_R13 2 93*0Sstevel@tonic-gate #define REG_R14 1 94*0Sstevel@tonic-gate #define REG_R15 0 95*0Sstevel@tonic-gate 96*0Sstevel@tonic-gate /* 97*0Sstevel@tonic-gate * The names and offsets defined here are specified by i386 ABI suppl. 98*0Sstevel@tonic-gate */ 99*0Sstevel@tonic-gate 100*0Sstevel@tonic-gate #define SS 18 /* only stored on a privilege transition */ 101*0Sstevel@tonic-gate #define UESP 17 /* only stored on a privilege transition */ 102*0Sstevel@tonic-gate #define EFL 16 103*0Sstevel@tonic-gate #define CS 15 104*0Sstevel@tonic-gate #define EIP 14 105*0Sstevel@tonic-gate #define ERR 13 106*0Sstevel@tonic-gate #define TRAPNO 12 107*0Sstevel@tonic-gate #define EAX 11 108*0Sstevel@tonic-gate #define ECX 10 109*0Sstevel@tonic-gate #define EDX 9 110*0Sstevel@tonic-gate #define EBX 8 111*0Sstevel@tonic-gate #define ESP 7 112*0Sstevel@tonic-gate #define EBP 6 113*0Sstevel@tonic-gate #define ESI 5 114*0Sstevel@tonic-gate #define EDI 4 115*0Sstevel@tonic-gate #define DS 3 116*0Sstevel@tonic-gate #define ES 2 117*0Sstevel@tonic-gate #define FS 1 118*0Sstevel@tonic-gate #define GS 0 119*0Sstevel@tonic-gate 120*0Sstevel@tonic-gate /* aliases for portability */ 121*0Sstevel@tonic-gate 122*0Sstevel@tonic-gate #if defined(__amd64) 123*0Sstevel@tonic-gate 124*0Sstevel@tonic-gate #define REG_PC REG_RIP 125*0Sstevel@tonic-gate #define REG_FP REG_RBP 126*0Sstevel@tonic-gate #define REG_SP REG_RSP 127*0Sstevel@tonic-gate #define REG_PS REG_RFL 128*0Sstevel@tonic-gate #define REG_R0 REG_RAX 129*0Sstevel@tonic-gate #define REG_R1 REG_RDX 130*0Sstevel@tonic-gate 131*0Sstevel@tonic-gate #else /* __i386 */ 132*0Sstevel@tonic-gate 133*0Sstevel@tonic-gate #define REG_PC EIP 134*0Sstevel@tonic-gate #define REG_FP EBP 135*0Sstevel@tonic-gate #define REG_SP UESP 136*0Sstevel@tonic-gate #define REG_PS EFL 137*0Sstevel@tonic-gate #define REG_R0 EAX 138*0Sstevel@tonic-gate #define REG_R1 EDX 139*0Sstevel@tonic-gate 140*0Sstevel@tonic-gate #endif /* __i386 */ 141*0Sstevel@tonic-gate 142*0Sstevel@tonic-gate #endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */ 143*0Sstevel@tonic-gate 144*0Sstevel@tonic-gate /* 145*0Sstevel@tonic-gate * A gregset_t is defined as an array type for compatibility with the reference 146*0Sstevel@tonic-gate * source. This is important due to differences in the way the C language 147*0Sstevel@tonic-gate * treats arrays and structures as parameters. 148*0Sstevel@tonic-gate */ 149*0Sstevel@tonic-gate #if defined(__amd64) 150*0Sstevel@tonic-gate #define _NGREG 28 151*0Sstevel@tonic-gate #else 152*0Sstevel@tonic-gate #define _NGREG 19 153*0Sstevel@tonic-gate #endif 154*0Sstevel@tonic-gate #if !defined(_XPG4_2) || defined(__EXTENSIONS__) 155*0Sstevel@tonic-gate #define NGREG _NGREG 156*0Sstevel@tonic-gate #endif 157*0Sstevel@tonic-gate 158*0Sstevel@tonic-gate #if !defined(_ASM) 159*0Sstevel@tonic-gate 160*0Sstevel@tonic-gate #if defined(_LP64) || defined(_I32LPx) 161*0Sstevel@tonic-gate typedef long greg_t; 162*0Sstevel@tonic-gate #else 163*0Sstevel@tonic-gate typedef int greg_t; 164*0Sstevel@tonic-gate #endif 165*0Sstevel@tonic-gate 166*0Sstevel@tonic-gate #if defined(_SYSCALL32) 167*0Sstevel@tonic-gate 168*0Sstevel@tonic-gate typedef int32_t greg32_t; 169*0Sstevel@tonic-gate typedef int64_t greg64_t; 170*0Sstevel@tonic-gate 171*0Sstevel@tonic-gate #endif /* _SYSCALL32 */ 172*0Sstevel@tonic-gate 173*0Sstevel@tonic-gate typedef greg_t gregset_t[_NGREG]; 174*0Sstevel@tonic-gate 175*0Sstevel@tonic-gate #if defined(_SYSCALL32) 176*0Sstevel@tonic-gate 177*0Sstevel@tonic-gate #define _NGREG32 19 178*0Sstevel@tonic-gate #define _NGREG64 28 179*0Sstevel@tonic-gate 180*0Sstevel@tonic-gate typedef greg32_t gregset32_t[_NGREG32]; 181*0Sstevel@tonic-gate typedef greg64_t gregset64_t[_NGREG64]; 182*0Sstevel@tonic-gate 183*0Sstevel@tonic-gate #endif /* _SYSCALL32 */ 184*0Sstevel@tonic-gate 185*0Sstevel@tonic-gate #if !defined(_XPG4_2) || defined(__EXTENSIONS__) 186*0Sstevel@tonic-gate 187*0Sstevel@tonic-gate /* 188*0Sstevel@tonic-gate * Floating point definitions. 189*0Sstevel@tonic-gate */ 190*0Sstevel@tonic-gate 191*0Sstevel@tonic-gate /* 192*0Sstevel@tonic-gate * This structure is written to memory by an 'fnsave' instruction 193*0Sstevel@tonic-gate */ 194*0Sstevel@tonic-gate struct fnsave_state { 195*0Sstevel@tonic-gate uint16_t f_fcw; 196*0Sstevel@tonic-gate uint16_t __f_ign0; 197*0Sstevel@tonic-gate uint16_t f_fsw; 198*0Sstevel@tonic-gate uint16_t __f_ign1; 199*0Sstevel@tonic-gate uint16_t f_ftw; 200*0Sstevel@tonic-gate uint16_t __f_ign2; 201*0Sstevel@tonic-gate uint32_t f_eip; 202*0Sstevel@tonic-gate uint16_t f_cs; 203*0Sstevel@tonic-gate uint16_t f_fop; 204*0Sstevel@tonic-gate uint32_t f_dp; 205*0Sstevel@tonic-gate uint16_t f_ds; 206*0Sstevel@tonic-gate uint16_t __f_ign3; 207*0Sstevel@tonic-gate union { 208*0Sstevel@tonic-gate uint16_t fpr_16[5]; /* 80-bits of x87 state */ 209*0Sstevel@tonic-gate } f_st[8]; 210*0Sstevel@tonic-gate }; /* 108 bytes */ 211*0Sstevel@tonic-gate 212*0Sstevel@tonic-gate /* 213*0Sstevel@tonic-gate * This structure is written to memory by an 'fxsave' instruction 214*0Sstevel@tonic-gate * Note the variant behaviour of this instruction between long mode 215*0Sstevel@tonic-gate * and legacy environments! 216*0Sstevel@tonic-gate */ 217*0Sstevel@tonic-gate struct fxsave_state { 218*0Sstevel@tonic-gate uint16_t fx_fcw; 219*0Sstevel@tonic-gate uint16_t fx_fsw; 220*0Sstevel@tonic-gate uint16_t fx_fctw; /* compressed tag word */ 221*0Sstevel@tonic-gate uint16_t fx_fop; 222*0Sstevel@tonic-gate #if defined(__amd64) 223*0Sstevel@tonic-gate uint64_t fx_rip; 224*0Sstevel@tonic-gate uint64_t fx_rdp; 225*0Sstevel@tonic-gate #else 226*0Sstevel@tonic-gate uint32_t fx_eip; 227*0Sstevel@tonic-gate uint16_t fx_cs; 228*0Sstevel@tonic-gate uint16_t __fx_ign0; 229*0Sstevel@tonic-gate uint32_t fx_dp; 230*0Sstevel@tonic-gate uint16_t fx_ds; 231*0Sstevel@tonic-gate uint16_t __fx_ign1; 232*0Sstevel@tonic-gate #endif 233*0Sstevel@tonic-gate uint32_t fx_mxcsr; 234*0Sstevel@tonic-gate uint32_t fx_mxcsr_mask; 235*0Sstevel@tonic-gate union { 236*0Sstevel@tonic-gate uint16_t fpr_16[5]; /* 80-bits of x87 state */ 237*0Sstevel@tonic-gate u_longlong_t fpr_mmx; /* 64-bit mmx register */ 238*0Sstevel@tonic-gate uint32_t __fpr_pad[4]; /* (pad out to 128-bits) */ 239*0Sstevel@tonic-gate } fx_st[8]; 240*0Sstevel@tonic-gate #if defined(__amd64) 241*0Sstevel@tonic-gate upad128_t fx_xmm[16]; /* 128-bit registers */ 242*0Sstevel@tonic-gate upad128_t __fx_ign2[6]; 243*0Sstevel@tonic-gate #else 244*0Sstevel@tonic-gate upad128_t fx_xmm[8]; /* 128-bit registers */ 245*0Sstevel@tonic-gate upad128_t __fx_ign2[14]; 246*0Sstevel@tonic-gate #endif 247*0Sstevel@tonic-gate }; /* 512 bytes */ 248*0Sstevel@tonic-gate 249*0Sstevel@tonic-gate #if defined(__amd64) 250*0Sstevel@tonic-gate 251*0Sstevel@tonic-gate typedef struct fpu { 252*0Sstevel@tonic-gate union { 253*0Sstevel@tonic-gate struct fpchip_state { 254*0Sstevel@tonic-gate uint16_t cw; 255*0Sstevel@tonic-gate uint16_t sw; 256*0Sstevel@tonic-gate uint8_t fctw; 257*0Sstevel@tonic-gate uint8_t __fx_rsvd; 258*0Sstevel@tonic-gate uint16_t fop; 259*0Sstevel@tonic-gate uint64_t rip; 260*0Sstevel@tonic-gate uint64_t rdp; 261*0Sstevel@tonic-gate uint32_t mxcsr; 262*0Sstevel@tonic-gate uint32_t mxcsr_mask; 263*0Sstevel@tonic-gate union { 264*0Sstevel@tonic-gate uint16_t fpr_16[5]; 265*0Sstevel@tonic-gate upad128_t __fpr_pad; 266*0Sstevel@tonic-gate } st[8]; 267*0Sstevel@tonic-gate upad128_t xmm[16]; 268*0Sstevel@tonic-gate upad128_t __fx_ign2[6]; 269*0Sstevel@tonic-gate uint32_t status; /* sw at exception */ 270*0Sstevel@tonic-gate uint32_t xstatus; /* mxcsr at exception */ 271*0Sstevel@tonic-gate } fpchip_state; 272*0Sstevel@tonic-gate uint32_t f_fpregs[130]; 273*0Sstevel@tonic-gate } fp_reg_set; 274*0Sstevel@tonic-gate } fpregset_t; 275*0Sstevel@tonic-gate 276*0Sstevel@tonic-gate #else /* __i386 */ 277*0Sstevel@tonic-gate 278*0Sstevel@tonic-gate /* 279*0Sstevel@tonic-gate * This definition of the floating point structure is binary 280*0Sstevel@tonic-gate * compatible with the Intel386 psABI definition, and source 281*0Sstevel@tonic-gate * compatible with that specification for x87-style floating point. 282*0Sstevel@tonic-gate * It also allows SSE/SSE2 state to be accessed on machines that 283*0Sstevel@tonic-gate * possess such hardware capabilities. 284*0Sstevel@tonic-gate */ 285*0Sstevel@tonic-gate typedef struct fpu { 286*0Sstevel@tonic-gate union { 287*0Sstevel@tonic-gate struct fpchip_state { 288*0Sstevel@tonic-gate uint32_t state[27]; /* 287/387 saved state */ 289*0Sstevel@tonic-gate uint32_t status; /* saved at exception */ 290*0Sstevel@tonic-gate uint32_t mxcsr; /* SSE control and status */ 291*0Sstevel@tonic-gate uint32_t xstatus; /* SSE mxcsr at exception */ 292*0Sstevel@tonic-gate uint32_t __pad[2]; /* align to 128-bits */ 293*0Sstevel@tonic-gate upad128_t xmm[8]; /* %xmm0-%xmm7 */ 294*0Sstevel@tonic-gate } fpchip_state; 295*0Sstevel@tonic-gate struct fp_emul_space { /* for emulator(s) */ 296*0Sstevel@tonic-gate uint8_t fp_emul[246]; 297*0Sstevel@tonic-gate uint8_t fp_epad[2]; 298*0Sstevel@tonic-gate } fp_emul_space; 299*0Sstevel@tonic-gate uint32_t f_fpregs[95]; /* union of the above */ 300*0Sstevel@tonic-gate } fp_reg_set; 301*0Sstevel@tonic-gate } fpregset_t; 302*0Sstevel@tonic-gate 303*0Sstevel@tonic-gate /* 304*0Sstevel@tonic-gate * (This structure definition is specified in the i386 ABI supplement) 305*0Sstevel@tonic-gate */ 306*0Sstevel@tonic-gate typedef struct __old_fpu { 307*0Sstevel@tonic-gate union { 308*0Sstevel@tonic-gate struct __old_fpchip_state /* fp extension state */ 309*0Sstevel@tonic-gate { 310*0Sstevel@tonic-gate int state[27]; /* 287/387 saved state */ 311*0Sstevel@tonic-gate int status; /* status word saved at */ 312*0Sstevel@tonic-gate /* exception */ 313*0Sstevel@tonic-gate } fpchip_state; 314*0Sstevel@tonic-gate struct __old_fp_emul_space /* for emulator(s) */ 315*0Sstevel@tonic-gate { 316*0Sstevel@tonic-gate char fp_emul[246]; 317*0Sstevel@tonic-gate char fp_epad[2]; 318*0Sstevel@tonic-gate } fp_emul_space; 319*0Sstevel@tonic-gate int f_fpregs[62]; /* union of the above */ 320*0Sstevel@tonic-gate } fp_reg_set; 321*0Sstevel@tonic-gate long f_wregs[33]; /* saved weitek state */ 322*0Sstevel@tonic-gate } __old_fpregset_t; 323*0Sstevel@tonic-gate 324*0Sstevel@tonic-gate #endif /* __i386 */ 325*0Sstevel@tonic-gate 326*0Sstevel@tonic-gate #if defined(_SYSCALL32) 327*0Sstevel@tonic-gate 328*0Sstevel@tonic-gate /* Kernel view of user i386 fpu structure */ 329*0Sstevel@tonic-gate 330*0Sstevel@tonic-gate typedef struct fpu32 { 331*0Sstevel@tonic-gate union { 332*0Sstevel@tonic-gate struct fpchip32_state { 333*0Sstevel@tonic-gate uint32_t state[27]; /* 287/387 saved state */ 334*0Sstevel@tonic-gate uint32_t status; /* saved at exception */ 335*0Sstevel@tonic-gate uint32_t mxcsr; /* SSE control and status */ 336*0Sstevel@tonic-gate uint32_t xstatus; /* SSE mxcsr at exception */ 337*0Sstevel@tonic-gate uint32_t __pad[2]; /* align to 128-bits */ 338*0Sstevel@tonic-gate uint32_t xmm[8][4]; /* %xmm0-%xmm7 */ 339*0Sstevel@tonic-gate } fpchip_state; 340*0Sstevel@tonic-gate uint32_t f_fpregs[95]; /* union of the above */ 341*0Sstevel@tonic-gate } fp_reg_set; 342*0Sstevel@tonic-gate } fpregset32_t; 343*0Sstevel@tonic-gate 344*0Sstevel@tonic-gate #endif /* _SYSCALL32 */ 345*0Sstevel@tonic-gate 346*0Sstevel@tonic-gate /* 347*0Sstevel@tonic-gate * Kernel's FPU save area 348*0Sstevel@tonic-gate */ 349*0Sstevel@tonic-gate typedef struct { 350*0Sstevel@tonic-gate union _kfpu_u { 351*0Sstevel@tonic-gate struct fxsave_state kfpu_fx; 352*0Sstevel@tonic-gate #if defined(__i386) 353*0Sstevel@tonic-gate struct fnsave_state kfpu_fn; 354*0Sstevel@tonic-gate #endif 355*0Sstevel@tonic-gate } kfpu_u; 356*0Sstevel@tonic-gate uint32_t kfpu_status; /* saved at #mf exception */ 357*0Sstevel@tonic-gate uint32_t kfpu_xstatus; /* saved at #xm exception */ 358*0Sstevel@tonic-gate } kfpu_t; 359*0Sstevel@tonic-gate 360*0Sstevel@tonic-gate #if defined(__amd64) 361*0Sstevel@tonic-gate #define NDEBUGREG 16 362*0Sstevel@tonic-gate #else 363*0Sstevel@tonic-gate #define NDEBUGREG 8 364*0Sstevel@tonic-gate #endif 365*0Sstevel@tonic-gate 366*0Sstevel@tonic-gate typedef struct dbregset { 367*0Sstevel@tonic-gate unsigned long debugreg[NDEBUGREG]; 368*0Sstevel@tonic-gate } dbregset_t; 369*0Sstevel@tonic-gate 370*0Sstevel@tonic-gate /* 371*0Sstevel@tonic-gate * Structure mcontext defines the complete hardware machine state. 372*0Sstevel@tonic-gate * (This structure is specified in the i386 ABI suppl.) 373*0Sstevel@tonic-gate */ 374*0Sstevel@tonic-gate typedef struct { 375*0Sstevel@tonic-gate gregset_t gregs; /* general register set */ 376*0Sstevel@tonic-gate fpregset_t fpregs; /* floating point register set */ 377*0Sstevel@tonic-gate } mcontext_t; 378*0Sstevel@tonic-gate 379*0Sstevel@tonic-gate #if defined(_SYSCALL32) 380*0Sstevel@tonic-gate 381*0Sstevel@tonic-gate typedef struct { 382*0Sstevel@tonic-gate gregset32_t gregs; /* general register set */ 383*0Sstevel@tonic-gate fpregset32_t fpregs; /* floating point register set */ 384*0Sstevel@tonic-gate } mcontext32_t; 385*0Sstevel@tonic-gate 386*0Sstevel@tonic-gate #endif /* _SYSCALL32 */ 387*0Sstevel@tonic-gate 388*0Sstevel@tonic-gate #endif /* _ASM */ 389*0Sstevel@tonic-gate #endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */ 390*0Sstevel@tonic-gate 391*0Sstevel@tonic-gate /* 392*0Sstevel@tonic-gate * The version of privregs.h that is used on implementations that run on 393*0Sstevel@tonic-gate * processors that support the AMD64 instruction set is deliberately not 394*0Sstevel@tonic-gate * imported here. 395*0Sstevel@tonic-gate * 396*0Sstevel@tonic-gate * The amd64 'struct regs' definition may -not- compatible with either 397*0Sstevel@tonic-gate * 32-bit or 64-bit core file contents, nor with the ucontext. As a result, 398*0Sstevel@tonic-gate * the 'regs' structure cannot be used portably by applications, and should 399*0Sstevel@tonic-gate * only be used by the kernel implementation. 400*0Sstevel@tonic-gate * 401*0Sstevel@tonic-gate * The inclusion of the i386 version of privregs.h allows for some limited 402*0Sstevel@tonic-gate * source compatibility with 32-bit applications who expect to use 403*0Sstevel@tonic-gate * 'struct regs' to match the context of a 32-bit core file, or a ucontext_t. 404*0Sstevel@tonic-gate * 405*0Sstevel@tonic-gate * Note that the ucontext_t actually describes the general register in terms 406*0Sstevel@tonic-gate * of the gregset_t data type, as described in this file. Note also 407*0Sstevel@tonic-gate * that the core file content is defined by core(4) in terms of data types 408*0Sstevel@tonic-gate * defined by procfs -- see proc(4). 409*0Sstevel@tonic-gate */ 410*0Sstevel@tonic-gate #if defined(__i386) && \ 411*0Sstevel@tonic-gate (!defined(_KERNEL) && !defined(_XPG4_2) || defined(__EXTENSIONS__)) 412*0Sstevel@tonic-gate #include <sys/privregs.h> 413*0Sstevel@tonic-gate #endif /* __i386 (!_KERNEL && !_XPG4_2 || __EXTENSIONS__) */ 414*0Sstevel@tonic-gate 415*0Sstevel@tonic-gate /* 416*0Sstevel@tonic-gate * The following is here for XPG4.2 standards compliance. 417*0Sstevel@tonic-gate * regset.h is included in ucontext.h for the definition of 418*0Sstevel@tonic-gate * mcontext_t, all of which breaks XPG4.2 namespace. 419*0Sstevel@tonic-gate */ 420*0Sstevel@tonic-gate 421*0Sstevel@tonic-gate #if defined(_XPG4_2) && !defined(__EXTENSIONS__) && !defined(_ASM) 422*0Sstevel@tonic-gate 423*0Sstevel@tonic-gate /* 424*0Sstevel@tonic-gate * The following is here for UNIX 95 compliance (XPG Issue 4, Version 2 425*0Sstevel@tonic-gate * System Interfaces and Headers). The structures included here are identical 426*0Sstevel@tonic-gate * to those visible elsewhere in this header except that the structure 427*0Sstevel@tonic-gate * element names have been changed in accordance with the X/Open namespace 428*0Sstevel@tonic-gate * rules. Specifically, depending on the name and scope, the names have 429*0Sstevel@tonic-gate * been prepended with a single or double underscore (_ or __). See the 430*0Sstevel@tonic-gate * structure definitions in the non-X/Open namespace for more detailed 431*0Sstevel@tonic-gate * comments describing each of these structures. 432*0Sstevel@tonic-gate */ 433*0Sstevel@tonic-gate 434*0Sstevel@tonic-gate #if defined(__amd64) 435*0Sstevel@tonic-gate 436*0Sstevel@tonic-gate typedef struct __fpu { 437*0Sstevel@tonic-gate union { 438*0Sstevel@tonic-gate struct __fpchip_state { 439*0Sstevel@tonic-gate uint16_t __fx_cw; 440*0Sstevel@tonic-gate uint16_t __fx_sw; 441*0Sstevel@tonic-gate uint16_t __fx_ctw; 442*0Sstevel@tonic-gate uint16_t __fx_op; 443*0Sstevel@tonic-gate uint64_t __fx_rip; 444*0Sstevel@tonic-gate uint64_t __fx_rdp; 445*0Sstevel@tonic-gate uint32_t __fx_mxcsr; 446*0Sstevel@tonic-gate uint32_t __fx_mxcsr_mask; 447*0Sstevel@tonic-gate union { 448*0Sstevel@tonic-gate uint16_t __fpr_16[5]; 449*0Sstevel@tonic-gate upad128_t __fpr_pad; 450*0Sstevel@tonic-gate } __fx_st[8]; 451*0Sstevel@tonic-gate upad128_t __fx_xmm[16]; 452*0Sstevel@tonic-gate upad128_t __fx_ign2[6]; 453*0Sstevel@tonic-gate uint32_t __status; 454*0Sstevel@tonic-gate uint32_t __xstatus; 455*0Sstevel@tonic-gate } __fpchip_state; 456*0Sstevel@tonic-gate uint32_t __f_fpregs[130]; 457*0Sstevel@tonic-gate } __fp_reg_set; 458*0Sstevel@tonic-gate } fpregset_t; 459*0Sstevel@tonic-gate 460*0Sstevel@tonic-gate #else /* __i386 */ 461*0Sstevel@tonic-gate 462*0Sstevel@tonic-gate typedef struct __fpu { 463*0Sstevel@tonic-gate union { 464*0Sstevel@tonic-gate struct __fpchip_state { 465*0Sstevel@tonic-gate uint32_t __state[27]; /* 287/387 saved state */ 466*0Sstevel@tonic-gate uint32_t __status; /* saved at exception */ 467*0Sstevel@tonic-gate uint32_t __mxcsr; /* SSE control and status */ 468*0Sstevel@tonic-gate uint32_t __xstatus; /* SSE mxcsr at exception */ 469*0Sstevel@tonic-gate uint32_t __pad[2]; /* align to 128-bits */ 470*0Sstevel@tonic-gate upad128_t __xmm[8]; /* %xmm0-%xmm7 */ 471*0Sstevel@tonic-gate } __fpchip_state; 472*0Sstevel@tonic-gate struct __fp_emul_space { /* for emulator(s) */ 473*0Sstevel@tonic-gate uint8_t __fp_emul[246]; 474*0Sstevel@tonic-gate uint8_t __fp_epad[2]; 475*0Sstevel@tonic-gate } __fp_emul_space; 476*0Sstevel@tonic-gate uint32_t __f_fpregs[95]; /* union of the above */ 477*0Sstevel@tonic-gate } __fp_reg_set; 478*0Sstevel@tonic-gate } fpregset_t; 479*0Sstevel@tonic-gate 480*0Sstevel@tonic-gate #endif /* __i386 */ 481*0Sstevel@tonic-gate 482*0Sstevel@tonic-gate typedef struct { 483*0Sstevel@tonic-gate gregset_t __gregs; /* general register set */ 484*0Sstevel@tonic-gate fpregset_t __fpregs; /* floating point register set */ 485*0Sstevel@tonic-gate } mcontext_t; 486*0Sstevel@tonic-gate 487*0Sstevel@tonic-gate #endif /* _XPG4_2 && !__EXTENSIONS__ && !_ASM */ 488*0Sstevel@tonic-gate 489*0Sstevel@tonic-gate #ifdef __cplusplus 490*0Sstevel@tonic-gate } 491*0Sstevel@tonic-gate #endif 492*0Sstevel@tonic-gate 493*0Sstevel@tonic-gate #endif /* _SYS_REGSET_H */ 494