xref: /onnv-gate/usr/src/uts/intel/sys/regset.h (revision 13134:8315ff49e22e)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*13134Skuriakose.kuruvilla@oracle.com  * Common Development and Distribution License (the "License").
6*13134Skuriakose.kuruvilla@oracle.com  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
210Sstevel@tonic-gate /*
22*13134Skuriakose.kuruvilla@oracle.com  * Copyright (c) 1989, 2010, Oracle and/or its affiliates. All rights reserved.
230Sstevel@tonic-gate  */
240Sstevel@tonic-gate /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate /*	Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T		*/
270Sstevel@tonic-gate /*	All Rights Reserved	*/
280Sstevel@tonic-gate 
290Sstevel@tonic-gate #ifndef	_SYS_REGSET_H
300Sstevel@tonic-gate #define	_SYS_REGSET_H
310Sstevel@tonic-gate 
320Sstevel@tonic-gate #include <sys/feature_tests.h>
330Sstevel@tonic-gate 
340Sstevel@tonic-gate #if !defined(_ASM)
350Sstevel@tonic-gate #include <sys/types.h>
360Sstevel@tonic-gate #endif
370Sstevel@tonic-gate 
380Sstevel@tonic-gate #ifdef __cplusplus
390Sstevel@tonic-gate extern "C" {
400Sstevel@tonic-gate #endif
410Sstevel@tonic-gate 
420Sstevel@tonic-gate #if !defined(_XPG4_2) || defined(__EXTENSIONS__)
430Sstevel@tonic-gate 
440Sstevel@tonic-gate /*
450Sstevel@tonic-gate  * The names and offsets defined here should be specified by the
460Sstevel@tonic-gate  * AMD64 ABI suppl.
470Sstevel@tonic-gate  *
480Sstevel@tonic-gate  * We make fsbase and gsbase part of the lwp context (since they're
490Sstevel@tonic-gate  * the only way to access the full 64-bit address range via the segment
500Sstevel@tonic-gate  * registers) and thus belong here too.  However we treat them as
510Sstevel@tonic-gate  * read-only; if %fs or %gs are updated, the results of the descriptor
520Sstevel@tonic-gate  * table lookup that those updates implicitly cause will be reflected
530Sstevel@tonic-gate  * in the corresponding fsbase and/or gsbase values the next time the
540Sstevel@tonic-gate  * context can be inspected.  However it is NOT possible to override
550Sstevel@tonic-gate  * the fsbase/gsbase settings via this interface.
560Sstevel@tonic-gate  *
570Sstevel@tonic-gate  * Direct modification of the base registers (thus overriding the
580Sstevel@tonic-gate  * descriptor table base address) can be achieved with _lwp_setprivate.
590Sstevel@tonic-gate  */
600Sstevel@tonic-gate 
610Sstevel@tonic-gate #define	REG_GSBASE	27
620Sstevel@tonic-gate #define	REG_FSBASE	26
630Sstevel@tonic-gate #define	REG_DS		25
640Sstevel@tonic-gate #define	REG_ES		24
650Sstevel@tonic-gate 
660Sstevel@tonic-gate #define	REG_GS		23
670Sstevel@tonic-gate #define	REG_FS		22
680Sstevel@tonic-gate #define	REG_SS		21
690Sstevel@tonic-gate #define	REG_RSP		20
700Sstevel@tonic-gate #define	REG_RFL		19
710Sstevel@tonic-gate #define	REG_CS		18
720Sstevel@tonic-gate #define	REG_RIP		17
730Sstevel@tonic-gate #define	REG_ERR		16
740Sstevel@tonic-gate #define	REG_TRAPNO	15
750Sstevel@tonic-gate #define	REG_RAX		14
760Sstevel@tonic-gate #define	REG_RCX		13
770Sstevel@tonic-gate #define	REG_RDX		12
780Sstevel@tonic-gate #define	REG_RBX		11
790Sstevel@tonic-gate #define	REG_RBP		10
800Sstevel@tonic-gate #define	REG_RSI		9
810Sstevel@tonic-gate #define	REG_RDI		8
820Sstevel@tonic-gate #define	REG_R8		7
830Sstevel@tonic-gate #define	REG_R9		6
840Sstevel@tonic-gate #define	REG_R10		5
850Sstevel@tonic-gate #define	REG_R11		4
860Sstevel@tonic-gate #define	REG_R12		3
870Sstevel@tonic-gate #define	REG_R13		2
880Sstevel@tonic-gate #define	REG_R14		1
890Sstevel@tonic-gate #define	REG_R15		0
900Sstevel@tonic-gate 
910Sstevel@tonic-gate /*
920Sstevel@tonic-gate  * The names and offsets defined here are specified by i386 ABI suppl.
930Sstevel@tonic-gate  */
940Sstevel@tonic-gate 
950Sstevel@tonic-gate #define	SS		18	/* only stored on a privilege transition */
960Sstevel@tonic-gate #define	UESP		17	/* only stored on a privilege transition */
970Sstevel@tonic-gate #define	EFL		16
980Sstevel@tonic-gate #define	CS		15
990Sstevel@tonic-gate #define	EIP		14
1000Sstevel@tonic-gate #define	ERR		13
1010Sstevel@tonic-gate #define	TRAPNO		12
1020Sstevel@tonic-gate #define	EAX		11
1030Sstevel@tonic-gate #define	ECX		10
1040Sstevel@tonic-gate #define	EDX		9
1050Sstevel@tonic-gate #define	EBX		8
1060Sstevel@tonic-gate #define	ESP		7
1070Sstevel@tonic-gate #define	EBP		6
1080Sstevel@tonic-gate #define	ESI		5
1090Sstevel@tonic-gate #define	EDI		4
1100Sstevel@tonic-gate #define	DS		3
1110Sstevel@tonic-gate #define	ES		2
1120Sstevel@tonic-gate #define	FS		1
1130Sstevel@tonic-gate #define	GS		0
1140Sstevel@tonic-gate 
1150Sstevel@tonic-gate /* aliases for portability */
1160Sstevel@tonic-gate 
1170Sstevel@tonic-gate #if defined(__amd64)
1180Sstevel@tonic-gate 
1190Sstevel@tonic-gate #define	REG_PC	REG_RIP
1200Sstevel@tonic-gate #define	REG_FP	REG_RBP
1210Sstevel@tonic-gate #define	REG_SP	REG_RSP
1220Sstevel@tonic-gate #define	REG_PS	REG_RFL
1230Sstevel@tonic-gate #define	REG_R0	REG_RAX
1240Sstevel@tonic-gate #define	REG_R1	REG_RDX
1250Sstevel@tonic-gate 
1260Sstevel@tonic-gate #else	/* __i386 */
1270Sstevel@tonic-gate 
1280Sstevel@tonic-gate #define	REG_PC	EIP
1290Sstevel@tonic-gate #define	REG_FP	EBP
1300Sstevel@tonic-gate #define	REG_SP	UESP
1310Sstevel@tonic-gate #define	REG_PS	EFL
1320Sstevel@tonic-gate #define	REG_R0	EAX
1330Sstevel@tonic-gate #define	REG_R1	EDX
1340Sstevel@tonic-gate 
1350Sstevel@tonic-gate #endif	/* __i386 */
1360Sstevel@tonic-gate 
1370Sstevel@tonic-gate #endif	/* !defined(_XPG4_2) || defined(__EXTENSIONS__) */
1380Sstevel@tonic-gate 
1390Sstevel@tonic-gate /*
1400Sstevel@tonic-gate  * A gregset_t is defined as an array type for compatibility with the reference
1410Sstevel@tonic-gate  * source. This is important due to differences in the way the C language
1420Sstevel@tonic-gate  * treats arrays and structures as parameters.
1430Sstevel@tonic-gate  */
1440Sstevel@tonic-gate #if defined(__amd64)
1450Sstevel@tonic-gate #define	_NGREG	28
1460Sstevel@tonic-gate #else
1470Sstevel@tonic-gate #define	_NGREG	19
1480Sstevel@tonic-gate #endif
1490Sstevel@tonic-gate #if !defined(_XPG4_2) || defined(__EXTENSIONS__)
1500Sstevel@tonic-gate #define	NGREG	_NGREG
1510Sstevel@tonic-gate #endif
1520Sstevel@tonic-gate 
1530Sstevel@tonic-gate #if !defined(_ASM)
1540Sstevel@tonic-gate 
1550Sstevel@tonic-gate #if defined(_LP64) || defined(_I32LPx)
1560Sstevel@tonic-gate typedef long	greg_t;
1570Sstevel@tonic-gate #else
1580Sstevel@tonic-gate typedef int	greg_t;
1590Sstevel@tonic-gate #endif
1600Sstevel@tonic-gate 
1610Sstevel@tonic-gate #if defined(_SYSCALL32)
1620Sstevel@tonic-gate 
1630Sstevel@tonic-gate typedef int32_t greg32_t;
1640Sstevel@tonic-gate typedef int64_t	greg64_t;
1650Sstevel@tonic-gate 
1660Sstevel@tonic-gate #endif	/* _SYSCALL32 */
1670Sstevel@tonic-gate 
1680Sstevel@tonic-gate typedef greg_t	gregset_t[_NGREG];
1690Sstevel@tonic-gate 
1700Sstevel@tonic-gate #if defined(_SYSCALL32)
1710Sstevel@tonic-gate 
1720Sstevel@tonic-gate #define	_NGREG32	19
1730Sstevel@tonic-gate #define	_NGREG64	28
1740Sstevel@tonic-gate 
1750Sstevel@tonic-gate typedef greg32_t gregset32_t[_NGREG32];
1760Sstevel@tonic-gate typedef	greg64_t gregset64_t[_NGREG64];
1770Sstevel@tonic-gate 
1780Sstevel@tonic-gate #endif	/* _SYSCALL32 */
1790Sstevel@tonic-gate 
1800Sstevel@tonic-gate #if !defined(_XPG4_2) || defined(__EXTENSIONS__)
1810Sstevel@tonic-gate 
1820Sstevel@tonic-gate /*
1830Sstevel@tonic-gate  * Floating point definitions.
1840Sstevel@tonic-gate  */
1850Sstevel@tonic-gate 
1860Sstevel@tonic-gate /*
1870Sstevel@tonic-gate  * This structure is written to memory by an 'fnsave' instruction
1880Sstevel@tonic-gate  */
1890Sstevel@tonic-gate struct fnsave_state {
1900Sstevel@tonic-gate 	uint16_t	f_fcw;
1910Sstevel@tonic-gate 	uint16_t	__f_ign0;
1920Sstevel@tonic-gate 	uint16_t	f_fsw;
1930Sstevel@tonic-gate 	uint16_t	__f_ign1;
1940Sstevel@tonic-gate 	uint16_t	f_ftw;
1950Sstevel@tonic-gate 	uint16_t	__f_ign2;
1960Sstevel@tonic-gate 	uint32_t	f_eip;
1970Sstevel@tonic-gate 	uint16_t	f_cs;
1980Sstevel@tonic-gate 	uint16_t	f_fop;
1990Sstevel@tonic-gate 	uint32_t	f_dp;
2000Sstevel@tonic-gate 	uint16_t	f_ds;
2010Sstevel@tonic-gate 	uint16_t	__f_ign3;
2020Sstevel@tonic-gate 	union {
2030Sstevel@tonic-gate 		uint16_t fpr_16[5];	/* 80-bits of x87 state */
2040Sstevel@tonic-gate 	} f_st[8];
2050Sstevel@tonic-gate };	/* 108 bytes */
2060Sstevel@tonic-gate 
2070Sstevel@tonic-gate /*
2080Sstevel@tonic-gate  * This structure is written to memory by an 'fxsave' instruction
2090Sstevel@tonic-gate  * Note the variant behaviour of this instruction between long mode
2100Sstevel@tonic-gate  * and legacy environments!
2110Sstevel@tonic-gate  */
2120Sstevel@tonic-gate struct fxsave_state {
2130Sstevel@tonic-gate 	uint16_t	fx_fcw;
2140Sstevel@tonic-gate 	uint16_t	fx_fsw;
2150Sstevel@tonic-gate 	uint16_t	fx_fctw;	/* compressed tag word */
2160Sstevel@tonic-gate 	uint16_t	fx_fop;
2170Sstevel@tonic-gate #if defined(__amd64)
2180Sstevel@tonic-gate 	uint64_t	fx_rip;
2190Sstevel@tonic-gate 	uint64_t	fx_rdp;
2200Sstevel@tonic-gate #else
2210Sstevel@tonic-gate 	uint32_t	fx_eip;
2220Sstevel@tonic-gate 	uint16_t	fx_cs;
2230Sstevel@tonic-gate 	uint16_t	__fx_ign0;
2240Sstevel@tonic-gate 	uint32_t	fx_dp;
2250Sstevel@tonic-gate 	uint16_t	fx_ds;
2260Sstevel@tonic-gate 	uint16_t	__fx_ign1;
2270Sstevel@tonic-gate #endif
2280Sstevel@tonic-gate 	uint32_t	fx_mxcsr;
2290Sstevel@tonic-gate 	uint32_t	fx_mxcsr_mask;
2300Sstevel@tonic-gate 	union {
2310Sstevel@tonic-gate 		uint16_t fpr_16[5];	/* 80-bits of x87 state */
2320Sstevel@tonic-gate 		u_longlong_t fpr_mmx;	/* 64-bit mmx register */
2330Sstevel@tonic-gate 		uint32_t __fpr_pad[4];	/* (pad out to 128-bits) */
2340Sstevel@tonic-gate 	} fx_st[8];
2350Sstevel@tonic-gate #if defined(__amd64)
2360Sstevel@tonic-gate 	upad128_t	fx_xmm[16];	/* 128-bit registers */
2370Sstevel@tonic-gate 	upad128_t	__fx_ign2[6];
2380Sstevel@tonic-gate #else
2390Sstevel@tonic-gate 	upad128_t	fx_xmm[8];	/* 128-bit registers */
2400Sstevel@tonic-gate 	upad128_t	__fx_ign2[14];
2410Sstevel@tonic-gate #endif
2420Sstevel@tonic-gate };	/* 512 bytes */
2430Sstevel@tonic-gate 
244*13134Skuriakose.kuruvilla@oracle.com /*
245*13134Skuriakose.kuruvilla@oracle.com  * This structure is written to memory by an 'xsave' instruction.
246*13134Skuriakose.kuruvilla@oracle.com  * First 512 byte is compatible with the format of an 'fxsave' area.
247*13134Skuriakose.kuruvilla@oracle.com  */
248*13134Skuriakose.kuruvilla@oracle.com struct xsave_state {
249*13134Skuriakose.kuruvilla@oracle.com 	struct fxsave_state	xs_fxsave;
250*13134Skuriakose.kuruvilla@oracle.com 	uint64_t		xs_xstate_bv;	/* 512 */
251*13134Skuriakose.kuruvilla@oracle.com 	uint64_t		xs_rsv_mbz[2];
252*13134Skuriakose.kuruvilla@oracle.com 	uint64_t		xs_reserved[5];
253*13134Skuriakose.kuruvilla@oracle.com 	upad128_t		xs_ymm[16];	/* avx - 576 */
254*13134Skuriakose.kuruvilla@oracle.com };	/* 832 bytes, asserted in fpnoextflt() */
255*13134Skuriakose.kuruvilla@oracle.com 
2560Sstevel@tonic-gate #if defined(__amd64)
2570Sstevel@tonic-gate 
2580Sstevel@tonic-gate typedef struct fpu {
2590Sstevel@tonic-gate 	union {
2600Sstevel@tonic-gate 		struct fpchip_state {
2610Sstevel@tonic-gate 			uint16_t cw;
2620Sstevel@tonic-gate 			uint16_t sw;
2630Sstevel@tonic-gate 			uint8_t  fctw;
2640Sstevel@tonic-gate 			uint8_t  __fx_rsvd;
2650Sstevel@tonic-gate 			uint16_t fop;
2660Sstevel@tonic-gate 			uint64_t rip;
2670Sstevel@tonic-gate 			uint64_t rdp;
2680Sstevel@tonic-gate 			uint32_t mxcsr;
2690Sstevel@tonic-gate 			uint32_t mxcsr_mask;
2700Sstevel@tonic-gate 			union {
2710Sstevel@tonic-gate 				uint16_t fpr_16[5];
2720Sstevel@tonic-gate 				upad128_t __fpr_pad;
2730Sstevel@tonic-gate 			} st[8];
2740Sstevel@tonic-gate 			upad128_t xmm[16];
2750Sstevel@tonic-gate 			upad128_t __fx_ign2[6];
2760Sstevel@tonic-gate 			uint32_t status;	/* sw at exception */
2770Sstevel@tonic-gate 			uint32_t xstatus;	/* mxcsr at exception */
2780Sstevel@tonic-gate 		} fpchip_state;
2790Sstevel@tonic-gate 		uint32_t	f_fpregs[130];
2800Sstevel@tonic-gate 	} fp_reg_set;
2810Sstevel@tonic-gate } fpregset_t;
2820Sstevel@tonic-gate 
2830Sstevel@tonic-gate #else	/* __i386 */
2840Sstevel@tonic-gate 
2850Sstevel@tonic-gate /*
2860Sstevel@tonic-gate  * This definition of the floating point structure is binary
2870Sstevel@tonic-gate  * compatible with the Intel386 psABI definition, and source
2880Sstevel@tonic-gate  * compatible with that specification for x87-style floating point.
2890Sstevel@tonic-gate  * It also allows SSE/SSE2 state to be accessed on machines that
2900Sstevel@tonic-gate  * possess such hardware capabilities.
2910Sstevel@tonic-gate  */
2920Sstevel@tonic-gate typedef struct fpu {
2930Sstevel@tonic-gate 	union {
2940Sstevel@tonic-gate 		struct fpchip_state {
2950Sstevel@tonic-gate 			uint32_t state[27];	/* 287/387 saved state */
2960Sstevel@tonic-gate 			uint32_t status;	/* saved at exception */
2970Sstevel@tonic-gate 			uint32_t mxcsr;		/* SSE control and status */
2980Sstevel@tonic-gate 			uint32_t xstatus;	/* SSE mxcsr at exception */
2990Sstevel@tonic-gate 			uint32_t __pad[2];	/* align to 128-bits */
3000Sstevel@tonic-gate 			upad128_t xmm[8];	/* %xmm0-%xmm7 */
3010Sstevel@tonic-gate 		} fpchip_state;
3020Sstevel@tonic-gate 		struct fp_emul_space {		/* for emulator(s) */
3030Sstevel@tonic-gate 			uint8_t	fp_emul[246];
3040Sstevel@tonic-gate 			uint8_t	fp_epad[2];
3050Sstevel@tonic-gate 		} fp_emul_space;
3060Sstevel@tonic-gate 		uint32_t	f_fpregs[95];	/* union of the above */
3070Sstevel@tonic-gate 	} fp_reg_set;
3080Sstevel@tonic-gate } fpregset_t;
3090Sstevel@tonic-gate 
3100Sstevel@tonic-gate /*
3110Sstevel@tonic-gate  * (This structure definition is specified in the i386 ABI supplement)
3120Sstevel@tonic-gate  */
3130Sstevel@tonic-gate typedef struct __old_fpu {
3140Sstevel@tonic-gate 	union {
3150Sstevel@tonic-gate 		struct __old_fpchip_state	/* fp extension state */
3160Sstevel@tonic-gate 		{
3170Sstevel@tonic-gate 			int 	state[27];	/* 287/387 saved state */
3180Sstevel@tonic-gate 			int 	status;		/* status word saved at */
3190Sstevel@tonic-gate 						/* exception */
3200Sstevel@tonic-gate 		} fpchip_state;
3210Sstevel@tonic-gate 		struct __old_fp_emul_space	/* for emulator(s) */
3220Sstevel@tonic-gate 		{
3230Sstevel@tonic-gate 			char	fp_emul[246];
3240Sstevel@tonic-gate 			char	fp_epad[2];
3250Sstevel@tonic-gate 		} fp_emul_space;
3260Sstevel@tonic-gate 		int 	f_fpregs[62];		/* union of the above */
3270Sstevel@tonic-gate 	} fp_reg_set;
3280Sstevel@tonic-gate 	long    	f_wregs[33];		/* saved weitek state */
3290Sstevel@tonic-gate } __old_fpregset_t;
3300Sstevel@tonic-gate 
3310Sstevel@tonic-gate #endif	/* __i386 */
3320Sstevel@tonic-gate 
3330Sstevel@tonic-gate #if defined(_SYSCALL32)
3340Sstevel@tonic-gate 
3350Sstevel@tonic-gate /* Kernel view of user i386 fpu structure */
3360Sstevel@tonic-gate 
3370Sstevel@tonic-gate typedef struct fpu32 {
3380Sstevel@tonic-gate 	union {
3390Sstevel@tonic-gate 		struct fpchip32_state {
3400Sstevel@tonic-gate 			uint32_t state[27];	/* 287/387 saved state */
3410Sstevel@tonic-gate 			uint32_t status;	/* saved at exception */
3420Sstevel@tonic-gate 			uint32_t mxcsr;		/* SSE control and status */
3430Sstevel@tonic-gate 			uint32_t xstatus;	/* SSE mxcsr at exception */
3440Sstevel@tonic-gate 			uint32_t __pad[2];	/* align to 128-bits */
3450Sstevel@tonic-gate 			uint32_t xmm[8][4];	/* %xmm0-%xmm7 */
3460Sstevel@tonic-gate 		} fpchip_state;
3470Sstevel@tonic-gate 		uint32_t	f_fpregs[95];	/* union of the above */
3480Sstevel@tonic-gate 	} fp_reg_set;
3490Sstevel@tonic-gate } fpregset32_t;
3500Sstevel@tonic-gate 
3510Sstevel@tonic-gate #endif	/* _SYSCALL32 */
3520Sstevel@tonic-gate 
3530Sstevel@tonic-gate /*
3540Sstevel@tonic-gate  * Kernel's FPU save area
3550Sstevel@tonic-gate  */
3560Sstevel@tonic-gate typedef struct {
3570Sstevel@tonic-gate 	union _kfpu_u {
3580Sstevel@tonic-gate 		struct fxsave_state kfpu_fx;
3590Sstevel@tonic-gate #if defined(__i386)
3600Sstevel@tonic-gate 		struct fnsave_state kfpu_fn;
3610Sstevel@tonic-gate #endif
362*13134Skuriakose.kuruvilla@oracle.com 		struct xsave_state kfpu_xs;
3630Sstevel@tonic-gate 	} kfpu_u;
3640Sstevel@tonic-gate 	uint32_t kfpu_status;		/* saved at #mf exception */
3650Sstevel@tonic-gate 	uint32_t kfpu_xstatus;		/* saved at #xm exception */
3660Sstevel@tonic-gate } kfpu_t;
3670Sstevel@tonic-gate 
3680Sstevel@tonic-gate #if defined(__amd64)
3690Sstevel@tonic-gate #define	NDEBUGREG	16
3700Sstevel@tonic-gate #else
3710Sstevel@tonic-gate #define	NDEBUGREG	8
3720Sstevel@tonic-gate #endif
3730Sstevel@tonic-gate 
3740Sstevel@tonic-gate typedef struct dbregset {
3750Sstevel@tonic-gate 	unsigned long	debugreg[NDEBUGREG];
3760Sstevel@tonic-gate } dbregset_t;
3770Sstevel@tonic-gate 
3780Sstevel@tonic-gate /*
3790Sstevel@tonic-gate  * Structure mcontext defines the complete hardware machine state.
3800Sstevel@tonic-gate  * (This structure is specified in the i386 ABI suppl.)
3810Sstevel@tonic-gate  */
3820Sstevel@tonic-gate typedef struct {
3830Sstevel@tonic-gate 	gregset_t	gregs;		/* general register set */
3840Sstevel@tonic-gate 	fpregset_t	fpregs;		/* floating point register set */
3850Sstevel@tonic-gate } mcontext_t;
3860Sstevel@tonic-gate 
3870Sstevel@tonic-gate #if defined(_SYSCALL32)
3880Sstevel@tonic-gate 
3890Sstevel@tonic-gate typedef struct {
3900Sstevel@tonic-gate 	gregset32_t	gregs;		/* general register set */
3910Sstevel@tonic-gate 	fpregset32_t	fpregs;		/* floating point register set */
3920Sstevel@tonic-gate } mcontext32_t;
3930Sstevel@tonic-gate 
3940Sstevel@tonic-gate #endif	/* _SYSCALL32 */
3950Sstevel@tonic-gate 
3960Sstevel@tonic-gate #endif	/* _ASM */
3970Sstevel@tonic-gate #endif /* !defined(_XPG4_2) || defined(__EXTENSIONS__) */
3980Sstevel@tonic-gate 
3990Sstevel@tonic-gate /*
4000Sstevel@tonic-gate  * The version of privregs.h that is used on implementations that run on
4010Sstevel@tonic-gate  * processors that support the AMD64 instruction set is deliberately not
4020Sstevel@tonic-gate  * imported here.
4030Sstevel@tonic-gate  *
4040Sstevel@tonic-gate  * The amd64 'struct regs' definition may -not- compatible with either
4050Sstevel@tonic-gate  * 32-bit or 64-bit core file contents, nor with the ucontext.  As a result,
4060Sstevel@tonic-gate  * the 'regs' structure cannot be used portably by applications, and should
4070Sstevel@tonic-gate  * only be used by the kernel implementation.
4080Sstevel@tonic-gate  *
4090Sstevel@tonic-gate  * The inclusion of the i386 version of privregs.h allows for some limited
4100Sstevel@tonic-gate  * source compatibility with 32-bit applications who expect to use
4110Sstevel@tonic-gate  * 'struct regs' to match the context of a 32-bit core file, or a ucontext_t.
4120Sstevel@tonic-gate  *
4130Sstevel@tonic-gate  * Note that the ucontext_t actually describes the general register in terms
4140Sstevel@tonic-gate  * of the gregset_t data type, as described in this file.  Note also
4150Sstevel@tonic-gate  * that the core file content is defined by core(4) in terms of data types
4160Sstevel@tonic-gate  * defined by procfs -- see proc(4).
4170Sstevel@tonic-gate  */
4180Sstevel@tonic-gate #if defined(__i386) && \
4190Sstevel@tonic-gate 	(!defined(_KERNEL) && !defined(_XPG4_2) || defined(__EXTENSIONS__))
4200Sstevel@tonic-gate #include <sys/privregs.h>
4210Sstevel@tonic-gate #endif	/* __i386 (!_KERNEL && !_XPG4_2 || __EXTENSIONS__) */
4220Sstevel@tonic-gate 
4230Sstevel@tonic-gate /*
4240Sstevel@tonic-gate  * The following is here for XPG4.2 standards compliance.
4250Sstevel@tonic-gate  * regset.h is included in ucontext.h for the definition of
4260Sstevel@tonic-gate  * mcontext_t, all of which breaks XPG4.2 namespace.
4270Sstevel@tonic-gate  */
4280Sstevel@tonic-gate 
4290Sstevel@tonic-gate #if defined(_XPG4_2) && !defined(__EXTENSIONS__) && !defined(_ASM)
4300Sstevel@tonic-gate 
4310Sstevel@tonic-gate /*
4320Sstevel@tonic-gate  * The following is here for UNIX 95 compliance (XPG Issue 4, Version 2
4330Sstevel@tonic-gate  * System Interfaces and Headers). The structures included here are identical
4340Sstevel@tonic-gate  * to those visible elsewhere in this header except that the structure
4350Sstevel@tonic-gate  * element names have been changed in accordance with the X/Open namespace
4360Sstevel@tonic-gate  * rules.  Specifically, depending on the name and scope, the names have
4370Sstevel@tonic-gate  * been prepended with a single or double underscore (_ or __).  See the
4380Sstevel@tonic-gate  * structure definitions in the non-X/Open namespace for more detailed
4390Sstevel@tonic-gate  * comments describing each of these structures.
4400Sstevel@tonic-gate  */
4410Sstevel@tonic-gate 
4420Sstevel@tonic-gate #if defined(__amd64)
4430Sstevel@tonic-gate 
4440Sstevel@tonic-gate typedef struct __fpu {
4450Sstevel@tonic-gate 	union {
4460Sstevel@tonic-gate 		struct __fpchip_state {
4470Sstevel@tonic-gate 			uint16_t __fx_cw;
4480Sstevel@tonic-gate 			uint16_t __fx_sw;
4490Sstevel@tonic-gate 			uint16_t __fx_ctw;
4500Sstevel@tonic-gate 			uint16_t __fx_op;
4510Sstevel@tonic-gate 			uint64_t __fx_rip;
4520Sstevel@tonic-gate 			uint64_t __fx_rdp;
4530Sstevel@tonic-gate 			uint32_t __fx_mxcsr;
4540Sstevel@tonic-gate 			uint32_t __fx_mxcsr_mask;
4550Sstevel@tonic-gate 			union {
4560Sstevel@tonic-gate 				uint16_t __fpr_16[5];
4570Sstevel@tonic-gate 				upad128_t __fpr_pad;
4580Sstevel@tonic-gate 			} __fx_st[8];
4590Sstevel@tonic-gate 			upad128_t __fx_xmm[16];
4600Sstevel@tonic-gate 			upad128_t __fx_ign2[6];
4610Sstevel@tonic-gate 			uint32_t __status;
4620Sstevel@tonic-gate 			uint32_t __xstatus;
4630Sstevel@tonic-gate 		} __fpchip_state;
4640Sstevel@tonic-gate 		uint32_t	__f_fpregs[130];
4650Sstevel@tonic-gate 	} __fp_reg_set;
4660Sstevel@tonic-gate } fpregset_t;
4670Sstevel@tonic-gate 
4680Sstevel@tonic-gate #else	/* __i386 */
4690Sstevel@tonic-gate 
4700Sstevel@tonic-gate typedef struct __fpu {
4710Sstevel@tonic-gate 	union {
4720Sstevel@tonic-gate 		struct __fpchip_state {
4730Sstevel@tonic-gate 			uint32_t __state[27];	/* 287/387 saved state */
4740Sstevel@tonic-gate 			uint32_t __status;	/* saved at exception */
4750Sstevel@tonic-gate 			uint32_t __mxcsr;	/* SSE control and status */
4760Sstevel@tonic-gate 			uint32_t __xstatus;	/* SSE mxcsr at exception */
4770Sstevel@tonic-gate 			uint32_t __pad[2];	/* align to 128-bits */
4780Sstevel@tonic-gate 			upad128_t __xmm[8];	/* %xmm0-%xmm7 */
4790Sstevel@tonic-gate 		} __fpchip_state;
4800Sstevel@tonic-gate 		struct __fp_emul_space {	/* for emulator(s) */
4810Sstevel@tonic-gate 			uint8_t	 __fp_emul[246];
4820Sstevel@tonic-gate 			uint8_t	 __fp_epad[2];
4830Sstevel@tonic-gate 		} __fp_emul_space;
4840Sstevel@tonic-gate 		uint32_t	__f_fpregs[95];	/* union of the above */
4850Sstevel@tonic-gate 	} __fp_reg_set;
4860Sstevel@tonic-gate } fpregset_t;
4870Sstevel@tonic-gate 
4880Sstevel@tonic-gate #endif	/* __i386 */
4890Sstevel@tonic-gate 
4900Sstevel@tonic-gate typedef struct {
4910Sstevel@tonic-gate 	gregset_t	__gregs;	/* general register set */
4920Sstevel@tonic-gate 	fpregset_t	__fpregs;	/* floating point register set */
4930Sstevel@tonic-gate } mcontext_t;
4940Sstevel@tonic-gate 
4950Sstevel@tonic-gate #endif /* _XPG4_2 && !__EXTENSIONS__ && !_ASM */
4960Sstevel@tonic-gate 
4970Sstevel@tonic-gate #ifdef	__cplusplus
4980Sstevel@tonic-gate }
4990Sstevel@tonic-gate #endif
5000Sstevel@tonic-gate 
5010Sstevel@tonic-gate #endif	/* _SYS_REGSET_H */
502