1*0Sstevel@tonic-gate /****************************************************************************** 2*0Sstevel@tonic-gate * 3*0Sstevel@tonic-gate * Name: actbl.h - Table data structures defined in ACPI specification 4*0Sstevel@tonic-gate * $Revision: 69 $ 5*0Sstevel@tonic-gate * 6*0Sstevel@tonic-gate *****************************************************************************/ 7*0Sstevel@tonic-gate 8*0Sstevel@tonic-gate /****************************************************************************** 9*0Sstevel@tonic-gate * 10*0Sstevel@tonic-gate * 1. Copyright Notice 11*0Sstevel@tonic-gate * 12*0Sstevel@tonic-gate * Some or all of this work - Copyright (c) 1999 - 2005, Intel Corp. 13*0Sstevel@tonic-gate * All rights reserved. 14*0Sstevel@tonic-gate * 15*0Sstevel@tonic-gate * 2. License 16*0Sstevel@tonic-gate * 17*0Sstevel@tonic-gate * 2.1. This is your license from Intel Corp. under its intellectual property 18*0Sstevel@tonic-gate * rights. You may have additional license terms from the party that provided 19*0Sstevel@tonic-gate * you this software, covering your right to use that party's intellectual 20*0Sstevel@tonic-gate * property rights. 21*0Sstevel@tonic-gate * 22*0Sstevel@tonic-gate * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 23*0Sstevel@tonic-gate * copy of the source code appearing in this file ("Covered Code") an 24*0Sstevel@tonic-gate * irrevocable, perpetual, worldwide license under Intel's copyrights in the 25*0Sstevel@tonic-gate * base code distributed originally by Intel ("Original Intel Code") to copy, 26*0Sstevel@tonic-gate * make derivatives, distribute, use and display any portion of the Covered 27*0Sstevel@tonic-gate * Code in any form, with the right to sublicense such rights; and 28*0Sstevel@tonic-gate * 29*0Sstevel@tonic-gate * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 30*0Sstevel@tonic-gate * license (with the right to sublicense), under only those claims of Intel 31*0Sstevel@tonic-gate * patents that are infringed by the Original Intel Code, to make, use, sell, 32*0Sstevel@tonic-gate * offer to sell, and import the Covered Code and derivative works thereof 33*0Sstevel@tonic-gate * solely to the minimum extent necessary to exercise the above copyright 34*0Sstevel@tonic-gate * license, and in no event shall the patent license extend to any additions 35*0Sstevel@tonic-gate * to or modifications of the Original Intel Code. No other license or right 36*0Sstevel@tonic-gate * is granted directly or by implication, estoppel or otherwise; 37*0Sstevel@tonic-gate * 38*0Sstevel@tonic-gate * The above copyright and patent license is granted only if the following 39*0Sstevel@tonic-gate * conditions are met: 40*0Sstevel@tonic-gate * 41*0Sstevel@tonic-gate * 3. Conditions 42*0Sstevel@tonic-gate * 43*0Sstevel@tonic-gate * 3.1. Redistribution of Source with Rights to Further Distribute Source. 44*0Sstevel@tonic-gate * Redistribution of source code of any substantial portion of the Covered 45*0Sstevel@tonic-gate * Code or modification with rights to further distribute source must include 46*0Sstevel@tonic-gate * the above Copyright Notice, the above License, this list of Conditions, 47*0Sstevel@tonic-gate * and the following Disclaimer and Export Compliance provision. In addition, 48*0Sstevel@tonic-gate * Licensee must cause all Covered Code to which Licensee contributes to 49*0Sstevel@tonic-gate * contain a file documenting the changes Licensee made to create that Covered 50*0Sstevel@tonic-gate * Code and the date of any change. Licensee must include in that file the 51*0Sstevel@tonic-gate * documentation of any changes made by any predecessor Licensee. Licensee 52*0Sstevel@tonic-gate * must include a prominent statement that the modification is derived, 53*0Sstevel@tonic-gate * directly or indirectly, from Original Intel Code. 54*0Sstevel@tonic-gate * 55*0Sstevel@tonic-gate * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 56*0Sstevel@tonic-gate * Redistribution of source code of any substantial portion of the Covered 57*0Sstevel@tonic-gate * Code or modification without rights to further distribute source must 58*0Sstevel@tonic-gate * include the following Disclaimer and Export Compliance provision in the 59*0Sstevel@tonic-gate * documentation and/or other materials provided with distribution. In 60*0Sstevel@tonic-gate * addition, Licensee may not authorize further sublicense of source of any 61*0Sstevel@tonic-gate * portion of the Covered Code, and must include terms to the effect that the 62*0Sstevel@tonic-gate * license from Licensee to its licensee is limited to the intellectual 63*0Sstevel@tonic-gate * property embodied in the software Licensee provides to its licensee, and 64*0Sstevel@tonic-gate * not to intellectual property embodied in modifications its licensee may 65*0Sstevel@tonic-gate * make. 66*0Sstevel@tonic-gate * 67*0Sstevel@tonic-gate * 3.3. Redistribution of Executable. Redistribution in executable form of any 68*0Sstevel@tonic-gate * substantial portion of the Covered Code or modification must reproduce the 69*0Sstevel@tonic-gate * above Copyright Notice, and the following Disclaimer and Export Compliance 70*0Sstevel@tonic-gate * provision in the documentation and/or other materials provided with the 71*0Sstevel@tonic-gate * distribution. 72*0Sstevel@tonic-gate * 73*0Sstevel@tonic-gate * 3.4. Intel retains all right, title, and interest in and to the Original 74*0Sstevel@tonic-gate * Intel Code. 75*0Sstevel@tonic-gate * 76*0Sstevel@tonic-gate * 3.5. Neither the name Intel nor any other trademark owned or controlled by 77*0Sstevel@tonic-gate * Intel shall be used in advertising or otherwise to promote the sale, use or 78*0Sstevel@tonic-gate * other dealings in products derived from or relating to the Covered Code 79*0Sstevel@tonic-gate * without prior written authorization from Intel. 80*0Sstevel@tonic-gate * 81*0Sstevel@tonic-gate * 4. Disclaimer and Export Compliance 82*0Sstevel@tonic-gate * 83*0Sstevel@tonic-gate * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 84*0Sstevel@tonic-gate * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 85*0Sstevel@tonic-gate * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 86*0Sstevel@tonic-gate * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 87*0Sstevel@tonic-gate * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 88*0Sstevel@tonic-gate * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 89*0Sstevel@tonic-gate * PARTICULAR PURPOSE. 90*0Sstevel@tonic-gate * 91*0Sstevel@tonic-gate * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 92*0Sstevel@tonic-gate * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 93*0Sstevel@tonic-gate * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 94*0Sstevel@tonic-gate * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 95*0Sstevel@tonic-gate * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 96*0Sstevel@tonic-gate * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 97*0Sstevel@tonic-gate * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 98*0Sstevel@tonic-gate * LIMITED REMEDY. 99*0Sstevel@tonic-gate * 100*0Sstevel@tonic-gate * 4.3. Licensee shall not export, either directly or indirectly, any of this 101*0Sstevel@tonic-gate * software or system incorporating such software without first obtaining any 102*0Sstevel@tonic-gate * required license or other approval from the U. S. Department of Commerce or 103*0Sstevel@tonic-gate * any other agency or department of the United States Government. In the 104*0Sstevel@tonic-gate * event Licensee exports any such software from the United States or 105*0Sstevel@tonic-gate * re-exports any such software from a foreign destination, Licensee shall 106*0Sstevel@tonic-gate * ensure that the distribution and export/re-export of the software is in 107*0Sstevel@tonic-gate * compliance with all laws, regulations, orders, or other restrictions of the 108*0Sstevel@tonic-gate * U.S. Export Administration Regulations. Licensee agrees that neither it nor 109*0Sstevel@tonic-gate * any of its subsidiaries will export/re-export any technical data, process, 110*0Sstevel@tonic-gate * software, or service, directly or indirectly, to any country for which the 111*0Sstevel@tonic-gate * United States government or any agency thereof requires an export license, 112*0Sstevel@tonic-gate * other governmental approval, or letter of assurance, without first obtaining 113*0Sstevel@tonic-gate * such license, approval or letter. 114*0Sstevel@tonic-gate * 115*0Sstevel@tonic-gate *****************************************************************************/ 116*0Sstevel@tonic-gate 117*0Sstevel@tonic-gate #ifndef __ACTBL_H__ 118*0Sstevel@tonic-gate #define __ACTBL_H__ 119*0Sstevel@tonic-gate 120*0Sstevel@tonic-gate 121*0Sstevel@tonic-gate /* 122*0Sstevel@tonic-gate * Values for description table header signatures 123*0Sstevel@tonic-gate */ 124*0Sstevel@tonic-gate #define RSDP_NAME "RSDP" 125*0Sstevel@tonic-gate #define RSDP_SIG "RSD PTR " /* RSDT Pointer signature */ 126*0Sstevel@tonic-gate #define APIC_SIG "APIC" /* Multiple APIC Description Table */ 127*0Sstevel@tonic-gate #define DSDT_SIG "DSDT" /* Differentiated System Description Table */ 128*0Sstevel@tonic-gate #define FADT_SIG "FACP" /* Fixed ACPI Description Table */ 129*0Sstevel@tonic-gate #define FACS_SIG "FACS" /* Firmware ACPI Control Structure */ 130*0Sstevel@tonic-gate #define PSDT_SIG "PSDT" /* Persistent System Description Table */ 131*0Sstevel@tonic-gate #define RSDT_SIG "RSDT" /* Root System Description Table */ 132*0Sstevel@tonic-gate #define XSDT_SIG "XSDT" /* Extended System Description Table */ 133*0Sstevel@tonic-gate #define SSDT_SIG "SSDT" /* Secondary System Description Table */ 134*0Sstevel@tonic-gate #define SBST_SIG "SBST" /* Smart Battery Specification Table */ 135*0Sstevel@tonic-gate #define SPIC_SIG "SPIC" /* IOSAPIC table */ 136*0Sstevel@tonic-gate #define BOOT_SIG "BOOT" /* Boot table */ 137*0Sstevel@tonic-gate 138*0Sstevel@tonic-gate 139*0Sstevel@tonic-gate #define GL_OWNED 0x02 /* Ownership of global lock is bit 1 */ 140*0Sstevel@tonic-gate 141*0Sstevel@tonic-gate 142*0Sstevel@tonic-gate /* 143*0Sstevel@tonic-gate * Common table types. The base code can remain 144*0Sstevel@tonic-gate * constant if the underlying tables are changed 145*0Sstevel@tonic-gate */ 146*0Sstevel@tonic-gate #define RSDT_DESCRIPTOR RSDT_DESCRIPTOR_REV2 147*0Sstevel@tonic-gate #define XSDT_DESCRIPTOR XSDT_DESCRIPTOR_REV2 148*0Sstevel@tonic-gate #define FACS_DESCRIPTOR FACS_DESCRIPTOR_REV2 149*0Sstevel@tonic-gate #define FADT_DESCRIPTOR FADT_DESCRIPTOR_REV2 150*0Sstevel@tonic-gate 151*0Sstevel@tonic-gate 152*0Sstevel@tonic-gate #pragma pack(1) 153*0Sstevel@tonic-gate 154*0Sstevel@tonic-gate /* 155*0Sstevel@tonic-gate * ACPI Version-independent tables 156*0Sstevel@tonic-gate * 157*0Sstevel@tonic-gate * NOTE: The tables that are specific to ACPI versions (1.0, 2.0, etc.) 158*0Sstevel@tonic-gate * are in separate files. 159*0Sstevel@tonic-gate */ 160*0Sstevel@tonic-gate typedef struct rsdp_descriptor /* Root System Descriptor Pointer */ 161*0Sstevel@tonic-gate { 162*0Sstevel@tonic-gate char Signature [8]; /* ACPI signature, contains "RSD PTR " */ 163*0Sstevel@tonic-gate UINT8 Checksum; /* To make sum of struct == 0 */ 164*0Sstevel@tonic-gate char OemId [6]; /* OEM identification */ 165*0Sstevel@tonic-gate UINT8 Revision; /* Must be 0 for 1.0, 2 for 2.0 */ 166*0Sstevel@tonic-gate UINT32 RsdtPhysicalAddress; /* 32-bit physical address of RSDT */ 167*0Sstevel@tonic-gate UINT32 Length; /* XSDT Length in bytes including hdr */ 168*0Sstevel@tonic-gate UINT64 XsdtPhysicalAddress; /* 64-bit physical address of XSDT */ 169*0Sstevel@tonic-gate UINT8 ExtendedChecksum; /* Checksum of entire table */ 170*0Sstevel@tonic-gate char Reserved [3]; /* Reserved field must be 0 */ 171*0Sstevel@tonic-gate 172*0Sstevel@tonic-gate } RSDP_DESCRIPTOR; 173*0Sstevel@tonic-gate 174*0Sstevel@tonic-gate 175*0Sstevel@tonic-gate typedef struct acpi_common_facs /* Common FACS for internal use */ 176*0Sstevel@tonic-gate { 177*0Sstevel@tonic-gate UINT32 *GlobalLock; 178*0Sstevel@tonic-gate UINT64 *FirmwareWakingVector; 179*0Sstevel@tonic-gate UINT8 VectorWidth; 180*0Sstevel@tonic-gate 181*0Sstevel@tonic-gate } ACPI_COMMON_FACS; 182*0Sstevel@tonic-gate 183*0Sstevel@tonic-gate 184*0Sstevel@tonic-gate #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \ 185*0Sstevel@tonic-gate char Signature [4]; /* ACPI signature (4 ASCII characters) */\ 186*0Sstevel@tonic-gate UINT32 Length; /* Length of table, in bytes, including header */\ 187*0Sstevel@tonic-gate UINT8 Revision; /* ACPI Specification minor version # */\ 188*0Sstevel@tonic-gate UINT8 Checksum; /* To make sum of entire table == 0 */\ 189*0Sstevel@tonic-gate char OemId [6]; /* OEM identification */\ 190*0Sstevel@tonic-gate char OemTableId [8]; /* OEM table identification */\ 191*0Sstevel@tonic-gate UINT32 OemRevision; /* OEM revision number */\ 192*0Sstevel@tonic-gate char AslCompilerId [4]; /* ASL compiler vendor ID */\ 193*0Sstevel@tonic-gate UINT32 AslCompilerRevision; /* ASL compiler revision number */ 194*0Sstevel@tonic-gate 195*0Sstevel@tonic-gate 196*0Sstevel@tonic-gate typedef struct acpi_table_header /* ACPI common table header */ 197*0Sstevel@tonic-gate { 198*0Sstevel@tonic-gate ACPI_TABLE_HEADER_DEF 199*0Sstevel@tonic-gate 200*0Sstevel@tonic-gate } ACPI_TABLE_HEADER; 201*0Sstevel@tonic-gate 202*0Sstevel@tonic-gate 203*0Sstevel@tonic-gate /* 204*0Sstevel@tonic-gate * MADT values and structures 205*0Sstevel@tonic-gate */ 206*0Sstevel@tonic-gate 207*0Sstevel@tonic-gate /* Values for MADT PCATCompat */ 208*0Sstevel@tonic-gate 209*0Sstevel@tonic-gate #define DUAL_PIC 0 210*0Sstevel@tonic-gate #define MULTIPLE_APIC 1 211*0Sstevel@tonic-gate 212*0Sstevel@tonic-gate /* Master MADT */ 213*0Sstevel@tonic-gate 214*0Sstevel@tonic-gate typedef struct multiple_apic_table 215*0Sstevel@tonic-gate { 216*0Sstevel@tonic-gate ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 217*0Sstevel@tonic-gate UINT32 LocalApicAddress; /* Physical address of local APIC */ 218*0Sstevel@tonic-gate UINT32_BIT PCATCompat : 1; /* A one indicates system also has dual 8259s */ 219*0Sstevel@tonic-gate UINT32_BIT Reserved1 : 31; 220*0Sstevel@tonic-gate 221*0Sstevel@tonic-gate } MULTIPLE_APIC_TABLE; 222*0Sstevel@tonic-gate 223*0Sstevel@tonic-gate /* Values for Type in APIC_HEADER_DEF */ 224*0Sstevel@tonic-gate 225*0Sstevel@tonic-gate #define APIC_PROCESSOR 0 226*0Sstevel@tonic-gate #define APIC_IO 1 227*0Sstevel@tonic-gate #define APIC_XRUPT_OVERRIDE 2 228*0Sstevel@tonic-gate #define APIC_NMI 3 229*0Sstevel@tonic-gate #define APIC_LOCAL_NMI 4 230*0Sstevel@tonic-gate #define APIC_ADDRESS_OVERRIDE 5 231*0Sstevel@tonic-gate #define APIC_IO_SAPIC 6 232*0Sstevel@tonic-gate #define APIC_LOCAL_SAPIC 7 233*0Sstevel@tonic-gate #define APIC_XRUPT_SOURCE 8 234*0Sstevel@tonic-gate #define APIC_RESERVED 9 /* 9 and greater are reserved */ 235*0Sstevel@tonic-gate 236*0Sstevel@tonic-gate /* 237*0Sstevel@tonic-gate * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE) 238*0Sstevel@tonic-gate */ 239*0Sstevel@tonic-gate #define APIC_HEADER_DEF /* Common APIC sub-structure header */\ 240*0Sstevel@tonic-gate UINT8 Type; \ 241*0Sstevel@tonic-gate UINT8 Length; 242*0Sstevel@tonic-gate 243*0Sstevel@tonic-gate typedef struct apic_header 244*0Sstevel@tonic-gate { 245*0Sstevel@tonic-gate APIC_HEADER_DEF 246*0Sstevel@tonic-gate 247*0Sstevel@tonic-gate } APIC_HEADER; 248*0Sstevel@tonic-gate 249*0Sstevel@tonic-gate /* Values for MPS INTI flags */ 250*0Sstevel@tonic-gate 251*0Sstevel@tonic-gate #define POLARITY_CONFORMS 0 252*0Sstevel@tonic-gate #define POLARITY_ACTIVE_HIGH 1 253*0Sstevel@tonic-gate #define POLARITY_RESERVED 2 254*0Sstevel@tonic-gate #define POLARITY_ACTIVE_LOW 3 255*0Sstevel@tonic-gate 256*0Sstevel@tonic-gate #define TRIGGER_CONFORMS 0 257*0Sstevel@tonic-gate #define TRIGGER_EDGE 1 258*0Sstevel@tonic-gate #define TRIGGER_RESERVED 2 259*0Sstevel@tonic-gate #define TRIGGER_LEVEL 3 260*0Sstevel@tonic-gate 261*0Sstevel@tonic-gate /* Common flag definitions */ 262*0Sstevel@tonic-gate 263*0Sstevel@tonic-gate #define MPS_INTI_FLAGS \ 264*0Sstevel@tonic-gate UINT16_BIT Polarity : 2; /* Polarity of APIC I/O input signals */\ 265*0Sstevel@tonic-gate UINT16_BIT TriggerMode : 2; /* Trigger mode of APIC input signals */\ 266*0Sstevel@tonic-gate UINT16_BIT Reserved1 : 12; /* Reserved, must be zero */ 267*0Sstevel@tonic-gate 268*0Sstevel@tonic-gate #define LOCAL_APIC_FLAGS \ 269*0Sstevel@tonic-gate UINT32_BIT ProcessorEnabled: 1; /* Processor is usable if set */\ 270*0Sstevel@tonic-gate UINT32_BIT Reserved2 : 31; /* Reserved, must be zero */ 271*0Sstevel@tonic-gate 272*0Sstevel@tonic-gate /* Sub-structures for MADT */ 273*0Sstevel@tonic-gate 274*0Sstevel@tonic-gate typedef struct madt_processor_apic 275*0Sstevel@tonic-gate { 276*0Sstevel@tonic-gate APIC_HEADER_DEF 277*0Sstevel@tonic-gate UINT8 ProcessorId; /* ACPI processor id */ 278*0Sstevel@tonic-gate UINT8 LocalApicId; /* Processor's local APIC id */ 279*0Sstevel@tonic-gate LOCAL_APIC_FLAGS 280*0Sstevel@tonic-gate 281*0Sstevel@tonic-gate } MADT_PROCESSOR_APIC; 282*0Sstevel@tonic-gate 283*0Sstevel@tonic-gate typedef struct madt_io_apic 284*0Sstevel@tonic-gate { 285*0Sstevel@tonic-gate APIC_HEADER_DEF 286*0Sstevel@tonic-gate UINT8 IoApicId; /* I/O APIC ID */ 287*0Sstevel@tonic-gate UINT8 Reserved; /* Reserved - must be zero */ 288*0Sstevel@tonic-gate UINT32 Address; /* APIC physical address */ 289*0Sstevel@tonic-gate UINT32 Interrupt; /* Global system interrupt where INTI 290*0Sstevel@tonic-gate * lines start */ 291*0Sstevel@tonic-gate } MADT_IO_APIC; 292*0Sstevel@tonic-gate 293*0Sstevel@tonic-gate typedef struct madt_interrupt_override 294*0Sstevel@tonic-gate { 295*0Sstevel@tonic-gate APIC_HEADER_DEF 296*0Sstevel@tonic-gate UINT8 Bus; /* 0 - ISA */ 297*0Sstevel@tonic-gate UINT8 Source; /* Interrupt source (IRQ) */ 298*0Sstevel@tonic-gate UINT32 Interrupt; /* Global system interrupt */ 299*0Sstevel@tonic-gate MPS_INTI_FLAGS 300*0Sstevel@tonic-gate 301*0Sstevel@tonic-gate } MADT_INTERRUPT_OVERRIDE; 302*0Sstevel@tonic-gate 303*0Sstevel@tonic-gate typedef struct madt_nmi_source 304*0Sstevel@tonic-gate { 305*0Sstevel@tonic-gate APIC_HEADER_DEF 306*0Sstevel@tonic-gate MPS_INTI_FLAGS 307*0Sstevel@tonic-gate UINT32 Interrupt; /* Global system interrupt */ 308*0Sstevel@tonic-gate 309*0Sstevel@tonic-gate } MADT_NMI_SOURCE; 310*0Sstevel@tonic-gate 311*0Sstevel@tonic-gate typedef struct madt_local_apic_nmi 312*0Sstevel@tonic-gate { 313*0Sstevel@tonic-gate APIC_HEADER_DEF 314*0Sstevel@tonic-gate UINT8 ProcessorId; /* ACPI processor id */ 315*0Sstevel@tonic-gate MPS_INTI_FLAGS 316*0Sstevel@tonic-gate UINT8 Lint; /* LINTn to which NMI is connected */ 317*0Sstevel@tonic-gate 318*0Sstevel@tonic-gate } MADT_LOCAL_APIC_NMI; 319*0Sstevel@tonic-gate 320*0Sstevel@tonic-gate typedef struct madt_address_override 321*0Sstevel@tonic-gate { 322*0Sstevel@tonic-gate APIC_HEADER_DEF 323*0Sstevel@tonic-gate UINT16 Reserved; /* Reserved - must be zero */ 324*0Sstevel@tonic-gate UINT64 Address; /* APIC physical address */ 325*0Sstevel@tonic-gate 326*0Sstevel@tonic-gate } MADT_ADDRESS_OVERRIDE; 327*0Sstevel@tonic-gate 328*0Sstevel@tonic-gate typedef struct madt_io_sapic 329*0Sstevel@tonic-gate { 330*0Sstevel@tonic-gate APIC_HEADER_DEF 331*0Sstevel@tonic-gate UINT8 IoSapicId; /* I/O SAPIC ID */ 332*0Sstevel@tonic-gate UINT8 Reserved; /* Reserved - must be zero */ 333*0Sstevel@tonic-gate UINT32 InterruptBase; /* Glocal interrupt for SAPIC start */ 334*0Sstevel@tonic-gate UINT64 Address; /* SAPIC physical address */ 335*0Sstevel@tonic-gate 336*0Sstevel@tonic-gate } MADT_IO_SAPIC; 337*0Sstevel@tonic-gate 338*0Sstevel@tonic-gate typedef struct madt_local_sapic 339*0Sstevel@tonic-gate { 340*0Sstevel@tonic-gate APIC_HEADER_DEF 341*0Sstevel@tonic-gate UINT8 ProcessorId; /* ACPI processor id */ 342*0Sstevel@tonic-gate UINT8 LocalSapicId; /* SAPIC ID */ 343*0Sstevel@tonic-gate UINT8 LocalSapicEid; /* SAPIC EID */ 344*0Sstevel@tonic-gate UINT8 Reserved [3]; /* Reserved - must be zero */ 345*0Sstevel@tonic-gate LOCAL_APIC_FLAGS 346*0Sstevel@tonic-gate UINT32 ProcessorUID; /* Numeric UID - ACPI 3.0 */ 347*0Sstevel@tonic-gate char ProcessorUIDString[1]; /* String UID - ACPI 3.0 */ 348*0Sstevel@tonic-gate 349*0Sstevel@tonic-gate } MADT_LOCAL_SAPIC; 350*0Sstevel@tonic-gate 351*0Sstevel@tonic-gate typedef struct madt_interrupt_source 352*0Sstevel@tonic-gate { 353*0Sstevel@tonic-gate APIC_HEADER_DEF 354*0Sstevel@tonic-gate MPS_INTI_FLAGS 355*0Sstevel@tonic-gate UINT8 InterruptType; /* 1=PMI, 2=INIT, 3=corrected */ 356*0Sstevel@tonic-gate UINT8 ProcessorId; /* Processor ID */ 357*0Sstevel@tonic-gate UINT8 ProcessorEid; /* Processor EID */ 358*0Sstevel@tonic-gate UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 359*0Sstevel@tonic-gate UINT32 Interrupt; /* Global system interrupt */ 360*0Sstevel@tonic-gate UINT32 Flags; /* Interrupt Source Flags */ 361*0Sstevel@tonic-gate 362*0Sstevel@tonic-gate } MADT_INTERRUPT_SOURCE; 363*0Sstevel@tonic-gate 364*0Sstevel@tonic-gate 365*0Sstevel@tonic-gate /* 366*0Sstevel@tonic-gate * Smart Battery 367*0Sstevel@tonic-gate */ 368*0Sstevel@tonic-gate typedef struct smart_battery_table 369*0Sstevel@tonic-gate { 370*0Sstevel@tonic-gate ACPI_TABLE_HEADER_DEF 371*0Sstevel@tonic-gate UINT32 WarningLevel; 372*0Sstevel@tonic-gate UINT32 LowLevel; 373*0Sstevel@tonic-gate UINT32 CriticalLevel; 374*0Sstevel@tonic-gate 375*0Sstevel@tonic-gate } SMART_BATTERY_TABLE; 376*0Sstevel@tonic-gate 377*0Sstevel@tonic-gate 378*0Sstevel@tonic-gate #pragma pack() 379*0Sstevel@tonic-gate 380*0Sstevel@tonic-gate 381*0Sstevel@tonic-gate /* 382*0Sstevel@tonic-gate * ACPI Table information. We save the table address, length, 383*0Sstevel@tonic-gate * and type of memory allocation (mapped or allocated) for each 384*0Sstevel@tonic-gate * table for 1) when we exit, and 2) if a new table is installed 385*0Sstevel@tonic-gate */ 386*0Sstevel@tonic-gate #define ACPI_MEM_NOT_ALLOCATED 0 387*0Sstevel@tonic-gate #define ACPI_MEM_ALLOCATED 1 388*0Sstevel@tonic-gate #define ACPI_MEM_MAPPED 2 389*0Sstevel@tonic-gate 390*0Sstevel@tonic-gate /* Definitions for the Flags bitfield member of ACPI_TABLE_SUPPORT */ 391*0Sstevel@tonic-gate 392*0Sstevel@tonic-gate #define ACPI_TABLE_SINGLE 0x00 393*0Sstevel@tonic-gate #define ACPI_TABLE_MULTIPLE 0x01 394*0Sstevel@tonic-gate #define ACPI_TABLE_EXECUTABLE 0x02 395*0Sstevel@tonic-gate 396*0Sstevel@tonic-gate #define ACPI_TABLE_ROOT 0x00 397*0Sstevel@tonic-gate #define ACPI_TABLE_PRIMARY 0x10 398*0Sstevel@tonic-gate #define ACPI_TABLE_SECONDARY 0x20 399*0Sstevel@tonic-gate #define ACPI_TABLE_ALL 0x30 400*0Sstevel@tonic-gate #define ACPI_TABLE_TYPE_MASK 0x30 401*0Sstevel@tonic-gate 402*0Sstevel@tonic-gate /* Data about each known table type */ 403*0Sstevel@tonic-gate 404*0Sstevel@tonic-gate typedef struct acpi_table_support 405*0Sstevel@tonic-gate { 406*0Sstevel@tonic-gate char *Name; 407*0Sstevel@tonic-gate char *Signature; 408*0Sstevel@tonic-gate void **GlobalPtr; 409*0Sstevel@tonic-gate UINT8 SigLength; 410*0Sstevel@tonic-gate UINT8 Flags; 411*0Sstevel@tonic-gate 412*0Sstevel@tonic-gate } ACPI_TABLE_SUPPORT; 413*0Sstevel@tonic-gate 414*0Sstevel@tonic-gate 415*0Sstevel@tonic-gate /* 416*0Sstevel@tonic-gate * Get the ACPI version-specific tables 417*0Sstevel@tonic-gate */ 418*0Sstevel@tonic-gate #include "actbl1.h" /* Acpi 1.0 table definitions */ 419*0Sstevel@tonic-gate #include "actbl2.h" /* Acpi 2.0 table definitions */ 420*0Sstevel@tonic-gate 421*0Sstevel@tonic-gate 422*0Sstevel@tonic-gate #pragma pack(1) 423*0Sstevel@tonic-gate /* 424*0Sstevel@tonic-gate * High performance timer 425*0Sstevel@tonic-gate */ 426*0Sstevel@tonic-gate typedef struct hpet_table 427*0Sstevel@tonic-gate { 428*0Sstevel@tonic-gate ACPI_TABLE_HEADER_DEF 429*0Sstevel@tonic-gate UINT32 HardwareId; 430*0Sstevel@tonic-gate ACPI_GENERIC_ADDRESS BaseAddress; 431*0Sstevel@tonic-gate UINT8 HpetNumber; 432*0Sstevel@tonic-gate UINT16 ClockTick; 433*0Sstevel@tonic-gate UINT8 Attributes; 434*0Sstevel@tonic-gate 435*0Sstevel@tonic-gate } HPET_TABLE; 436*0Sstevel@tonic-gate 437*0Sstevel@tonic-gate #pragma pack() 438*0Sstevel@tonic-gate 439*0Sstevel@tonic-gate #endif /* __ACTBL_H__ */ 440