xref: /onnv-gate/usr/src/uts/intel/os/ddi_arch.c (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
28*0Sstevel@tonic-gate 
29*0Sstevel@tonic-gate /*
30*0Sstevel@tonic-gate  * This file contains ddi functions common to intel architectures
31*0Sstevel@tonic-gate  */
32*0Sstevel@tonic-gate 
33*0Sstevel@tonic-gate #include <sys/archsystm.h>
34*0Sstevel@tonic-gate #include <sys/types.h>
35*0Sstevel@tonic-gate #include <sys/dditypes.h>
36*0Sstevel@tonic-gate #include <sys/ddi_impldefs.h>
37*0Sstevel@tonic-gate #include <sys/sunddi.h>
38*0Sstevel@tonic-gate #include <sys/cpu.h>
39*0Sstevel@tonic-gate 
40*0Sstevel@tonic-gate /*
41*0Sstevel@tonic-gate  * DDI Mapping
42*0Sstevel@tonic-gate  */
43*0Sstevel@tonic-gate 
44*0Sstevel@tonic-gate /*
45*0Sstevel@tonic-gate  * i_ddi_bus_map:
46*0Sstevel@tonic-gate  * Generic bus_map entry point, for byte addressable devices
47*0Sstevel@tonic-gate  * conforming to the reg/range addressing model with no HAT layer
48*0Sstevel@tonic-gate  * to be programmed at this level.
49*0Sstevel@tonic-gate  */
50*0Sstevel@tonic-gate 
51*0Sstevel@tonic-gate int
52*0Sstevel@tonic-gate i_ddi_bus_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
53*0Sstevel@tonic-gate 	off_t offset, off_t len, caddr_t *vaddrp)
54*0Sstevel@tonic-gate {
55*0Sstevel@tonic-gate 	struct regspec tmp_reg, *rp;
56*0Sstevel@tonic-gate 	ddi_map_req_t mr = *mp;		/* Get private copy of request */
57*0Sstevel@tonic-gate 	int error;
58*0Sstevel@tonic-gate 
59*0Sstevel@tonic-gate 	mp = &mr;
60*0Sstevel@tonic-gate 
61*0Sstevel@tonic-gate 	/*
62*0Sstevel@tonic-gate 	 * First, if given an rnumber, convert it to a regspec...
63*0Sstevel@tonic-gate 	 */
64*0Sstevel@tonic-gate 
65*0Sstevel@tonic-gate 	if (mp->map_type == DDI_MT_RNUMBER)  {
66*0Sstevel@tonic-gate 
67*0Sstevel@tonic-gate 		int rnumber = mp->map_obj.rnumber;
68*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
69*0Sstevel@tonic-gate 		static char *out_of_range =
70*0Sstevel@tonic-gate 		    "i_ddi_bus_map: Out of range rnumber <%d>, device <%s>";
71*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
72*0Sstevel@tonic-gate 
73*0Sstevel@tonic-gate 		rp = i_ddi_rnumber_to_regspec(rdip, rnumber);
74*0Sstevel@tonic-gate 		if (rp == (struct regspec *)0)  {
75*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
76*0Sstevel@tonic-gate 			cmn_err(CE_WARN, out_of_range, rnumber,
77*0Sstevel@tonic-gate 			    ddi_get_name(rdip));
78*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
79*0Sstevel@tonic-gate 			return (DDI_ME_RNUMBER_RANGE);
80*0Sstevel@tonic-gate 		}
81*0Sstevel@tonic-gate 
82*0Sstevel@tonic-gate 		/*
83*0Sstevel@tonic-gate 		 * Convert the given ddi_map_req_t from rnumber to regspec...
84*0Sstevel@tonic-gate 		 */
85*0Sstevel@tonic-gate 
86*0Sstevel@tonic-gate 		mp->map_type = DDI_MT_REGSPEC;
87*0Sstevel@tonic-gate 		mp->map_obj.rp = rp;
88*0Sstevel@tonic-gate 	}
89*0Sstevel@tonic-gate 
90*0Sstevel@tonic-gate 	/*
91*0Sstevel@tonic-gate 	 * Adjust offset and length correspnding to called values...
92*0Sstevel@tonic-gate 	 * XXX: A non-zero length means override the one in the regspec.
93*0Sstevel@tonic-gate 	 * XXX: (Regardless of what's in the parent's range)
94*0Sstevel@tonic-gate 	 */
95*0Sstevel@tonic-gate 
96*0Sstevel@tonic-gate 	tmp_reg = *(mp->map_obj.rp);		/* Preserve underlying data */
97*0Sstevel@tonic-gate 	rp = mp->map_obj.rp = &tmp_reg;		/* Use tmp_reg in request */
98*0Sstevel@tonic-gate 
99*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
100*0Sstevel@tonic-gate 	cmn_err(CE_CONT,
101*0Sstevel@tonic-gate 		"i_ddi_bus_map: <%s,%s> <0x%x, 0x%x, 0x%d> "
102*0Sstevel@tonic-gate 		"offset %d len %d handle 0x%x\n",
103*0Sstevel@tonic-gate 		ddi_get_name(dip), ddi_get_name(rdip),
104*0Sstevel@tonic-gate 		rp->regspec_bustype, rp->regspec_addr, rp->regspec_size,
105*0Sstevel@tonic-gate 		offset, len, mp->map_handlep);
106*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
107*0Sstevel@tonic-gate 
108*0Sstevel@tonic-gate 	/*
109*0Sstevel@tonic-gate 	 * I/O or memory mapping
110*0Sstevel@tonic-gate 	 *
111*0Sstevel@tonic-gate 	 *	<bustype=0, addr=x, len=x>: memory
112*0Sstevel@tonic-gate 	 *	<bustype=1, addr=x, len=x>: i/o
113*0Sstevel@tonic-gate 	 *	<bustype>1, addr=0, len=x>: x86-compatibility i/o
114*0Sstevel@tonic-gate 	 */
115*0Sstevel@tonic-gate 
116*0Sstevel@tonic-gate 	if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) {
117*0Sstevel@tonic-gate 		cmn_err(CE_WARN, "<%s,%s>: invalid register spec"
118*0Sstevel@tonic-gate 		    " <0x%x, 0x%x, 0x%x>\n", ddi_get_name(dip),
119*0Sstevel@tonic-gate 		    ddi_get_name(rdip), rp->regspec_bustype,
120*0Sstevel@tonic-gate 		    rp->regspec_addr, rp->regspec_size);
121*0Sstevel@tonic-gate 		return (DDI_ME_INVAL);
122*0Sstevel@tonic-gate 	}
123*0Sstevel@tonic-gate 
124*0Sstevel@tonic-gate 	if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) {
125*0Sstevel@tonic-gate 		/*
126*0Sstevel@tonic-gate 		 * compatibility i/o mapping
127*0Sstevel@tonic-gate 		 */
128*0Sstevel@tonic-gate 		rp->regspec_bustype += (uint_t)offset;
129*0Sstevel@tonic-gate 	} else {
130*0Sstevel@tonic-gate 		/*
131*0Sstevel@tonic-gate 		 * Normal memory or i/o mapping
132*0Sstevel@tonic-gate 		 */
133*0Sstevel@tonic-gate 		rp->regspec_addr += (uint_t)offset;
134*0Sstevel@tonic-gate 	}
135*0Sstevel@tonic-gate 
136*0Sstevel@tonic-gate 	if (len != 0)
137*0Sstevel@tonic-gate 		rp->regspec_size = (uint_t)len;
138*0Sstevel@tonic-gate 
139*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
140*0Sstevel@tonic-gate 	cmn_err(CE_CONT,
141*0Sstevel@tonic-gate 		"               <%s,%s> <0x%x, 0x%x, 0x%d> "
142*0Sstevel@tonic-gate 		"offset %d len %d\n",
143*0Sstevel@tonic-gate 		ddi_get_name(dip), ddi_get_name(rdip),
144*0Sstevel@tonic-gate 		rp->regspec_bustype, rp->regspec_addr, rp->regspec_size,
145*0Sstevel@tonic-gate 		offset, len);
146*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
147*0Sstevel@tonic-gate 
148*0Sstevel@tonic-gate 	/*
149*0Sstevel@tonic-gate 	 * If we had an MMU, this is where you'd program the MMU and hat layer.
150*0Sstevel@tonic-gate 	 * Since we're using the default function here, we do not have an MMU
151*0Sstevel@tonic-gate 	 * to program.
152*0Sstevel@tonic-gate 	 */
153*0Sstevel@tonic-gate 
154*0Sstevel@tonic-gate 	/*
155*0Sstevel@tonic-gate 	 * Apply any parent ranges at this level, if applicable.
156*0Sstevel@tonic-gate 	 * (This is where nexus specific regspec translation takes place.
157*0Sstevel@tonic-gate 	 * Use of this function is implicit agreement that translation is
158*0Sstevel@tonic-gate 	 * provided via ddi_apply_range.)  Note that we assume that
159*0Sstevel@tonic-gate 	 * the request is within the parents limits.
160*0Sstevel@tonic-gate 	 */
161*0Sstevel@tonic-gate 
162*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
163*0Sstevel@tonic-gate 	ddi_map_debug("applying range of parent <%s> to child <%s>...\n",
164*0Sstevel@tonic-gate 	    ddi_get_name(dip), ddi_get_name(rdip));
165*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
166*0Sstevel@tonic-gate 
167*0Sstevel@tonic-gate 	if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0)
168*0Sstevel@tonic-gate 		return (error);
169*0Sstevel@tonic-gate 
170*0Sstevel@tonic-gate 	/*
171*0Sstevel@tonic-gate 	 * Call my parents bus_map function with modified values...
172*0Sstevel@tonic-gate 	 */
173*0Sstevel@tonic-gate 
174*0Sstevel@tonic-gate 	return (ddi_map(dip, mp, (off_t)0, (off_t)0, vaddrp));
175*0Sstevel@tonic-gate }
176*0Sstevel@tonic-gate 
177*0Sstevel@tonic-gate /*
178*0Sstevel@tonic-gate  * Creating register mappings and handling interrupts:
179*0Sstevel@tonic-gate  */
180*0Sstevel@tonic-gate 
181*0Sstevel@tonic-gate struct regspec *
182*0Sstevel@tonic-gate i_ddi_rnumber_to_regspec(dev_info_t *dip, int rnumber)
183*0Sstevel@tonic-gate {
184*0Sstevel@tonic-gate 	if (rnumber >= sparc_pd_getnreg(DEVI(dip)))
185*0Sstevel@tonic-gate 		return ((struct regspec *)0);
186*0Sstevel@tonic-gate 
187*0Sstevel@tonic-gate 	return (sparc_pd_getreg(DEVI(dip), rnumber));
188*0Sstevel@tonic-gate }
189*0Sstevel@tonic-gate 
190*0Sstevel@tonic-gate /*
191*0Sstevel@tonic-gate  * Static function to determine if a reg prop is enclosed within
192*0Sstevel@tonic-gate  * a given a range spec.  (For readability: only used by i_ddi_aply_range.).
193*0Sstevel@tonic-gate  */
194*0Sstevel@tonic-gate static int
195*0Sstevel@tonic-gate reg_is_enclosed_in_range(struct regspec *rp, struct rangespec *rangep)
196*0Sstevel@tonic-gate {
197*0Sstevel@tonic-gate 	if (rp->regspec_bustype != rangep->rng_cbustype)
198*0Sstevel@tonic-gate 		return (0);
199*0Sstevel@tonic-gate 
200*0Sstevel@tonic-gate 	if (rp->regspec_addr < rangep->rng_coffset)
201*0Sstevel@tonic-gate 		return (0);
202*0Sstevel@tonic-gate 
203*0Sstevel@tonic-gate 	if (rangep->rng_size == 0)
204*0Sstevel@tonic-gate 		return (1);	/* size is really 2**(bits_per_word) */
205*0Sstevel@tonic-gate 
206*0Sstevel@tonic-gate 	if ((rp->regspec_addr + rp->regspec_size - 1) <=
207*0Sstevel@tonic-gate 	    (rangep->rng_coffset + rangep->rng_size - 1))
208*0Sstevel@tonic-gate 		return (1);
209*0Sstevel@tonic-gate 
210*0Sstevel@tonic-gate 	return (0);
211*0Sstevel@tonic-gate }
212*0Sstevel@tonic-gate 
213*0Sstevel@tonic-gate /*
214*0Sstevel@tonic-gate  * i_ddi_apply_range:
215*0Sstevel@tonic-gate  * Apply range of dp to struct regspec *rp, if applicable.
216*0Sstevel@tonic-gate  * If there's any range defined, it gets applied.
217*0Sstevel@tonic-gate  */
218*0Sstevel@tonic-gate 
219*0Sstevel@tonic-gate int
220*0Sstevel@tonic-gate i_ddi_apply_range(dev_info_t *dp, dev_info_t *rdip, struct regspec *rp)
221*0Sstevel@tonic-gate {
222*0Sstevel@tonic-gate 	int nrange, b;
223*0Sstevel@tonic-gate 	struct rangespec *rangep;
224*0Sstevel@tonic-gate 	static char *out_of_range =
225*0Sstevel@tonic-gate 	    "Out of range register specification from device node <%s>\n";
226*0Sstevel@tonic-gate 
227*0Sstevel@tonic-gate 	nrange = sparc_pd_getnrng(dp);
228*0Sstevel@tonic-gate 	if (nrange == 0)  {
229*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
230*0Sstevel@tonic-gate 		ddi_map_debug("    No range.\n");
231*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
232*0Sstevel@tonic-gate 		return (0);
233*0Sstevel@tonic-gate 	}
234*0Sstevel@tonic-gate 
235*0Sstevel@tonic-gate 	/*
236*0Sstevel@tonic-gate 	 * Find a match, making sure the regspec is within the range
237*0Sstevel@tonic-gate 	 * of the parent, noting that a size of zero in a range spec
238*0Sstevel@tonic-gate 	 * really means a size of 2**(bitsperword).
239*0Sstevel@tonic-gate 	 */
240*0Sstevel@tonic-gate 
241*0Sstevel@tonic-gate 	for (b = 0, rangep = sparc_pd_getrng(dp, 0); b < nrange; ++b, ++rangep)
242*0Sstevel@tonic-gate 		if (reg_is_enclosed_in_range(rp, rangep))
243*0Sstevel@tonic-gate 			break;		/* found a match */
244*0Sstevel@tonic-gate 
245*0Sstevel@tonic-gate 	if (b == nrange)  {
246*0Sstevel@tonic-gate 		cmn_err(CE_WARN, out_of_range, ddi_get_name(rdip));
247*0Sstevel@tonic-gate 		return (DDI_ME_REGSPEC_RANGE);
248*0Sstevel@tonic-gate 	}
249*0Sstevel@tonic-gate 
250*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
251*0Sstevel@tonic-gate 	ddi_map_debug("    Input:  %x.%x.%x\n", rp->regspec_bustype,
252*0Sstevel@tonic-gate 	    rp->regspec_addr, rp->regspec_size);
253*0Sstevel@tonic-gate 	ddi_map_debug("    Range:  %x.%x %x.%x %x\n",
254*0Sstevel@tonic-gate 	    rangep->rng_cbustype, rangep->rng_coffset,
255*0Sstevel@tonic-gate 	    rangep->rng_bustype, rangep->rng_offset, rangep->rng_size);
256*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
257*0Sstevel@tonic-gate 
258*0Sstevel@tonic-gate 	rp->regspec_bustype = rangep->rng_bustype;
259*0Sstevel@tonic-gate 	rp->regspec_addr += rangep->rng_offset - rangep->rng_coffset;
260*0Sstevel@tonic-gate 
261*0Sstevel@tonic-gate #ifdef	DDI_MAP_DEBUG
262*0Sstevel@tonic-gate 	ddi_map_debug("    Return: %x.%x.%x\n", rp->regspec_bustype,
263*0Sstevel@tonic-gate 	    rp->regspec_addr, rp->regspec_size);
264*0Sstevel@tonic-gate #endif	/* DDI_MAP_DEBUG */
265*0Sstevel@tonic-gate 
266*0Sstevel@tonic-gate 	return (0);
267*0Sstevel@tonic-gate }
268*0Sstevel@tonic-gate 
269*0Sstevel@tonic-gate /*
270*0Sstevel@tonic-gate  * i_ddi_map_fault: wrapper for bus_map_fault.
271*0Sstevel@tonic-gate  */
272*0Sstevel@tonic-gate int
273*0Sstevel@tonic-gate i_ddi_map_fault(dev_info_t *dip, dev_info_t *rdip,
274*0Sstevel@tonic-gate 	struct hat *hat, struct seg *seg, caddr_t addr,
275*0Sstevel@tonic-gate 	struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock)
276*0Sstevel@tonic-gate {
277*0Sstevel@tonic-gate 	dev_info_t *pdip;
278*0Sstevel@tonic-gate 
279*0Sstevel@tonic-gate 	if (dip == NULL)
280*0Sstevel@tonic-gate 		return (DDI_FAILURE);
281*0Sstevel@tonic-gate 
282*0Sstevel@tonic-gate 	pdip = (dev_info_t *)DEVI(dip)->devi_bus_map_fault;
283*0Sstevel@tonic-gate 
284*0Sstevel@tonic-gate 	/* request appropriate parent to map fault */
285*0Sstevel@tonic-gate 	return ((*(DEVI(pdip)->devi_ops->devo_bus_ops->bus_map_fault))(pdip,
286*0Sstevel@tonic-gate 	    rdip, hat, seg, addr, dp, pfn, prot, lock));
287*0Sstevel@tonic-gate }
288*0Sstevel@tonic-gate 
289*0Sstevel@tonic-gate /*
290*0Sstevel@tonic-gate  * Return an integer in native machine format from an OBP 1275 integer
291*0Sstevel@tonic-gate  * representation, which is big-endian, with no particular alignment
292*0Sstevel@tonic-gate  * guarantees.  intp points to the OBP data, and n the number of bytes.
293*0Sstevel@tonic-gate  *
294*0Sstevel@tonic-gate  * Byte-swapping is needed on intel.
295*0Sstevel@tonic-gate  */
296*0Sstevel@tonic-gate int
297*0Sstevel@tonic-gate impl_ddi_prop_int_from_prom(uchar_t *intp, int n)
298*0Sstevel@tonic-gate {
299*0Sstevel@tonic-gate 	int	i = 0;
300*0Sstevel@tonic-gate 
301*0Sstevel@tonic-gate 	ASSERT(n > 0 && n <= 4);
302*0Sstevel@tonic-gate 
303*0Sstevel@tonic-gate 	intp += n;
304*0Sstevel@tonic-gate 	while (n-- > 0) {
305*0Sstevel@tonic-gate 		i = (i << 8) | *(--intp);
306*0Sstevel@tonic-gate 	}
307*0Sstevel@tonic-gate 
308*0Sstevel@tonic-gate 	return (i);
309*0Sstevel@tonic-gate }
310*0Sstevel@tonic-gate 
311*0Sstevel@tonic-gate 
312*0Sstevel@tonic-gate int drv_usec_coarse_timing = 0;
313*0Sstevel@tonic-gate 
314*0Sstevel@tonic-gate /*
315*0Sstevel@tonic-gate  * Time delay function called by drivers
316*0Sstevel@tonic-gate  */
317*0Sstevel@tonic-gate void
318*0Sstevel@tonic-gate drv_usecwait(clock_t count)
319*0Sstevel@tonic-gate {
320*0Sstevel@tonic-gate 	int tens = 0;
321*0Sstevel@tonic-gate 	extern int tsc_gethrtime_initted;
322*0Sstevel@tonic-gate 
323*0Sstevel@tonic-gate 	if (tsc_gethrtime_initted) {
324*0Sstevel@tonic-gate 		hrtime_t start, end;
325*0Sstevel@tonic-gate 		hrtime_t waittime;
326*0Sstevel@tonic-gate 
327*0Sstevel@tonic-gate 		if (drv_usec_coarse_timing) {
328*0Sstevel@tonic-gate 			/* revert to the wait time as before using tsc */
329*0Sstevel@tonic-gate 			/* in case there are callers depending on the */
330*0Sstevel@tonic-gate 			/* old behaviour */
331*0Sstevel@tonic-gate 			waittime = ((count > 10) ?
332*0Sstevel@tonic-gate 				(((hrtime_t)count / 10) + 1) : 1) *
333*0Sstevel@tonic-gate 				10 * (NANOSEC / MICROSEC);
334*0Sstevel@tonic-gate 		} else  {
335*0Sstevel@tonic-gate 			waittime = (hrtime_t)count * (NANOSEC / MICROSEC);
336*0Sstevel@tonic-gate 		}
337*0Sstevel@tonic-gate 		start = end =  gethrtime();
338*0Sstevel@tonic-gate 		while ((end - start) < waittime) {
339*0Sstevel@tonic-gate 			SMT_PAUSE();
340*0Sstevel@tonic-gate 			end = gethrtime();
341*0Sstevel@tonic-gate 		}
342*0Sstevel@tonic-gate 		return;
343*0Sstevel@tonic-gate 
344*0Sstevel@tonic-gate 	}
345*0Sstevel@tonic-gate 
346*0Sstevel@tonic-gate 	if (count > 10)
347*0Sstevel@tonic-gate 		tens = count/10;
348*0Sstevel@tonic-gate 	tens++;			/* roundup; wait at least 10 microseconds */
349*0Sstevel@tonic-gate 	while (tens > 0) {
350*0Sstevel@tonic-gate 		tenmicrosec();
351*0Sstevel@tonic-gate 		tens--;
352*0Sstevel@tonic-gate 	}
353*0Sstevel@tonic-gate }
354