1*3446Smrj /* 2*3446Smrj * CDDL HEADER START 3*3446Smrj * 4*3446Smrj * The contents of this file are subject to the terms of the 5*3446Smrj * Common Development and Distribution License, Version 1.0 only 6*3446Smrj * (the "License"). You may not use this file except in compliance 7*3446Smrj * with the License. 8*3446Smrj * 9*3446Smrj * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*3446Smrj * or http://www.opensolaris.org/os/licensing. 11*3446Smrj * See the License for the specific language governing permissions 12*3446Smrj * and limitations under the License. 13*3446Smrj * 14*3446Smrj * When distributing Covered Code, include this CDDL HEADER in each 15*3446Smrj * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*3446Smrj * If applicable, add the following below this CDDL HEADER, with the 17*3446Smrj * fields enclosed by brackets "[]" replaced with your own identifying 18*3446Smrj * information: Portions Copyright [yyyy] [name of copyright owner] 19*3446Smrj * 20*3446Smrj * CDDL HEADER END 21*3446Smrj */ 22*3446Smrj /* 23*3446Smrj * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*3446Smrj * Use is subject to license terms. 25*3446Smrj * 26*3446Smrj * mps_table.h -- MP Specification table definitions 27*3446Smrj */ 28*3446Smrj 29*3446Smrj #ifndef _MPS_TABLE_H 30*3446Smrj #define _MPS_TABLE_H 31*3446Smrj 32*3446Smrj #pragma ident "%Z%%M% %I% %E% SMI" 33*3446Smrj 34*3446Smrj #ifdef __cplusplus 35*3446Smrj extern "C" { 36*3446Smrj #endif 37*3446Smrj 38*3446Smrj 39*3446Smrj struct mps_fps_hdr { /* MP Floating Pointer Structure */ 40*3446Smrj uint32_t fps_sig; /* _MP_ (0x5F4D505F) */ 41*3446Smrj uint32_t fps_mpct_paddr; /* paddr of MP Configuration Table */ 42*3446Smrj uchar_t fps_len; /* in paragraph (16-bytes units) */ 43*3446Smrj uchar_t fps_spec_rev; /* MP Spec. version no. */ 44*3446Smrj uchar_t fps_cksum; /* checksum of complete structure */ 45*3446Smrj uchar_t fps_featinfo1; /* mp feature info byte 1 */ 46*3446Smrj uchar_t fps_featinfo2; /* mp feature info byte 2 */ 47*3446Smrj uchar_t fps_featinfo3; /* mp feature info byte 3 */ 48*3446Smrj uchar_t fps_featinfo4; /* mp feature info byte 4 */ 49*3446Smrj uchar_t fps_featinfo5; /* mp feature info byte 5 */ 50*3446Smrj }; 51*3446Smrj 52*3446Smrj struct mps_ct_hdr { /* MP Configuration Table Header */ 53*3446Smrj uint32_t ct_sig; /* "PCMP" */ 54*3446Smrj uint16_t ct_len; /* base configuration in bytes */ 55*3446Smrj uchar_t ct_spec_rev; /* MP Spec. version no. */ 56*3446Smrj uchar_t ct_cksum; /* base configuration table checksum */ 57*3446Smrj char ct_oem_id[8]; /* string identifies the manufacturer */ 58*3446Smrj char ct_prod_id[12]; /* string identifies the product */ 59*3446Smrj uint32_t ct_oem_ptr; /* paddr to an OEM-defined table */ 60*3446Smrj uint16_t ct_oem_tbl_len; /* size of base OEM table in bytes */ 61*3446Smrj uint16_t ct_entry_cnt; /* no. of entries in the base table */ 62*3446Smrj uint32_t ct_local_apic; /* paddr of local APIC */ 63*3446Smrj uint16_t ct_ext_tbl_len; /* extended table in bytes */ 64*3446Smrj uchar_t ct_ext_cksum; /* checksum for the extended table */ 65*3446Smrj }; 66*3446Smrj 67*3446Smrj /* Base MP Configuration Table entry type definitions */ 68*3446Smrj #define CPU_TYPE 0 69*3446Smrj #define BUS_TYPE 1 70*3446Smrj #define IO_APIC_TYPE 2 71*3446Smrj #define IO_INTR_TYPE 3 72*3446Smrj #define LOCAL_INTR_TYPE 4 73*3446Smrj 74*3446Smrj /* Base MP Configuration Table entry size definitions */ 75*3446Smrj #define CPU_SIZE 20 76*3446Smrj #define BUS_SIZE 8 77*3446Smrj #define IO_APIC_SIZE 8 78*3446Smrj #define IO_INTR_SIZE 8 79*3446Smrj #define LOCAL_INTR_SIZE 8 80*3446Smrj 81*3446Smrj /* Extended MP Configuration Table entry type definitions */ 82*3446Smrj #define SYS_AS_MAPPING 128 83*3446Smrj #define BUS_HIERARCHY_DESC 129 84*3446Smrj #define COMP_BUS_AS_MODIFIER 130 85*3446Smrj 86*3446Smrj /* Extended MP Configuration Table entry size definitions */ 87*3446Smrj #define SYS_AS_MAPPING_SIZE 20 88*3446Smrj #define BUS_HIERARCHY_DESC_SIZE 8 89*3446Smrj #define COMP_BUS_AS_MODIFIER_SIZE 8 90*3446Smrj 91*3446Smrj struct sasm { /* System Address Space Mapping Entry */ 92*3446Smrj uchar_t sasm_type; /* type 128 */ 93*3446Smrj uchar_t sasm_len; /* entry length in bytes (20) */ 94*3446Smrj uchar_t sasm_bus_id; /* bus id where this is mapped */ 95*3446Smrj uchar_t sasm_as_type; /* system address type */ 96*3446Smrj /* system address type definitions */ 97*3446Smrj #define IO_TYPE 0 98*3446Smrj #define MEM_TYPE 1 99*3446Smrj #define PREFETCH_TYPE 2 100*3446Smrj #define BUSRANGE_TYPE 3 101*3446Smrj uint32_t sasm_as_base; /* starting address */ 102*3446Smrj uint32_t sasm_as_base_hi; 103*3446Smrj uint32_t sasm_as_len; /* no. of addresses visiblie to the bus */ 104*3446Smrj uint32_t sasm_as_len_hi; 105*3446Smrj }; 106*3446Smrj 107*3446Smrj struct bhd { /* Bus Hierarchy Descriptor Entry */ 108*3446Smrj uchar_t bhd_type; /* type 129 */ 109*3446Smrj uchar_t bhd_len; /* entry length in bytes (8) */ 110*3446Smrj uchar_t bhd_bus_id; /* bus id of this bus */ 111*3446Smrj uchar_t bhd_bus_info; /* bus information */ 112*3446Smrj /* Bus Information bit definition */ 113*3446Smrj #define BHD_BUS_INFO_SD 1 /* Subtractive Decode Bus */ 114*3446Smrj uchar_t bhd_parent; 115*3446Smrj }; 116*3446Smrj 117*3446Smrj struct cbasm { /* Compatibility Bus Address Space Modifier Entry */ 118*3446Smrj uchar_t cbasm_type; /* type 130 */ 119*3446Smrj uchar_t cbasm_len; /* entry length in bytes (8) */ 120*3446Smrj uchar_t cbasm_bus_id; /* bus to be modified */ 121*3446Smrj uchar_t cbasm_addr_mod; /* address modifier */ 122*3446Smrj /* Address Modifier bit definiton */ 123*3446Smrj #define CBASM_ADDR_MOD_PR 1 /* 1 = subtracted, 0 = added */ 124*3446Smrj uint32_t cbasm_pr_list; /* identify list of predefined address ranges */ 125*3446Smrj }; 126*3446Smrj 127*3446Smrj #ifdef __cplusplus 128*3446Smrj } 129*3446Smrj #endif 130*3446Smrj 131*3446Smrj #endif /* _MPS_TABLE_H */ 132