1*1709Smlf /* 2*1709Smlf * CDDL HEADER START 3*1709Smlf * 4*1709Smlf * The contents of this file are subject to the terms of the 5*1709Smlf * Common Development and Distribution License (the "License"). 6*1709Smlf * You may not use this file except in compliance with the License. 7*1709Smlf * 8*1709Smlf * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*1709Smlf * or http://www.opensolaris.org/os/licensing. 10*1709Smlf * See the License for the specific language governing permissions 11*1709Smlf * and limitations under the License. 12*1709Smlf * 13*1709Smlf * When distributing Covered Code, include this CDDL HEADER in each 14*1709Smlf * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*1709Smlf * If applicable, add the following below this CDDL HEADER, with the 16*1709Smlf * fields enclosed by brackets "[]" replaced with your own identifying 17*1709Smlf * information: Portions Copyright [yyyy] [name of copyright owner] 18*1709Smlf * 19*1709Smlf * CDDL HEADER END 20*1709Smlf */ 21*1709Smlf 22*1709Smlf /* 23*1709Smlf * Copyright 1997 Sun Microsystems, Inc. All rights reserved. 24*1709Smlf * Use is subject to license terms. 25*1709Smlf */ 26*1709Smlf 27*1709Smlf #ifndef _ATA_FSM_H 28*1709Smlf #define _ATA_FSM_H 29*1709Smlf 30*1709Smlf #pragma ident "%Z%%M% %I% %E% SMI" 31*1709Smlf 32*1709Smlf #ifdef __cplusplus 33*1709Smlf extern "C" { 34*1709Smlf #endif 35*1709Smlf 36*1709Smlf 37*1709Smlf /* 38*1709Smlf * 39*1709Smlf * The interrupt reason can be interpreted from other bits as follows: 40*1709Smlf * 41*1709Smlf * IO CoD DRQ 42*1709Smlf * -- --- --- 43*1709Smlf * 0 0 1 == 1 Data to device 44*1709Smlf * 0 1 0 == 2 Idle 45*1709Smlf * 0 1 1 == 3 Send ATAPI CDB to device 46*1709Smlf * 1 0 1 == 5 Data from device 47*1709Smlf * 1 1 0 == 6 Status ready 48*1709Smlf * 1 1 1 == 7 Future use 49*1709Smlf * 50*1709Smlf */ 51*1709Smlf 52*1709Smlf /* 53*1709Smlf * This macro encodes the interrupt reason into a one byte 54*1709Smlf * event code which is used to index the FSM tables 55*1709Smlf */ 56*1709Smlf #define ATAPI_EVENT(drq, intr) \ 57*1709Smlf (((unsigned char)((drq) & ATS_DRQ) >> 3) \ 58*1709Smlf | (((intr) & (ATI_IO | ATI_COD)) << 1)) 59*1709Smlf 60*1709Smlf /* 61*1709Smlf * These are the names for the encoded ATAPI events 62*1709Smlf */ 63*1709Smlf #define ATAPI_EVENT_0 0 64*1709Smlf #define ATAPI_EVENT_IDLE ATAPI_EVENT(0, ATI_COD) 65*1709Smlf #define ATAPI_EVENT_2 2 66*1709Smlf #define ATAPI_EVENT_STATUS ATAPI_EVENT(0, ATI_IO | ATI_COD) 67*1709Smlf #define ATAPI_EVENT_PIO_OUT ATAPI_EVENT(ATS_DRQ, 0) 68*1709Smlf #define ATAPI_EVENT_CDB ATAPI_EVENT(ATS_DRQ, ATI_COD) 69*1709Smlf #define ATAPI_EVENT_PIO_IN ATAPI_EVENT(ATS_DRQ, ATI_IO) 70*1709Smlf #define ATAPI_EVENT_UNKNOWN ATAPI_EVENT(ATS_DRQ, (ATI_IO | ATI_COD)) 71*1709Smlf 72*1709Smlf #define ATAPI_NEVENTS 8 73*1709Smlf 74*1709Smlf /* 75*1709Smlf * Actions for the ATAPI PIO FSM 76*1709Smlf * 77*1709Smlf */ 78*1709Smlf 79*1709Smlf enum { 80*1709Smlf A_UNK, /* invalid event detected */ 81*1709Smlf A_NADA, /* do nothing */ 82*1709Smlf A_CDB, /* send the CDB */ 83*1709Smlf A_IN, /* transfer data out to the device */ 84*1709Smlf A_OUT, /* transfer data in from the device */ 85*1709Smlf A_IDLE, /* unexpected idle phase */ 86*1709Smlf A_RE, /* read the error code register */ 87*1709Smlf A_REX /* alternate read the error code register */ 88*1709Smlf }; 89*1709Smlf 90*1709Smlf /* 91*1709Smlf * States for the ATAPI PIO FSM 92*1709Smlf */ 93*1709Smlf 94*1709Smlf enum { 95*1709Smlf S_IDLE, /* idle or fatal error state */ 96*1709Smlf S_CMD, /* command byte sent */ 97*1709Smlf S_CDB, /* CDB sent */ 98*1709Smlf S_IN, /* transferring data in from device */ 99*1709Smlf S_OUT, /* transferring data out to device */ 100*1709Smlf S_DMA, /* dma transfer active */ 101*1709Smlf 102*1709Smlf ATAPI_NSTATES 103*1709Smlf }; 104*1709Smlf 105*1709Smlf #define S_X S_IDLE /* alias for idle */ 106*1709Smlf 107*1709Smlf /* 108*1709Smlf * controller and device functions 109*1709Smlf */ 110*1709Smlf enum { 111*1709Smlf ATA_FSM_START0, 112*1709Smlf ATA_FSM_START1, 113*1709Smlf ATA_FSM_INTR, 114*1709Smlf ATA_FSM_FINI, 115*1709Smlf ATA_FSM_RESET, 116*1709Smlf 117*1709Smlf ATA_CTLR_NFUNCS 118*1709Smlf }; 119*1709Smlf 120*1709Smlf 121*1709Smlf /* 122*1709Smlf * FSM return codes 123*1709Smlf */ 124*1709Smlf enum { 125*1709Smlf ATA_FSM_RC_OKAY, 126*1709Smlf ATA_FSM_RC_BUSY, 127*1709Smlf ATA_FSM_RC_INTR, 128*1709Smlf ATA_FSM_RC_FINI 129*1709Smlf }; 130*1709Smlf 131*1709Smlf /* 132*1709Smlf * states for the controller FSM 133*1709Smlf */ 134*1709Smlf enum { 135*1709Smlf AS_IDLE, 136*1709Smlf AS_ACTIVE0, 137*1709Smlf AS_ACTIVE1, 138*1709Smlf 139*1709Smlf ATA_CTLR_NSTATES 140*1709Smlf }; 141*1709Smlf 142*1709Smlf /* 143*1709Smlf * actions for the controller FSM 144*1709Smlf */ 145*1709Smlf enum { 146*1709Smlf AC_NADA, 147*1709Smlf AC_START, 148*1709Smlf AC_INTR, 149*1709Smlf AC_FINI, 150*1709Smlf AC_BUSY, 151*1709Smlf AC_RESET_I, 152*1709Smlf AC_RESET_A 153*1709Smlf }; 154*1709Smlf 155*1709Smlf #ifdef __cplusplus 156*1709Smlf } 157*1709Smlf #endif 158*1709Smlf 159*1709Smlf #endif /* _ATA_FSM_H */ 160