11709Smlf /* 21709Smlf * CDDL HEADER START 31709Smlf * 41709Smlf * The contents of this file are subject to the terms of the 51709Smlf * Common Development and Distribution License (the "License"). 61709Smlf * You may not use this file except in compliance with the License. 71709Smlf * 81709Smlf * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 91709Smlf * or http://www.opensolaris.org/os/licensing. 101709Smlf * See the License for the specific language governing permissions 111709Smlf * and limitations under the License. 121709Smlf * 131709Smlf * When distributing Covered Code, include this CDDL HEADER in each 141709Smlf * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 151709Smlf * If applicable, add the following below this CDDL HEADER, with the 161709Smlf * fields enclosed by brackets "[]" replaced with your own identifying 171709Smlf * information: Portions Copyright [yyyy] [name of copyright owner] 181709Smlf * 191709Smlf * CDDL HEADER END 201709Smlf */ 211709Smlf 221709Smlf /* 238550SSeth.Goldberg@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 241709Smlf * Use is subject to license terms. 251709Smlf */ 261709Smlf 271709Smlf #ifndef _ATA_COMMON_H 281709Smlf #define _ATA_COMMON_H 291709Smlf 301709Smlf #ifdef __cplusplus 311709Smlf extern "C" { 321709Smlf #endif 331709Smlf 341709Smlf #include <sys/varargs.h> 351709Smlf 361709Smlf #include <sys/scsi/scsi.h> 371709Smlf #include <sys/dktp/dadkio.h> 381709Smlf #include <sys/dktp/dadev.h> 391709Smlf #include <sys/dkio.h> 401709Smlf #include <sys/dktp/tgdk.h> 411709Smlf 421709Smlf #include <sys/ddi.h> 431709Smlf #include <sys/sunddi.h> 441709Smlf 451709Smlf #include "ghd.h" 461709Smlf 471709Smlf #include "pciide.h" 481709Smlf #include "ata_cmd.h" 491709Smlf #include "ata_fsm.h" 501709Smlf #include "ata_debug.h" 511709Smlf 521709Smlf 531709Smlf /* 541709Smlf * device types 551709Smlf */ 561709Smlf #define ATA_DEV_NONE 0 571709Smlf #define ATA_DEV_DISK 1 581709Smlf #define ATA_DEV_ATAPI 2 591709Smlf 601709Smlf /* 611709Smlf * Largest sector allowed in 28 bit mode 621709Smlf */ 631709Smlf #define MAX_28BIT_CAPACITY 0xfffffff 641709Smlf 653652Syt160523 /* 663652Syt160523 * Largest sector count allowed for device firmware file in one command. 673652Syt160523 */ 683652Syt160523 #define MAX_FWFILE_SIZE_ONECMD 0xffff 691709Smlf 701709Smlf /* 711709Smlf * ata-options property configuration bits 721709Smlf */ 731709Smlf 741709Smlf #define ATA_OPTIONS_DMA 0x01 751709Smlf 763652Syt160523 #define ATAPRT(fmt) ghd_err fmt 771709Smlf 781709Smlf /* ad_flags (per-drive) */ 791709Smlf 801709Smlf #define AD_ATAPI 0x01 /* is an ATAPI drive */ 811709Smlf #define AD_DISK 0x02 821709Smlf #define AD_MUTEX_INIT 0x04 831709Smlf #define AD_NO_CDB_INTR 0x20 841709Smlf #define AD_1SECTOR 0x40 851709Smlf #define AD_INT13LBA 0x80 /* supports LBA at Int13 interface */ 861709Smlf #define AD_NORVRT 0x100 /* block revert-to-defaults */ 871709Smlf #define AD_EXT48 0x200 /* 48 bit (extended) LBA */ 887963SColin.Yi@Sun.COM #define AD_BLLBA48 0x400 891709Smlf #define ATAPIDRV(X) ((X)->ad_flags & AD_ATAPI) 901709Smlf 911709Smlf 921709Smlf /* max targets and luns */ 931709Smlf 941709Smlf #define ATA_MAXTARG 2 951709Smlf #define ATA_MAXLUN 16 961709Smlf 971709Smlf /* 981709Smlf * PCI-IDE Bus Mastering Scatter/Gather list size 991709Smlf */ 1001709Smlf #define ATA_DMA_NSEGS 17 /* enough for at least 64K */ 1011709Smlf 1021709Smlf /* 1031709Smlf * Controller port address defaults 1041709Smlf */ 1051709Smlf #define ATA_BASE0 0x1f0 1061709Smlf #define ATA_BASE1 0x170 1071709Smlf 1081709Smlf /* 1091709Smlf * port offsets from base address ioaddr1 1101709Smlf */ 1111709Smlf #define AT_DATA 0x00 /* data register */ 1121709Smlf #define AT_ERROR 0x01 /* error register (read) */ 1131709Smlf #define AT_FEATURE 0x01 /* features (write) */ 1141709Smlf #define AT_COUNT 0x02 /* sector count */ 1151709Smlf #define AT_SECT 0x03 /* sector number */ 1161709Smlf #define AT_LCYL 0x04 /* cylinder low byte */ 1171709Smlf #define AT_HCYL 0x05 /* cylinder high byte */ 1181709Smlf #define AT_DRVHD 0x06 /* drive/head register */ 1191709Smlf #define AT_STATUS 0x07 /* status/command register */ 1201709Smlf #define AT_CMD 0x07 /* status/command register */ 1211709Smlf 1221709Smlf /* 1231709Smlf * port offsets from base address ioaddr2 1241709Smlf */ 1251709Smlf #define AT_ALTSTATUS 0x00 /* alternate status (read) */ 1261709Smlf #define AT_DEVCTL 0x00 /* device control (write) */ 1271709Smlf 1281709Smlf /* Device control register */ 1291709Smlf #define ATDC_NIEN 0x02 /* disable interrupts */ 1301709Smlf #define ATDC_SRST 0x04 /* controller reset */ 1311709Smlf #define ATDC_D3 0x08 /* Mysterious bit, must be set */ 1321709Smlf /* 1331709Smlf * ATA-6 spec 1341709Smlf * In 48-bit addressing, reading the LBA location and count 1351709Smlf * registers when the high-order bit is set reads the "previous 1361709Smlf * content" (LBA bits 47:24, count bits 15:8) instead of the 1371709Smlf * "most recent" values (LBA bits 23:0, count bits 7:0). 1381709Smlf */ 1391709Smlf #define ATDC_HOB 0x80 /* High order bit */ 1401709Smlf 1411709Smlf /* 1421709Smlf * Status bits from AT_STATUS register 1431709Smlf */ 1441709Smlf #define ATS_BSY 0x80 /* controller busy */ 1451709Smlf #define ATS_DRDY 0x40 /* drive ready */ 1461709Smlf #define ATS_DF 0x20 /* device fault */ 1471709Smlf #define ATS_DSC 0x10 /* seek operation complete */ 1481709Smlf #define ATS_DRQ 0x08 /* data request */ 1491709Smlf #define ATS_CORR 0x04 /* ECC correction applied */ 1501709Smlf #define ATS_IDX 0x02 /* disk revolution index */ 1511709Smlf #define ATS_ERR 0x01 /* error flag */ 1521709Smlf 1531709Smlf /* 1541709Smlf * Status bits from AT_ERROR register 1551709Smlf */ 1561709Smlf #define ATE_BBK_ICRC 0x80 /* bad block detected in ATA-1 */ 1571709Smlf /* ICRC error in ATA-4 and newer */ 1581709Smlf #define ATE_UNC 0x40 /* uncorrectable data error */ 1591709Smlf #define ATE_MC 0x20 /* Media change */ 1601709Smlf #define ATE_IDNF 0x10 /* ID not found */ 1611709Smlf #define ATE_MCR 0x08 /* media change request */ 1621709Smlf #define ATE_ABORT 0x04 /* aborted command */ 1631709Smlf #define ATE_TKONF 0x02 /* track 0 not found */ 1641709Smlf #define ATE_AMNF 0x01 /* address mark not found */ 1651709Smlf 1661709Smlf #define ATE_NM 0x02 /* no media */ 1671709Smlf 1681709Smlf /* 1691709Smlf * Drive selectors for AT_DRVHD register 1701709Smlf */ 1711709Smlf #define ATDH_LBA 0x40 /* addressing in LBA mode not chs */ 1721709Smlf #define ATDH_DRIVE0 0xa0 /* or into AT_DRVHD to select drive 0 */ 1731709Smlf #define ATDH_DRIVE1 0xb0 /* or into AT_DRVHD to select drive 1 */ 1741709Smlf 1751709Smlf /* 1761709Smlf * Feature register bits 1771709Smlf */ 1781709Smlf #define ATF_ATAPI_DMA 0x01 /* ATAPI DMA enable bit */ 1796412Syt160523 #define ATF_XFRMOD_MDMA 0x20 /* Multi-Word DMA mode */ 1805295Srandyf #define ATF_XFRMOD_UDMA 0x40 /* Ultra DMA mode */ 1815295Srandyf #define ATACM_UDMA_SEL(id) (((id)->ai_ultradma >> 8) & 0x7f) 1825295Srandyf 1835295Srandyf /* 1845295Srandyf * Set feature register definitions. 1855295Srandyf */ 1865295Srandyf #define ATSF_SET_XFRMOD 0X03 /* Set transfer mode */ 1875295Srandyf #define ATSF_DIS_REVPOD 0x66 /* Disable reverting to power on defaults */ 1885295Srandyf #define ATSF_ENA_REVPOD 0xcc /* Enable reverting to power on defaults */ 1891709Smlf 1901709Smlf /* 1911709Smlf * common bits and options for set features (ATC_SET_FEAT) 1921709Smlf */ 1931709Smlf #define FC_WRITE_CACHE_ON 0x02 1941709Smlf #define FC_WRITE_CACHE_OFF 0x82 1951709Smlf 1961709Smlf /* Test which version of ATA is supported */ 1971709Smlf #define IS_ATA_VERSION_SUPPORTED(idp, n) \ 1981709Smlf ((idp->ai_majorversion != 0xffff) && \ 1991709Smlf (idp->ai_majorversion & (1<<n))) 2001709Smlf 2011709Smlf /* Test if supported version >= ATA-n */ 2021709Smlf #define IS_ATA_VERSION_GE(idp, n) \ 2031709Smlf ((idp->ai_majorversion != 0xffff) && \ 2041709Smlf (idp->ai_majorversion != 0) && \ 2051709Smlf (idp->ai_majorversion >= (1<<n))) 2061709Smlf 2071709Smlf /* Test whether a device is a CD drive */ 2081709Smlf #define IS_CDROM(dp) \ 2091709Smlf ((dp->ad_flags & AD_ATAPI) && \ 2101709Smlf ((dp->ad_id.ai_config >> 8) & DTYPE_MASK) == \ 2111709Smlf DTYPE_RODIRECT) 2121709Smlf 2138686SXun.Ni@Sun.COM /* Test whether the device support write cache */ 2148686SXun.Ni@Sun.COM #define IS_WRITE_CACHE_SUPPORTED(x) \ 2158686SXun.Ni@Sun.COM ((((x).ai_cmdset82) & 0x20) >> 5) 2168686SXun.Ni@Sun.COM 2171709Smlf /* macros from old common hba code */ 2181709Smlf 2191709Smlf #define ATA_INTPROP(devi, pname, pval, plen) \ 2201709Smlf (ddi_prop_op(DDI_DEV_T_ANY, (devi), PROP_LEN_AND_VAL_BUF, \ 2211709Smlf DDI_PROP_DONTPASS, (pname), (caddr_t)(pval), (plen))) 2221709Smlf 2231709Smlf #define ATA_LONGPROP(devi, pname, pval, plen) \ 2241709Smlf (ddi_getlongprop(DDI_DEV_T_ANY, (devi), DDI_PROP_DONTPASS, \ 2251709Smlf (pname), (caddr_t)(pval), (plen))) 2261709Smlf 2271709Smlf /* 2281709Smlf * 2291709Smlf * per-controller soft-state data structure 2301709Smlf * 2311709Smlf */ 2321709Smlf 2331709Smlf #define CTL2DRV(cp, t, l) (cp->ac_drvp[t][l]) 2341709Smlf 2351709Smlf typedef struct ata_ctl { 2361709Smlf 2371709Smlf dev_info_t *ac_dip; 2381709Smlf uint_t ac_flags; 2391709Smlf uint_t ac_timing_flags; 2401709Smlf struct ata_drv *ac_drvp[ATA_MAXTARG][ATA_MAXLUN]; 2411709Smlf int ac_max_transfer; /* max transfer in sectors */ 2421709Smlf uint_t ac_standby_time; /* timer value seconds */ 2431709Smlf 2441709Smlf ccc_t ac_ccc; /* for GHD module */ 2451709Smlf struct ata_drv *ac_active_drvp; /* active drive, if any */ 2461709Smlf struct ata_pkt *ac_active_pktp; /* active packet, if any */ 2471709Smlf uchar_t ac_state; 2481709Smlf 2491709Smlf scsi_hba_tran_t *ac_atapi_tran; /* for atapi module */ 2501709Smlf 2511709Smlf /* 2521709Smlf * port addresses associated with ioaddr1 2531709Smlf */ 2541709Smlf ddi_acc_handle_t ac_iohandle1; /* DDI I/O handle */ 2551709Smlf caddr_t ac_ioaddr1; 2561709Smlf ushort_t *ac_data; /* data register */ 2571709Smlf uchar_t *ac_error; /* error register (read) */ 2581709Smlf uchar_t *ac_feature; /* features (write) */ 2591709Smlf uchar_t *ac_count; /* sector count */ 2601709Smlf uchar_t *ac_sect; /* sector number */ 2611709Smlf uchar_t *ac_lcyl; /* cylinder low byte */ 2621709Smlf uchar_t *ac_hcyl; /* cylinder high byte */ 2631709Smlf uchar_t *ac_drvhd; /* drive/head register */ 2641709Smlf uchar_t *ac_status; /* status/command register */ 2651709Smlf uchar_t *ac_cmd; /* status/command register */ 2661709Smlf 2671709Smlf /* 2681709Smlf * port addresses associated with ioaddr2 2691709Smlf */ 2701709Smlf ddi_acc_handle_t ac_iohandle2; /* DDI I/O handle */ 2711709Smlf caddr_t ac_ioaddr2; 2721709Smlf uchar_t *ac_altstatus; /* alternate status (read) */ 2731709Smlf uchar_t *ac_devctl; /* device control (write) */ 2741709Smlf 2751709Smlf /* 2761709Smlf * handle and port addresss for PCI-IDE Bus Master controller 2771709Smlf */ 2781709Smlf ddi_acc_handle_t ac_bmhandle; /* DDI I/O handle */ 2791709Smlf caddr_t ac_bmaddr; /* base addr of Bus Master Regs */ 2801709Smlf uchar_t ac_pciide; /* PCI-IDE device */ 2811709Smlf uchar_t ac_pciide_bm; /* Bus Mastering PCI-IDE device */ 2821709Smlf 2831709Smlf /* 2841709Smlf * Scatter/Gather list for PCI-IDE Bus Mastering controllers 2851709Smlf */ 2861709Smlf caddr_t ac_sg_list; /* virtual addr of S/G list */ 2871709Smlf paddr_t ac_sg_paddr; /* phys addr of S/G list */ 2881709Smlf ddi_acc_handle_t ac_sg_acc_handle; 2891709Smlf ddi_dma_handle_t ac_sg_handle; 2901709Smlf 2911709Smlf /* 2921709Smlf * data for managing ARQ on ATAPI devices 2931709Smlf */ 2941709Smlf struct ata_pkt *ac_arq_pktp; /* pkt for performing ATAPI ARQ */ 2951709Smlf struct ata_pkt *ac_fault_pktp; /* pkt that caused ARQ */ 2961709Smlf uchar_t ac_arq_cdb[6]; 2975295Srandyf 2985295Srandyf /* 2995295Srandyf * Power Management 3005295Srandyf */ 3015295Srandyf int ac_pm_support; 3025295Srandyf int ac_pm_level; 3031709Smlf } ata_ctl_t; 3041709Smlf 3051709Smlf /* ac_flags (per-controller) */ 3061709Smlf 3071709Smlf #define AC_GHD_INIT 0x02 3081709Smlf #define AC_ATAPI_INIT 0x04 3091709Smlf #define AC_DISK_INIT 0x08 3101709Smlf #define AC_ATTACHED 0x10 3111709Smlf #define AC_SCSI_HBA_TRAN_ALLOC 0x1000 3121709Smlf #define AC_SCSI_HBA_ATTACH 0x2000 3131709Smlf 3141709Smlf #define AC_BMSTATREG_PIO_BROKEN 0x80000000 3151709Smlf 3161709Smlf /* 3171709Smlf * Bug 1256489: 3181709Smlf * 3191709Smlf * If AC_BSY_WAIT needs to be set for laptops that do 3201709Smlf * suspend/resume but do not correctly wait for the busy bit to 3211709Smlf * drop after a resume. 3221709Smlf */ 3231709Smlf 3241709Smlf /* ac_timing_flags (per-controller) */ 3251709Smlf #define AC_BSY_WAIT 0x1 /* tweak timing in ata_start & atapi_start */ 3261709Smlf 3271709Smlf 3281709Smlf 3291709Smlf /* Identify drive data */ 3301709Smlf struct ata_id { 3311709Smlf /* WORD */ 3321709Smlf /* OFFSET COMMENT */ 3331709Smlf ushort_t ai_config; /* 0 general configuration bits */ 3341709Smlf ushort_t ai_fixcyls; /* 1 # of fixed cylinders */ 3351709Smlf ushort_t ai_resv0; /* 2 # reserved */ 3361709Smlf ushort_t ai_heads; /* 3 # of heads */ 3371709Smlf ushort_t ai_trksiz; /* 4 # of unformatted bytes/track */ 3381709Smlf ushort_t ai_secsiz; /* 5 # of unformatted bytes/sector */ 3391709Smlf ushort_t ai_sectors; /* 6 # of sectors/track */ 3401709Smlf ushort_t ai_resv1[3]; /* 7 "Vendor Unique" */ 3411709Smlf char ai_drvser[20]; /* 10 Serial number */ 3421709Smlf ushort_t ai_buftype; /* 20 Buffer type */ 3431709Smlf ushort_t ai_bufsz; /* 21 Buffer size in 512 byte incr */ 3441709Smlf ushort_t ai_ecc; /* 22 # of ecc bytes avail on rd/wr */ 3451709Smlf char ai_fw[8]; /* 23 Firmware revision */ 3461709Smlf char ai_model[40]; /* 27 Model # */ 3471709Smlf ushort_t ai_mult1; /* 47 Multiple command flags */ 3481709Smlf ushort_t ai_dwcap; /* 48 Doubleword capabilities */ 3491709Smlf ushort_t ai_cap; /* 49 Capabilities */ 3501709Smlf ushort_t ai_resv2; /* 50 Reserved */ 3511709Smlf ushort_t ai_piomode; /* 51 PIO timing mode */ 3521709Smlf ushort_t ai_dmamode; /* 52 DMA timing mode */ 3531709Smlf ushort_t ai_validinfo; /* 53 bit0: wds 54-58, bit1: 64-70 */ 3541709Smlf ushort_t ai_curcyls; /* 54 # of current cylinders */ 3551709Smlf ushort_t ai_curheads; /* 55 # of current heads */ 3561709Smlf ushort_t ai_cursectrk; /* 56 # of current sectors/track */ 3571709Smlf ushort_t ai_cursccp[2]; /* 57 current sectors capacity */ 3581709Smlf ushort_t ai_mult2; /* 59 multiple sectors info */ 3591709Smlf ushort_t ai_addrsec[2]; /* 60 LBA only: no of addr secs */ 3601709Smlf ushort_t ai_sworddma; /* 62 single word dma modes */ 3611709Smlf ushort_t ai_dworddma; /* 63 double word dma modes */ 3621709Smlf ushort_t ai_advpiomode; /* 64 advanced PIO modes supported */ 3631709Smlf ushort_t ai_minmwdma; /* 65 min multi-word dma cycle info */ 3641709Smlf ushort_t ai_recmwdma; /* 66 rec multi-word dma cycle info */ 3651709Smlf ushort_t ai_minpio; /* 67 min PIO cycle info */ 3661709Smlf ushort_t ai_minpioflow; /* 68 min PIO cycle info w/flow ctl */ 3671709Smlf ushort_t ai_resv3[2]; /* 69,70 reserved */ 3681709Smlf ushort_t ai_resv4[4]; /* 71-74 reserved */ 3691709Smlf ushort_t ai_qdepth; /* 75 queue depth */ 3701709Smlf ushort_t ai_resv5[4]; /* 76-79 reserved */ 3711709Smlf ushort_t ai_majorversion; /* 80 major versions supported */ 3721709Smlf ushort_t ai_minorversion; /* 81 minor version number supported */ 3731709Smlf ushort_t ai_cmdset82; /* 82 command set supported */ 3741709Smlf ushort_t ai_cmdset83; /* 83 more command sets supported */ 3751709Smlf ushort_t ai_cmdset84; /* 84 more command sets supported */ 3761709Smlf ushort_t ai_features85; /* 85 enabled features */ 3771709Smlf ushort_t ai_features86; /* 86 enabled features */ 3781709Smlf ushort_t ai_features87; /* 87 enabled features */ 3791709Smlf ushort_t ai_ultradma; /* 88 Ultra DMA mode */ 3801709Smlf ushort_t ai_erasetime; /* 89 security erase time */ 3811709Smlf ushort_t ai_erasetimex; /* 90 enhanced security erase time */ 3821709Smlf ushort_t ai_padding1[9]; /* pad through 99 */ 3831709Smlf ushort_t ai_addrsecxt[4]; /* 100 extended max LBA sector */ 3841709Smlf ushort_t ai_padding2[22]; /* pad to 126 */ 3851709Smlf ushort_t ai_lastlun; /* 126 last LUN, as per SFF-8070i */ 3861709Smlf ushort_t ai_resv6; /* 127 reserved */ 3871709Smlf ushort_t ai_securestatus; /* 128 security status */ 3881709Smlf ushort_t ai_vendor[31]; /* 129-159 vendor specific */ 3891709Smlf ushort_t ai_padding3[16]; /* 160 pad to 176 */ 3901709Smlf ushort_t ai_curmedser[30]; /* 176-205 current media serial number */ 3911709Smlf ushort_t ai_padding4[49]; /* 206 pad to 255 */ 3921709Smlf ushort_t ai_integrity; /* 255 integrity word */ 3931709Smlf }; 3941709Smlf 3951709Smlf /* Identify Drive: general config bits - word 0 */ 3961709Smlf 3971709Smlf #define ATA_ID_REM_DRV 0x80 3981709Smlf #define ATA_ID_COMPACT_FLASH 0x848a 3991709Smlf #define ATA_ID_CF_TO_ATA 0x040a 4003652Syt160523 #define ATA_ID_INCMPT 0x0004 4011709Smlf 4021709Smlf /* Identify Drive: common capability bits - word 49 */ 4031709Smlf 4041709Smlf #define ATAC_DMA_SUPPORT 0x0100 4051709Smlf #define ATAC_LBA_SUPPORT 0x0200 4061709Smlf #define ATAC_IORDY_DISABLE 0x0400 4071709Smlf #define ATAC_IORDY_SUPPORT 0x0800 4081709Smlf #define ATAC_RESERVED_IDPKT 0x1000 /* rsrvd for identify pkt dev */ 4091709Smlf #define ATAC_STANDBYTIMER 0x2000 4101709Smlf #define ATAC_ATA_TYPE_MASK 0x8001 4111709Smlf #define ATAC_ATA_TYPE 0x0000 4121709Smlf #define ATAC_ATAPI_TYPE_MASK 0xc000 4131709Smlf #define ATAC_ATAPI_TYPE 0x8000 4141709Smlf 4151709Smlf /* Identify Driver ai_validinfo (word 53) */ 4161709Smlf 4171709Smlf #define ATAC_VALIDINFO_83 0x0004 /* word 83 supported fields valid */ 4181709Smlf #define ATAC_VALIDINFO_70_64 0x0002 /* word 70:64 sup. fields valid */ 4191709Smlf 4201709Smlf /* Identify Drive: ai_dworddma (word 63) */ 4211709Smlf 4226412Syt160523 #define ATAC_MDMA_SUP_MASK 0x0007 /* Multiword DMA supported */ 4231709Smlf #define ATAC_MDMA_SEL_MASK 0x0700 /* Multiword DMA selected */ 4241709Smlf #define ATAC_MDMA_2_SEL 0x0400 /* Multiword DMA mode 2 selected */ 4251709Smlf #define ATAC_MDMA_1_SEL 0x0200 /* Multiword DMA mode 1 selected */ 4261709Smlf #define ATAC_MDMA_0_SEL 0x0100 /* Multiword DMA mode 0 selected */ 4271709Smlf #define ATAC_MDMA_2_SUP 0x0004 /* Multiword DMA mode 2 supported */ 4281709Smlf #define ATAC_MDMA_1_SUP 0x0002 /* Multiword DMA mode 1 supported */ 4291709Smlf #define ATAC_MDMA_0_SUP 0x0001 /* Multiword DMA mode 0 supported */ 4301709Smlf 4311709Smlf /* Identify Drive: ai_advpiomode (word 64) */ 4321709Smlf 4331709Smlf #define ATAC_ADVPIO_4_SUP 0x0002 /* PIO mode 4 supported */ 4341709Smlf #define ATAC_ADVPIO_3_SUP 0x0001 /* PIO mode 3 supported */ 4351709Smlf #define ATAC_ADVPIO_SERIAL 0x0003 /* Serial interface */ 4361709Smlf 4371709Smlf /* Identify Drive: ai_majorversion (word 80) */ 4381709Smlf 4393652Syt160523 #define ATAC_MAJVER_8 0x0100 /* ATA/ATAPI-8 version supported */ 4401709Smlf #define ATAC_MAJVER_6 0x0040 /* ATA/ATAPI-6 version supported */ 4411709Smlf #define ATAC_MAJVER_4 0x0010 /* ATA/ATAPI-4 version supported */ 4421709Smlf 4431709Smlf /* Identify Drive: command set supported/enabled bits - words 83 and 86 */ 4441709Smlf 4451709Smlf #define ATACS_EXT48 0x0400 /* 48 bit address feature */ 4461709Smlf 4471709Smlf /* Identify Drive: ai_features85 (word 85) */ 4481709Smlf #define ATAC_FEATURES85_WCE 0x0020 /* write cache enabled */ 4491709Smlf 4506412Syt160523 /* Identify Drive: ai_ultradma (word 88) */ 4516412Syt160523 #define ATAC_UDMA_SUP_MASK 0x007f /* UDMA modes supported */ 4526412Syt160523 #define ATAC_UDMA_SEL_MASK 0x7f00 /* UDMA modes selected */ 4536412Syt160523 4546412Syt160523 4551709Smlf /* per-drive data struct */ 4561709Smlf 4571709Smlf typedef struct ata_drv { 4581709Smlf ata_ctl_t *ad_ctlp; /* pointer back to ctlr */ 4591709Smlf struct ata_id ad_id; /* IDENTIFY DRIVE data */ 4601709Smlf 4611709Smlf uint_t ad_flags; 4621709Smlf uchar_t ad_pciide_dma; /* PCIIDE DMA supported */ 4631709Smlf uchar_t ad_targ; /* target */ 4641709Smlf uchar_t ad_lun; /* lun */ 4651709Smlf uchar_t ad_drive_bits; 4661709Smlf 4671709Smlf /* Used by atapi side only */ 4681709Smlf 4691709Smlf uchar_t ad_state; /* state of ATAPI FSM */ 4701709Smlf uchar_t ad_cdb_len; /* Size of ATAPI CDBs */ 4711709Smlf 4721709Smlf uchar_t ad_bogus_drq; 4731709Smlf uchar_t ad_nec_bad_status; 4741709Smlf 4751709Smlf /* Used by disk side only */ 4761709Smlf 4776640Scth struct scsi_device *ad_device; 4781709Smlf struct scsi_inquiry ad_inquiry; 4791709Smlf struct ctl_obj ad_ctl_obj; 4801709Smlf uchar_t ad_rd_cmd; 4811709Smlf uchar_t ad_wr_cmd; 4821709Smlf ushort_t ad_acyl; 4831709Smlf 4841709Smlf /* 4851709Smlf * Geometry note: The following three values are the geometry 4861709Smlf * that the driver will use. They may differ from the 4871709Smlf * geometry reported by the controller and/or BIOS. See note 4881709Smlf * on ata_fix_large_disk_geometry in ata_disk.c for more 4891709Smlf * details. 4901709Smlf */ 4911709Smlf uint32_t ad_drvrcyl; /* number of cyls */ 4921709Smlf uint32_t ad_drvrhd; /* number of heads */ 4931709Smlf uint32_t ad_drvrsec; /* number of sectors */ 4941709Smlf ushort_t ad_phhd; /* number of phys heads */ 4951709Smlf ushort_t ad_phsec; /* number of phys sectors */ 4961709Smlf short ad_block_factor; 4971709Smlf short ad_bytes_per_block; 4981709Smlf 4991709Smlf /* 5001709Smlf * Support for 48-bit LBA (ATA-6) 5011709Smlf */ 5021709Smlf uint64_t ad_capacity; /* Total sectors on disk */ 5037787SAda.Feng@Sun.COM 5047787SAda.Feng@Sun.COM /* 5057787SAda.Feng@Sun.COM * save/restore the DMA mode for suspend/resume 5067787SAda.Feng@Sun.COM */ 5077787SAda.Feng@Sun.COM ushort_t ad_dma_cap; 5087787SAda.Feng@Sun.COM ushort_t ad_dma_mode; 5091709Smlf } ata_drv_t; 5101709Smlf 5117787SAda.Feng@Sun.COM /* values for ad_dma_cap */ 5127787SAda.Feng@Sun.COM #define ATA_DMA_ULTRAMODE 0x1 5137787SAda.Feng@Sun.COM #define ATA_DMA_MWORDMODE 0x2 5147787SAda.Feng@Sun.COM 5151709Smlf typedef struct ata_tgt { 5161709Smlf ata_drv_t *at_drvp; 5171709Smlf int at_arq; 5181709Smlf ulong_t at_total_sectors; 5191709Smlf ddi_dma_attr_t at_dma_attr; 5201709Smlf } ata_tgt_t; 5211709Smlf 5221709Smlf /* values for ad_pciide_dma */ 5235603Sml40262 #define ATA_DMA_OFF 0x0 5245603Sml40262 #define ATA_DMA_ON 0x1 5255603Sml40262 #define ATA_DMA_UNINITIALIZED 0x2 5261709Smlf 5271709Smlf /* 5281709Smlf * (ata_pkt_t *) to (gcmd_t *) 5291709Smlf */ 5301709Smlf #define APKT2GCMD(apktp) (apktp->ap_gcmdp) 5311709Smlf 5321709Smlf /* 5331709Smlf * (gcmd_t *) to (ata_pkt_t *) 5341709Smlf */ 5351709Smlf #define GCMD2APKT(gcmdp) ((ata_pkt_t *)gcmdp->cmd_private) 5361709Smlf 5371709Smlf /* 5381709Smlf * (gtgt_t *) to (ata_ctl_t *) 5391709Smlf */ 5401709Smlf #define GTGTP2ATAP(gtgtp) ((ata_ctl_t *)GTGTP2HBA(gtgtp)) 5411709Smlf 5421709Smlf /* 5431709Smlf * (gtgt_t *) to (ata_tgt_t *) 5441709Smlf */ 5451709Smlf #define GTGTP2ATATGTP(gtgtp) ((ata_tgt_t *)GTGTP2TARGET(gtgtp)) 5461709Smlf 5471709Smlf /* 5481709Smlf * (gtgt_t *) to (ata_drv_t *) 5491709Smlf */ 5501709Smlf #define GTGTP2ATADRVP(gtgtp) (GTGTP2ATATGTP(gtgtp)->at_drvp) 5511709Smlf 5521709Smlf /* 5531709Smlf * (gcmd_t *) to (ata_tgt_t *) 5541709Smlf */ 5551709Smlf #define GCMD2TGT(gcmdp) GTGTP2ATATGTP(GCMDP2GTGTP(gcmdp)) 5561709Smlf 5571709Smlf /* 5581709Smlf * (gcmd_t *) to (ata_drv_t *) 5591709Smlf */ 5601709Smlf #define GCMD2DRV(gcmdp) GTGTP2ATADRVP(GCMDP2GTGTP(gcmdp)) 5611709Smlf 5621709Smlf /* 5631709Smlf * (ata_pkt_t *) to (ata_drv_t *) 5641709Smlf */ 5651709Smlf #define APKT2DRV(apktp) GCMD2DRV(APKT2GCMD(apktp)) 5661709Smlf 5671709Smlf 5681709Smlf /* 5691709Smlf * (struct hba_tran *) to (ata_ctl_t *) 5701709Smlf */ 5711709Smlf #define TRAN2ATAP(tranp) ((ata_ctl_t *)TRAN2HBA(tranp)) 5721709Smlf 5731709Smlf 5741709Smlf /* 5751709Smlf * ata common packet structure 5761709Smlf */ 5771709Smlf typedef struct ata_pkt { 5781709Smlf 5791709Smlf gcmd_t *ap_gcmdp; /* GHD command struct */ 5801709Smlf 5811709Smlf uint_t ap_flags; /* packet flags */ 5821709Smlf 5831709Smlf caddr_t ap_baddr; /* I/O buffer base address */ 5841709Smlf size_t ap_boffset; /* current offset into I/O buffer */ 5851709Smlf size_t ap_bcount; /* # bytes in this request */ 5861709Smlf 5871709Smlf caddr_t ap_v_addr; /* I/O buffer address */ 5881709Smlf size_t ap_resid; /* # bytes left to read/write */ 5891709Smlf 5901709Smlf uchar_t ap_pciide_dma; /* This pkt uses DMA transfer mode */ 5911709Smlf prde_t ap_sg_list[ATA_DMA_NSEGS]; /* Scatter/Gather list */ 5921709Smlf int ap_sg_cnt; /* number of entries in S/G list */ 5931709Smlf 5941709Smlf /* command, starting sector number, sector count */ 5951709Smlf 5961709Smlf daddr_t ap_startsec; /* starting sector number */ 5971709Smlf ushort_t ap_count; /* sector count */ 5981709Smlf uchar_t ap_sec; 5991709Smlf uchar_t ap_lwcyl; 6001709Smlf uchar_t ap_hicyl; 6011709Smlf uchar_t ap_hd; 6021709Smlf uchar_t ap_cmd; 6031709Smlf 6041709Smlf /* saved status and error registers for error case */ 6051709Smlf 6061709Smlf uchar_t ap_status; 6071709Smlf uchar_t ap_error; 6081709Smlf 6091709Smlf /* disk/atapi callback routines */ 6101709Smlf 6111709Smlf int (*ap_start)(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 6121709Smlf struct ata_pkt *ata_pktp); 6131709Smlf int (*ap_intr)(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 6141709Smlf struct ata_pkt *ata_pktp); 6151709Smlf void (*ap_complete)(ata_drv_t *ata_drvp, 6161709Smlf struct ata_pkt *ata_pktp, int do_callback); 6171709Smlf 6181709Smlf /* Used by disk side */ 6191709Smlf 6201709Smlf char ap_cdb; /* disk command */ 6211709Smlf char ap_scb; /* status after disk cmd */ 6221709Smlf uint_t ap_bytes_per_block; /* blk mode factor */ 6231709Smlf uint_t ap_wrt_count; /* size of last write */ 6241709Smlf caddr_t ap_v_addr_sav; /* Original I/O buffer address. */ 6251709Smlf size_t ap_resid_sav; /* Original # of bytes */ 6261709Smlf /* left to read/write. */ 6271709Smlf 6281709Smlf /* Used by atapi side */ 6291709Smlf 6301709Smlf uchar_t *ap_cdbp; /* ptr to SCSI CDB */ 6311709Smlf uchar_t ap_cdb_len; /* length of SCSI CDB (in bytes) */ 6321709Smlf uchar_t ap_cdb_pad; /* padding after SCSI CDB (in shorts) */ 6331709Smlf 6341709Smlf struct scsi_arq_status *ap_scbp; /* ptr to SCSI status block */ 6351709Smlf uchar_t ap_statuslen; /* length of SCSI status block */ 6361709Smlf } ata_pkt_t; 6371709Smlf 6381709Smlf 6391709Smlf /* 6401709Smlf * defines for ap_flags 6411709Smlf */ 6421709Smlf #define AP_ATAPI 0x0001 /* device is atapi */ 6431709Smlf #define AP_ERROR 0x0002 /* normal error */ 6441709Smlf #define AP_TRAN_ERROR 0x0004 /* transport error */ 6451709Smlf #define AP_READ 0x0008 /* read data */ 6461709Smlf #define AP_WRITE 0x0010 /* write data */ 6471709Smlf #define AP_ABORT 0x0020 /* packet aborted */ 6481709Smlf #define AP_TIMEOUT 0x0040 /* packet timed out */ 6491709Smlf #define AP_BUS_RESET 0x0080 /* bus reset */ 6501709Smlf #define AP_DEV_RESET 0x0100 /* device reset */ 6511709Smlf 6521709Smlf #define AP_SENT_CMD 0x0200 /* atapi: cdb sent */ 6531709Smlf #define AP_XFERRED_DATA 0x0400 /* atapi: data transferred */ 6541709Smlf #define AP_GOT_STATUS 0x0800 /* atapi: status received */ 6551709Smlf #define AP_ARQ_ON_ERROR 0x1000 /* atapi: do ARQ on error */ 6561709Smlf #define AP_ARQ_OKAY 0x2000 6571709Smlf #define AP_ARQ_ERROR 0x4000 6581709Smlf 6591709Smlf #define AP_FREE 0x80000000u /* packet is free! */ 6601709Smlf 6611709Smlf 6621709Smlf /* 6631709Smlf * public function prototypes 6641709Smlf */ 6651709Smlf 6661709Smlf int ata_check_drive_blacklist(struct ata_id *aidp, uint_t flags); 6671709Smlf int ata_command(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, int expect_drdy, 6681709Smlf int silent, uint_t busy_wait, uchar_t cmd, uchar_t feature, 6691709Smlf uchar_t count, uchar_t sector, uchar_t head, uchar_t cyl_low, 6701709Smlf uchar_t cyl_hi); 6711709Smlf int ata_get_status_clear_intr(ata_ctl_t *ata_ctlp, ata_pkt_t *ata_pktp); 6721709Smlf int ata_id_common(uchar_t id_cmd, int drdy_expected, 6731709Smlf ddi_acc_handle_t io_hdl1, caddr_t ioaddr1, 6741709Smlf ddi_acc_handle_t io_hdl2, caddr_t ioaddr2, 6751709Smlf struct ata_id *ata_idp); 6761709Smlf int ata_prop_create(dev_info_t *tgt_dip, ata_drv_t *ata_drvp, char *name); 6771709Smlf int ata_queue_cmd(int (*func)(ata_ctl_t *, ata_drv_t *, ata_pkt_t *), 6781709Smlf void *arg, ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 6791709Smlf gtgt_t *gtgtp); 6801709Smlf int ata_set_feature(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 6811709Smlf uchar_t feature, uchar_t value); 6821709Smlf int ata_wait(ddi_acc_handle_t io_hdl, caddr_t ioaddr, uchar_t onbits, 6831709Smlf uchar_t offbits, uint_t timeout_usec); 6841709Smlf int ata_wait3(ddi_acc_handle_t io_hdl, caddr_t ioaddr, uchar_t onbits1, 6851709Smlf uchar_t offbits1, uchar_t failure_onbits2, 6861709Smlf uchar_t failure_offbits2, uchar_t failure_onbits3, 6871709Smlf uchar_t failure_offbits3, uint_t timeout_usec); 6881709Smlf int ata_test_lba_support(struct ata_id *aidp); 6894852Smlf void ata_nsecwait(clock_t count); 6906412Syt160523 int ata_set_dma_mode(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp); 6918550SSeth.Goldberg@Sun.COM void ata_reset_dma_mode(ata_drv_t *ata_drvp); 692*10452SAda.Feng@Sun.COM void atapi_reset_dma_mode(ata_drv_t *ata_drvp, int need_wait); 6931709Smlf 6941709Smlf 6951709Smlf /* 6961709Smlf * PCIIDE DMA (Bus Mastering) functions and data in ata_dma.c 6971709Smlf */ 6981709Smlf extern ddi_dma_attr_t ata_pciide_dma_attr; 6991709Smlf extern int ata_dma_disabled; 7001709Smlf 7011709Smlf int ata_pciide_alloc(dev_info_t *dip, ata_ctl_t *ata_ctlp); 7021709Smlf void ata_pciide_free(ata_ctl_t *ata_ctlp); 7031709Smlf 7041709Smlf void ata_pciide_dma_sg_func(gcmd_t *gcmdp, ddi_dma_cookie_t *dmackp, 7051709Smlf int single_segment, int seg_index); 7061709Smlf void ata_pciide_dma_setup(ata_ctl_t *ata_ctlp, prde_t *srcp, int sg_cnt); 7071709Smlf void ata_pciide_dma_start(ata_ctl_t *ata_ctlp, uchar_t direction); 7081709Smlf void ata_pciide_dma_stop(ata_ctl_t *ata_ctlp); 7091709Smlf int ata_pciide_status_clear(ata_ctl_t *ata_ctlp); 7101709Smlf int ata_pciide_status_dmacheck_clear(ata_ctl_t *ata_ctlp); 7111709Smlf int ata_pciide_status_pending(ata_ctl_t *ata_ctlp); 7121709Smlf 7131709Smlf #ifdef __cplusplus 7141709Smlf } 7151709Smlf #endif 7161709Smlf 7171709Smlf #endif /* _ATA_COMMON_H */ 718