1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate #include <sys/param.h> 30*0Sstevel@tonic-gate #include <sys/types.h> 31*0Sstevel@tonic-gate #include <sys/disp.h> 32*0Sstevel@tonic-gate #include <sys/sysmacros.h> 33*0Sstevel@tonic-gate #include <sys/cpuvar.h> 34*0Sstevel@tonic-gate #include <sys/systm.h> 35*0Sstevel@tonic-gate #include <sys/thread.h> 36*0Sstevel@tonic-gate #include <sys/lwp.h> 37*0Sstevel@tonic-gate #include <sys/segments.h> 38*0Sstevel@tonic-gate #include <sys/privregs.h> 39*0Sstevel@tonic-gate #include <sys/cmn_err.h> 40*0Sstevel@tonic-gate 41*0Sstevel@tonic-gate int 42*0Sstevel@tonic-gate lwp_setprivate(klwp_t *lwp, int which, uintptr_t base) 43*0Sstevel@tonic-gate { 44*0Sstevel@tonic-gate pcb_t *pcb = &lwp->lwp_pcb; 45*0Sstevel@tonic-gate struct regs *rp = lwptoregs(lwp); 46*0Sstevel@tonic-gate kthread_t *t = lwptot(lwp); 47*0Sstevel@tonic-gate int thisthread = t == curthread; 48*0Sstevel@tonic-gate int rval; 49*0Sstevel@tonic-gate 50*0Sstevel@tonic-gate if (thisthread) 51*0Sstevel@tonic-gate kpreempt_disable(); 52*0Sstevel@tonic-gate 53*0Sstevel@tonic-gate #if defined(__amd64) 54*0Sstevel@tonic-gate 55*0Sstevel@tonic-gate /* 56*0Sstevel@tonic-gate * 32-bit compatibility processes point to the per-cpu GDT segment 57*0Sstevel@tonic-gate * descriptors that are virtualized to the lwp. That allows 32-bit 58*0Sstevel@tonic-gate * programs to mess with %fs and %gs; in particular it allows 59*0Sstevel@tonic-gate * things like this: 60*0Sstevel@tonic-gate * 61*0Sstevel@tonic-gate * movw %gs, %ax 62*0Sstevel@tonic-gate * ... 63*0Sstevel@tonic-gate * movw %ax, %gs 64*0Sstevel@tonic-gate * 65*0Sstevel@tonic-gate * to work, which is needed by emulators for legacy application 66*0Sstevel@tonic-gate * environments .. 67*0Sstevel@tonic-gate * 68*0Sstevel@tonic-gate * 64-bit processes also point to a per-cpu GDT segment descriptor 69*0Sstevel@tonic-gate * virtualized to the lwp. However the descriptor base is forced 70*0Sstevel@tonic-gate * to zero (because we can't express the full 64-bit address range 71*0Sstevel@tonic-gate * in a long mode descriptor), so don't reload segment registers 72*0Sstevel@tonic-gate * in a 64-bit program! 73*0Sstevel@tonic-gate */ 74*0Sstevel@tonic-gate 75*0Sstevel@tonic-gate if ((pcb->pcb_flags & RUPDATE_PENDING) == 0) { 76*0Sstevel@tonic-gate pcb->pcb_ds = rp->r_ds; 77*0Sstevel@tonic-gate pcb->pcb_es = rp->r_es; 78*0Sstevel@tonic-gate pcb->pcb_fs = rp->r_fs; 79*0Sstevel@tonic-gate pcb->pcb_gs = rp->r_gs; 80*0Sstevel@tonic-gate pcb->pcb_flags |= RUPDATE_PENDING; 81*0Sstevel@tonic-gate t->t_post_sys = 1; 82*0Sstevel@tonic-gate } 83*0Sstevel@tonic-gate ASSERT(t->t_post_sys); 84*0Sstevel@tonic-gate 85*0Sstevel@tonic-gate switch (which) { 86*0Sstevel@tonic-gate case _LWP_FSBASE: 87*0Sstevel@tonic-gate if (lwp_getdatamodel(lwp) == DATAMODEL_NATIVE) 88*0Sstevel@tonic-gate set_usegd(&pcb->pcb_fsdesc, SDP_LONG, 0, 0, 89*0Sstevel@tonic-gate SDT_MEMRWA, SEL_UPL, SDP_BYTES, SDP_OP32); 90*0Sstevel@tonic-gate else 91*0Sstevel@tonic-gate set_usegd(&pcb->pcb_fsdesc, SDP_SHORT, (void *)base, -1, 92*0Sstevel@tonic-gate SDT_MEMRWA, SEL_UPL, SDP_PAGES, SDP_OP32); 93*0Sstevel@tonic-gate if (thisthread) 94*0Sstevel@tonic-gate CPU->cpu_gdt[GDT_LWPFS] = pcb->pcb_fsdesc; 95*0Sstevel@tonic-gate pcb->pcb_fsbase = base; 96*0Sstevel@tonic-gate rval = pcb->pcb_fs = LWPFS_SEL; 97*0Sstevel@tonic-gate break; 98*0Sstevel@tonic-gate case _LWP_GSBASE: 99*0Sstevel@tonic-gate if (lwp_getdatamodel(lwp) == DATAMODEL_NATIVE) 100*0Sstevel@tonic-gate set_usegd(&pcb->pcb_gsdesc, SDP_LONG, 0, 0, 101*0Sstevel@tonic-gate SDT_MEMRWA, SEL_UPL, SDP_BYTES, SDP_OP32); 102*0Sstevel@tonic-gate else 103*0Sstevel@tonic-gate set_usegd(&pcb->pcb_gsdesc, SDP_SHORT, (void *)base, -1, 104*0Sstevel@tonic-gate SDT_MEMRWA, SEL_UPL, SDP_PAGES, SDP_OP32); 105*0Sstevel@tonic-gate if (thisthread) 106*0Sstevel@tonic-gate CPU->cpu_gdt[GDT_LWPGS] = pcb->pcb_gsdesc; 107*0Sstevel@tonic-gate pcb->pcb_gsbase = base; 108*0Sstevel@tonic-gate rval = pcb->pcb_gs = LWPGS_SEL; 109*0Sstevel@tonic-gate break; 110*0Sstevel@tonic-gate default: 111*0Sstevel@tonic-gate rval = -1; 112*0Sstevel@tonic-gate break; 113*0Sstevel@tonic-gate } 114*0Sstevel@tonic-gate 115*0Sstevel@tonic-gate #elif defined(__i386) 116*0Sstevel@tonic-gate 117*0Sstevel@tonic-gate /* 118*0Sstevel@tonic-gate * 32-bit compatibility processes point to the per-cpu GDT segment 119*0Sstevel@tonic-gate * descriptors that are virtualized to the lwp. 120*0Sstevel@tonic-gate */ 121*0Sstevel@tonic-gate 122*0Sstevel@tonic-gate switch (which) { 123*0Sstevel@tonic-gate case _LWP_FSBASE: 124*0Sstevel@tonic-gate set_usegd(&pcb->pcb_fsdesc, (void *)base, -1, 125*0Sstevel@tonic-gate SDT_MEMRWA, SEL_UPL, SDP_PAGES, SDP_OP32); 126*0Sstevel@tonic-gate if (thisthread) 127*0Sstevel@tonic-gate CPU->cpu_gdt[GDT_LWPFS] = pcb->pcb_fsdesc; 128*0Sstevel@tonic-gate rval = rp->r_fs = LWPFS_SEL; 129*0Sstevel@tonic-gate break; 130*0Sstevel@tonic-gate case _LWP_GSBASE: 131*0Sstevel@tonic-gate set_usegd(&pcb->pcb_gsdesc, (void *)base, -1, 132*0Sstevel@tonic-gate SDT_MEMRWA, SEL_UPL, SDP_PAGES, SDP_OP32); 133*0Sstevel@tonic-gate if (thisthread) 134*0Sstevel@tonic-gate CPU->cpu_gdt[GDT_LWPGS] = pcb->pcb_gsdesc; 135*0Sstevel@tonic-gate rval = rp->r_gs = LWPGS_SEL; 136*0Sstevel@tonic-gate break; 137*0Sstevel@tonic-gate default: 138*0Sstevel@tonic-gate rval = -1; 139*0Sstevel@tonic-gate break; 140*0Sstevel@tonic-gate } 141*0Sstevel@tonic-gate 142*0Sstevel@tonic-gate #endif /* __i386 */ 143*0Sstevel@tonic-gate 144*0Sstevel@tonic-gate if (thisthread) 145*0Sstevel@tonic-gate kpreempt_enable(); 146*0Sstevel@tonic-gate return (rval); 147*0Sstevel@tonic-gate } 148*0Sstevel@tonic-gate 149*0Sstevel@tonic-gate static int 150*0Sstevel@tonic-gate lwp_getprivate(klwp_t *lwp, int which, uintptr_t base) 151*0Sstevel@tonic-gate { 152*0Sstevel@tonic-gate pcb_t *pcb = &lwp->lwp_pcb; 153*0Sstevel@tonic-gate struct regs *rp = lwptoregs(lwp); 154*0Sstevel@tonic-gate uintptr_t sbase; 155*0Sstevel@tonic-gate int error = 0; 156*0Sstevel@tonic-gate 157*0Sstevel@tonic-gate ASSERT(lwptot(lwp) == curthread); 158*0Sstevel@tonic-gate 159*0Sstevel@tonic-gate kpreempt_disable(); 160*0Sstevel@tonic-gate switch (which) { 161*0Sstevel@tonic-gate #if defined(__amd64) 162*0Sstevel@tonic-gate 163*0Sstevel@tonic-gate case _LWP_FSBASE: 164*0Sstevel@tonic-gate if ((sbase = pcb->pcb_fsbase) != 0) { 165*0Sstevel@tonic-gate if (pcb->pcb_flags & RUPDATE_PENDING) { 166*0Sstevel@tonic-gate if (pcb->pcb_fs == LWPFS_SEL) 167*0Sstevel@tonic-gate break; 168*0Sstevel@tonic-gate } else { 169*0Sstevel@tonic-gate if (rp->r_fs == LWPFS_SEL) 170*0Sstevel@tonic-gate break; 171*0Sstevel@tonic-gate } 172*0Sstevel@tonic-gate } 173*0Sstevel@tonic-gate error = EINVAL; 174*0Sstevel@tonic-gate break; 175*0Sstevel@tonic-gate case _LWP_GSBASE: 176*0Sstevel@tonic-gate if ((sbase = pcb->pcb_gsbase) != 0) { 177*0Sstevel@tonic-gate if (pcb->pcb_flags & RUPDATE_PENDING) { 178*0Sstevel@tonic-gate if (pcb->pcb_gs == LWPGS_SEL) 179*0Sstevel@tonic-gate break; 180*0Sstevel@tonic-gate } else { 181*0Sstevel@tonic-gate if (rp->r_gs == LWPGS_SEL) 182*0Sstevel@tonic-gate break; 183*0Sstevel@tonic-gate } 184*0Sstevel@tonic-gate } 185*0Sstevel@tonic-gate error = EINVAL; 186*0Sstevel@tonic-gate break; 187*0Sstevel@tonic-gate 188*0Sstevel@tonic-gate #elif defined(__i386) 189*0Sstevel@tonic-gate 190*0Sstevel@tonic-gate case _LWP_FSBASE: 191*0Sstevel@tonic-gate if (rp->r_fs == LWPFS_SEL) { 192*0Sstevel@tonic-gate sbase = USEGD_GETBASE(&pcb->pcb_fsdesc); 193*0Sstevel@tonic-gate break; 194*0Sstevel@tonic-gate } 195*0Sstevel@tonic-gate error = EINVAL; 196*0Sstevel@tonic-gate break; 197*0Sstevel@tonic-gate case _LWP_GSBASE: 198*0Sstevel@tonic-gate if (rp->r_gs == LWPGS_SEL) { 199*0Sstevel@tonic-gate sbase = USEGD_GETBASE(&pcb->pcb_gsdesc); 200*0Sstevel@tonic-gate break; 201*0Sstevel@tonic-gate } 202*0Sstevel@tonic-gate error = EINVAL; 203*0Sstevel@tonic-gate break; 204*0Sstevel@tonic-gate 205*0Sstevel@tonic-gate #endif /* __i386 */ 206*0Sstevel@tonic-gate 207*0Sstevel@tonic-gate default: 208*0Sstevel@tonic-gate error = ENOTSUP; 209*0Sstevel@tonic-gate break; 210*0Sstevel@tonic-gate } 211*0Sstevel@tonic-gate kpreempt_enable(); 212*0Sstevel@tonic-gate 213*0Sstevel@tonic-gate if (error != 0) 214*0Sstevel@tonic-gate return (error); 215*0Sstevel@tonic-gate 216*0Sstevel@tonic-gate if (lwp_getdatamodel(lwp) == DATAMODEL_NATIVE) { 217*0Sstevel@tonic-gate if (sulword((void *)base, sbase) == -1) 218*0Sstevel@tonic-gate error = EFAULT; 219*0Sstevel@tonic-gate #if defined(_SYSCALL32_IMPL) 220*0Sstevel@tonic-gate } else { 221*0Sstevel@tonic-gate if (suword32((void *)base, (uint32_t)sbase) == -1) 222*0Sstevel@tonic-gate error = EFAULT; 223*0Sstevel@tonic-gate #endif 224*0Sstevel@tonic-gate } 225*0Sstevel@tonic-gate return (error); 226*0Sstevel@tonic-gate } 227*0Sstevel@tonic-gate 228*0Sstevel@tonic-gate /* 229*0Sstevel@tonic-gate * libc-private syscall for managing per-lwp %gs and %fs segment base values. 230*0Sstevel@tonic-gate */ 231*0Sstevel@tonic-gate int 232*0Sstevel@tonic-gate syslwp_private(int cmd, int which, uintptr_t base) 233*0Sstevel@tonic-gate { 234*0Sstevel@tonic-gate klwp_t *lwp = ttolwp(curthread); 235*0Sstevel@tonic-gate int res, error; 236*0Sstevel@tonic-gate 237*0Sstevel@tonic-gate switch (cmd) { 238*0Sstevel@tonic-gate case _LWP_SETPRIVATE: 239*0Sstevel@tonic-gate res = lwp_setprivate(lwp, which, base); 240*0Sstevel@tonic-gate return (res < 0 ? set_errno(ENOTSUP) : res); 241*0Sstevel@tonic-gate case _LWP_GETPRIVATE: 242*0Sstevel@tonic-gate error = lwp_getprivate(lwp, which, base); 243*0Sstevel@tonic-gate return (error != 0 ? set_errno(error) : error); 244*0Sstevel@tonic-gate default: 245*0Sstevel@tonic-gate return (set_errno(ENOTSUP)); 246*0Sstevel@tonic-gate } 247*0Sstevel@tonic-gate } 248