ia32/ml/exception.s

*0Sstevel@tonic-gate/*
*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
*0Sstevel@tonic-gate * Use is subject to license terms.
*0Sstevel@tonic-gate */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate/*
*0Sstevel@tonic-gate * Copyright (c) 1989, 1990 William F. Jolitz.
*0Sstevel@tonic-gate * Copyright (c) 1990 The Regents of the University of California.
*0Sstevel@tonic-gate * All rights reserved.
*0Sstevel@tonic-gate *
*0Sstevel@tonic-gate * Redistribution and use in source and binary forms, with or without
*0Sstevel@tonic-gate * modification, are permitted provided that the following conditions
*0Sstevel@tonic-gate * are met:
*0Sstevel@tonic-gate * 1. Redistributions of source code must retain the above copyright
*0Sstevel@tonic-gate *    notice, this list of conditions and the following disclaimer.
*0Sstevel@tonic-gate * 2. Redistributions in binary form must reproduce the above copyright
*0Sstevel@tonic-gate *    notice, this list of conditions and the following disclaimer in the
*0Sstevel@tonic-gate *    documentation and/or other materials provided with the distribution.
*0Sstevel@tonic-gate * 3. All advertising materials mentioning features or use of this software
*0Sstevel@tonic-gate *    must display the following acknowledgement:
*0Sstevel@tonic-gate *	This product includes software developed by the University of
*0Sstevel@tonic-gate *	California, Berkeley and its contributors.
*0Sstevel@tonic-gate * 4. Neither the name of the University nor the names of its contributors
*0Sstevel@tonic-gate *    may be used to endorse or promote products derived from this software
*0Sstevel@tonic-gate *    without specific prior written permission.
*0Sstevel@tonic-gate *
*0Sstevel@tonic-gate * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
*0Sstevel@tonic-gate * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
*0Sstevel@tonic-gate * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
*0Sstevel@tonic-gate * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
*0Sstevel@tonic-gate * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
*0Sstevel@tonic-gate * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
*0Sstevel@tonic-gate * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
*0Sstevel@tonic-gate * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
*0Sstevel@tonic-gate * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
*0Sstevel@tonic-gate * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
*0Sstevel@tonic-gate * SUCH DAMAGE.
*0Sstevel@tonic-gate *
*0Sstevel@tonic-gate * $FreeBSD: src/sys/amd64/amd64/exception.S,v 1.113 2003/10/15 02:04:52 peter Exp $
*0Sstevel@tonic-gate */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#pragma ident	"%Z%%M%	%I%	%E% SMI"
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#include <sys/asm_linkage.h>
*0Sstevel@tonic-gate#include <sys/asm_misc.h>
*0Sstevel@tonic-gate#include <sys/trap.h>
*0Sstevel@tonic-gate#include <sys/psw.h>
*0Sstevel@tonic-gate#include <sys/regset.h>
*0Sstevel@tonic-gate#include <sys/privregs.h>
*0Sstevel@tonic-gate#include <sys/dtrace.h>
*0Sstevel@tonic-gate#include <sys/traptrace.h>
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate/*
*0Sstevel@tonic-gate * only one routine in this file is interesting to lint
*0Sstevel@tonic-gate */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__lint)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gatevoid
*0Sstevel@tonic-gatendptrap_frstor(void)
*0Sstevel@tonic-gate{}
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#else
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#include "assym.h"
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate/*
*0Sstevel@tonic-gate * push $0 on stack for traps that do not
*0Sstevel@tonic-gate * generate an error code. This is so the rest
*0Sstevel@tonic-gate * of the kernel can expect a consistent stack
*0Sstevel@tonic-gate * from from any exception.
*0Sstevel@tonic-gate */
*0Sstevel@tonic-gate#define	TRAP_NOERR(trapno)	\
*0Sstevel@tonic-gate	push	$0;		\
*0Sstevel@tonic-gate	push	$trapno
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate/*
*0Sstevel@tonic-gate * error code already pushed by hw
*0Sstevel@tonic-gate * onto stack.
*0Sstevel@tonic-gate */
*0Sstevel@tonic-gate#define	TRAP_ERR(trapno)	\
*0Sstevel@tonic-gate	push	$trapno
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #DE
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(div0trap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_ZERODIV)	/* $0 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(div0trap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #DB
*0Sstevel@tonic-gate	 *
*0Sstevel@tonic-gate	 * If we get here as a result of single-stepping a sysenter
*0Sstevel@tonic-gate	 * instruction, we suddenly find ourselves taking a #db
*0Sstevel@tonic-gate	 * in kernel mode -before- we've swapgs'ed.  So before we can
*0Sstevel@tonic-gate	 * take the trap, we do the swapgs here, and fix the return
*0Sstevel@tonic-gate	 * %rip in trap() so that we return immediately after the
*0Sstevel@tonic-gate	 * swapgs in the sysenter handler to avoid doing the swapgs again.
*0Sstevel@tonic-gate	 *
*0Sstevel@tonic-gate	 * Nobody said that the design of sysenter was particularly
*0Sstevel@tonic-gate	 * elegant, did they?
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(dbgtrap)
*0Sstevel@tonic-gate	pushq	%r11
*0Sstevel@tonic-gate	leaq	sys_sysenter(%rip), %r11
*0Sstevel@tonic-gate	cmpq	%r11, 8(%rsp)
*0Sstevel@tonic-gate	jne	1f
*0Sstevel@tonic-gate	swapgs
*0Sstevel@tonic-gate1:	popq	%r11
*0Sstevel@tonic-gate	TRAP_NOERR(T_SGLSTP)	/* $1 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(dbgtrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #DB
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(dbgtrap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_SGLSTP)	/* $1 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(dbgtrap)
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate/*
*0Sstevel@tonic-gate * Macro to set the gsbase or kgsbase to the address of the struct cpu
*0Sstevel@tonic-gate * for this processor.  If we came from userland, set kgsbase else clear
*0Sstevel@tonic-gate * gs and set gsbase.  We find the proper cpu struct by looping through
*0Sstevel@tonic-gate * the cpu structs for all processors till we find a match for the gdt
*0Sstevel@tonic-gate * of the trapping processor.  The stack is expected to be pointing at
*0Sstevel@tonic-gate * The standard regs pushed by hardware on a trap (plus error code and trapno).
*0Sstevel@tonic-gate */
*0Sstevel@tonic-gate#define	SET_CPU_GSBASE							\
*0Sstevel@tonic-gate	subq	$REGOFF_TRAPNO, %rsp;	/* save regs */			\
*0Sstevel@tonic-gate	movq	%rax, REGOFF_RAX(%rsp);					\
*0Sstevel@tonic-gate	movq	%rbx, REGOFF_RBX(%rsp);					\
*0Sstevel@tonic-gate	movq	%rcx, REGOFF_RCX(%rsp);					\
*0Sstevel@tonic-gate	movq	%rdx, REGOFF_RDX(%rsp);					\
*0Sstevel@tonic-gate	movq	%rbp, REGOFF_RBP(%rsp);					\
*0Sstevel@tonic-gate	movq	%rsp, %rbp;						\
*0Sstevel@tonic-gate	subq	$16, %rsp;		/* space for gdt */		\
*0Sstevel@tonic-gate	sgdt	6(%rsp);						\
*0Sstevel@tonic-gate	movq	8(%rsp), %rcx;		/* %rcx has gdt to match */	\
*0Sstevel@tonic-gate	xorl	%ebx, %ebx;		/* loop index */		\
*0Sstevel@tonic-gate	leaq	cpu(%rip), %rdx;	/* cpu pointer array */		\
*0Sstevel@tonic-gate1:									\
*0Sstevel@tonic-gate	movq	(%rdx, %rbx, CLONGSIZE), %rax;	/* get cpu[i] */	\
*0Sstevel@tonic-gate	cmpq	$0x0, %rax;		/* cpu[i] == NULL ? */		\
*0Sstevel@tonic-gate	je	2f;			/* yes, continue */		\
*0Sstevel@tonic-gate	cmpq	%rcx, CPU_GDT(%rax);	/* gdt == cpu[i]->cpu_gdt ? */	\
*0Sstevel@tonic-gate	je	3f;			/* yes, go set gsbase */	\
*0Sstevel@tonic-gate2:									\
*0Sstevel@tonic-gate	incl	%ebx;			/* i++ */			\
*0Sstevel@tonic-gate	cmpl	$NCPU, %ebx;		/* i < NCPU ? */		\
*0Sstevel@tonic-gate	jb	1b;			/* yes, loop */			\
*0Sstevel@tonic-gate/* XXX BIG trouble if we fall thru here.  We didn't find a gdt match */	\
*0Sstevel@tonic-gate3:									\
*0Sstevel@tonic-gate	movl	$MSR_AMD_KGSBASE, %ecx;					\
*0Sstevel@tonic-gate	cmpw	$KCS_SEL, REGOFF_CS(%rbp); /* trap from kernel? */	\
*0Sstevel@tonic-gate	jne	4f;			/* no, go set KGSBASE */	\
*0Sstevel@tonic-gate	movl	$MSR_AMD_GSBASE, %ecx;	/* yes, set GSBASE */		\
*0Sstevel@tonic-gate        mfence;				/* OPTERON_ERRATUM_88 */	\
*0Sstevel@tonic-gate4:									\
*0Sstevel@tonic-gate	movq	%rax, %rdx;		/* write base register */	\
*0Sstevel@tonic-gate	shrq	$32, %rdx;						\
*0Sstevel@tonic-gate	wrmsr;								\
*0Sstevel@tonic-gate	movq	REGOFF_RDX(%rbp), %rdx;	/* restore regs */		\
*0Sstevel@tonic-gate	movq	REGOFF_RCX(%rbp), %rcx;					\
*0Sstevel@tonic-gate	movq	REGOFF_RBX(%rbp), %rbx;					\
*0Sstevel@tonic-gate	movq	REGOFF_RAX(%rbp), %rax;					\
*0Sstevel@tonic-gate	movq	%rbp, %rsp;						\
*0Sstevel@tonic-gate	movq	REGOFF_RBP(%rsp), %rbp;					\
*0Sstevel@tonic-gate	addq	$REGOFF_TRAPNO, %rsp	/* pop stack */
*0Sstevel@tonic-gate#endif	/* __amd64 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	.globl	nmivect
*0Sstevel@tonic-gate	.globl	idt0_default_r
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #NMI
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(nmiint)
*0Sstevel@tonic-gate	TRAP_NOERR(T_NMIFLT)	/* $2 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	SET_CPU_GSBASE
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Save all registers and setup segment registers
*0Sstevel@tonic-gate	 * with kernel selectors.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	INTR_PUSH
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	DISABLE_INTR_FLAGS		/* and set the kernel flags */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	TRACE_PTR(%r12, %rax, %eax, %rdx, $TT_TRAP)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	TRACE_REGS(%r12, %rsp, %rax, %rbx)
*0Sstevel@tonic-gate	TRACE_STAMP(%r12)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movq	%rsp, %rbp
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movq	%rbp, %rdi
*0Sstevel@tonic-gate	call	av_dispatch_nmivect
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	INTR_POP
*0Sstevel@tonic-gate	iretq
*0Sstevel@tonic-gate	SET_SIZE(nmiint)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #NMI
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(nmiint)
*0Sstevel@tonic-gate	TRAP_NOERR(T_NMIFLT)	/* $2 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Save all registers and setup segment registers
*0Sstevel@tonic-gate	 * with kernel selectors.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	INTR_PUSH
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * setup pointer to reg struct as 2nd argument.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movl	%esp, %ebp
*0Sstevel@tonic-gate	pushl	%ebp
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	DISABLE_INTR_FLAGS
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movl	nmivect, %esi		/* get autovect structure */
*0Sstevel@tonic-gateloop1:
*0Sstevel@tonic-gate	cmpl	$0, %esi		/* if pointer is null  */
*0Sstevel@tonic-gate	je	.intr_ret		/* 	we're done */
*0Sstevel@tonic-gate	movl	AV_VECTOR(%esi), %edx	/* get the interrupt routine */
*0Sstevel@tonic-gate	pushl	AV_INTARG1(%esi)	/* get argument to interrupt routine */
*0Sstevel@tonic-gate	call	*%edx			/* call interrupt routine with arg */
*0Sstevel@tonic-gate	addl	$4, %esp
*0Sstevel@tonic-gate	movl	AV_LINK(%esi), %esi	/* get next routine on list */
*0Sstevel@tonic-gate	jmp	loop1			/* keep looping until end of list */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate.intr_ret:
*0Sstevel@tonic-gate	addl	$4, %esp		/* 'pop' %ebp */
*0Sstevel@tonic-gate	INTR_POP_USER
*0Sstevel@tonic-gate	iret
*0Sstevel@tonic-gate	SET_SIZE(nmiint)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __i386 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #BP
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(brktrap)
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate	cmpw	$KCS_SEL, 8(%rsp)
*0Sstevel@tonic-gate	je	bp_jmpud
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	TRAP_NOERR(T_BPTFLT)	/* $3 */
*0Sstevel@tonic-gate	jmp	dtrace_trap
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gatebp_jmpud:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * This is a breakpoint in the kernel -- it is very likely that this
*0Sstevel@tonic-gate	 * is DTrace-induced.  To unify DTrace handling, we spoof this as an
*0Sstevel@tonic-gate	 * invalid opcode (#UD) fault.  Note that #BP is a trap, not a fault --
*0Sstevel@tonic-gate	 * we must decrement the trapping %rip to make it appear as a fault.
*0Sstevel@tonic-gate	 * We then push a non-zero error code to indicate that this is coming
*0Sstevel@tonic-gate	 * from #BP.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	decq	(%rsp)
*0Sstevel@tonic-gate	push	$1			/* error code -- non-zero for #BP */
*0Sstevel@tonic-gate	jmp	ud_kernel
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	SET_SIZE(brktrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #OF
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(ovflotrap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_OVFLW)	/* $4 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(ovflotrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #BR
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(boundstrap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_BOUNDFLT)	/* $5 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(boundstrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(invoptrap)
*0Sstevel@tonic-gate	cmpw	$KCS_SEL, 8(%rsp)
*0Sstevel@tonic-gate	jne	ud_user
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	push	$0			/* error code -- zero for #UD */
*0Sstevel@tonic-gateud_kernel:
*0Sstevel@tonic-gate	push	$0xdddd			/* a dummy trap number */
*0Sstevel@tonic-gate	TRAP_PUSH
*0Sstevel@tonic-gate	movq	REGOFF_RIP(%rsp), %rdi
*0Sstevel@tonic-gate	movq	REGOFF_RSP(%rsp), %rsi
*0Sstevel@tonic-gate	movq	REGOFF_RAX(%rsp), %rdx
*0Sstevel@tonic-gate	pushq	(%rsi)
*0Sstevel@tonic-gate	movq	%rsp, %rsi
*0Sstevel@tonic-gate	call	dtrace_invop
*0Sstevel@tonic-gate	ALTENTRY(dtrace_invop_callsite)
*0Sstevel@tonic-gate	addq	$8, %rsp
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_PUSHL_EBP, %eax
*0Sstevel@tonic-gate	je	ud_push
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_LEAVE, %eax
*0Sstevel@tonic-gate	je	ud_leave
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_NOP, %eax
*0Sstevel@tonic-gate	je	ud_nop
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_RET, %eax
*0Sstevel@tonic-gate	je	ud_ret
*0Sstevel@tonic-gate	jmp	ud_trap
*0Sstevel@tonic-gate
*0Sstevel@tonic-gateud_push:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "pushq %rbp".  To do this, we pull the stack
*0Sstevel@tonic-gate	 * down 8 bytes, and then store the base pointer.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	INTR_POP
*0Sstevel@tonic-gate	subq	$16, %rsp		/* make room for %rbp */
*0Sstevel@tonic-gate	pushq	%rax			/* push temp */
*0Sstevel@tonic-gate	movq	24(%rsp), %rax		/* load calling RIP */
*0Sstevel@tonic-gate	addq	$1, %rax		/* increment over trapping instr */
*0Sstevel@tonic-gate	movq	%rax, 8(%rsp)		/* store calling RIP */
*0Sstevel@tonic-gate	movq	32(%rsp), %rax		/* load calling CS */
*0Sstevel@tonic-gate	movq	%rax, 16(%rsp)		/* store calling CS */
*0Sstevel@tonic-gate	movq	40(%rsp), %rax		/* load calling RFLAGS */
*0Sstevel@tonic-gate	movq	%rax, 24(%rsp)		/* store calling RFLAGS */
*0Sstevel@tonic-gate	movq	48(%rsp), %rax		/* load calling RSP */
*0Sstevel@tonic-gate	subq	$8, %rax		/* make room for %rbp */
*0Sstevel@tonic-gate	movq	%rax, 32(%rsp)		/* store calling RSP */
*0Sstevel@tonic-gate	movq	56(%rsp), %rax		/* load calling SS */
*0Sstevel@tonic-gate	movq	%rax, 40(%rsp)		/* store calling SS */
*0Sstevel@tonic-gate	movq	32(%rsp), %rax		/* reload calling RSP */
*0Sstevel@tonic-gate	movq	%rbp, (%rax)		/* store %rbp there */
*0Sstevel@tonic-gate	popq	%rax			/* pop off temp */
*0Sstevel@tonic-gate	iretq				/* return from interrupt */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gateud_leave:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "leave", which is the same as a "movq %rbp, %rsp"
*0Sstevel@tonic-gate	 * followed by a "popq %rbp".  This is quite a bit simpler on amd64
*0Sstevel@tonic-gate	 * than it is on i386 -- we can exploit the fact that the %rsp is
*0Sstevel@tonic-gate	 * explicitly saved to effect the pop without having to reshuffle
*0Sstevel@tonic-gate	 * the other data pushed for the trap.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	INTR_POP
*0Sstevel@tonic-gate	pushq	%rax			/* push temp */
*0Sstevel@tonic-gate	movq	8(%rsp), %rax		/* load calling RIP */
*0Sstevel@tonic-gate	addq	$1, %rax		/* increment over trapping instr */
*0Sstevel@tonic-gate	movq	%rax, 8(%rsp)		/* store calling RIP */
*0Sstevel@tonic-gate	movq	(%rbp), %rax		/* get new %rbp */
*0Sstevel@tonic-gate	addq	$8, %rbp		/* adjust new %rsp */
*0Sstevel@tonic-gate	movq	%rbp, 32(%rsp)		/* store new %rsp */
*0Sstevel@tonic-gate	movq	%rax, %rbp		/* set new %rbp */
*0Sstevel@tonic-gate	popq	%rax			/* pop off temp */
*0Sstevel@tonic-gate	iretq				/* return from interrupt */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gateud_nop:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "nop".  This is obviously not hard:  we need only
*0Sstevel@tonic-gate	 * advance the %rip by one.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	INTR_POP
*0Sstevel@tonic-gate	incq	(%rsp)
*0Sstevel@tonic-gate	iretq
*0Sstevel@tonic-gate
*0Sstevel@tonic-gateud_ret:
*0Sstevel@tonic-gate	INTR_POP
*0Sstevel@tonic-gate	pushq	%rax			/* push temp */
*0Sstevel@tonic-gate	movq	32(%rsp), %rax		/* load %rsp */
*0Sstevel@tonic-gate	movq	(%rax), %rax		/* load calling RIP */
*0Sstevel@tonic-gate	movq	%rax, 8(%rsp)		/* store calling RIP */
*0Sstevel@tonic-gate	addq	$8, 32(%rsp)		/* adjust new %rsp */
*0Sstevel@tonic-gate	popq	%rax			/* pop off temp */
*0Sstevel@tonic-gate	iretq				/* return from interrupt */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gateud_trap:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We're going to let the kernel handle this as a normal #UD.  If,
*0Sstevel@tonic-gate	 * however, we came through #BP and are spoofing #UD (in this case,
*0Sstevel@tonic-gate	 * the stored error value will be non-zero), we need to de-spoof
*0Sstevel@tonic-gate	 * the trap by incrementing %rip and pushing T_BPTFLT.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	cmpq	$0, REGOFF_ERR(%rsp)
*0Sstevel@tonic-gate	je	ud_ud
*0Sstevel@tonic-gate	incq	REGOFF_RIP(%rsp)
*0Sstevel@tonic-gate	addq	$REGOFF_RIP, %rsp
*0Sstevel@tonic-gate	TRAP_NOERR(T_BPTFLT)	/* $3 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate
*0Sstevel@tonic-gateud_ud:
*0Sstevel@tonic-gate	addq	$REGOFF_RIP, %rsp
*0Sstevel@tonic-gateud_user:
*0Sstevel@tonic-gate	TRAP_NOERR(T_ILLINST)
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(invoptrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #UD
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(invoptrap)
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * If we are taking an invalid opcode trap while in the kernel, this
*0Sstevel@tonic-gate	 * is likely an FBT probe point.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	pushl   %gs
*0Sstevel@tonic-gate	cmpw	$KGS_SEL, (%esp)
*0Sstevel@tonic-gate	jne	8f
*0Sstevel@tonic-gate	addl	$4, %esp
*0Sstevel@tonic-gate	pusha
*0Sstevel@tonic-gate	pushl	%eax			/* push %eax -- may be return value */
*0Sstevel@tonic-gate	pushl	%esp			/* push stack pointer */
*0Sstevel@tonic-gate	addl	$48, (%esp)		/* adjust to incoming args */
*0Sstevel@tonic-gate	pushl	40(%esp)		/* push calling EIP */
*0Sstevel@tonic-gate	call	dtrace_invop
*0Sstevel@tonic-gate	ALTENTRY(dtrace_invop_callsite)
*0Sstevel@tonic-gate	addl	$12, %esp
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_PUSHL_EBP, %eax
*0Sstevel@tonic-gate	je	1f
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_POPL_EBP, %eax
*0Sstevel@tonic-gate	je	2f
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_LEAVE, %eax
*0Sstevel@tonic-gate	je	3f
*0Sstevel@tonic-gate	cmpl	$DTRACE_INVOP_NOP, %eax
*0Sstevel@tonic-gate	je	4f
*0Sstevel@tonic-gate	jmp	7f
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate1:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "pushl %ebp".  To do this, we pull the stack
*0Sstevel@tonic-gate	 * down 4 bytes, and then store the base pointer.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	popa
*0Sstevel@tonic-gate	subl	$4, %esp		/* make room for %ebp */
*0Sstevel@tonic-gate	pushl	%eax			/* push temp */
*0Sstevel@tonic-gate	movl	8(%esp), %eax		/* load calling EIP */
*0Sstevel@tonic-gate	incl	%eax			/* increment over LOCK prefix */
*0Sstevel@tonic-gate	movl	%eax, 4(%esp)		/* store calling EIP */
*0Sstevel@tonic-gate	movl	12(%esp), %eax		/* load calling CS */
*0Sstevel@tonic-gate	movl	%eax, 8(%esp)		/* store calling CS */
*0Sstevel@tonic-gate	movl	16(%esp), %eax		/* load calling EFLAGS */
*0Sstevel@tonic-gate	movl	%eax, 12(%esp)		/* store calling EFLAGS */
*0Sstevel@tonic-gate	movl	%ebp, 16(%esp)		/* push %ebp */
*0Sstevel@tonic-gate	popl	%eax			/* pop off temp */
*0Sstevel@tonic-gate	iret				/* return from interrupt */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate2:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "popl %ebp".  To do this, we do the opposite of
*0Sstevel@tonic-gate	 * the above:  we remove the %ebp from the stack, and squeeze up the
*0Sstevel@tonic-gate	 * saved state from the trap.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	popa
*0Sstevel@tonic-gate	pushl	%eax			/* push temp */
*0Sstevel@tonic-gate	movl	16(%esp), %ebp		/* pop %ebp */
*0Sstevel@tonic-gate	movl	12(%esp), %eax		/* load calling EFLAGS */
*0Sstevel@tonic-gate	movl	%eax, 16(%esp)		/* store calling EFLAGS */
*0Sstevel@tonic-gate	movl	8(%esp), %eax		/* load calling CS */
*0Sstevel@tonic-gate	movl	%eax, 12(%esp)		/* store calling CS */
*0Sstevel@tonic-gate	movl	4(%esp), %eax		/* load calling EIP */
*0Sstevel@tonic-gate	incl	%eax			/* increment over LOCK prefix */
*0Sstevel@tonic-gate	movl	%eax, 8(%esp)		/* store calling EIP */
*0Sstevel@tonic-gate	popl	%eax			/* pop off temp */
*0Sstevel@tonic-gate	addl	$4, %esp		/* adjust stack pointer */
*0Sstevel@tonic-gate	iret				/* return from interrupt */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate3:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "leave", which is the same as a "movl %ebp, %esp"
*0Sstevel@tonic-gate	 * followed by a "popl %ebp".  This looks similar to the above, but
*0Sstevel@tonic-gate	 * requires two temporaries:  one for the new base pointer, and one
*0Sstevel@tonic-gate	 * for the staging register.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	popa
*0Sstevel@tonic-gate	pushl	%eax			/* push temp */
*0Sstevel@tonic-gate	pushl	%ebx			/* push temp */
*0Sstevel@tonic-gate	movl	%ebp, %ebx		/* set temp to old %ebp */
*0Sstevel@tonic-gate	movl	(%ebx), %ebp		/* pop %ebp */
*0Sstevel@tonic-gate	movl	16(%esp), %eax		/* load calling EFLAGS */
*0Sstevel@tonic-gate	movl	%eax, (%ebx)		/* store calling EFLAGS */
*0Sstevel@tonic-gate	movl	12(%esp), %eax		/* load calling CS */
*0Sstevel@tonic-gate	movl	%eax, -4(%ebx)		/* store calling CS */
*0Sstevel@tonic-gate	movl	8(%esp), %eax		/* load calling EIP */
*0Sstevel@tonic-gate	incl	%eax			/* increment over LOCK prefix */
*0Sstevel@tonic-gate	movl	%eax, -8(%ebx)		/* store calling EIP */
*0Sstevel@tonic-gate	movl	%ebx, -4(%esp)		/* temporarily store new %esp */
*0Sstevel@tonic-gate	popl	%ebx			/* pop off temp */
*0Sstevel@tonic-gate	popl	%eax			/* pop off temp */
*0Sstevel@tonic-gate	movl	-12(%esp), %esp		/* set stack pointer */
*0Sstevel@tonic-gate	subl	$8, %esp		/* adjust for three pushes, one pop */
*0Sstevel@tonic-gate	iret				/* return from interrupt */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate4:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We must emulate a "nop".  This is obviously not hard:  we need only
*0Sstevel@tonic-gate	 * advance the %eip by one.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	popa
*0Sstevel@tonic-gate	incl	(%esp)
*0Sstevel@tonic-gate	iret
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate7:
*0Sstevel@tonic-gate	popa
*0Sstevel@tonic-gate	pushl	$0
*0Sstevel@tonic-gate	pushl	$T_ILLINST	/* $6 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate8:
*0Sstevel@tonic-gate	addl	$4, %esp
*0Sstevel@tonic-gate	pushl	$0
*0Sstevel@tonic-gate	pushl	$T_ILLINST	/* $6 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(invoptrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __i386 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #NM
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(ndptrap)
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We want to do this quickly as every lwp using fp will take this
*0Sstevel@tonic-gate	 * after a context switch -- we do the frequent path in ndptrap_frstor
*0Sstevel@tonic-gate	 * below; for all other cases, we let the trap code handle it
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	pushq	%rax
*0Sstevel@tonic-gate	pushq	%rbx
*0Sstevel@tonic-gate	cmpw    $KCS_SEL, 24(%rsp)	/* did we come from kernel mode? */
*0Sstevel@tonic-gate	jne     1f
*0Sstevel@tonic-gate	LOADCPU(%rbx)			/* if yes, don't swapgs */
*0Sstevel@tonic-gate	jmp	2f
*0Sstevel@tonic-gate1:
*0Sstevel@tonic-gate	swapgs				/* if from user, need swapgs */
*0Sstevel@tonic-gate	LOADCPU(%rbx)
*0Sstevel@tonic-gate	swapgs
*0Sstevel@tonic-gate2:
*0Sstevel@tonic-gate	cmpl	$0, fpu_exists(%rip)
*0Sstevel@tonic-gate	je	.handle_in_trap		/* let trap handle no fp case */
*0Sstevel@tonic-gate	movq	CPU_THREAD(%rbx), %rax	/* %rax = curthread */
*0Sstevel@tonic-gate	movl	$FPU_EN, %ebx
*0Sstevel@tonic-gate	movq	T_LWP(%rax), %rax	/* %rax = lwp */
*0Sstevel@tonic-gate	testq	%rax, %rax
*0Sstevel@tonic-gate	jz	.handle_in_trap		/* should not happen? */
*0Sstevel@tonic-gate#if LWP_PCB_FPU	!= 0
*0Sstevel@tonic-gate	addq	$LWP_PCB_FPU, %rax	/* &lwp->lwp_pcb.pcb_fpu */
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate	testl	%ebx, PCB_FPU_FLAGS(%rax)
*0Sstevel@tonic-gate	jz	.handle_in_trap		/* must be the first fault */
*0Sstevel@tonic-gate	clts
*0Sstevel@tonic-gate	andl	$_BITNOT(FPU_VALID), PCB_FPU_FLAGS(%rax)
*0Sstevel@tonic-gate#if FPU_CTX_FPU_REGS != 0
*0Sstevel@tonic-gate	addq	$FPU_CTX_FPU_REGS, %rax
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * the label below is used in trap.c to detect FP faults in
*0Sstevel@tonic-gate	 * kernel due to user fault.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ALTENTRY(ndptrap_frstor)
*0Sstevel@tonic-gate	fxrstor	(%rax)
*0Sstevel@tonic-gate	popq	%rbx
*0Sstevel@tonic-gate	popq	%rax
*0Sstevel@tonic-gate	iretq
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate.handle_in_trap:
*0Sstevel@tonic-gate	popq	%rbx
*0Sstevel@tonic-gate	popq	%rax
*0Sstevel@tonic-gate	TRAP_NOERR(T_NOEXTFLT)	/* $7 */
*0Sstevel@tonic-gate	jmp	cmninttrap
*0Sstevel@tonic-gate	SET_SIZE(ndptrap_frstor)
*0Sstevel@tonic-gate	SET_SIZE(ndptrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(ndptrap)
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We want to do this quickly as every lwp using fp will take this
*0Sstevel@tonic-gate	 * after a context switch -- we do the frequent path in fpnoextflt
*0Sstevel@tonic-gate	 * below; for all other cases, we let the trap code handle it
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	pushl	%eax
*0Sstevel@tonic-gate	pushl	%ebx
*0Sstevel@tonic-gate	pushl	%ds
*0Sstevel@tonic-gate	pushl	%gs
*0Sstevel@tonic-gate	movl	$KDS_SEL, %ebx
*0Sstevel@tonic-gate	movw	%bx, %ds
*0Sstevel@tonic-gate	movl	$KGS_SEL, %eax
*0Sstevel@tonic-gate	movw	%ax, %gs
*0Sstevel@tonic-gate	LOADCPU(%ebx)
*0Sstevel@tonic-gate	cmpl	$0, fpu_exists
*0Sstevel@tonic-gate	je	.handle_in_trap		/* let trap handle no fp case */
*0Sstevel@tonic-gate	movl	CPU_THREAD(%ebx), %eax	/* %eax = curthread */
*0Sstevel@tonic-gate	movl	$FPU_EN, %ebx
*0Sstevel@tonic-gate	movl	T_LWP(%eax), %eax	/* %eax = lwp */
*0Sstevel@tonic-gate	testl	%eax, %eax
*0Sstevel@tonic-gate	jz	.handle_in_trap		/* should not happen? */
*0Sstevel@tonic-gate#if LWP_PCB_FPU != 0
*0Sstevel@tonic-gate	addl	$LWP_PCB_FPU, %eax 	/* &lwp->lwp_pcb.pcb_fpu */
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate	testl	%ebx, PCB_FPU_FLAGS(%eax)
*0Sstevel@tonic-gate	jz	.handle_in_trap		/* must be the first fault */
*0Sstevel@tonic-gate	clts
*0Sstevel@tonic-gate	andl	$_BITNOT(FPU_VALID), PCB_FPU_FLAGS(%eax)
*0Sstevel@tonic-gate#if FPU_CTX_FPU_REGS != 0
*0Sstevel@tonic-gate	addl	$FPU_CTX_FPU_REGS, %eax
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * the label below is used in trap.c to detect FP faults in kernel
*0Sstevel@tonic-gate	 * due to user fault.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ALTENTRY(ndptrap_frstor)
*0Sstevel@tonic-gate	.globl	_patch_fxrstor_eax
*0Sstevel@tonic-gate_patch_fxrstor_eax:
*0Sstevel@tonic-gate	frstor	(%eax)		/* may be patched to fxrstor */
*0Sstevel@tonic-gate	nop			/* (including this byte) */
*0Sstevel@tonic-gate	popl	%gs
*0Sstevel@tonic-gate	popl	%ds
*0Sstevel@tonic-gate	popl	%ebx
*0Sstevel@tonic-gate	popl	%eax
*0Sstevel@tonic-gate	iret
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate.handle_in_trap:
*0Sstevel@tonic-gate	popl	%gs
*0Sstevel@tonic-gate	popl	%ds
*0Sstevel@tonic-gate	popl	%ebx
*0Sstevel@tonic-gate	popl	%eax
*0Sstevel@tonic-gate	pushl	$0
*0Sstevel@tonic-gate	pushl	$T_NOEXTFLT	/* $7 */
*0Sstevel@tonic-gate	jmp	cmninttrap
*0Sstevel@tonic-gate	SET_SIZE(ndptrap_frstor)
*0Sstevel@tonic-gate	SET_SIZE(ndptrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __i386 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #DF
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(syserrtrap)
*0Sstevel@tonic-gate	pushq	$T_DBLFLT
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	SET_CPU_GSBASE
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We share this handler with kmdb (if kmdb is loaded).  As such, we may
*0Sstevel@tonic-gate	 * have reached this point after encountering a #df in kmdb.  If that
*0Sstevel@tonic-gate	 * happens, we'll still be on kmdb's IDT.  We need to switch back to this
*0Sstevel@tonic-gate	 * CPU's IDT before proceeding.  Furthermore, if we did arrive here from
*0Sstevel@tonic-gate	 * kmdb, kmdb is probably in a very sickly state, and shouldn't be
*0Sstevel@tonic-gate	 * entered from the panic flow.  We'll suppress that entry by setting
*0Sstevel@tonic-gate	 * nopanicdebug.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	pushq	%rax
*0Sstevel@tonic-gate	subq	$DESCTBR_SIZE, %rsp
*0Sstevel@tonic-gate	sidt	(%rsp)
*0Sstevel@tonic-gate	movq	%gs:CPU_IDT, %rax
*0Sstevel@tonic-gate	cmpq	%rax, DTR_BASE(%rsp)
*0Sstevel@tonic-gate	je	1f
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movq	%rax, DTR_BASE(%rsp)
*0Sstevel@tonic-gate	movw	$_MUL(NIDT, GATE_DESC_SIZE), DTR_LIMIT(%rsp)
*0Sstevel@tonic-gate	lidt	(%rsp)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movl	$1, nopanicdebug
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate1:	addq	$DESCTBR_SIZE, %rsp
*0Sstevel@tonic-gate	popq	%rax
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	DFTRAP_PUSH
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * freeze trap trace.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate#ifdef TRAPTRACE
*0Sstevel@tonic-gate	leaq	trap_trace_freeze(%rip), %r11
*0Sstevel@tonic-gate	incl	(%r11)
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENABLE_INTR_FLAGS
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movq	%rsp, %rdi	/* &regs */
*0Sstevel@tonic-gate	xorl	%esi, %esi	/* clear address */
*0Sstevel@tonic-gate	xorl	%edx, %edx	/* cpuid = 0 */
*0Sstevel@tonic-gate	call	trap
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	SET_SIZE(syserrtrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #DF
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(syserrtrap)
*0Sstevel@tonic-gate	cli				/* disable interrupts */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We share this handler with kmdb (if kmdb is loaded).  As such, we may
*0Sstevel@tonic-gate	 * have reached this point after encountering a #df in kmdb.  If that
*0Sstevel@tonic-gate	 * happens, we'll still be on kmdb's IDT.  We need to switch back to this
*0Sstevel@tonic-gate	 * CPU's IDT before proceeding.  Furthermore, if we did arrive here from
*0Sstevel@tonic-gate	 * kmdb, kmdb is probably in a very sickly state, and shouldn't be
*0Sstevel@tonic-gate	 * entered from the panic flow.  We'll suppress that entry by setting
*0Sstevel@tonic-gate	 * nopanicdebug.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	subl	$DESCTBR_SIZE, %esp
*0Sstevel@tonic-gate	movl	%gs:CPU_IDT, %eax
*0Sstevel@tonic-gate	sidt	(%esp)
*0Sstevel@tonic-gate	cmpl	DTR_BASE(%esp), %eax
*0Sstevel@tonic-gate	je	1f
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movl	%eax, DTR_BASE(%esp)
*0Sstevel@tonic-gate	movw	$_MUL(NIDT, GATE_DESC_SIZE), DTR_LIMIT(%esp)
*0Sstevel@tonic-gate	lidt	(%esp)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	movl	$1, nopanicdebug
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate1:	addl	$DESCTBR_SIZE, %esp
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Check the CPL in the TSS to see what mode
*0Sstevel@tonic-gate	 * (user or kernel) we took the fault in.  At this
*0Sstevel@tonic-gate	 * point we are running in the context of the double
*0Sstevel@tonic-gate	 * fault task (dftss) but the CPU's task points to
*0Sstevel@tonic-gate	 * the previous task (ktss) where the process context
*0Sstevel@tonic-gate	 * has been saved as the result of the task switch.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movl	%gs:CPU_TSS, %eax	/* get the TSS */
*0Sstevel@tonic-gate	movl	TSS_SS(%eax), %ebx	/* save the fault SS */
*0Sstevel@tonic-gate	movl	TSS_ESP(%eax), %edx	/* save the fault ESP */
*0Sstevel@tonic-gate	testw	$CPL_MASK, TSS_CS(%eax)	/* user mode ? */
*0Sstevel@tonic-gate	jz	make_frame
*0Sstevel@tonic-gate	movw	TSS_SS0(%eax), %ss	/* get on the kernel stack */
*0Sstevel@tonic-gate	movl	TSS_ESP0(%eax), %esp
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Clear the NT flag to avoid a task switch when the process
*0Sstevel@tonic-gate	 * finally pops the EFL off the stack via an iret.  Clear
*0Sstevel@tonic-gate	 * the TF flag since that is what the processor does for
*0Sstevel@tonic-gate	 * a normal exception. Clear the IE flag so that interrupts
*0Sstevel@tonic-gate	 * remain disabled.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movl	TSS_EFL(%eax), %ecx
*0Sstevel@tonic-gate	andl	$_BITNOT(PS_NT|PS_T|PS_IE), %ecx
*0Sstevel@tonic-gate	pushl	%ecx
*0Sstevel@tonic-gate	popfl				/* restore the EFL */
*0Sstevel@tonic-gate	movw	TSS_LDT(%eax), %cx	/* restore the LDT */
*0Sstevel@tonic-gate	lldt	%cx
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Restore process segment selectors.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movw	TSS_DS(%eax), %ds
*0Sstevel@tonic-gate	movw	TSS_ES(%eax), %es
*0Sstevel@tonic-gate	movw	TSS_FS(%eax), %fs
*0Sstevel@tonic-gate	movw	TSS_GS(%eax), %gs
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Restore task segment selectors.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movl	$KDS_SEL, TSS_DS(%eax)
*0Sstevel@tonic-gate	movl	$KDS_SEL, TSS_ES(%eax)
*0Sstevel@tonic-gate	movl	$KDS_SEL, TSS_SS(%eax)
*0Sstevel@tonic-gate	movl	$KFS_SEL, TSS_FS(%eax)
*0Sstevel@tonic-gate	movl	$KGS_SEL, TSS_GS(%eax)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Clear the TS bit, the busy bits in both task
*0Sstevel@tonic-gate	 * descriptors, and switch tasks.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	clts
*0Sstevel@tonic-gate	leal	gdt0, %ecx
*0Sstevel@tonic-gate	movl	DFTSS_SEL+4(%ecx), %esi
*0Sstevel@tonic-gate	andl	$_BITNOT(0x200), %esi
*0Sstevel@tonic-gate	movl	%esi, DFTSS_SEL+4(%ecx)
*0Sstevel@tonic-gate	movl	KTSS_SEL+4(%ecx), %esi
*0Sstevel@tonic-gate	andl	$_BITNOT(0x200), %esi
*0Sstevel@tonic-gate	movl	%esi, KTSS_SEL+4(%ecx)
*0Sstevel@tonic-gate	movw	$KTSS_SEL, %cx
*0Sstevel@tonic-gate	ltr	%cx
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Restore part of the process registers.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movl	TSS_EBP(%eax), %ebp
*0Sstevel@tonic-gate	movl	TSS_ECX(%eax), %ecx
*0Sstevel@tonic-gate	movl	TSS_ESI(%eax), %esi
*0Sstevel@tonic-gate	movl	TSS_EDI(%eax), %edi
*0Sstevel@tonic-gate
*0Sstevel@tonic-gatemake_frame:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Make a trap frame.  Leave the error code (0) on
*0Sstevel@tonic-gate	 * the stack since the first word on a trap stack is
*0Sstevel@tonic-gate	 * unused anyway.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	pushl	%ebx			/ fault SS
*0Sstevel@tonic-gate	pushl	%edx			/ fault ESP
*0Sstevel@tonic-gate	pushl	TSS_EFL(%eax)		/ fault EFL
*0Sstevel@tonic-gate	pushl	TSS_CS(%eax)		/ fault CS
*0Sstevel@tonic-gate	pushl	TSS_EIP(%eax)		/ fault EIP
*0Sstevel@tonic-gate	pushl	$0			/ error code
*0Sstevel@tonic-gate	pushl	$T_DBLFLT		/ trap number 8
*0Sstevel@tonic-gate	movl	TSS_EBX(%eax), %ebx	/ restore EBX
*0Sstevel@tonic-gate	movl	TSS_EDX(%eax), %edx	/ restore EDX
*0Sstevel@tonic-gate	movl	TSS_EAX(%eax), %eax	/ restore EAX
*0Sstevel@tonic-gate	sti				/ enable interrupts
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(syserrtrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __i386 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(overrun)
*0Sstevel@tonic-gate	push	$0
*0Sstevel@tonic-gate	TRAP_NOERR(T_EXTOVRFLT)	/* $9 i386 only - not generated */
*0Sstevel@tonic-gate	jmp	cmninttrap
*0Sstevel@tonic-gate	SET_SIZE(overrun)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #TS
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(invtsstrap)
*0Sstevel@tonic-gate	TRAP_ERR(T_TSSFLT)	/* $10 already have error code on stack */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(invtsstrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #NP
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(segnptrap)
*0Sstevel@tonic-gate	TRAP_ERR(T_SEGFLT)	/* $11 already have error code on stack */
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate	SET_CPU_GSBASE
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(segnptrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #SS
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(stktrap)
*0Sstevel@tonic-gate	TRAP_ERR(T_STKFLT)	/* $12 already have error code on stack */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(stktrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #GP
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(gptrap)
*0Sstevel@tonic-gate	TRAP_ERR(T_GPFLT)	/* $13 already have error code on stack */
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate	SET_CPU_GSBASE
*0Sstevel@tonic-gate#endif
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(gptrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #PF
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(pftrap)
*0Sstevel@tonic-gate	TRAP_ERR(T_PGFLT)	/* $14 already have error code on stack */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(pftrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if !defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #PF pentium bug workaround
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(pentium_pftrap)
*0Sstevel@tonic-gate	pushl	%eax
*0Sstevel@tonic-gate	movl	%cr2, %eax
*0Sstevel@tonic-gate	andl	$MMU_STD_PAGEMASK, %eax
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	cmpl	%eax, %cs:idt0_default_r+2	/* fixme */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	je	check_for_user_address
*0Sstevel@tonic-gateuser_mode:
*0Sstevel@tonic-gate	popl	%eax
*0Sstevel@tonic-gate	pushl	$T_PGFLT	/* $14 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gatecheck_for_user_address:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Before we assume that we have an unmapped trap on our hands,
*0Sstevel@tonic-gate	 * check to see if this is a fault from user mode.  If it is,
*0Sstevel@tonic-gate	 * we'll kick back into the page fault handler.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	movl	4(%esp), %eax	/* error code */
*0Sstevel@tonic-gate	andl	$PF_ERR_USER, %eax
*0Sstevel@tonic-gate	jnz	user_mode
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * We now know that this is the invalid opcode trap.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	popl	%eax
*0Sstevel@tonic-gate	addl	$4, %esp	/* pop error code */
*0Sstevel@tonic-gate	jmp	invoptrap
*0Sstevel@tonic-gate	SET_SIZE(pentium_pftrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* !__amd64 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(resvtrap)
*0Sstevel@tonic-gate	TRAP_NOERR(15)		/* (reserved)  */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(resvtrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #MF
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(ndperr)
*0Sstevel@tonic-gate	TRAP_NOERR(T_EXTERRFLT)	/* $16 */
*0Sstevel@tonic-gate	jmp	cmninttrap
*0Sstevel@tonic-gate	SET_SIZE(ndperr)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #AC
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(achktrap)
*0Sstevel@tonic-gate	TRAP_ERR(T_ALIGNMENT)	/* $17 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(achktrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #MC
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(mcetrap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_MCE)	/* $18 */
*0Sstevel@tonic-gate	jmp	cmninttrap
*0Sstevel@tonic-gate	SET_SIZE(mcetrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * #XF
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(xmtrap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_SIMDFPE)	/* $19 */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(xmtrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(invaltrap)
*0Sstevel@tonic-gate	TRAP_NOERR(30)		/* very invalid */
*0Sstevel@tonic-gate	jmp	cmntrap
*0Sstevel@tonic-gate	SET_SIZE(invaltrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(invalint)
*0Sstevel@tonic-gate	TRAP_NOERR(31)		/* even more so */
*0Sstevel@tonic-gate	jmp	cmnint
*0Sstevel@tonic-gate	SET_SIZE(invalint)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	.globl	fasttable
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(fasttrap)
*0Sstevel@tonic-gate	cmpl	$T_LASTFAST, %eax
*0Sstevel@tonic-gate	ja	1f
*0Sstevel@tonic-gate	orl	%eax, %eax	/* (zero extend top 32-bits) */
*0Sstevel@tonic-gate	leaq	fasttable(%rip), %r11
*0Sstevel@tonic-gate	leaq	(%r11, %rax, CLONGSIZE), %r11
*0Sstevel@tonic-gate	jmp	*(%r11)
*0Sstevel@tonic-gate1:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Fast syscall number was illegal.  Make it look
*0Sstevel@tonic-gate	 * as if the INT failed.  Modify %rip to point before the
*0Sstevel@tonic-gate	 * INT, push the expected error code and fake a GP fault.
*0Sstevel@tonic-gate	 *
*0Sstevel@tonic-gate	 * XXX Why make the error code be offset into idt + 1?
*0Sstevel@tonic-gate	 * Instead we should push a real (soft?) error code
*0Sstevel@tonic-gate	 * on the stack and #gp handler could know about fasttraps?
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	subq	$2, (%rsp)	/* XXX int insn 2-bytes */
*0Sstevel@tonic-gate	pushq	$_CONST(_MUL(T_FASTTRAP, GATE_DESC_SIZE) + 2)
*0Sstevel@tonic-gate	jmp	gptrap
*0Sstevel@tonic-gate	SET_SIZE(fasttrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(fasttrap)
*0Sstevel@tonic-gate	cmpl	$T_LASTFAST, %eax
*0Sstevel@tonic-gate	ja	1f
*0Sstevel@tonic-gate	jmp	*%cs:fasttable(, %eax, CLONGSIZE)
*0Sstevel@tonic-gate1:
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Fast syscall number was illegal.  Make it look
*0Sstevel@tonic-gate	 * as if the INT failed.  Modify %eip to point before the
*0Sstevel@tonic-gate	 * INT, push the expected error code and fake a GP fault.
*0Sstevel@tonic-gate	 *
*0Sstevel@tonic-gate	 * XXX Why make the error code be offset into idt + 1?
*0Sstevel@tonic-gate	 * Instead we should push a real (soft?) error code
*0Sstevel@tonic-gate	 * on the stack and #gp handler could know about fasttraps?
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	subl	$2, (%esp)	/* XXX int insn 2-bytes */
*0Sstevel@tonic-gate	pushl	$_CONST(_MUL(T_FASTTRAP, GATE_DESC_SIZE) + 2)
*0Sstevel@tonic-gate	jmp	gptrap
*0Sstevel@tonic-gate	SET_SIZE(fasttrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __i386 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(dtrace_fasttrap)
*0Sstevel@tonic-gate	TRAP_NOERR(T_DTRACE_PROBE)
*0Sstevel@tonic-gate	jmp	dtrace_trap
*0Sstevel@tonic-gate	SET_SIZE(dtrace_fasttrap)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(dtrace_ret)
*0Sstevel@tonic-gate	TRAP_NOERR(T_DTRACE_RET)
*0Sstevel@tonic-gate	jmp	dtrace_trap
*0Sstevel@tonic-gate	SET_SIZE(dtrace_ret)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#if defined(__amd64)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * RFLAGS 24 bytes up the stack from %rsp.
*0Sstevel@tonic-gate	 * XXX a constant would be nicer.
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate	ENTRY_NP(fast_null)
*0Sstevel@tonic-gate	orq	$PS_C, 24(%rsp)	/* set carry bit in user flags */
*0Sstevel@tonic-gate	iretq
*0Sstevel@tonic-gate	SET_SIZE(fast_null)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#elif defined(__i386)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	ENTRY_NP(fast_null)
*0Sstevel@tonic-gate	orw	$PS_C, 8(%esp)	/* set carry bit in user flags */
*0Sstevel@tonic-gate	iret
*0Sstevel@tonic-gate	SET_SIZE(fast_null)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __i386 */
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	/*
*0Sstevel@tonic-gate	 * Interrupts start at 32
*0Sstevel@tonic-gate	 */
*0Sstevel@tonic-gate#define MKIVCT(n)			\
*0Sstevel@tonic-gate	ENTRY_NP(ivct/**/n)		\
*0Sstevel@tonic-gate	push	$0;			\
*0Sstevel@tonic-gate	push	$n - 0x20;		\
*0Sstevel@tonic-gate	jmp	cmnint;			\
*0Sstevel@tonic-gate	SET_SIZE(ivct/**/n)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate	MKIVCT(32)
*0Sstevel@tonic-gate	MKIVCT(33)
*0Sstevel@tonic-gate	MKIVCT(34)
*0Sstevel@tonic-gate	MKIVCT(35)
*0Sstevel@tonic-gate	MKIVCT(36)
*0Sstevel@tonic-gate	MKIVCT(37)
*0Sstevel@tonic-gate	MKIVCT(38)
*0Sstevel@tonic-gate	MKIVCT(39)
*0Sstevel@tonic-gate	MKIVCT(40)
*0Sstevel@tonic-gate	MKIVCT(41)
*0Sstevel@tonic-gate	MKIVCT(42)
*0Sstevel@tonic-gate	MKIVCT(43)
*0Sstevel@tonic-gate	MKIVCT(44)
*0Sstevel@tonic-gate	MKIVCT(45)
*0Sstevel@tonic-gate	MKIVCT(46)
*0Sstevel@tonic-gate	MKIVCT(47)
*0Sstevel@tonic-gate	MKIVCT(48)
*0Sstevel@tonic-gate	MKIVCT(49)
*0Sstevel@tonic-gate	MKIVCT(50)
*0Sstevel@tonic-gate	MKIVCT(51)
*0Sstevel@tonic-gate	MKIVCT(52)
*0Sstevel@tonic-gate	MKIVCT(53)
*0Sstevel@tonic-gate	MKIVCT(54)
*0Sstevel@tonic-gate	MKIVCT(55)
*0Sstevel@tonic-gate	MKIVCT(56)
*0Sstevel@tonic-gate	MKIVCT(57)
*0Sstevel@tonic-gate	MKIVCT(58)
*0Sstevel@tonic-gate	MKIVCT(59)
*0Sstevel@tonic-gate	MKIVCT(60)
*0Sstevel@tonic-gate	MKIVCT(61)
*0Sstevel@tonic-gate	MKIVCT(62)
*0Sstevel@tonic-gate	MKIVCT(63)
*0Sstevel@tonic-gate	MKIVCT(64)
*0Sstevel@tonic-gate	MKIVCT(65)
*0Sstevel@tonic-gate	MKIVCT(66)
*0Sstevel@tonic-gate	MKIVCT(67)
*0Sstevel@tonic-gate	MKIVCT(68)
*0Sstevel@tonic-gate	MKIVCT(69)
*0Sstevel@tonic-gate	MKIVCT(70)
*0Sstevel@tonic-gate	MKIVCT(71)
*0Sstevel@tonic-gate	MKIVCT(72)
*0Sstevel@tonic-gate	MKIVCT(73)
*0Sstevel@tonic-gate	MKIVCT(74)
*0Sstevel@tonic-gate	MKIVCT(75)
*0Sstevel@tonic-gate	MKIVCT(76)
*0Sstevel@tonic-gate	MKIVCT(77)
*0Sstevel@tonic-gate	MKIVCT(78)
*0Sstevel@tonic-gate	MKIVCT(79)
*0Sstevel@tonic-gate	MKIVCT(80)
*0Sstevel@tonic-gate	MKIVCT(81)
*0Sstevel@tonic-gate	MKIVCT(82)
*0Sstevel@tonic-gate	MKIVCT(83)
*0Sstevel@tonic-gate	MKIVCT(84)
*0Sstevel@tonic-gate	MKIVCT(85)
*0Sstevel@tonic-gate	MKIVCT(86)
*0Sstevel@tonic-gate	MKIVCT(87)
*0Sstevel@tonic-gate	MKIVCT(88)
*0Sstevel@tonic-gate	MKIVCT(89)
*0Sstevel@tonic-gate	MKIVCT(90)
*0Sstevel@tonic-gate	MKIVCT(91)
*0Sstevel@tonic-gate	MKIVCT(92)
*0Sstevel@tonic-gate	MKIVCT(93)
*0Sstevel@tonic-gate	MKIVCT(94)
*0Sstevel@tonic-gate	MKIVCT(95)
*0Sstevel@tonic-gate	MKIVCT(96)
*0Sstevel@tonic-gate	MKIVCT(97)
*0Sstevel@tonic-gate	MKIVCT(98)
*0Sstevel@tonic-gate	MKIVCT(99)
*0Sstevel@tonic-gate	MKIVCT(100)
*0Sstevel@tonic-gate	MKIVCT(101)
*0Sstevel@tonic-gate	MKIVCT(102)
*0Sstevel@tonic-gate	MKIVCT(103)
*0Sstevel@tonic-gate	MKIVCT(104)
*0Sstevel@tonic-gate	MKIVCT(105)
*0Sstevel@tonic-gate	MKIVCT(106)
*0Sstevel@tonic-gate	MKIVCT(107)
*0Sstevel@tonic-gate	MKIVCT(108)
*0Sstevel@tonic-gate	MKIVCT(109)
*0Sstevel@tonic-gate	MKIVCT(110)
*0Sstevel@tonic-gate	MKIVCT(111)
*0Sstevel@tonic-gate	MKIVCT(112)
*0Sstevel@tonic-gate	MKIVCT(113)
*0Sstevel@tonic-gate	MKIVCT(114)
*0Sstevel@tonic-gate	MKIVCT(115)
*0Sstevel@tonic-gate	MKIVCT(116)
*0Sstevel@tonic-gate	MKIVCT(117)
*0Sstevel@tonic-gate	MKIVCT(118)
*0Sstevel@tonic-gate	MKIVCT(119)
*0Sstevel@tonic-gate	MKIVCT(120)
*0Sstevel@tonic-gate	MKIVCT(121)
*0Sstevel@tonic-gate	MKIVCT(122)
*0Sstevel@tonic-gate	MKIVCT(123)
*0Sstevel@tonic-gate	MKIVCT(124)
*0Sstevel@tonic-gate	MKIVCT(125)
*0Sstevel@tonic-gate	MKIVCT(126)
*0Sstevel@tonic-gate	MKIVCT(127)
*0Sstevel@tonic-gate	MKIVCT(128)
*0Sstevel@tonic-gate	MKIVCT(129)
*0Sstevel@tonic-gate	MKIVCT(130)
*0Sstevel@tonic-gate	MKIVCT(131)
*0Sstevel@tonic-gate	MKIVCT(132)
*0Sstevel@tonic-gate	MKIVCT(133)
*0Sstevel@tonic-gate	MKIVCT(134)
*0Sstevel@tonic-gate	MKIVCT(135)
*0Sstevel@tonic-gate	MKIVCT(136)
*0Sstevel@tonic-gate	MKIVCT(137)
*0Sstevel@tonic-gate	MKIVCT(138)
*0Sstevel@tonic-gate	MKIVCT(139)
*0Sstevel@tonic-gate	MKIVCT(140)
*0Sstevel@tonic-gate	MKIVCT(141)
*0Sstevel@tonic-gate	MKIVCT(142)
*0Sstevel@tonic-gate	MKIVCT(143)
*0Sstevel@tonic-gate	MKIVCT(144)
*0Sstevel@tonic-gate	MKIVCT(145)
*0Sstevel@tonic-gate	MKIVCT(146)
*0Sstevel@tonic-gate	MKIVCT(147)
*0Sstevel@tonic-gate	MKIVCT(148)
*0Sstevel@tonic-gate	MKIVCT(149)
*0Sstevel@tonic-gate	MKIVCT(150)
*0Sstevel@tonic-gate	MKIVCT(151)
*0Sstevel@tonic-gate	MKIVCT(152)
*0Sstevel@tonic-gate	MKIVCT(153)
*0Sstevel@tonic-gate	MKIVCT(154)
*0Sstevel@tonic-gate	MKIVCT(155)
*0Sstevel@tonic-gate	MKIVCT(156)
*0Sstevel@tonic-gate	MKIVCT(157)
*0Sstevel@tonic-gate	MKIVCT(158)
*0Sstevel@tonic-gate	MKIVCT(159)
*0Sstevel@tonic-gate	MKIVCT(160)
*0Sstevel@tonic-gate	MKIVCT(161)
*0Sstevel@tonic-gate	MKIVCT(162)
*0Sstevel@tonic-gate	MKIVCT(163)
*0Sstevel@tonic-gate	MKIVCT(164)
*0Sstevel@tonic-gate	MKIVCT(165)
*0Sstevel@tonic-gate	MKIVCT(166)
*0Sstevel@tonic-gate	MKIVCT(167)
*0Sstevel@tonic-gate	MKIVCT(168)
*0Sstevel@tonic-gate	MKIVCT(169)
*0Sstevel@tonic-gate	MKIVCT(170)
*0Sstevel@tonic-gate	MKIVCT(171)
*0Sstevel@tonic-gate	MKIVCT(172)
*0Sstevel@tonic-gate	MKIVCT(173)
*0Sstevel@tonic-gate	MKIVCT(174)
*0Sstevel@tonic-gate	MKIVCT(175)
*0Sstevel@tonic-gate	MKIVCT(176)
*0Sstevel@tonic-gate	MKIVCT(177)
*0Sstevel@tonic-gate	MKIVCT(178)
*0Sstevel@tonic-gate	MKIVCT(179)
*0Sstevel@tonic-gate	MKIVCT(180)
*0Sstevel@tonic-gate	MKIVCT(181)
*0Sstevel@tonic-gate	MKIVCT(182)
*0Sstevel@tonic-gate	MKIVCT(183)
*0Sstevel@tonic-gate	MKIVCT(184)
*0Sstevel@tonic-gate	MKIVCT(185)
*0Sstevel@tonic-gate	MKIVCT(186)
*0Sstevel@tonic-gate	MKIVCT(187)
*0Sstevel@tonic-gate	MKIVCT(188)
*0Sstevel@tonic-gate	MKIVCT(189)
*0Sstevel@tonic-gate	MKIVCT(190)
*0Sstevel@tonic-gate	MKIVCT(191)
*0Sstevel@tonic-gate	MKIVCT(192)
*0Sstevel@tonic-gate	MKIVCT(193)
*0Sstevel@tonic-gate	MKIVCT(194)
*0Sstevel@tonic-gate	MKIVCT(195)
*0Sstevel@tonic-gate	MKIVCT(196)
*0Sstevel@tonic-gate	MKIVCT(197)
*0Sstevel@tonic-gate	MKIVCT(198)
*0Sstevel@tonic-gate	MKIVCT(199)
*0Sstevel@tonic-gate	MKIVCT(200)
*0Sstevel@tonic-gate	MKIVCT(201)
*0Sstevel@tonic-gate	MKIVCT(202)
*0Sstevel@tonic-gate	MKIVCT(203)
*0Sstevel@tonic-gate	MKIVCT(204)
*0Sstevel@tonic-gate	MKIVCT(205)
*0Sstevel@tonic-gate	MKIVCT(206)
*0Sstevel@tonic-gate	MKIVCT(207)
*0Sstevel@tonic-gate	MKIVCT(208)
*0Sstevel@tonic-gate	MKIVCT(209)
*0Sstevel@tonic-gate	MKIVCT(210)
*0Sstevel@tonic-gate	MKIVCT(211)
*0Sstevel@tonic-gate	MKIVCT(212)
*0Sstevel@tonic-gate	MKIVCT(213)
*0Sstevel@tonic-gate	MKIVCT(214)
*0Sstevel@tonic-gate	MKIVCT(215)
*0Sstevel@tonic-gate	MKIVCT(216)
*0Sstevel@tonic-gate	MKIVCT(217)
*0Sstevel@tonic-gate	MKIVCT(218)
*0Sstevel@tonic-gate	MKIVCT(219)
*0Sstevel@tonic-gate	MKIVCT(220)
*0Sstevel@tonic-gate	MKIVCT(221)
*0Sstevel@tonic-gate	MKIVCT(222)
*0Sstevel@tonic-gate	MKIVCT(223)
*0Sstevel@tonic-gate	MKIVCT(224)
*0Sstevel@tonic-gate	MKIVCT(225)
*0Sstevel@tonic-gate	MKIVCT(226)
*0Sstevel@tonic-gate	MKIVCT(227)
*0Sstevel@tonic-gate	MKIVCT(228)
*0Sstevel@tonic-gate	MKIVCT(229)
*0Sstevel@tonic-gate	MKIVCT(230)
*0Sstevel@tonic-gate	MKIVCT(231)
*0Sstevel@tonic-gate	MKIVCT(232)
*0Sstevel@tonic-gate	MKIVCT(233)
*0Sstevel@tonic-gate	MKIVCT(234)
*0Sstevel@tonic-gate	MKIVCT(235)
*0Sstevel@tonic-gate	MKIVCT(236)
*0Sstevel@tonic-gate	MKIVCT(237)
*0Sstevel@tonic-gate	MKIVCT(238)
*0Sstevel@tonic-gate	MKIVCT(239)
*0Sstevel@tonic-gate	MKIVCT(240)
*0Sstevel@tonic-gate	MKIVCT(241)
*0Sstevel@tonic-gate	MKIVCT(242)
*0Sstevel@tonic-gate	MKIVCT(243)
*0Sstevel@tonic-gate	MKIVCT(244)
*0Sstevel@tonic-gate	MKIVCT(245)
*0Sstevel@tonic-gate	MKIVCT(246)
*0Sstevel@tonic-gate	MKIVCT(247)
*0Sstevel@tonic-gate	MKIVCT(248)
*0Sstevel@tonic-gate	MKIVCT(249)
*0Sstevel@tonic-gate	MKIVCT(250)
*0Sstevel@tonic-gate	MKIVCT(251)
*0Sstevel@tonic-gate	MKIVCT(252)
*0Sstevel@tonic-gate	MKIVCT(253)
*0Sstevel@tonic-gate	MKIVCT(254)
*0Sstevel@tonic-gate	MKIVCT(255)
*0Sstevel@tonic-gate
*0Sstevel@tonic-gate#endif	/* __lint */