xref: /onnv-gate/usr/src/uts/intel/asm/htable.h (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #ifndef _ASM_HTABLE_H
28*0Sstevel@tonic-gate #define	_ASM_HTABLE_H
29*0Sstevel@tonic-gate 
30*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*0Sstevel@tonic-gate 
32*0Sstevel@tonic-gate #include <sys/types.h>
33*0Sstevel@tonic-gate 
34*0Sstevel@tonic-gate #ifdef	__cplusplus
35*0Sstevel@tonic-gate extern "C" {
36*0Sstevel@tonic-gate #endif
37*0Sstevel@tonic-gate 
38*0Sstevel@tonic-gate #if !defined(__lint) && defined(__GNUC__)
39*0Sstevel@tonic-gate 
40*0Sstevel@tonic-gate #if defined(__i386) || defined(__amd64)
41*0Sstevel@tonic-gate 
42*0Sstevel@tonic-gate /*
43*0Sstevel@tonic-gate  * This set of atomic operations are designed primarily
44*0Sstevel@tonic-gate  * for some ia32 hat layer operations.
45*0Sstevel@tonic-gate  */
46*0Sstevel@tonic-gate 
atomic_orb(uint8_t * addr,uint8_t value)47*0Sstevel@tonic-gate extern __inline__ void atomic_orb(uint8_t *addr, uint8_t value)
48*0Sstevel@tonic-gate {
49*0Sstevel@tonic-gate 	__asm__ __volatile__(
50*0Sstevel@tonic-gate 	    "lock; orb %%dl,%0"
51*0Sstevel@tonic-gate 	    : "=m" (*addr)
52*0Sstevel@tonic-gate 	    : "d" (value), "m" (*addr)
53*0Sstevel@tonic-gate 	    : "cc");
54*0Sstevel@tonic-gate }
55*0Sstevel@tonic-gate 
atomic_andb(uint8_t * addr,uint8_t value)56*0Sstevel@tonic-gate extern __inline__ void atomic_andb(uint8_t *addr, uint8_t value)
57*0Sstevel@tonic-gate {
58*0Sstevel@tonic-gate 	__asm__ __volatile__(
59*0Sstevel@tonic-gate 	    "lock; andb %%dl,%0"
60*0Sstevel@tonic-gate 	    : "=m" (*addr)
61*0Sstevel@tonic-gate 	    : "d" (value), "m" (*addr)
62*0Sstevel@tonic-gate 	    : "cc");
63*0Sstevel@tonic-gate }
64*0Sstevel@tonic-gate 
atomic_inc16(uint16_t * addr)65*0Sstevel@tonic-gate extern __inline__ void atomic_inc16(uint16_t *addr)
66*0Sstevel@tonic-gate {
67*0Sstevel@tonic-gate 	__asm__ __volatile__(
68*0Sstevel@tonic-gate 	    "lock; incw %0"
69*0Sstevel@tonic-gate 	    : "=m" (*addr)
70*0Sstevel@tonic-gate 	    : "m" (*addr)
71*0Sstevel@tonic-gate 	    : "cc");
72*0Sstevel@tonic-gate }
73*0Sstevel@tonic-gate 
atomic_dec16(uint16_t * addr)74*0Sstevel@tonic-gate extern __inline__ void atomic_dec16(uint16_t *addr)
75*0Sstevel@tonic-gate {
76*0Sstevel@tonic-gate 	__asm__ __volatile__(
77*0Sstevel@tonic-gate 	    "lock; decw %0"
78*0Sstevel@tonic-gate 	    : "=m" (*addr)
79*0Sstevel@tonic-gate 	    : "m" (*addr)
80*0Sstevel@tonic-gate 	    : "cc");
81*0Sstevel@tonic-gate }
82*0Sstevel@tonic-gate 
mmu_tlbflush_entry(caddr_t addr)83*0Sstevel@tonic-gate extern __inline__ void mmu_tlbflush_entry(caddr_t addr)
84*0Sstevel@tonic-gate {
85*0Sstevel@tonic-gate 	__asm__ __volatile__(
86*0Sstevel@tonic-gate 	    "invlpg %0"
87*0Sstevel@tonic-gate 	    : "=m" (*addr)
88*0Sstevel@tonic-gate 	    : "m" (*addr));
89*0Sstevel@tonic-gate }
90*0Sstevel@tonic-gate 
91*0Sstevel@tonic-gate #endif	/* __i386 || __amd64 */
92*0Sstevel@tonic-gate 
93*0Sstevel@tonic-gate #endif	/* !__lint && __GNUC__ */
94*0Sstevel@tonic-gate 
95*0Sstevel@tonic-gate #ifdef	__cplusplus
96*0Sstevel@tonic-gate }
97*0Sstevel@tonic-gate #endif
98*0Sstevel@tonic-gate 
99*0Sstevel@tonic-gate #endif	/* _ASM_HTABLE_H */
100