10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 53446Smrj * Common Development and Distribution License (the "License"). 63446Smrj * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 215084Sjohnlev 220Sstevel@tonic-gate /* 23*8990SSurya.Prakki@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #include <sys/types.h> 280Sstevel@tonic-gate #include <sys/param.h> 290Sstevel@tonic-gate #include <sys/systm.h> 300Sstevel@tonic-gate #include <sys/disp.h> 310Sstevel@tonic-gate #include <sys/var.h> 320Sstevel@tonic-gate #include <sys/cmn_err.h> 330Sstevel@tonic-gate #include <sys/debug.h> 340Sstevel@tonic-gate #include <sys/x86_archext.h> 350Sstevel@tonic-gate #include <sys/archsystm.h> 360Sstevel@tonic-gate #include <sys/cpuvar.h> 370Sstevel@tonic-gate #include <sys/psm_defs.h> 380Sstevel@tonic-gate #include <sys/clock.h> 390Sstevel@tonic-gate #include <sys/atomic.h> 400Sstevel@tonic-gate #include <sys/lockstat.h> 410Sstevel@tonic-gate #include <sys/smp_impldefs.h> 420Sstevel@tonic-gate #include <sys/dtrace.h> 430Sstevel@tonic-gate #include <sys/time.h> 445084Sjohnlev #include <sys/panic.h> 457905SSudheer.Abdul-Salam@Sun.COM #include <sys/cpu.h> 460Sstevel@tonic-gate 470Sstevel@tonic-gate /* 480Sstevel@tonic-gate * Using the Pentium's TSC register for gethrtime() 490Sstevel@tonic-gate * ------------------------------------------------ 500Sstevel@tonic-gate * 510Sstevel@tonic-gate * The Pentium family, like many chip architectures, has a high-resolution 520Sstevel@tonic-gate * timestamp counter ("TSC") which increments once per CPU cycle. The contents 530Sstevel@tonic-gate * of the timestamp counter are read with the RDTSC instruction. 540Sstevel@tonic-gate * 550Sstevel@tonic-gate * As with its UltraSPARC equivalent (the %tick register), TSC's cycle count 560Sstevel@tonic-gate * must be translated into nanoseconds in order to implement gethrtime(). 570Sstevel@tonic-gate * We avoid inducing floating point operations in this conversion by 580Sstevel@tonic-gate * implementing the same nsec_scale algorithm as that found in the sun4u 590Sstevel@tonic-gate * platform code. The sun4u NATIVE_TIME_TO_NSEC_SCALE block comment contains 600Sstevel@tonic-gate * a detailed description of the algorithm; the comment is not reproduced 610Sstevel@tonic-gate * here. This implementation differs only in its value for NSEC_SHIFT: 620Sstevel@tonic-gate * we implement an NSEC_SHIFT of 5 (instead of sun4u's 4) to allow for 630Sstevel@tonic-gate * 60 MHz Pentiums. 640Sstevel@tonic-gate * 650Sstevel@tonic-gate * While TSC and %tick are both cycle counting registers, TSC's functionality 660Sstevel@tonic-gate * falls short in several critical ways: 670Sstevel@tonic-gate * 680Sstevel@tonic-gate * (a) TSCs on different CPUs are not guaranteed to be in sync. While in 690Sstevel@tonic-gate * practice they often _are_ in sync, this isn't guaranteed by the 700Sstevel@tonic-gate * architecture. 710Sstevel@tonic-gate * 720Sstevel@tonic-gate * (b) The TSC cannot be reliably set to an arbitrary value. The architecture 730Sstevel@tonic-gate * only supports writing the low 32-bits of TSC, making it impractical 740Sstevel@tonic-gate * to rewrite. 750Sstevel@tonic-gate * 760Sstevel@tonic-gate * (c) The architecture doesn't have the capacity to interrupt based on 770Sstevel@tonic-gate * arbitrary values of TSC; there is no TICK_CMPR equivalent. 780Sstevel@tonic-gate * 790Sstevel@tonic-gate * Together, (a) and (b) imply that software must track the skew between 800Sstevel@tonic-gate * TSCs and account for it (it is assumed that while there may exist skew, 810Sstevel@tonic-gate * there does not exist drift). To determine the skew between CPUs, we 820Sstevel@tonic-gate * have newly onlined CPUs call tsc_sync_slave(), while the CPU performing 837905SSudheer.Abdul-Salam@Sun.COM * the online operation calls tsc_sync_master(). 840Sstevel@tonic-gate * 850Sstevel@tonic-gate * In the absence of time-of-day clock adjustments, gethrtime() must stay in 860Sstevel@tonic-gate * sync with gettimeofday(). This is problematic; given (c), the software 870Sstevel@tonic-gate * cannot drive its time-of-day source from TSC, and yet they must somehow be 880Sstevel@tonic-gate * kept in sync. We implement this by having a routine, tsc_tick(), which 890Sstevel@tonic-gate * is called once per second from the interrupt which drives time-of-day. 900Sstevel@tonic-gate * 910Sstevel@tonic-gate * Note that the hrtime base for gethrtime, tsc_hrtime_base, is modified 920Sstevel@tonic-gate * atomically with nsec_scale under CLOCK_LOCK. This assures that time 930Sstevel@tonic-gate * monotonically increases. 940Sstevel@tonic-gate */ 950Sstevel@tonic-gate 960Sstevel@tonic-gate #define NSEC_SHIFT 5 970Sstevel@tonic-gate 980Sstevel@tonic-gate static uint_t nsec_scale; 990Sstevel@tonic-gate 1000Sstevel@tonic-gate /* 1010Sstevel@tonic-gate * These two variables used to be grouped together inside of a structure that 1020Sstevel@tonic-gate * lived on a single cache line. A regression (bug ID 4623398) caused the 1030Sstevel@tonic-gate * compiler to emit code that "optimized" away the while-loops below. The 1040Sstevel@tonic-gate * result was that no synchronization between the onlining and onlined CPUs 1050Sstevel@tonic-gate * took place. 1060Sstevel@tonic-gate */ 1070Sstevel@tonic-gate static volatile int tsc_ready; 1080Sstevel@tonic-gate static volatile int tsc_sync_go; 1090Sstevel@tonic-gate 1100Sstevel@tonic-gate /* 1110Sstevel@tonic-gate * Used as indices into the tsc_sync_snaps[] array. 1120Sstevel@tonic-gate */ 1130Sstevel@tonic-gate #define TSC_MASTER 0 1140Sstevel@tonic-gate #define TSC_SLAVE 1 1150Sstevel@tonic-gate 1160Sstevel@tonic-gate /* 1170Sstevel@tonic-gate * Used in the tsc_master_sync()/tsc_slave_sync() rendezvous. 1180Sstevel@tonic-gate */ 1190Sstevel@tonic-gate #define TSC_SYNC_STOP 1 1200Sstevel@tonic-gate #define TSC_SYNC_GO 2 1217905SSudheer.Abdul-Salam@Sun.COM #define TSC_SYNC_DONE 3 1227905SSudheer.Abdul-Salam@Sun.COM #define SYNC_ITERATIONS 10 1230Sstevel@tonic-gate 1245084Sjohnlev #define TSC_CONVERT_AND_ADD(tsc, hrt, scale) { \ 1253446Smrj unsigned int *_l = (unsigned int *)&(tsc); \ 1263446Smrj (hrt) += mul32(_l[1], scale) << NSEC_SHIFT; \ 1270Sstevel@tonic-gate (hrt) += mul32(_l[0], scale) >> (32 - NSEC_SHIFT); \ 1280Sstevel@tonic-gate } 1290Sstevel@tonic-gate 1303446Smrj #define TSC_CONVERT(tsc, hrt, scale) { \ 1313446Smrj unsigned int *_l = (unsigned int *)&(tsc); \ 1323446Smrj (hrt) = mul32(_l[1], scale) << NSEC_SHIFT; \ 1330Sstevel@tonic-gate (hrt) += mul32(_l[0], scale) >> (32 - NSEC_SHIFT); \ 1340Sstevel@tonic-gate } 1350Sstevel@tonic-gate 1363446Smrj int tsc_master_slave_sync_needed = 1; 137*8990SSurya.Prakki@Sun.COM extern int platform_is_virt; 1380Sstevel@tonic-gate 1390Sstevel@tonic-gate static int tsc_max_delta; 1400Sstevel@tonic-gate static hrtime_t tsc_sync_tick_delta[NCPU]; 1417905SSudheer.Abdul-Salam@Sun.COM typedef struct tsc_sync { 1427905SSudheer.Abdul-Salam@Sun.COM volatile hrtime_t master_tsc, slave_tsc; 1437905SSudheer.Abdul-Salam@Sun.COM } tsc_sync_t; 1447905SSudheer.Abdul-Salam@Sun.COM static tsc_sync_t *tscp; 1457905SSudheer.Abdul-Salam@Sun.COM static hrtime_t largest_tsc_delta = 0; 1467905SSudheer.Abdul-Salam@Sun.COM static ulong_t shortest_write_time = ~0UL; 1477905SSudheer.Abdul-Salam@Sun.COM 1480Sstevel@tonic-gate static hrtime_t tsc_last = 0; 1490Sstevel@tonic-gate static hrtime_t tsc_last_jumped = 0; 1500Sstevel@tonic-gate static hrtime_t tsc_hrtime_base = 0; 1510Sstevel@tonic-gate static int tsc_jumped = 0; 1520Sstevel@tonic-gate 1530Sstevel@tonic-gate static hrtime_t shadow_tsc_hrtime_base; 1540Sstevel@tonic-gate static hrtime_t shadow_tsc_last; 1550Sstevel@tonic-gate static uint_t shadow_nsec_scale; 1560Sstevel@tonic-gate static uint32_t shadow_hres_lock; 1575295Srandyf int get_tsc_ready(); 1580Sstevel@tonic-gate 1595084Sjohnlev hrtime_t 1605084Sjohnlev tsc_gethrtime(void) 1615084Sjohnlev { 1625084Sjohnlev uint32_t old_hres_lock; 1635084Sjohnlev hrtime_t tsc, hrt; 1645084Sjohnlev 1655084Sjohnlev do { 1665084Sjohnlev old_hres_lock = hres_lock; 1675084Sjohnlev 1685084Sjohnlev if ((tsc = tsc_read()) >= tsc_last) { 1695084Sjohnlev /* 1705084Sjohnlev * It would seem to be obvious that this is true 1715084Sjohnlev * (that is, the past is less than the present), 1725084Sjohnlev * but it isn't true in the presence of suspend/resume 1735084Sjohnlev * cycles. If we manage to call gethrtime() 1745084Sjohnlev * after a resume, but before the first call to 1755084Sjohnlev * tsc_tick(), we will see the jump. In this case, 1765084Sjohnlev * we will simply use the value in TSC as the delta. 1775084Sjohnlev */ 1785084Sjohnlev tsc -= tsc_last; 1795084Sjohnlev } else if (tsc >= tsc_last - 2*tsc_max_delta) { 1805084Sjohnlev /* 1815084Sjohnlev * There is a chance that tsc_tick() has just run on 1825084Sjohnlev * another CPU, and we have drifted just enough so that 1835084Sjohnlev * we appear behind tsc_last. In this case, force the 1845084Sjohnlev * delta to be zero. 1855084Sjohnlev */ 1865084Sjohnlev tsc = 0; 1875084Sjohnlev } 1885084Sjohnlev 1895084Sjohnlev hrt = tsc_hrtime_base; 1905084Sjohnlev 1915084Sjohnlev TSC_CONVERT_AND_ADD(tsc, hrt, nsec_scale); 1925084Sjohnlev } while ((old_hres_lock & ~1) != hres_lock); 1935084Sjohnlev 1945084Sjohnlev return (hrt); 1955084Sjohnlev } 1965084Sjohnlev 1975084Sjohnlev hrtime_t 1985084Sjohnlev tsc_gethrtime_delta(void) 1995084Sjohnlev { 2005084Sjohnlev uint32_t old_hres_lock; 2015084Sjohnlev hrtime_t tsc, hrt; 2026336Sbholler ulong_t flags; 2035084Sjohnlev 2045084Sjohnlev do { 2055084Sjohnlev old_hres_lock = hres_lock; 2065084Sjohnlev 2075084Sjohnlev /* 2085084Sjohnlev * We need to disable interrupts here to assure that we 2095084Sjohnlev * don't migrate between the call to tsc_read() and 2105084Sjohnlev * adding the CPU's TSC tick delta. Note that disabling 2115084Sjohnlev * and reenabling preemption is forbidden here because 2125084Sjohnlev * we may be in the middle of a fast trap. In the amd64 2135084Sjohnlev * kernel we cannot tolerate preemption during a fast 2145084Sjohnlev * trap. See _update_sregs(). 2155084Sjohnlev */ 2165084Sjohnlev 2175084Sjohnlev flags = clear_int_flag(); 2185084Sjohnlev tsc = tsc_read() + tsc_sync_tick_delta[CPU->cpu_id]; 2195084Sjohnlev restore_int_flag(flags); 2205084Sjohnlev 2215084Sjohnlev /* See comments in tsc_gethrtime() above */ 2225084Sjohnlev 2235084Sjohnlev if (tsc >= tsc_last) { 2245084Sjohnlev tsc -= tsc_last; 2255084Sjohnlev } else if (tsc >= tsc_last - 2 * tsc_max_delta) { 2265084Sjohnlev tsc = 0; 2275084Sjohnlev } 2285084Sjohnlev 2295084Sjohnlev hrt = tsc_hrtime_base; 2305084Sjohnlev 2315084Sjohnlev TSC_CONVERT_AND_ADD(tsc, hrt, nsec_scale); 2325084Sjohnlev } while ((old_hres_lock & ~1) != hres_lock); 2335084Sjohnlev 2345084Sjohnlev return (hrt); 2355084Sjohnlev } 2365084Sjohnlev 2375084Sjohnlev /* 2385084Sjohnlev * This is similar to the above, but it cannot actually spin on hres_lock. 2395084Sjohnlev * As a result, it caches all of the variables it needs; if the variables 2405084Sjohnlev * don't change, it's done. 2415084Sjohnlev */ 2425084Sjohnlev hrtime_t 2435084Sjohnlev dtrace_gethrtime(void) 2445084Sjohnlev { 2455084Sjohnlev uint32_t old_hres_lock; 2465084Sjohnlev hrtime_t tsc, hrt; 2476336Sbholler ulong_t flags; 2485084Sjohnlev 2495084Sjohnlev do { 2505084Sjohnlev old_hres_lock = hres_lock; 2515084Sjohnlev 2525084Sjohnlev /* 2535084Sjohnlev * Interrupts are disabled to ensure that the thread isn't 2545084Sjohnlev * migrated between the tsc_read() and adding the CPU's 2555084Sjohnlev * TSC tick delta. 2565084Sjohnlev */ 2575084Sjohnlev flags = clear_int_flag(); 2585084Sjohnlev 2595084Sjohnlev tsc = tsc_read(); 2605084Sjohnlev 2615084Sjohnlev if (gethrtimef == tsc_gethrtime_delta) 2625084Sjohnlev tsc += tsc_sync_tick_delta[CPU->cpu_id]; 2635084Sjohnlev 2645084Sjohnlev restore_int_flag(flags); 2655084Sjohnlev 2665084Sjohnlev /* 2675084Sjohnlev * See the comments in tsc_gethrtime(), above. 2685084Sjohnlev */ 2695084Sjohnlev if (tsc >= tsc_last) 2705084Sjohnlev tsc -= tsc_last; 2715084Sjohnlev else if (tsc >= tsc_last - 2*tsc_max_delta) 2725084Sjohnlev tsc = 0; 2735084Sjohnlev 2745084Sjohnlev hrt = tsc_hrtime_base; 2755084Sjohnlev 2765084Sjohnlev TSC_CONVERT_AND_ADD(tsc, hrt, nsec_scale); 2775084Sjohnlev 2785084Sjohnlev if ((old_hres_lock & ~1) == hres_lock) 2795084Sjohnlev break; 2805084Sjohnlev 2815084Sjohnlev /* 2825084Sjohnlev * If we're here, the clock lock is locked -- or it has been 2835084Sjohnlev * unlocked and locked since we looked. This may be due to 2845084Sjohnlev * tsc_tick() running on another CPU -- or it may be because 2855084Sjohnlev * some code path has ended up in dtrace_probe() with 2865084Sjohnlev * CLOCK_LOCK held. We'll try to determine that we're in 2875084Sjohnlev * the former case by taking another lap if the lock has 2885084Sjohnlev * changed since when we first looked at it. 2895084Sjohnlev */ 2905084Sjohnlev if (old_hres_lock != hres_lock) 2915084Sjohnlev continue; 2925084Sjohnlev 2935084Sjohnlev /* 2945084Sjohnlev * So the lock was and is locked. We'll use the old data 2955084Sjohnlev * instead. 2965084Sjohnlev */ 2975084Sjohnlev old_hres_lock = shadow_hres_lock; 2985084Sjohnlev 2995084Sjohnlev /* 3005084Sjohnlev * Again, disable interrupts to ensure that the thread 3015084Sjohnlev * isn't migrated between the tsc_read() and adding 3025084Sjohnlev * the CPU's TSC tick delta. 3035084Sjohnlev */ 3045084Sjohnlev flags = clear_int_flag(); 3055084Sjohnlev 3065084Sjohnlev tsc = tsc_read(); 3075084Sjohnlev 3085084Sjohnlev if (gethrtimef == tsc_gethrtime_delta) 3095084Sjohnlev tsc += tsc_sync_tick_delta[CPU->cpu_id]; 3105084Sjohnlev 3115084Sjohnlev restore_int_flag(flags); 3125084Sjohnlev 3135084Sjohnlev /* 3145084Sjohnlev * See the comments in tsc_gethrtime(), above. 3155084Sjohnlev */ 3165084Sjohnlev if (tsc >= shadow_tsc_last) 3175084Sjohnlev tsc -= shadow_tsc_last; 3185084Sjohnlev else if (tsc >= shadow_tsc_last - 2 * tsc_max_delta) 3195084Sjohnlev tsc = 0; 3205084Sjohnlev 3215084Sjohnlev hrt = shadow_tsc_hrtime_base; 3225084Sjohnlev 3235084Sjohnlev TSC_CONVERT_AND_ADD(tsc, hrt, shadow_nsec_scale); 3245084Sjohnlev } while ((old_hres_lock & ~1) != shadow_hres_lock); 3255084Sjohnlev 3265084Sjohnlev return (hrt); 3275084Sjohnlev } 3285084Sjohnlev 3295084Sjohnlev hrtime_t 3305084Sjohnlev tsc_gethrtimeunscaled(void) 3315084Sjohnlev { 3325084Sjohnlev uint32_t old_hres_lock; 3335084Sjohnlev hrtime_t tsc; 3345084Sjohnlev 3355084Sjohnlev do { 3365084Sjohnlev old_hres_lock = hres_lock; 3375084Sjohnlev 3385084Sjohnlev /* See tsc_tick(). */ 3395084Sjohnlev tsc = tsc_read() + tsc_last_jumped; 3405084Sjohnlev } while ((old_hres_lock & ~1) != hres_lock); 3415084Sjohnlev 3425084Sjohnlev return (tsc); 3435084Sjohnlev } 3445084Sjohnlev 3455084Sjohnlev 3465084Sjohnlev /* Convert a tsc timestamp to nanoseconds */ 3475084Sjohnlev void 3485084Sjohnlev tsc_scalehrtime(hrtime_t *tsc) 3495084Sjohnlev { 3505084Sjohnlev hrtime_t hrt; 3515084Sjohnlev hrtime_t mytsc; 3525084Sjohnlev 3535084Sjohnlev if (tsc == NULL) 3545084Sjohnlev return; 3555084Sjohnlev mytsc = *tsc; 3565084Sjohnlev 3575084Sjohnlev TSC_CONVERT(mytsc, hrt, nsec_scale); 3585084Sjohnlev *tsc = hrt; 3595084Sjohnlev } 3605084Sjohnlev 3615084Sjohnlev hrtime_t 3625084Sjohnlev tsc_gethrtimeunscaled_delta(void) 3635084Sjohnlev { 3645084Sjohnlev hrtime_t hrt; 3656336Sbholler ulong_t flags; 3665084Sjohnlev 3675084Sjohnlev /* 3685084Sjohnlev * Similarly to tsc_gethrtime_delta, we need to disable preemption 3695084Sjohnlev * to prevent migration between the call to tsc_gethrtimeunscaled 3705084Sjohnlev * and adding the CPU's hrtime delta. Note that disabling and 3715084Sjohnlev * reenabling preemption is forbidden here because we may be in the 3725084Sjohnlev * middle of a fast trap. In the amd64 kernel we cannot tolerate 3735084Sjohnlev * preemption during a fast trap. See _update_sregs(). 3745084Sjohnlev */ 3755084Sjohnlev 3765084Sjohnlev flags = clear_int_flag(); 3775084Sjohnlev hrt = tsc_gethrtimeunscaled() + tsc_sync_tick_delta[CPU->cpu_id]; 3785084Sjohnlev restore_int_flag(flags); 3795084Sjohnlev 3805084Sjohnlev return (hrt); 3815084Sjohnlev } 3825084Sjohnlev 3830Sstevel@tonic-gate /* 3847905SSudheer.Abdul-Salam@Sun.COM * Called by the master in the TSC sync operation (usually the boot CPU). 3857905SSudheer.Abdul-Salam@Sun.COM * If the slave is discovered to have a skew, gethrtimef will be changed to 3867905SSudheer.Abdul-Salam@Sun.COM * point to tsc_gethrtime_delta(). Calculating skews is precise only when 3877905SSudheer.Abdul-Salam@Sun.COM * the master and slave TSCs are read simultaneously; however, there is no 3887905SSudheer.Abdul-Salam@Sun.COM * algorithm that can read both CPUs in perfect simultaneity. The proposed 3897905SSudheer.Abdul-Salam@Sun.COM * algorithm is an approximate method based on the behaviour of cache 3907905SSudheer.Abdul-Salam@Sun.COM * management. The slave CPU continuously reads TSC and then reads a global 3917905SSudheer.Abdul-Salam@Sun.COM * variable which the master CPU updates. The moment the master's update reaches 3927905SSudheer.Abdul-Salam@Sun.COM * the slave's visibility (being forced by an mfence operation) we use the TSC 3937905SSudheer.Abdul-Salam@Sun.COM * reading taken on the slave. A corresponding TSC read will be taken on the 3947905SSudheer.Abdul-Salam@Sun.COM * master as soon as possible after finishing the mfence operation. But the 3957905SSudheer.Abdul-Salam@Sun.COM * delay between causing the slave to notice the invalid cache line and the 3967905SSudheer.Abdul-Salam@Sun.COM * competion of mfence is not repeatable. This error is heuristically assumed 3977905SSudheer.Abdul-Salam@Sun.COM * to be 1/4th of the total write time as being measured by the two TSC reads 3987905SSudheer.Abdul-Salam@Sun.COM * on the master sandwiching the mfence. Furthermore, due to the nature of 3997905SSudheer.Abdul-Salam@Sun.COM * bus arbitration, contention on memory bus, etc., the time taken for the write 4007905SSudheer.Abdul-Salam@Sun.COM * to reflect globally can vary a lot. So instead of taking a single reading, 4017905SSudheer.Abdul-Salam@Sun.COM * a set of readings are taken and the one with least write time is chosen 4027905SSudheer.Abdul-Salam@Sun.COM * to calculate the final skew. 4038157SSudheer.Abdul-Salam@Sun.COM * 4048157SSudheer.Abdul-Salam@Sun.COM * TSC sync is disabled in the context of virtualization because the CPUs 4058157SSudheer.Abdul-Salam@Sun.COM * assigned to the guest are virtual CPUs which means the real CPUs on which 4068157SSudheer.Abdul-Salam@Sun.COM * guest runs keep changing during life time of guest OS. So we would end up 4078157SSudheer.Abdul-Salam@Sun.COM * calculating TSC skews for a set of CPUs during boot whereas the guest 4088157SSudheer.Abdul-Salam@Sun.COM * might migrate to a different set of physical CPUs at a later point of 4098157SSudheer.Abdul-Salam@Sun.COM * time. 4100Sstevel@tonic-gate */ 4110Sstevel@tonic-gate void 4120Sstevel@tonic-gate tsc_sync_master(processorid_t slave) 4130Sstevel@tonic-gate { 4147905SSudheer.Abdul-Salam@Sun.COM ulong_t flags, source, min_write_time = ~0UL; 4157905SSudheer.Abdul-Salam@Sun.COM hrtime_t write_time, x, mtsc_after, tdelta; 4167905SSudheer.Abdul-Salam@Sun.COM tsc_sync_t *tsc = tscp; 4177905SSudheer.Abdul-Salam@Sun.COM int cnt; 4180Sstevel@tonic-gate 419*8990SSurya.Prakki@Sun.COM if (!tsc_master_slave_sync_needed || platform_is_virt) 4203446Smrj return; 4213446Smrj 4220Sstevel@tonic-gate flags = clear_int_flag(); 4237905SSudheer.Abdul-Salam@Sun.COM source = CPU->cpu_id; 4240Sstevel@tonic-gate 4257905SSudheer.Abdul-Salam@Sun.COM for (cnt = 0; cnt < SYNC_ITERATIONS; cnt++) { 4267905SSudheer.Abdul-Salam@Sun.COM while (tsc_sync_go != TSC_SYNC_GO) 4277905SSudheer.Abdul-Salam@Sun.COM SMT_PAUSE(); 4280Sstevel@tonic-gate 4297905SSudheer.Abdul-Salam@Sun.COM tsc->master_tsc = tsc_read(); 4307905SSudheer.Abdul-Salam@Sun.COM membar_enter(); 4317905SSudheer.Abdul-Salam@Sun.COM mtsc_after = tsc_read(); 4327905SSudheer.Abdul-Salam@Sun.COM while (tsc_sync_go != TSC_SYNC_DONE) 4337905SSudheer.Abdul-Salam@Sun.COM SMT_PAUSE(); 4347905SSudheer.Abdul-Salam@Sun.COM write_time = mtsc_after - tsc->master_tsc; 4357905SSudheer.Abdul-Salam@Sun.COM if (write_time <= min_write_time) { 4367905SSudheer.Abdul-Salam@Sun.COM min_write_time = write_time; 4377905SSudheer.Abdul-Salam@Sun.COM /* 4387905SSudheer.Abdul-Salam@Sun.COM * Apply heuristic adjustment only if the calculated 4397905SSudheer.Abdul-Salam@Sun.COM * delta is > 1/4th of the write time. 4407905SSudheer.Abdul-Salam@Sun.COM */ 4417905SSudheer.Abdul-Salam@Sun.COM x = tsc->slave_tsc - mtsc_after; 4427905SSudheer.Abdul-Salam@Sun.COM if (x < 0) 4437905SSudheer.Abdul-Salam@Sun.COM x = -x; 4447905SSudheer.Abdul-Salam@Sun.COM if (x > (min_write_time/4)) 4457905SSudheer.Abdul-Salam@Sun.COM /* 4467905SSudheer.Abdul-Salam@Sun.COM * Subtract 1/4th of the measured write time 4477905SSudheer.Abdul-Salam@Sun.COM * from the master's TSC value, as an estimate 4487905SSudheer.Abdul-Salam@Sun.COM * of how late the mfence completion came 4497905SSudheer.Abdul-Salam@Sun.COM * after the slave noticed the cache line 4507905SSudheer.Abdul-Salam@Sun.COM * change. 4517905SSudheer.Abdul-Salam@Sun.COM */ 4527905SSudheer.Abdul-Salam@Sun.COM tdelta = tsc->slave_tsc - 4537905SSudheer.Abdul-Salam@Sun.COM (mtsc_after - (min_write_time/4)); 4547905SSudheer.Abdul-Salam@Sun.COM else 4557905SSudheer.Abdul-Salam@Sun.COM tdelta = tsc->slave_tsc - mtsc_after; 4567905SSudheer.Abdul-Salam@Sun.COM tsc_sync_tick_delta[slave] = 4577905SSudheer.Abdul-Salam@Sun.COM tsc_sync_tick_delta[source] - tdelta; 4587905SSudheer.Abdul-Salam@Sun.COM } 4597905SSudheer.Abdul-Salam@Sun.COM 4607905SSudheer.Abdul-Salam@Sun.COM tsc->master_tsc = tsc->slave_tsc = write_time = 0; 4617905SSudheer.Abdul-Salam@Sun.COM membar_enter(); 4627905SSudheer.Abdul-Salam@Sun.COM tsc_sync_go = TSC_SYNC_STOP; 4637905SSudheer.Abdul-Salam@Sun.COM } 4647905SSudheer.Abdul-Salam@Sun.COM if (tdelta < 0) 4657905SSudheer.Abdul-Salam@Sun.COM tdelta = -tdelta; 4667905SSudheer.Abdul-Salam@Sun.COM if (tdelta > largest_tsc_delta) 4677905SSudheer.Abdul-Salam@Sun.COM largest_tsc_delta = tdelta; 4687905SSudheer.Abdul-Salam@Sun.COM if (min_write_time < shortest_write_time) 4697905SSudheer.Abdul-Salam@Sun.COM shortest_write_time = min_write_time; 4700Sstevel@tonic-gate /* 4717905SSudheer.Abdul-Salam@Sun.COM * Enable delta variants of tsc functions if the largest of all chosen 4727905SSudheer.Abdul-Salam@Sun.COM * deltas is > smallest of the write time. 4730Sstevel@tonic-gate */ 4747905SSudheer.Abdul-Salam@Sun.COM if (largest_tsc_delta > shortest_write_time) { 4757905SSudheer.Abdul-Salam@Sun.COM gethrtimef = tsc_gethrtime_delta; 4767905SSudheer.Abdul-Salam@Sun.COM gethrtimeunscaledf = tsc_gethrtimeunscaled_delta; 4777905SSudheer.Abdul-Salam@Sun.COM } 4780Sstevel@tonic-gate restore_int_flag(flags); 4790Sstevel@tonic-gate } 4800Sstevel@tonic-gate 4818157SSudheer.Abdul-Salam@Sun.COM /* 4828157SSudheer.Abdul-Salam@Sun.COM * Called by a CPU which has just been onlined. It is expected that the CPU 4838157SSudheer.Abdul-Salam@Sun.COM * performing the online operation will call tsc_sync_master(). 4848157SSudheer.Abdul-Salam@Sun.COM * 4858157SSudheer.Abdul-Salam@Sun.COM * TSC sync is disabled in the context of virtualization. See comments 4868157SSudheer.Abdul-Salam@Sun.COM * above tsc_sync_master. 4878157SSudheer.Abdul-Salam@Sun.COM */ 4880Sstevel@tonic-gate void 4890Sstevel@tonic-gate tsc_sync_slave(void) 4900Sstevel@tonic-gate { 4913446Smrj ulong_t flags; 4927905SSudheer.Abdul-Salam@Sun.COM hrtime_t s1; 4937905SSudheer.Abdul-Salam@Sun.COM tsc_sync_t *tsc = tscp; 4947905SSudheer.Abdul-Salam@Sun.COM int cnt; 4950Sstevel@tonic-gate 496*8990SSurya.Prakki@Sun.COM if (!tsc_master_slave_sync_needed || platform_is_virt) 4973446Smrj return; 4983446Smrj 4990Sstevel@tonic-gate flags = clear_int_flag(); 5000Sstevel@tonic-gate 5017905SSudheer.Abdul-Salam@Sun.COM for (cnt = 0; cnt < SYNC_ITERATIONS; cnt++) { 5027905SSudheer.Abdul-Salam@Sun.COM /* Re-fill the cache line */ 5037905SSudheer.Abdul-Salam@Sun.COM s1 = tsc->master_tsc; 5047905SSudheer.Abdul-Salam@Sun.COM membar_enter(); 5057905SSudheer.Abdul-Salam@Sun.COM tsc_sync_go = TSC_SYNC_GO; 5067905SSudheer.Abdul-Salam@Sun.COM do { 5077905SSudheer.Abdul-Salam@Sun.COM /* 5087905SSudheer.Abdul-Salam@Sun.COM * Do not put an SMT_PAUSE here. For instance, 5097905SSudheer.Abdul-Salam@Sun.COM * if the master and slave are really the same 5107905SSudheer.Abdul-Salam@Sun.COM * hyper-threaded CPU, then you want the master 5117905SSudheer.Abdul-Salam@Sun.COM * to yield to the slave as quickly as possible here, 5127905SSudheer.Abdul-Salam@Sun.COM * but not the other way. 5137905SSudheer.Abdul-Salam@Sun.COM */ 5147905SSudheer.Abdul-Salam@Sun.COM s1 = tsc_read(); 5157905SSudheer.Abdul-Salam@Sun.COM } while (tsc->master_tsc == 0); 5167905SSudheer.Abdul-Salam@Sun.COM tsc->slave_tsc = s1; 5177905SSudheer.Abdul-Salam@Sun.COM membar_enter(); 5187905SSudheer.Abdul-Salam@Sun.COM tsc_sync_go = TSC_SYNC_DONE; 5190Sstevel@tonic-gate 5207905SSudheer.Abdul-Salam@Sun.COM while (tsc_sync_go != TSC_SYNC_STOP) 5217905SSudheer.Abdul-Salam@Sun.COM SMT_PAUSE(); 5227905SSudheer.Abdul-Salam@Sun.COM } 5230Sstevel@tonic-gate 5240Sstevel@tonic-gate restore_int_flag(flags); 5250Sstevel@tonic-gate } 5260Sstevel@tonic-gate 5270Sstevel@tonic-gate /* 5283446Smrj * Called once per second on a CPU from the cyclic subsystem's 5293446Smrj * CY_HIGH_LEVEL interrupt. (No longer just cpu0-only) 5300Sstevel@tonic-gate */ 5310Sstevel@tonic-gate void 5320Sstevel@tonic-gate tsc_tick(void) 5330Sstevel@tonic-gate { 5340Sstevel@tonic-gate hrtime_t now, delta; 5350Sstevel@tonic-gate ushort_t spl; 5360Sstevel@tonic-gate 5370Sstevel@tonic-gate /* 5380Sstevel@tonic-gate * Before we set the new variables, we set the shadow values. This 5390Sstevel@tonic-gate * allows for lock free operation in dtrace_gethrtime(). 5400Sstevel@tonic-gate */ 5410Sstevel@tonic-gate lock_set_spl((lock_t *)&shadow_hres_lock + HRES_LOCK_OFFSET, 5420Sstevel@tonic-gate ipltospl(CBE_HIGH_PIL), &spl); 5430Sstevel@tonic-gate 5440Sstevel@tonic-gate shadow_tsc_hrtime_base = tsc_hrtime_base; 5450Sstevel@tonic-gate shadow_tsc_last = tsc_last; 5460Sstevel@tonic-gate shadow_nsec_scale = nsec_scale; 5470Sstevel@tonic-gate 5480Sstevel@tonic-gate shadow_hres_lock++; 5490Sstevel@tonic-gate splx(spl); 5500Sstevel@tonic-gate 5510Sstevel@tonic-gate CLOCK_LOCK(&spl); 5520Sstevel@tonic-gate 5530Sstevel@tonic-gate now = tsc_read(); 5540Sstevel@tonic-gate 5551389Sdmick if (gethrtimef == tsc_gethrtime_delta) 5561389Sdmick now += tsc_sync_tick_delta[CPU->cpu_id]; 5571389Sdmick 5580Sstevel@tonic-gate if (now < tsc_last) { 5590Sstevel@tonic-gate /* 5600Sstevel@tonic-gate * The TSC has just jumped into the past. We assume that 5610Sstevel@tonic-gate * this is due to a suspend/resume cycle, and we're going 5620Sstevel@tonic-gate * to use the _current_ value of TSC as the delta. This 5630Sstevel@tonic-gate * will keep tsc_hrtime_base correct. We're also going to 5640Sstevel@tonic-gate * assume that rate of tsc does not change after a suspend 5650Sstevel@tonic-gate * resume (i.e nsec_scale remains the same). 5660Sstevel@tonic-gate */ 5670Sstevel@tonic-gate delta = now; 5680Sstevel@tonic-gate tsc_last_jumped += tsc_last; 5690Sstevel@tonic-gate tsc_jumped = 1; 5700Sstevel@tonic-gate } else { 5710Sstevel@tonic-gate /* 5720Sstevel@tonic-gate * Determine the number of TSC ticks since the last clock 5730Sstevel@tonic-gate * tick, and add that to the hrtime base. 5740Sstevel@tonic-gate */ 5750Sstevel@tonic-gate delta = now - tsc_last; 5760Sstevel@tonic-gate } 5770Sstevel@tonic-gate 5780Sstevel@tonic-gate TSC_CONVERT_AND_ADD(delta, tsc_hrtime_base, nsec_scale); 5790Sstevel@tonic-gate tsc_last = now; 5800Sstevel@tonic-gate 5810Sstevel@tonic-gate CLOCK_UNLOCK(spl); 5820Sstevel@tonic-gate } 5830Sstevel@tonic-gate 5845084Sjohnlev void 5855084Sjohnlev tsc_hrtimeinit(uint64_t cpu_freq_hz) 5860Sstevel@tonic-gate { 5875084Sjohnlev extern int gethrtime_hires; 5885084Sjohnlev longlong_t tsc; 5895084Sjohnlev ulong_t flags; 5900Sstevel@tonic-gate 5915084Sjohnlev /* 5925084Sjohnlev * cpu_freq_hz is the measured cpu frequency in hertz 5935084Sjohnlev */ 5940Sstevel@tonic-gate 5950Sstevel@tonic-gate /* 5965084Sjohnlev * We can't accommodate CPUs slower than 31.25 MHz. 5970Sstevel@tonic-gate */ 5985084Sjohnlev ASSERT(cpu_freq_hz > NANOSEC / (1 << NSEC_SHIFT)); 5995084Sjohnlev nsec_scale = 6005084Sjohnlev (uint_t)(((uint64_t)NANOSEC << (32 - NSEC_SHIFT)) / cpu_freq_hz); 6010Sstevel@tonic-gate 6020Sstevel@tonic-gate flags = clear_int_flag(); 6035084Sjohnlev tsc = tsc_read(); 6045084Sjohnlev (void) tsc_gethrtime(); 6055084Sjohnlev tsc_max_delta = tsc_read() - tsc; 6060Sstevel@tonic-gate restore_int_flag(flags); 6075084Sjohnlev gethrtimef = tsc_gethrtime; 6085084Sjohnlev gethrtimeunscaledf = tsc_gethrtimeunscaled; 6095084Sjohnlev scalehrtimef = tsc_scalehrtime; 6105084Sjohnlev hrtime_tick = tsc_tick; 6115084Sjohnlev gethrtime_hires = 1; 6127905SSudheer.Abdul-Salam@Sun.COM /* 6137905SSudheer.Abdul-Salam@Sun.COM * Allocate memory for the structure used in the tsc sync logic. 6147905SSudheer.Abdul-Salam@Sun.COM * This structure should be aligned on a multiple of cache line size. 6157905SSudheer.Abdul-Salam@Sun.COM */ 6167905SSudheer.Abdul-Salam@Sun.COM tscp = kmem_zalloc(PAGESIZE, KM_SLEEP); 6170Sstevel@tonic-gate } 6185295Srandyf 6195295Srandyf int 6205295Srandyf get_tsc_ready() 6215295Srandyf { 6225295Srandyf return (tsc_ready); 6235295Srandyf } 6245295Srandyf 6255295Srandyf /* 6265295Srandyf * Adjust all the deltas by adding the passed value to the array. 6275295Srandyf * Then use the "delt" versions of the the gethrtime functions. 6285295Srandyf * Note that 'tdelta' _could_ be a negative number, which should 6295295Srandyf * reduce the values in the array (used, for example, if the Solaris 6305295Srandyf * instance was moved by a virtual manager to a machine with a higher 6315295Srandyf * value of tsc). 6325295Srandyf */ 6335295Srandyf void 6345295Srandyf tsc_adjust_delta(hrtime_t tdelta) 6355295Srandyf { 6365295Srandyf int i; 6375295Srandyf 6385295Srandyf for (i = 0; i < NCPU; i++) { 6395295Srandyf tsc_sync_tick_delta[i] += tdelta; 6405295Srandyf } 6415295Srandyf 6425295Srandyf gethrtimef = tsc_gethrtime_delta; 6435295Srandyf gethrtimeunscaledf = tsc_gethrtimeunscaled_delta; 6445295Srandyf } 6455295Srandyf 6465295Srandyf /* 6475295Srandyf * Functions to manage TSC and high-res time on suspend and resume. 6485295Srandyf */ 6495295Srandyf 6505295Srandyf /* 6515295Srandyf * declarations needed for time adjustment 6525295Srandyf */ 6535295Srandyf extern void rtcsync(void); 6545295Srandyf extern tod_ops_t *tod_ops; 6555295Srandyf /* There must be a better way than exposing nsec_scale! */ 6565295Srandyf extern uint_t nsec_scale; 6575295Srandyf static uint64_t tsc_saved_tsc = 0; /* 1 in 2^64 chance this'll screw up! */ 6585295Srandyf static timestruc_t tsc_saved_ts; 6595295Srandyf static int tsc_needs_resume = 0; /* We only want to do this once. */ 6605295Srandyf int tsc_delta_onsuspend = 0; 6615295Srandyf int tsc_adjust_seconds = 1; 6625295Srandyf int tsc_suspend_count = 0; 6635295Srandyf int tsc_resume_in_cyclic = 0; 6645295Srandyf 6655295Srandyf /* 6665295Srandyf * Let timestamp.c know that we are suspending. It needs to take 6675295Srandyf * snapshots of the current time, and do any pre-suspend work. 6685295Srandyf */ 6695295Srandyf void 6705295Srandyf tsc_suspend(void) 6715295Srandyf { 6725295Srandyf /* 6735295Srandyf * What we need to do here, is to get the time we suspended, so that we 6745295Srandyf * know how much we should add to the resume. 6755295Srandyf * This routine is called by each CPU, so we need to handle reentry. 6765295Srandyf */ 6775295Srandyf if (tsc_gethrtime_enable) { 6785295Srandyf /* 6795295Srandyf * We put the tsc_read() inside the lock as it 6805295Srandyf * as no locking constraints, and it puts the 6815295Srandyf * aquired value closer to the time stamp (in 6825295Srandyf * case we delay getting the lock). 6835295Srandyf */ 6845295Srandyf mutex_enter(&tod_lock); 6855295Srandyf tsc_saved_tsc = tsc_read(); 6865295Srandyf tsc_saved_ts = TODOP_GET(tod_ops); 6875295Srandyf mutex_exit(&tod_lock); 6885295Srandyf /* We only want to do this once. */ 6895295Srandyf if (tsc_needs_resume == 0) { 6905295Srandyf if (tsc_delta_onsuspend) { 6915295Srandyf tsc_adjust_delta(tsc_saved_tsc); 6925295Srandyf } else { 6935295Srandyf tsc_adjust_delta(nsec_scale); 6945295Srandyf } 6955295Srandyf tsc_suspend_count++; 6965295Srandyf } 6975295Srandyf } 6985295Srandyf 6995295Srandyf invalidate_cache(); 7005295Srandyf tsc_needs_resume = 1; 7015295Srandyf } 7025295Srandyf 7035295Srandyf /* 7045295Srandyf * Restore all timestamp state based on the snapshots taken at 7055295Srandyf * suspend time. 7065295Srandyf */ 7075295Srandyf void 7085295Srandyf tsc_resume(void) 7095295Srandyf { 7105295Srandyf /* 7115295Srandyf * We only need to (and want to) do this once. So let the first 7125295Srandyf * caller handle this (we are locked by the cpu lock), as it 7135295Srandyf * is preferential that we get the earliest sync. 7145295Srandyf */ 7155295Srandyf if (tsc_needs_resume) { 7165295Srandyf /* 7175295Srandyf * If using the TSC, adjust the delta based on how long 7185295Srandyf * we were sleeping (or away). We also adjust for 7195295Srandyf * migration and a grown TSC. 7205295Srandyf */ 7215295Srandyf if (tsc_saved_tsc != 0) { 7225295Srandyf timestruc_t ts; 7235295Srandyf hrtime_t now, sleep_tsc = 0; 7245295Srandyf int sleep_sec; 7255295Srandyf extern void tsc_tick(void); 7265295Srandyf extern uint64_t cpu_freq_hz; 7275295Srandyf 7285295Srandyf /* tsc_read() MUST be before TODOP_GET() */ 7295295Srandyf mutex_enter(&tod_lock); 7305295Srandyf now = tsc_read(); 7315295Srandyf ts = TODOP_GET(tod_ops); 7325295Srandyf mutex_exit(&tod_lock); 7335295Srandyf 7345295Srandyf /* Compute seconds of sleep time */ 7355295Srandyf sleep_sec = ts.tv_sec - tsc_saved_ts.tv_sec; 7365295Srandyf 7375295Srandyf /* 7385295Srandyf * If the saved sec is less that or equal to 7395295Srandyf * the current ts, then there is likely a 7405295Srandyf * problem with the clock. Assume at least 7415295Srandyf * one second has passed, so that time goes forward. 7425295Srandyf */ 7435295Srandyf if (sleep_sec <= 0) { 7445295Srandyf sleep_sec = 1; 7455295Srandyf } 7465295Srandyf 7475295Srandyf /* How many TSC's should have occured while sleeping */ 7485295Srandyf if (tsc_adjust_seconds) 7495295Srandyf sleep_tsc = sleep_sec * cpu_freq_hz; 7505295Srandyf 7515295Srandyf /* 7525295Srandyf * We also want to subtract from the "sleep_tsc" 7535295Srandyf * the current value of tsc_read(), so that our 7545295Srandyf * adjustment accounts for the amount of time we 7555295Srandyf * have been resumed _or_ an adjustment based on 7565295Srandyf * the fact that we didn't actually power off the 7575295Srandyf * CPU (migration is another issue, but _should_ 7585295Srandyf * also comply with this calculation). If the CPU 7595295Srandyf * never powered off, then: 7605295Srandyf * 'now == sleep_tsc + saved_tsc' 7615295Srandyf * and the delta will effectively be "0". 7625295Srandyf */ 7635295Srandyf sleep_tsc -= now; 7645295Srandyf if (tsc_delta_onsuspend) { 7655295Srandyf tsc_adjust_delta(sleep_tsc); 7665295Srandyf } else { 7675295Srandyf tsc_adjust_delta(tsc_saved_tsc + sleep_tsc); 7685295Srandyf } 7695295Srandyf tsc_saved_tsc = 0; 7705295Srandyf 7715295Srandyf tsc_tick(); 7725295Srandyf } 7735295Srandyf tsc_needs_resume = 0; 7745295Srandyf } 7755295Srandyf 7765295Srandyf } 777