xref: /onnv-gate/usr/src/uts/i86pc/os/timestamp.c (revision 3446:5903aece022d)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*3446Smrj  * Common Development and Distribution License (the "License").
6*3446Smrj  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
210Sstevel@tonic-gate /*
22*3446Smrj  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
230Sstevel@tonic-gate  * Use is subject to license terms.
240Sstevel@tonic-gate  */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
270Sstevel@tonic-gate 
280Sstevel@tonic-gate #include <sys/types.h>
290Sstevel@tonic-gate #include <sys/param.h>
300Sstevel@tonic-gate #include <sys/systm.h>
310Sstevel@tonic-gate #include <sys/disp.h>
320Sstevel@tonic-gate #include <sys/var.h>
330Sstevel@tonic-gate #include <sys/cmn_err.h>
340Sstevel@tonic-gate #include <sys/debug.h>
350Sstevel@tonic-gate #include <sys/x86_archext.h>
360Sstevel@tonic-gate #include <sys/archsystm.h>
370Sstevel@tonic-gate #include <sys/cpuvar.h>
380Sstevel@tonic-gate #include <sys/psm_defs.h>
390Sstevel@tonic-gate #include <sys/clock.h>
400Sstevel@tonic-gate #include <sys/atomic.h>
410Sstevel@tonic-gate #include <sys/lockstat.h>
420Sstevel@tonic-gate #include <sys/smp_impldefs.h>
430Sstevel@tonic-gate #include <sys/dtrace.h>
440Sstevel@tonic-gate #include <sys/time.h>
450Sstevel@tonic-gate 
460Sstevel@tonic-gate /*
470Sstevel@tonic-gate  * Using the Pentium's TSC register for gethrtime()
480Sstevel@tonic-gate  * ------------------------------------------------
490Sstevel@tonic-gate  *
500Sstevel@tonic-gate  * The Pentium family, like many chip architectures, has a high-resolution
510Sstevel@tonic-gate  * timestamp counter ("TSC") which increments once per CPU cycle.  The contents
520Sstevel@tonic-gate  * of the timestamp counter are read with the RDTSC instruction.
530Sstevel@tonic-gate  *
540Sstevel@tonic-gate  * As with its UltraSPARC equivalent (the %tick register), TSC's cycle count
550Sstevel@tonic-gate  * must be translated into nanoseconds in order to implement gethrtime().
560Sstevel@tonic-gate  * We avoid inducing floating point operations in this conversion by
570Sstevel@tonic-gate  * implementing the same nsec_scale algorithm as that found in the sun4u
580Sstevel@tonic-gate  * platform code.  The sun4u NATIVE_TIME_TO_NSEC_SCALE block comment contains
590Sstevel@tonic-gate  * a detailed description of the algorithm; the comment is not reproduced
600Sstevel@tonic-gate  * here.  This implementation differs only in its value for NSEC_SHIFT:
610Sstevel@tonic-gate  * we implement an NSEC_SHIFT of 5 (instead of sun4u's 4) to allow for
620Sstevel@tonic-gate  * 60 MHz Pentiums.
630Sstevel@tonic-gate  *
640Sstevel@tonic-gate  * While TSC and %tick are both cycle counting registers, TSC's functionality
650Sstevel@tonic-gate  * falls short in several critical ways:
660Sstevel@tonic-gate  *
670Sstevel@tonic-gate  *  (a)	TSCs on different CPUs are not guaranteed to be in sync.  While in
680Sstevel@tonic-gate  *	practice they often _are_ in sync, this isn't guaranteed by the
690Sstevel@tonic-gate  *	architecture.
700Sstevel@tonic-gate  *
710Sstevel@tonic-gate  *  (b)	The TSC cannot be reliably set to an arbitrary value.  The architecture
720Sstevel@tonic-gate  *	only supports writing the low 32-bits of TSC, making it impractical
730Sstevel@tonic-gate  *	to rewrite.
740Sstevel@tonic-gate  *
750Sstevel@tonic-gate  *  (c)	The architecture doesn't have the capacity to interrupt based on
760Sstevel@tonic-gate  *	arbitrary values of TSC; there is no TICK_CMPR equivalent.
770Sstevel@tonic-gate  *
780Sstevel@tonic-gate  * Together, (a) and (b) imply that software must track the skew between
790Sstevel@tonic-gate  * TSCs and account for it (it is assumed that while there may exist skew,
800Sstevel@tonic-gate  * there does not exist drift).  To determine the skew between CPUs, we
810Sstevel@tonic-gate  * have newly onlined CPUs call tsc_sync_slave(), while the CPU performing
820Sstevel@tonic-gate  * the online operation calls tsc_sync_master().  Once both CPUs are ready,
830Sstevel@tonic-gate  * the master sets a shared flag, and each reads its TSC register.  To reduce
840Sstevel@tonic-gate  * bias, we then wait until both CPUs are ready again, but this time the
850Sstevel@tonic-gate  * slave sets the shared flag, and each reads its TSC register again. The
860Sstevel@tonic-gate  * master compares the average of the two sample values, and, if observable
870Sstevel@tonic-gate  * skew is found, changes the gethrtimef function pointer to point to a
880Sstevel@tonic-gate  * gethrtime() implementation which will take the discovered skew into
890Sstevel@tonic-gate  * consideration.
900Sstevel@tonic-gate  *
910Sstevel@tonic-gate  * In the absence of time-of-day clock adjustments, gethrtime() must stay in
920Sstevel@tonic-gate  * sync with gettimeofday().  This is problematic; given (c), the software
930Sstevel@tonic-gate  * cannot drive its time-of-day source from TSC, and yet they must somehow be
940Sstevel@tonic-gate  * kept in sync.  We implement this by having a routine, tsc_tick(), which
950Sstevel@tonic-gate  * is called once per second from the interrupt which drives time-of-day.
960Sstevel@tonic-gate  * tsc_tick() recalculates nsec_scale based on the number of the CPU cycles
970Sstevel@tonic-gate  * since boot versus the number of seconds since boot.  This algorithm
980Sstevel@tonic-gate  * becomes more accurate over time and converges quickly; the error in
990Sstevel@tonic-gate  * nsec_scale is typically under 1 ppm less than 10 seconds after boot, and
1000Sstevel@tonic-gate  * is less than 100 ppb 1 minute after boot.
1010Sstevel@tonic-gate  *
1020Sstevel@tonic-gate  * Note that the hrtime base for gethrtime, tsc_hrtime_base, is modified
1030Sstevel@tonic-gate  * atomically with nsec_scale under CLOCK_LOCK.  This assures that time
1040Sstevel@tonic-gate  * monotonically increases.
1050Sstevel@tonic-gate  */
1060Sstevel@tonic-gate 
1070Sstevel@tonic-gate #define	NSEC_SHIFT 5
1080Sstevel@tonic-gate 
1090Sstevel@tonic-gate static uint_t nsec_scale;
1100Sstevel@tonic-gate 
1110Sstevel@tonic-gate /*
1120Sstevel@tonic-gate  * These two variables used to be grouped together inside of a structure that
1130Sstevel@tonic-gate  * lived on a single cache line. A regression (bug ID 4623398) caused the
1140Sstevel@tonic-gate  * compiler to emit code that "optimized" away the while-loops below. The
1150Sstevel@tonic-gate  * result was that no synchronization between the onlining and onlined CPUs
1160Sstevel@tonic-gate  * took place.
1170Sstevel@tonic-gate  */
1180Sstevel@tonic-gate static volatile int tsc_ready;
1190Sstevel@tonic-gate static volatile int tsc_sync_go;
1200Sstevel@tonic-gate 
1210Sstevel@tonic-gate /*
1220Sstevel@tonic-gate  * Used as indices into the tsc_sync_snaps[] array.
1230Sstevel@tonic-gate  */
1240Sstevel@tonic-gate #define	TSC_MASTER		0
1250Sstevel@tonic-gate #define	TSC_SLAVE		1
1260Sstevel@tonic-gate 
1270Sstevel@tonic-gate /*
1280Sstevel@tonic-gate  * Used in the tsc_master_sync()/tsc_slave_sync() rendezvous.
1290Sstevel@tonic-gate  */
1300Sstevel@tonic-gate #define	TSC_SYNC_STOP		1
1310Sstevel@tonic-gate #define	TSC_SYNC_GO		2
1320Sstevel@tonic-gate #define	TSC_SYNC_AGAIN		3
1330Sstevel@tonic-gate 
1340Sstevel@tonic-gate /*
1350Sstevel@tonic-gate  * XX64	Is the faster way to do this with a 64-bit ABI?
1360Sstevel@tonic-gate  */
137*3446Smrj 
138*3446Smrj #define	TSC_CONVERT_AND_ADD(tsc, hrt, scale) { 		\
139*3446Smrj 	unsigned int *_l = (unsigned int *)&(tsc); 	\
140*3446Smrj 	(hrt) += mul32(_l[1], scale) << NSEC_SHIFT; 	\
1410Sstevel@tonic-gate 	(hrt) += mul32(_l[0], scale) >> (32 - NSEC_SHIFT); \
1420Sstevel@tonic-gate }
1430Sstevel@tonic-gate 
144*3446Smrj #define	TSC_CONVERT(tsc, hrt, scale) { 			\
145*3446Smrj 	unsigned int *_l = (unsigned int *)&(tsc); 	\
146*3446Smrj 	(hrt) = mul32(_l[1], scale) << NSEC_SHIFT; 	\
1470Sstevel@tonic-gate 	(hrt) += mul32(_l[0], scale) >> (32 - NSEC_SHIFT); \
1480Sstevel@tonic-gate }
1490Sstevel@tonic-gate 
150*3446Smrj int tsc_master_slave_sync_needed = 1;
1510Sstevel@tonic-gate 
1520Sstevel@tonic-gate static int	tsc_max_delta;
1530Sstevel@tonic-gate static hrtime_t tsc_sync_snaps[2];
1540Sstevel@tonic-gate static hrtime_t tsc_sync_delta[NCPU];
1550Sstevel@tonic-gate static hrtime_t tsc_sync_tick_delta[NCPU];
1560Sstevel@tonic-gate static hrtime_t	tsc_last = 0;
1570Sstevel@tonic-gate static hrtime_t	tsc_last_jumped = 0;
1580Sstevel@tonic-gate static hrtime_t	tsc_hrtime_base = 0;
1590Sstevel@tonic-gate static int	tsc_jumped = 0;
1600Sstevel@tonic-gate 
1610Sstevel@tonic-gate static hrtime_t	shadow_tsc_hrtime_base;
1620Sstevel@tonic-gate static hrtime_t	shadow_tsc_last;
1630Sstevel@tonic-gate static uint_t	shadow_nsec_scale;
1640Sstevel@tonic-gate static uint32_t	shadow_hres_lock;
1650Sstevel@tonic-gate 
1660Sstevel@tonic-gate /*
1670Sstevel@tonic-gate  * Called by the master after the sync operation is complete.  If the
1680Sstevel@tonic-gate  * slave is discovered to lag, gethrtimef will be changed to point to
1690Sstevel@tonic-gate  * tsc_gethrtime_delta().
1700Sstevel@tonic-gate  */
1710Sstevel@tonic-gate static void
1720Sstevel@tonic-gate tsc_digest(processorid_t target)
1730Sstevel@tonic-gate {
1740Sstevel@tonic-gate 	hrtime_t tdelta, hdelta = 0;
1750Sstevel@tonic-gate 	int max = tsc_max_delta;
1760Sstevel@tonic-gate 	processorid_t source = CPU->cpu_id;
1770Sstevel@tonic-gate 	int update;
1780Sstevel@tonic-gate 
1790Sstevel@tonic-gate 	update = tsc_sync_delta[source] != 0 ||
1800Sstevel@tonic-gate 	    gethrtimef == tsc_gethrtime_delta;
1810Sstevel@tonic-gate 
1820Sstevel@tonic-gate 	/*
1830Sstevel@tonic-gate 	 * We divide by 2 since each of the data points is the sum of two TSC
1840Sstevel@tonic-gate 	 * reads; this takes the average of the two.
1850Sstevel@tonic-gate 	 */
1860Sstevel@tonic-gate 	tdelta = (tsc_sync_snaps[TSC_SLAVE] - tsc_sync_snaps[TSC_MASTER]) / 2;
1870Sstevel@tonic-gate 	if ((tdelta > max) || ((tdelta >= 0) && update)) {
1880Sstevel@tonic-gate 		TSC_CONVERT_AND_ADD(tdelta, hdelta, nsec_scale);
1890Sstevel@tonic-gate 		tsc_sync_delta[target] = tsc_sync_delta[source] - hdelta;
1900Sstevel@tonic-gate 		tsc_sync_tick_delta[target] = -tdelta;
1910Sstevel@tonic-gate 		gethrtimef = tsc_gethrtime_delta;
1920Sstevel@tonic-gate 		gethrtimeunscaledf = tsc_gethrtimeunscaled_delta;
1930Sstevel@tonic-gate 		return;
1940Sstevel@tonic-gate 	}
1950Sstevel@tonic-gate 
1960Sstevel@tonic-gate 	tdelta = -tdelta;
1970Sstevel@tonic-gate 	if ((tdelta > max) || update) {
1980Sstevel@tonic-gate 		TSC_CONVERT_AND_ADD(tdelta, hdelta, nsec_scale);
1990Sstevel@tonic-gate 		tsc_sync_delta[target] = tsc_sync_delta[source] + hdelta;
2000Sstevel@tonic-gate 		tsc_sync_tick_delta[target] = tdelta;
2010Sstevel@tonic-gate 		gethrtimef = tsc_gethrtime_delta;
2020Sstevel@tonic-gate 		gethrtimeunscaledf = tsc_gethrtimeunscaled_delta;
2030Sstevel@tonic-gate 	}
2040Sstevel@tonic-gate 
2050Sstevel@tonic-gate }
2060Sstevel@tonic-gate 
2070Sstevel@tonic-gate /*
2080Sstevel@tonic-gate  * Called by a CPU which has just performed an online operation on another
2090Sstevel@tonic-gate  * CPU.  It is expected that the newly onlined CPU will call tsc_sync_slave().
2100Sstevel@tonic-gate  */
2110Sstevel@tonic-gate void
2120Sstevel@tonic-gate tsc_sync_master(processorid_t slave)
2130Sstevel@tonic-gate {
214*3446Smrj 	ulong_t flags;
2150Sstevel@tonic-gate 	hrtime_t hrt;
2160Sstevel@tonic-gate 
217*3446Smrj 	if (!tsc_master_slave_sync_needed)
218*3446Smrj 		return;
219*3446Smrj 
2200Sstevel@tonic-gate 	ASSERT(tsc_sync_go != TSC_SYNC_GO);
2210Sstevel@tonic-gate 
2220Sstevel@tonic-gate 	flags = clear_int_flag();
2230Sstevel@tonic-gate 
2240Sstevel@tonic-gate 	/*
2250Sstevel@tonic-gate 	 * Wait for the slave CPU to arrive.
2260Sstevel@tonic-gate 	 */
2270Sstevel@tonic-gate 	while (tsc_ready != TSC_SYNC_GO)
2280Sstevel@tonic-gate 		continue;
2290Sstevel@tonic-gate 
2300Sstevel@tonic-gate 	/*
2310Sstevel@tonic-gate 	 * Tell the slave CPU to begin reading its TSC; read our own.
2320Sstevel@tonic-gate 	 */
2330Sstevel@tonic-gate 	tsc_sync_go = TSC_SYNC_GO;
2340Sstevel@tonic-gate 	hrt = tsc_read();
2350Sstevel@tonic-gate 
2360Sstevel@tonic-gate 	/*
2370Sstevel@tonic-gate 	 * Tell the slave that we're ready, and wait for the slave to tell us
2380Sstevel@tonic-gate 	 * to read our TSC again.
2390Sstevel@tonic-gate 	 */
2400Sstevel@tonic-gate 	tsc_ready = TSC_SYNC_AGAIN;
2410Sstevel@tonic-gate 	while (tsc_sync_go != TSC_SYNC_AGAIN)
2420Sstevel@tonic-gate 		continue;
2430Sstevel@tonic-gate 
2440Sstevel@tonic-gate 	hrt += tsc_read();
2450Sstevel@tonic-gate 	tsc_sync_snaps[TSC_MASTER] = hrt;
2460Sstevel@tonic-gate 
2470Sstevel@tonic-gate 	/*
2480Sstevel@tonic-gate 	 * Wait for the slave to finish reading its TSC.
2490Sstevel@tonic-gate 	 */
2500Sstevel@tonic-gate 	while (tsc_ready != TSC_SYNC_STOP)
2510Sstevel@tonic-gate 		continue;
2520Sstevel@tonic-gate 
2530Sstevel@tonic-gate 	/*
2540Sstevel@tonic-gate 	 * At this point, both CPUs have performed their tsc_read() calls.
2550Sstevel@tonic-gate 	 * We'll digest it now before letting the slave CPU return.
2560Sstevel@tonic-gate 	 */
2570Sstevel@tonic-gate 	tsc_digest(slave);
2580Sstevel@tonic-gate 	tsc_sync_go = TSC_SYNC_STOP;
2590Sstevel@tonic-gate 
2600Sstevel@tonic-gate 	restore_int_flag(flags);
2610Sstevel@tonic-gate }
2620Sstevel@tonic-gate 
2630Sstevel@tonic-gate /*
2640Sstevel@tonic-gate  * Called by a CPU which has just been onlined.  It is expected that the CPU
2650Sstevel@tonic-gate  * performing the online operation will call tsc_sync_master().
2660Sstevel@tonic-gate  */
2670Sstevel@tonic-gate void
2680Sstevel@tonic-gate tsc_sync_slave(void)
2690Sstevel@tonic-gate {
270*3446Smrj 	ulong_t flags;
2710Sstevel@tonic-gate 	hrtime_t hrt;
2720Sstevel@tonic-gate 
273*3446Smrj 	if (!tsc_master_slave_sync_needed)
274*3446Smrj 		return;
275*3446Smrj 
2760Sstevel@tonic-gate 	ASSERT(tsc_sync_go != TSC_SYNC_GO);
2770Sstevel@tonic-gate 
2780Sstevel@tonic-gate 	flags = clear_int_flag();
2790Sstevel@tonic-gate 
2801389Sdmick 	/* to test tsc_gethrtime_delta, add wrmsr(REG_TSC, 0) here */
2811389Sdmick 
2820Sstevel@tonic-gate 	/*
2830Sstevel@tonic-gate 	 * Tell the master CPU that we're ready, and wait for the master to
2840Sstevel@tonic-gate 	 * tell us to begin reading our TSC.
2850Sstevel@tonic-gate 	 */
2860Sstevel@tonic-gate 	tsc_ready = TSC_SYNC_GO;
2870Sstevel@tonic-gate 	while (tsc_sync_go != TSC_SYNC_GO)
2880Sstevel@tonic-gate 		continue;
2890Sstevel@tonic-gate 
2900Sstevel@tonic-gate 	hrt = tsc_read();
2910Sstevel@tonic-gate 
2920Sstevel@tonic-gate 	/*
2930Sstevel@tonic-gate 	 * Wait for the master CPU to be ready to read its TSC again.
2940Sstevel@tonic-gate 	 */
2950Sstevel@tonic-gate 	while (tsc_ready != TSC_SYNC_AGAIN)
2960Sstevel@tonic-gate 		continue;
2970Sstevel@tonic-gate 
2980Sstevel@tonic-gate 	/*
2990Sstevel@tonic-gate 	 * Tell the master CPU to read its TSC again; read ours again.
3000Sstevel@tonic-gate 	 */
3010Sstevel@tonic-gate 	tsc_sync_go = TSC_SYNC_AGAIN;
3020Sstevel@tonic-gate 
3030Sstevel@tonic-gate 	hrt += tsc_read();
3040Sstevel@tonic-gate 	tsc_sync_snaps[TSC_SLAVE] = hrt;
3050Sstevel@tonic-gate 
3060Sstevel@tonic-gate 	/*
3070Sstevel@tonic-gate 	 * Tell the master that we're done, and wait to be dismissed.
3080Sstevel@tonic-gate 	 */
3090Sstevel@tonic-gate 	tsc_ready = TSC_SYNC_STOP;
3100Sstevel@tonic-gate 	while (tsc_sync_go != TSC_SYNC_STOP)
3110Sstevel@tonic-gate 		continue;
3120Sstevel@tonic-gate 
3130Sstevel@tonic-gate 	restore_int_flag(flags);
3140Sstevel@tonic-gate }
3150Sstevel@tonic-gate 
3160Sstevel@tonic-gate void
3170Sstevel@tonic-gate tsc_hrtimeinit(uint64_t cpu_freq_hz)
3180Sstevel@tonic-gate {
3190Sstevel@tonic-gate 	longlong_t tsc;
320*3446Smrj 	ulong_t flags;
3210Sstevel@tonic-gate 
3220Sstevel@tonic-gate 	/*
3230Sstevel@tonic-gate 	 * cpu_freq_hz is the measured cpu frequency in hertz
3240Sstevel@tonic-gate 	 */
3250Sstevel@tonic-gate 
3260Sstevel@tonic-gate 	/*
3270Sstevel@tonic-gate 	 * We can't accommodate CPUs slower than 31.25 MHz.
3280Sstevel@tonic-gate 	 */
3290Sstevel@tonic-gate 	ASSERT(cpu_freq_hz > NANOSEC / (1 << NSEC_SHIFT));
3300Sstevel@tonic-gate 	nsec_scale =
3310Sstevel@tonic-gate 	    (uint_t)
3320Sstevel@tonic-gate 		(((uint64_t)NANOSEC << (32 - NSEC_SHIFT)) / cpu_freq_hz);
3330Sstevel@tonic-gate 
3340Sstevel@tonic-gate 	flags = clear_int_flag();
3350Sstevel@tonic-gate 	tsc = tsc_read();
3360Sstevel@tonic-gate 	(void) tsc_gethrtime();
3370Sstevel@tonic-gate 	tsc_max_delta = tsc_read() - tsc;
3380Sstevel@tonic-gate 	restore_int_flag(flags);
3390Sstevel@tonic-gate }
3400Sstevel@tonic-gate 
3410Sstevel@tonic-gate /*
342*3446Smrj  * Called once per second on a CPU from the cyclic subsystem's
343*3446Smrj  * CY_HIGH_LEVEL interrupt.  (No longer just cpu0-only)
3440Sstevel@tonic-gate  */
3450Sstevel@tonic-gate void
3460Sstevel@tonic-gate tsc_tick(void)
3470Sstevel@tonic-gate {
3480Sstevel@tonic-gate 	hrtime_t now, delta;
3490Sstevel@tonic-gate 	ushort_t spl;
3500Sstevel@tonic-gate 
3510Sstevel@tonic-gate 	/*
3520Sstevel@tonic-gate 	 * Before we set the new variables, we set the shadow values.  This
3530Sstevel@tonic-gate 	 * allows for lock free operation in dtrace_gethrtime().
3540Sstevel@tonic-gate 	 */
3550Sstevel@tonic-gate 	lock_set_spl((lock_t *)&shadow_hres_lock + HRES_LOCK_OFFSET,
3560Sstevel@tonic-gate 	    ipltospl(CBE_HIGH_PIL), &spl);
3570Sstevel@tonic-gate 
3580Sstevel@tonic-gate 	shadow_tsc_hrtime_base = tsc_hrtime_base;
3590Sstevel@tonic-gate 	shadow_tsc_last = tsc_last;
3600Sstevel@tonic-gate 	shadow_nsec_scale = nsec_scale;
3610Sstevel@tonic-gate 
3620Sstevel@tonic-gate 	shadow_hres_lock++;
3630Sstevel@tonic-gate 	splx(spl);
3640Sstevel@tonic-gate 
3650Sstevel@tonic-gate 	CLOCK_LOCK(&spl);
3660Sstevel@tonic-gate 
3670Sstevel@tonic-gate 	now = tsc_read();
3680Sstevel@tonic-gate 
3691389Sdmick 	if (gethrtimef == tsc_gethrtime_delta)
3701389Sdmick 		now += tsc_sync_tick_delta[CPU->cpu_id];
3711389Sdmick 
3720Sstevel@tonic-gate 	if (now < tsc_last) {
3730Sstevel@tonic-gate 		/*
3740Sstevel@tonic-gate 		 * The TSC has just jumped into the past.  We assume that
3750Sstevel@tonic-gate 		 * this is due to a suspend/resume cycle, and we're going
3760Sstevel@tonic-gate 		 * to use the _current_ value of TSC as the delta.  This
3770Sstevel@tonic-gate 		 * will keep tsc_hrtime_base correct.  We're also going to
3780Sstevel@tonic-gate 		 * assume that rate of tsc does not change after a suspend
3790Sstevel@tonic-gate 		 * resume (i.e nsec_scale remains the same).
3800Sstevel@tonic-gate 		 */
3810Sstevel@tonic-gate 		delta = now;
3820Sstevel@tonic-gate 		tsc_last_jumped += tsc_last;
3830Sstevel@tonic-gate 		tsc_jumped = 1;
3840Sstevel@tonic-gate 	} else {
3850Sstevel@tonic-gate 		/*
3860Sstevel@tonic-gate 		 * Determine the number of TSC ticks since the last clock
3870Sstevel@tonic-gate 		 * tick, and add that to the hrtime base.
3880Sstevel@tonic-gate 		 */
3890Sstevel@tonic-gate 		delta = now - tsc_last;
3900Sstevel@tonic-gate 	}
3910Sstevel@tonic-gate 
3920Sstevel@tonic-gate 	TSC_CONVERT_AND_ADD(delta, tsc_hrtime_base, nsec_scale);
3930Sstevel@tonic-gate 	tsc_last = now;
3940Sstevel@tonic-gate 
3950Sstevel@tonic-gate 	CLOCK_UNLOCK(spl);
3960Sstevel@tonic-gate }
3970Sstevel@tonic-gate 
3980Sstevel@tonic-gate hrtime_t
3990Sstevel@tonic-gate tsc_gethrtime(void)
4000Sstevel@tonic-gate {
4010Sstevel@tonic-gate 	uint32_t old_hres_lock;
4020Sstevel@tonic-gate 	hrtime_t tsc, hrt;
4030Sstevel@tonic-gate 
4040Sstevel@tonic-gate 	do {
4050Sstevel@tonic-gate 		old_hres_lock = hres_lock;
4060Sstevel@tonic-gate 
4070Sstevel@tonic-gate 		if ((tsc = tsc_read()) >= tsc_last) {
4080Sstevel@tonic-gate 			/*
4090Sstevel@tonic-gate 			 * It would seem to be obvious that this is true
4100Sstevel@tonic-gate 			 * (that is, the past is less than the present),
4110Sstevel@tonic-gate 			 * but it isn't true in the presence of suspend/resume
4120Sstevel@tonic-gate 			 * cycles.  If we manage to call gethrtime()
4130Sstevel@tonic-gate 			 * after a resume, but before the first call to
4140Sstevel@tonic-gate 			 * tsc_tick(), we will see the jump.  In this case,
4150Sstevel@tonic-gate 			 * we will simply use the value in TSC as the delta.
4160Sstevel@tonic-gate 			 */
4170Sstevel@tonic-gate 			tsc -= tsc_last;
4180Sstevel@tonic-gate 		} else if (tsc >= tsc_last - 2*tsc_max_delta) {
4190Sstevel@tonic-gate 			/*
4200Sstevel@tonic-gate 			 * There is a chance that tsc_tick() has just run on
4210Sstevel@tonic-gate 			 * another CPU, and we have drifted just enough so that
4220Sstevel@tonic-gate 			 * we appear behind tsc_last.  In this case, force the
4230Sstevel@tonic-gate 			 * delta to be zero.
4240Sstevel@tonic-gate 			 */
4250Sstevel@tonic-gate 			tsc = 0;
4260Sstevel@tonic-gate 		}
4270Sstevel@tonic-gate 		hrt = tsc_hrtime_base;
4280Sstevel@tonic-gate 
4290Sstevel@tonic-gate 		TSC_CONVERT_AND_ADD(tsc, hrt, nsec_scale);
4300Sstevel@tonic-gate 	} while ((old_hres_lock & ~1) != hres_lock);
4310Sstevel@tonic-gate 
4320Sstevel@tonic-gate 	return (hrt);
4330Sstevel@tonic-gate }
4340Sstevel@tonic-gate 
4350Sstevel@tonic-gate /*
4360Sstevel@tonic-gate  * This is similar to the above, but it cannot actually spin on hres_lock.
4370Sstevel@tonic-gate  * As a result, it caches all of the variables it needs; if the variables
4380Sstevel@tonic-gate  * don't change, it's done.
4390Sstevel@tonic-gate  */
4400Sstevel@tonic-gate hrtime_t
4410Sstevel@tonic-gate dtrace_gethrtime(void)
4420Sstevel@tonic-gate {
4430Sstevel@tonic-gate 	uint32_t old_hres_lock;
4440Sstevel@tonic-gate 	hrtime_t tsc, hrt;
4450Sstevel@tonic-gate 
4460Sstevel@tonic-gate 	do {
4470Sstevel@tonic-gate 		old_hres_lock = hres_lock;
4480Sstevel@tonic-gate 
4490Sstevel@tonic-gate 		/*
4500Sstevel@tonic-gate 		 * See the comments in tsc_gethrtime(), above.
4510Sstevel@tonic-gate 		 */
4520Sstevel@tonic-gate 		if ((tsc = tsc_read()) >= tsc_last)
4530Sstevel@tonic-gate 			tsc -= tsc_last;
4540Sstevel@tonic-gate 		else if (tsc >= tsc_last - 2*tsc_max_delta)
4550Sstevel@tonic-gate 			tsc = 0;
4560Sstevel@tonic-gate 
4570Sstevel@tonic-gate 		hrt = tsc_hrtime_base;
4580Sstevel@tonic-gate 
4590Sstevel@tonic-gate 		TSC_CONVERT_AND_ADD(tsc, hrt, nsec_scale);
4600Sstevel@tonic-gate 
4610Sstevel@tonic-gate 		if ((old_hres_lock & ~1) == hres_lock)
4620Sstevel@tonic-gate 			break;
4630Sstevel@tonic-gate 
4640Sstevel@tonic-gate 		/*
4650Sstevel@tonic-gate 		 * If we're here, the clock lock is locked -- or it has been
4660Sstevel@tonic-gate 		 * unlocked and locked since we looked.  This may be due to
4670Sstevel@tonic-gate 		 * tsc_tick() running on another CPU -- or it may be because
4680Sstevel@tonic-gate 		 * some code path has ended up in dtrace_probe() with
4690Sstevel@tonic-gate 		 * CLOCK_LOCK held.  We'll try to determine that we're in
4700Sstevel@tonic-gate 		 * the former case by taking another lap if the lock has
4710Sstevel@tonic-gate 		 * changed since when we first looked at it.
4720Sstevel@tonic-gate 		 */
4730Sstevel@tonic-gate 		if (old_hres_lock != hres_lock)
4740Sstevel@tonic-gate 			continue;
4750Sstevel@tonic-gate 
4760Sstevel@tonic-gate 		/*
4770Sstevel@tonic-gate 		 * So the lock was and is locked.  We'll use the old data
4780Sstevel@tonic-gate 		 * instead.
4790Sstevel@tonic-gate 		 */
4800Sstevel@tonic-gate 		old_hres_lock = shadow_hres_lock;
4810Sstevel@tonic-gate 
4820Sstevel@tonic-gate 		/*
4830Sstevel@tonic-gate 		 * See the comments in tsc_gethrtime(), above.
4840Sstevel@tonic-gate 		 */
4850Sstevel@tonic-gate 		if ((tsc = tsc_read()) >= shadow_tsc_last)
4860Sstevel@tonic-gate 			tsc -= shadow_tsc_last;
4871389Sdmick 		else if (tsc >= shadow_tsc_last - 2 * tsc_max_delta)
4880Sstevel@tonic-gate 			tsc = 0;
4890Sstevel@tonic-gate 
4900Sstevel@tonic-gate 		hrt = shadow_tsc_hrtime_base;
4910Sstevel@tonic-gate 
4920Sstevel@tonic-gate 		TSC_CONVERT_AND_ADD(tsc, hrt, shadow_nsec_scale);
4930Sstevel@tonic-gate 	} while ((old_hres_lock & ~1) != shadow_hres_lock);
4940Sstevel@tonic-gate 
4950Sstevel@tonic-gate 	return (hrt);
4960Sstevel@tonic-gate }
4970Sstevel@tonic-gate 
4980Sstevel@tonic-gate hrtime_t
4990Sstevel@tonic-gate tsc_gethrtime_delta(void)
5000Sstevel@tonic-gate {
5011389Sdmick 	uint32_t old_hres_lock;
5021389Sdmick 	hrtime_t tsc, hrt;
5030Sstevel@tonic-gate 	int flags;
5040Sstevel@tonic-gate 
5051389Sdmick 	do {
5061389Sdmick 		old_hres_lock = hres_lock;
5071389Sdmick 
5081389Sdmick 		/*
5091389Sdmick 		 * We need to disable interrupts here to assure that we
5101389Sdmick 		 * don't migrate between the call to tsc_read() and
5111389Sdmick 		 * adding the CPU's TSC tick delta. Note that disabling
5121389Sdmick 		 * and reenabling preemption is forbidden here because
5131389Sdmick 		 * we may be in the middle of a fast trap. In the amd64
5141389Sdmick 		 * kernel we cannot tolerate preemption during a fast
5151389Sdmick 		 * trap. See _update_sregs().
5161389Sdmick 		 */
5170Sstevel@tonic-gate 
5181389Sdmick 		flags = clear_int_flag();
5191389Sdmick 		tsc = tsc_read() + tsc_sync_tick_delta[CPU->cpu_id];
5201389Sdmick 		restore_int_flag(flags);
5211389Sdmick 
5221389Sdmick 		/* See comments in tsc_gethrtime() above */
5231389Sdmick 
5241389Sdmick 		if (tsc >= tsc_last) {
5251389Sdmick 			tsc -= tsc_last;
5261389Sdmick 		} else if (tsc >= tsc_last - 2 * tsc_max_delta) {
5271389Sdmick 			tsc = 0;
5281389Sdmick 		}
5291389Sdmick 
5301389Sdmick 		hrt = tsc_hrtime_base;
5311389Sdmick 
5321389Sdmick 		TSC_CONVERT_AND_ADD(tsc, hrt, nsec_scale);
5331389Sdmick 	} while ((old_hres_lock & ~1) != hres_lock);
5340Sstevel@tonic-gate 
5350Sstevel@tonic-gate 	return (hrt);
5360Sstevel@tonic-gate }
5370Sstevel@tonic-gate 
5380Sstevel@tonic-gate extern uint64_t cpu_freq_hz;
5390Sstevel@tonic-gate extern int tsc_gethrtime_enable;
5400Sstevel@tonic-gate 
5410Sstevel@tonic-gate /*
5420Sstevel@tonic-gate  * The following converts nanoseconds of highres-time to ticks
5430Sstevel@tonic-gate  */
5440Sstevel@tonic-gate 
5450Sstevel@tonic-gate static uint64_t
5460Sstevel@tonic-gate hrtime2tick(hrtime_t ts)
5470Sstevel@tonic-gate {
5480Sstevel@tonic-gate 	hrtime_t q = ts / NANOSEC;
5490Sstevel@tonic-gate 	hrtime_t r = ts - (q * NANOSEC);
5500Sstevel@tonic-gate 
5510Sstevel@tonic-gate 	return (q * cpu_freq_hz + ((r * cpu_freq_hz) / NANOSEC));
5520Sstevel@tonic-gate }
5530Sstevel@tonic-gate 
5540Sstevel@tonic-gate /*
5550Sstevel@tonic-gate  * This is used to convert scaled high-res time from nanoseconds to
5560Sstevel@tonic-gate  * unscaled hardware ticks.  (Read from hardware timestamp counter)
5570Sstevel@tonic-gate  */
5580Sstevel@tonic-gate 
5590Sstevel@tonic-gate uint64_t
5600Sstevel@tonic-gate unscalehrtime(hrtime_t ts)
5610Sstevel@tonic-gate {
5620Sstevel@tonic-gate 	if (tsc_gethrtime_enable) {
5630Sstevel@tonic-gate 		uint64_t unscale = 0;
5640Sstevel@tonic-gate 		hrtime_t rescale;
5650Sstevel@tonic-gate 		hrtime_t diff = ts;
5660Sstevel@tonic-gate 
5670Sstevel@tonic-gate 		while (diff > (nsec_per_tick)) {
5680Sstevel@tonic-gate 			unscale += hrtime2tick(diff);
5690Sstevel@tonic-gate 			rescale = unscale;
5700Sstevel@tonic-gate 			scalehrtime(&rescale);
5710Sstevel@tonic-gate 			diff = ts - rescale;
5720Sstevel@tonic-gate 		}
5730Sstevel@tonic-gate 
5740Sstevel@tonic-gate 		return (unscale);
5750Sstevel@tonic-gate 	}
5760Sstevel@tonic-gate 	return (0);
5770Sstevel@tonic-gate }
5780Sstevel@tonic-gate 
5790Sstevel@tonic-gate 
5800Sstevel@tonic-gate hrtime_t
5810Sstevel@tonic-gate tsc_gethrtimeunscaled(void)
5820Sstevel@tonic-gate {
5830Sstevel@tonic-gate 	uint32_t old_hres_lock;
5840Sstevel@tonic-gate 	hrtime_t tsc;
5850Sstevel@tonic-gate 
5860Sstevel@tonic-gate 	do {
5870Sstevel@tonic-gate 		old_hres_lock = hres_lock;
5880Sstevel@tonic-gate 
589*3446Smrj 		/* See tsc_tick(). */
590*3446Smrj 		tsc = tsc_read() + tsc_last_jumped;
5910Sstevel@tonic-gate 	} while ((old_hres_lock & ~1) != hres_lock);
5920Sstevel@tonic-gate 
5930Sstevel@tonic-gate 	return (tsc);
5940Sstevel@tonic-gate }
5950Sstevel@tonic-gate 
5960Sstevel@tonic-gate 
5970Sstevel@tonic-gate /* Convert a tsc timestamp to nanoseconds */
5980Sstevel@tonic-gate void
5990Sstevel@tonic-gate tsc_scalehrtime(hrtime_t *tsc)
6000Sstevel@tonic-gate {
6010Sstevel@tonic-gate 	hrtime_t hrt;
6020Sstevel@tonic-gate 	hrtime_t mytsc;
6030Sstevel@tonic-gate 
6040Sstevel@tonic-gate 	if (tsc == NULL)
6050Sstevel@tonic-gate 		return;
6060Sstevel@tonic-gate 	mytsc = *tsc;
6070Sstevel@tonic-gate 
6080Sstevel@tonic-gate 	TSC_CONVERT(mytsc, hrt, nsec_scale);
6090Sstevel@tonic-gate 	*tsc  = hrt;
6100Sstevel@tonic-gate }
6110Sstevel@tonic-gate 
6120Sstevel@tonic-gate hrtime_t
6130Sstevel@tonic-gate tsc_gethrtimeunscaled_delta(void)
6140Sstevel@tonic-gate {
6150Sstevel@tonic-gate 	hrtime_t hrt;
6160Sstevel@tonic-gate 	int flags;
6170Sstevel@tonic-gate 
6180Sstevel@tonic-gate 	/*
6190Sstevel@tonic-gate 	 * Similarly to tsc_gethrtime_delta, we need to disable preemption
6200Sstevel@tonic-gate 	 * to prevent migration between the call to tsc_gethrtimeunscaled
6210Sstevel@tonic-gate 	 * and adding the CPU's hrtime delta. Note that disabling and
6220Sstevel@tonic-gate 	 * reenabling preemption is forbidden here because we may be in the
6230Sstevel@tonic-gate 	 * middle of a fast trap. In the amd64 kernel we cannot tolerate
6240Sstevel@tonic-gate 	 * preemption during a fast trap. See _update_sregs().
6250Sstevel@tonic-gate 	 */
6260Sstevel@tonic-gate 
6270Sstevel@tonic-gate 	flags = clear_int_flag();
6280Sstevel@tonic-gate 	hrt = tsc_gethrtimeunscaled() + tsc_sync_tick_delta[CPU->cpu_id];
6290Sstevel@tonic-gate 	restore_int_flag(flags);
6300Sstevel@tonic-gate 
6310Sstevel@tonic-gate 	return (hrt);
6320Sstevel@tonic-gate }
633