1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate #include <sys/types.h> 30*0Sstevel@tonic-gate #include <sys/disp.h> 31*0Sstevel@tonic-gate #include <sys/promif.h> 32*0Sstevel@tonic-gate #include <sys/clock.h> 33*0Sstevel@tonic-gate #include <sys/cpuvar.h> 34*0Sstevel@tonic-gate #include <sys/stack.h> 35*0Sstevel@tonic-gate #include <vm/as.h> 36*0Sstevel@tonic-gate #include <vm/hat.h> 37*0Sstevel@tonic-gate #include <sys/reboot.h> 38*0Sstevel@tonic-gate #include <sys/avintr.h> 39*0Sstevel@tonic-gate #include <sys/vtrace.h> 40*0Sstevel@tonic-gate #include <sys/proc.h> 41*0Sstevel@tonic-gate #include <sys/thread.h> 42*0Sstevel@tonic-gate #include <sys/cpupart.h> 43*0Sstevel@tonic-gate #include <sys/pset.h> 44*0Sstevel@tonic-gate #include <sys/copyops.h> 45*0Sstevel@tonic-gate #include <sys/chip.h> 46*0Sstevel@tonic-gate #include <sys/disp.h> 47*0Sstevel@tonic-gate #include <sys/debug.h> 48*0Sstevel@tonic-gate #include <sys/sunddi.h> 49*0Sstevel@tonic-gate #include <sys/x86_archext.h> 50*0Sstevel@tonic-gate #include <sys/privregs.h> 51*0Sstevel@tonic-gate #include <sys/machsystm.h> 52*0Sstevel@tonic-gate #include <sys/ontrap.h> 53*0Sstevel@tonic-gate #include <sys/bootconf.h> 54*0Sstevel@tonic-gate #include <sys/kdi.h> 55*0Sstevel@tonic-gate #include <sys/archsystm.h> 56*0Sstevel@tonic-gate #include <sys/promif.h> 57*0Sstevel@tonic-gate #include <sys/bootconf.h> 58*0Sstevel@tonic-gate #include <sys/kobj.h> 59*0Sstevel@tonic-gate #include <sys/kobj_lex.h> 60*0Sstevel@tonic-gate #if defined(__amd64) 61*0Sstevel@tonic-gate #include <sys/bootsvcs.h> 62*0Sstevel@tonic-gate 63*0Sstevel@tonic-gate /* 64*0Sstevel@tonic-gate * XX64 This stuff deals with switching stacks in case a trapping 65*0Sstevel@tonic-gate * thread wants to call back into boot -after- boot has lost track 66*0Sstevel@tonic-gate * of the mappings but before the kernel owns the console. 67*0Sstevel@tonic-gate * 68*0Sstevel@tonic-gate * (A better way to hide this would be to add a 'this' pointer to 69*0Sstevel@tonic-gate * every boot syscall so that vmx could get at the resulting save 70*0Sstevel@tonic-gate * area.) 71*0Sstevel@tonic-gate */ 72*0Sstevel@tonic-gate 73*0Sstevel@tonic-gate struct boot_syscalls *_vmx_sysp; 74*0Sstevel@tonic-gate static struct boot_syscalls __kbootsvcs; 75*0Sstevel@tonic-gate extern struct boot_syscalls *sysp; 76*0Sstevel@tonic-gate extern void _stack_safe_putchar(int c); 77*0Sstevel@tonic-gate #endif 78*0Sstevel@tonic-gate 79*0Sstevel@tonic-gate /* 80*0Sstevel@tonic-gate * some globals for patching the result of cpuid 81*0Sstevel@tonic-gate * to solve problems w/ creative cpu vendors 82*0Sstevel@tonic-gate */ 83*0Sstevel@tonic-gate 84*0Sstevel@tonic-gate extern uint32_t cpuid_feature_ecx_include; 85*0Sstevel@tonic-gate extern uint32_t cpuid_feature_ecx_exclude; 86*0Sstevel@tonic-gate extern uint32_t cpuid_feature_edx_include; 87*0Sstevel@tonic-gate extern uint32_t cpuid_feature_edx_exclude; 88*0Sstevel@tonic-gate 89*0Sstevel@tonic-gate /* 90*0Sstevel@tonic-gate * External Routines: 91*0Sstevel@tonic-gate */ 92*0Sstevel@tonic-gate 93*0Sstevel@tonic-gate extern void init_tables(void); 94*0Sstevel@tonic-gate 95*0Sstevel@tonic-gate 96*0Sstevel@tonic-gate static uint32_t 97*0Sstevel@tonic-gate cpuid_getval(char *name) 98*0Sstevel@tonic-gate { 99*0Sstevel@tonic-gate char prop[32]; 100*0Sstevel@tonic-gate u_longlong_t ll; 101*0Sstevel@tonic-gate extern struct bootops *bootops; 102*0Sstevel@tonic-gate if ((BOP_GETPROPLEN(bootops, name) > sizeof (prop)) || 103*0Sstevel@tonic-gate (BOP_GETPROP(bootops, name, prop) < 0) || 104*0Sstevel@tonic-gate (kobj_getvalue(prop, &ll) == -1)) 105*0Sstevel@tonic-gate return (0); 106*0Sstevel@tonic-gate return ((uint32_t)ll); 107*0Sstevel@tonic-gate } 108*0Sstevel@tonic-gate 109*0Sstevel@tonic-gate /* 110*0Sstevel@tonic-gate * Setup routine called right before main(). Interposing this function 111*0Sstevel@tonic-gate * before main() allows us to call it in a machine-independent fashion. 112*0Sstevel@tonic-gate */ 113*0Sstevel@tonic-gate void 114*0Sstevel@tonic-gate mlsetup(struct regs *rp) 115*0Sstevel@tonic-gate { 116*0Sstevel@tonic-gate extern struct classfuncs sys_classfuncs; 117*0Sstevel@tonic-gate extern struct chip cpu0_chip; 118*0Sstevel@tonic-gate extern disp_t cpu0_disp; 119*0Sstevel@tonic-gate extern char t0stack[]; 120*0Sstevel@tonic-gate 121*0Sstevel@tonic-gate ASSERT_STACK_ALIGNED(); 122*0Sstevel@tonic-gate 123*0Sstevel@tonic-gate #if defined(__amd64) 124*0Sstevel@tonic-gate 125*0Sstevel@tonic-gate #if (BS_VERSION > 4) 126*0Sstevel@tonic-gate /* 127*0Sstevel@tonic-gate * When new boot_syscalls are added to the vector, this routine 128*0Sstevel@tonic-gate * must be modified to copy them into the kernel's copy of the 129*0Sstevel@tonic-gate * vector. 130*0Sstevel@tonic-gate */ 131*0Sstevel@tonic-gate #error mlsetup() must be updated for amd64 to support new boot_syscalls 132*0Sstevel@tonic-gate #endif /* (BS_VERSION > 4) */ 133*0Sstevel@tonic-gate 134*0Sstevel@tonic-gate /* 135*0Sstevel@tonic-gate * XX64 This remaps vmx's putchar to use the kernel's version 136*0Sstevel@tonic-gate * that switches stacks before diving into vmx 137*0Sstevel@tonic-gate * See explanation/complaints in commentary above. 138*0Sstevel@tonic-gate */ 139*0Sstevel@tonic-gate _vmx_sysp = sysp; 140*0Sstevel@tonic-gate sysp = &__kbootsvcs; 141*0Sstevel@tonic-gate 142*0Sstevel@tonic-gate sysp->bsvc_getchar = _vmx_sysp->bsvc_getchar; 143*0Sstevel@tonic-gate sysp->bsvc_putchar = _stack_safe_putchar; 144*0Sstevel@tonic-gate sysp->bsvc_ischar = _vmx_sysp->bsvc_ischar; 145*0Sstevel@tonic-gate #endif 146*0Sstevel@tonic-gate /* 147*0Sstevel@tonic-gate * initialize cpu_self 148*0Sstevel@tonic-gate */ 149*0Sstevel@tonic-gate cpu[0]->cpu_self = cpu[0]; 150*0Sstevel@tonic-gate 151*0Sstevel@tonic-gate /* 152*0Sstevel@tonic-gate * check if we've got special bits to clear or set 153*0Sstevel@tonic-gate * when checking cpu features 154*0Sstevel@tonic-gate */ 155*0Sstevel@tonic-gate 156*0Sstevel@tonic-gate cpuid_feature_ecx_include = 157*0Sstevel@tonic-gate cpuid_getval("cpuid_feature_ecx_include"); 158*0Sstevel@tonic-gate cpuid_feature_ecx_exclude = 159*0Sstevel@tonic-gate cpuid_getval("cpuid_feature_ecx_exclude"); 160*0Sstevel@tonic-gate cpuid_feature_edx_include = 161*0Sstevel@tonic-gate cpuid_getval("cpuid_feature_edx_include"); 162*0Sstevel@tonic-gate cpuid_feature_edx_exclude = 163*0Sstevel@tonic-gate cpuid_getval("cpuid_feature_edx_exclude"); 164*0Sstevel@tonic-gate 165*0Sstevel@tonic-gate /* 166*0Sstevel@tonic-gate * The first lightweight pass (pass0) through the cpuid data 167*0Sstevel@tonic-gate * was done in locore before mlsetup was called. Do the next 168*0Sstevel@tonic-gate * pass in C code. 169*0Sstevel@tonic-gate * 170*0Sstevel@tonic-gate * The x86_feature bits are set here on the basis of the capabilities 171*0Sstevel@tonic-gate * of the boot CPU. Note that if we choose to support CPUs that have 172*0Sstevel@tonic-gate * different feature sets (at which point we would almost certainly 173*0Sstevel@tonic-gate * want to set the feature bits to correspond to the feature 174*0Sstevel@tonic-gate * minimum) this value may be altered. 175*0Sstevel@tonic-gate */ 176*0Sstevel@tonic-gate 177*0Sstevel@tonic-gate x86_feature = cpuid_pass1(cpu[0]); 178*0Sstevel@tonic-gate 179*0Sstevel@tonic-gate /* 180*0Sstevel@tonic-gate * Initialize idt0, gdt0, ldt0_default, ktss0 and dftss. 181*0Sstevel@tonic-gate */ 182*0Sstevel@tonic-gate init_tables(); 183*0Sstevel@tonic-gate 184*0Sstevel@tonic-gate #if defined(__amd64) 185*0Sstevel@tonic-gate /*CSTYLED*/ 186*0Sstevel@tonic-gate { 187*0Sstevel@tonic-gate /* 188*0Sstevel@tonic-gate * setup %gs for the kernel 189*0Sstevel@tonic-gate */ 190*0Sstevel@tonic-gate uint64_t addr64 = (uint64_t)&cpus[0]; 191*0Sstevel@tonic-gate wrmsr(MSR_AMD_GSBASE, &addr64); 192*0Sstevel@tonic-gate /* 193*0Sstevel@tonic-gate * XX64 We should never dereference off "other gsbase" or 194*0Sstevel@tonic-gate * "fsbase". So, we should arrange to point FSBASE and 195*0Sstevel@tonic-gate * KGSBASE somewhere truly awful e.g. point it at the last 196*0Sstevel@tonic-gate * valid address below the hole so that any attempts to index 197*0Sstevel@tonic-gate * off them cause an exception. 198*0Sstevel@tonic-gate * 199*0Sstevel@tonic-gate * For now, point it at 8G -- at least it should be unmapped 200*0Sstevel@tonic-gate * until some 64-bit processes run. 201*0Sstevel@tonic-gate */ 202*0Sstevel@tonic-gate addr64 = 0x200000000ul; 203*0Sstevel@tonic-gate wrmsr(MSR_AMD_FSBASE, &addr64); 204*0Sstevel@tonic-gate wrmsr(MSR_AMD_KGSBASE, &addr64); 205*0Sstevel@tonic-gate } 206*0Sstevel@tonic-gate 207*0Sstevel@tonic-gate #elif defined(__i386) 208*0Sstevel@tonic-gate /* 209*0Sstevel@tonic-gate * enable large page support right here. 210*0Sstevel@tonic-gate */ 211*0Sstevel@tonic-gate if (x86_feature & X86_LARGEPAGE) { 212*0Sstevel@tonic-gate cr4_value |= CR4_PSE; 213*0Sstevel@tonic-gate if (x86_feature & X86_PGE) 214*0Sstevel@tonic-gate cr4_value |= CR4_PGE; 215*0Sstevel@tonic-gate setup_121_andcall(enable_big_page_support, cr4_value); 216*0Sstevel@tonic-gate } 217*0Sstevel@tonic-gate 218*0Sstevel@tonic-gate /* 219*0Sstevel@tonic-gate * Some i386 processors do not implement the rdtsc instruction, 220*0Sstevel@tonic-gate * or at least they do not implement it correctly. 221*0Sstevel@tonic-gate * 222*0Sstevel@tonic-gate * For those that do, patch in the rdtsc instructions in 223*0Sstevel@tonic-gate * various parts of the kernel right now while the text is 224*0Sstevel@tonic-gate * still writable. 225*0Sstevel@tonic-gate */ 226*0Sstevel@tonic-gate if (x86_feature & X86_TSC) 227*0Sstevel@tonic-gate patch_tsc(); 228*0Sstevel@tonic-gate #endif 229*0Sstevel@tonic-gate 230*0Sstevel@tonic-gate /* 231*0Sstevel@tonic-gate * initialize t0 232*0Sstevel@tonic-gate */ 233*0Sstevel@tonic-gate t0.t_stk = (caddr_t)rp - MINFRAME; 234*0Sstevel@tonic-gate t0.t_stkbase = t0stack; 235*0Sstevel@tonic-gate t0.t_pri = maxclsyspri - 3; 236*0Sstevel@tonic-gate t0.t_schedflag = TS_LOAD | TS_DONT_SWAP; 237*0Sstevel@tonic-gate t0.t_procp = &p0; 238*0Sstevel@tonic-gate t0.t_plockp = &p0lock.pl_lock; 239*0Sstevel@tonic-gate t0.t_lwp = &lwp0; 240*0Sstevel@tonic-gate t0.t_forw = &t0; 241*0Sstevel@tonic-gate t0.t_back = &t0; 242*0Sstevel@tonic-gate t0.t_next = &t0; 243*0Sstevel@tonic-gate t0.t_prev = &t0; 244*0Sstevel@tonic-gate t0.t_cpu = cpu[0]; 245*0Sstevel@tonic-gate t0.t_disp_queue = &cpu0_disp; 246*0Sstevel@tonic-gate t0.t_bind_cpu = PBIND_NONE; 247*0Sstevel@tonic-gate t0.t_bind_pset = PS_NONE; 248*0Sstevel@tonic-gate t0.t_cpupart = &cp_default; 249*0Sstevel@tonic-gate t0.t_clfuncs = &sys_classfuncs.thread; 250*0Sstevel@tonic-gate t0.t_copyops = NULL; 251*0Sstevel@tonic-gate THREAD_ONPROC(&t0, CPU); 252*0Sstevel@tonic-gate 253*0Sstevel@tonic-gate lwp0.lwp_thread = &t0; 254*0Sstevel@tonic-gate lwp0.lwp_regs = (void *) rp; 255*0Sstevel@tonic-gate lwp0.lwp_procp = &p0; 256*0Sstevel@tonic-gate t0.t_tid = p0.p_lwpcnt = p0.p_lwprcnt = p0.p_lwpid = 1; 257*0Sstevel@tonic-gate 258*0Sstevel@tonic-gate p0.p_exec = NULL; 259*0Sstevel@tonic-gate p0.p_stat = SRUN; 260*0Sstevel@tonic-gate p0.p_flag = SSYS; 261*0Sstevel@tonic-gate p0.p_tlist = &t0; 262*0Sstevel@tonic-gate p0.p_stksize = 2*PAGESIZE; 263*0Sstevel@tonic-gate p0.p_stkpageszc = 0; 264*0Sstevel@tonic-gate p0.p_as = &kas; 265*0Sstevel@tonic-gate p0.p_lockp = &p0lock; 266*0Sstevel@tonic-gate p0.p_brkpageszc = 0; 267*0Sstevel@tonic-gate sigorset(&p0.p_ignore, &ignoredefault); 268*0Sstevel@tonic-gate 269*0Sstevel@tonic-gate CPU->cpu_thread = &t0; 270*0Sstevel@tonic-gate bzero(&cpu0_disp, sizeof (disp_t)); 271*0Sstevel@tonic-gate CPU->cpu_disp = &cpu0_disp; 272*0Sstevel@tonic-gate CPU->cpu_disp->disp_cpu = CPU; 273*0Sstevel@tonic-gate CPU->cpu_dispthread = &t0; 274*0Sstevel@tonic-gate CPU->cpu_idle_thread = &t0; 275*0Sstevel@tonic-gate CPU->cpu_flags = CPU_READY | CPU_RUNNING | CPU_EXISTS | CPU_ENABLE; 276*0Sstevel@tonic-gate CPU->cpu_dispatch_pri = t0.t_pri; 277*0Sstevel@tonic-gate 278*0Sstevel@tonic-gate CPU->cpu_mask = 1; 279*0Sstevel@tonic-gate CPU->cpu_id = 0; 280*0Sstevel@tonic-gate 281*0Sstevel@tonic-gate CPU->cpu_tss = &ktss0; 282*0Sstevel@tonic-gate 283*0Sstevel@tonic-gate CPU->cpu_pri = 12; /* initial PIL for the boot CPU */ 284*0Sstevel@tonic-gate 285*0Sstevel@tonic-gate CPU->cpu_ldt = ldt0_default; /* default LDT */ 286*0Sstevel@tonic-gate CPU->cpu_gdt = gdt0; 287*0Sstevel@tonic-gate 288*0Sstevel@tonic-gate /* 289*0Sstevel@tonic-gate * This must be done _after_ init_tables(), called above, has set up 290*0Sstevel@tonic-gate * ldt0_default_desc. 291*0Sstevel@tonic-gate */ 292*0Sstevel@tonic-gate #if defined(__amd64) 293*0Sstevel@tonic-gate /* 294*0Sstevel@tonic-gate * ldt0_default64 contains all invalid entries. We use that as p0's LDT 295*0Sstevel@tonic-gate * because p0 should never have any reason to use the LDT. This will 296*0Sstevel@tonic-gate * catch things early if such a scenario should ever occur. 297*0Sstevel@tonic-gate */ 298*0Sstevel@tonic-gate p0.p_ldt_desc = ldt0_default64_desc; 299*0Sstevel@tonic-gate #else 300*0Sstevel@tonic-gate p0.p_ldt_desc = ldt0_default_desc; 301*0Sstevel@tonic-gate #endif /* __amd64 */ 302*0Sstevel@tonic-gate 303*0Sstevel@tonic-gate /* 304*0Sstevel@tonic-gate * Kernel IDT. 305*0Sstevel@tonic-gate */ 306*0Sstevel@tonic-gate CPU->cpu_idt = idt0; 307*0Sstevel@tonic-gate 308*0Sstevel@tonic-gate /* 309*0Sstevel@tonic-gate * Initialize thread/cpu microstate accounting here 310*0Sstevel@tonic-gate */ 311*0Sstevel@tonic-gate init_mstate(&t0, LMS_SYSTEM); 312*0Sstevel@tonic-gate init_cpu_mstate(CPU, CMS_SYSTEM); 313*0Sstevel@tonic-gate 314*0Sstevel@tonic-gate /* 315*0Sstevel@tonic-gate * Initialize lists of available and active CPUs. 316*0Sstevel@tonic-gate */ 317*0Sstevel@tonic-gate cpu_list_init(CPU); 318*0Sstevel@tonic-gate 319*0Sstevel@tonic-gate /* 320*0Sstevel@tonic-gate * Initialize the lgrp framework 321*0Sstevel@tonic-gate */ 322*0Sstevel@tonic-gate lgrp_init(); 323*0Sstevel@tonic-gate 324*0Sstevel@tonic-gate /* 325*0Sstevel@tonic-gate * The lgroup code needs to at least know about a CPU's 326*0Sstevel@tonic-gate * chip association, but it's too early to fully initialize 327*0Sstevel@tonic-gate * cpu0_chip, since the device node for the boot CPU doesn't 328*0Sstevel@tonic-gate * exist yet. Initialize enough of it to get by until formal 329*0Sstevel@tonic-gate * initialization. 330*0Sstevel@tonic-gate */ 331*0Sstevel@tonic-gate CPU->cpu_rechoose = rechoose_interval; 332*0Sstevel@tonic-gate CPU->cpu_chip = &cpu0_chip; 333*0Sstevel@tonic-gate 334*0Sstevel@tonic-gate rp->r_fp = 0; /* terminate kernel stack traces! */ 335*0Sstevel@tonic-gate 336*0Sstevel@tonic-gate prom_init("kernel", (void *)NULL); 337*0Sstevel@tonic-gate 338*0Sstevel@tonic-gate if (boothowto & RB_HALT) { 339*0Sstevel@tonic-gate prom_printf("unix: kernel halted by -h flag\n"); 340*0Sstevel@tonic-gate prom_enter_mon(); 341*0Sstevel@tonic-gate } 342*0Sstevel@tonic-gate 343*0Sstevel@tonic-gate ASSERT_STACK_ALIGNED(); 344*0Sstevel@tonic-gate 345*0Sstevel@tonic-gate if (workaround_errata(CPU) != 0) 346*0Sstevel@tonic-gate panic("critical workaround(s) missing for boot cpu"); 347*0Sstevel@tonic-gate } 348