10Sstevel@tonic-gate /*
20Sstevel@tonic-gate * CDDL HEADER START
30Sstevel@tonic-gate *
40Sstevel@tonic-gate * The contents of this file are subject to the terms of the
52179Sahl * Common Development and Distribution License (the "License").
62179Sahl * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate *
80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate * See the License for the specific language governing permissions
110Sstevel@tonic-gate * and limitations under the License.
120Sstevel@tonic-gate *
130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate *
190Sstevel@tonic-gate * CDDL HEADER END
200Sstevel@tonic-gate */
212179Sahl
220Sstevel@tonic-gate /*
23*9489SJoe.Bonasera@sun.com * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
240Sstevel@tonic-gate * Use is subject to license terms.
250Sstevel@tonic-gate */
260Sstevel@tonic-gate
270Sstevel@tonic-gate #include <sys/dtrace.h>
280Sstevel@tonic-gate #include <sys/fasttrap.h>
290Sstevel@tonic-gate #include <sys/x_call.h>
300Sstevel@tonic-gate #include <sys/cmn_err.h>
310Sstevel@tonic-gate #include <sys/trap.h>
320Sstevel@tonic-gate #include <sys/psw.h>
330Sstevel@tonic-gate #include <sys/privregs.h>
340Sstevel@tonic-gate #include <sys/machsystm.h>
350Sstevel@tonic-gate #include <vm/seg_kmem.h>
360Sstevel@tonic-gate
370Sstevel@tonic-gate typedef struct dtrace_invop_hdlr {
380Sstevel@tonic-gate int (*dtih_func)(uintptr_t, uintptr_t *, uintptr_t);
390Sstevel@tonic-gate struct dtrace_invop_hdlr *dtih_next;
400Sstevel@tonic-gate } dtrace_invop_hdlr_t;
410Sstevel@tonic-gate
420Sstevel@tonic-gate dtrace_invop_hdlr_t *dtrace_invop_hdlr;
430Sstevel@tonic-gate
440Sstevel@tonic-gate int
dtrace_invop(uintptr_t addr,uintptr_t * stack,uintptr_t eax)450Sstevel@tonic-gate dtrace_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax)
460Sstevel@tonic-gate {
470Sstevel@tonic-gate dtrace_invop_hdlr_t *hdlr;
480Sstevel@tonic-gate int rval;
490Sstevel@tonic-gate
500Sstevel@tonic-gate for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) {
510Sstevel@tonic-gate if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0)
520Sstevel@tonic-gate return (rval);
530Sstevel@tonic-gate }
540Sstevel@tonic-gate
550Sstevel@tonic-gate return (0);
560Sstevel@tonic-gate }
570Sstevel@tonic-gate
580Sstevel@tonic-gate void
dtrace_invop_add(int (* func)(uintptr_t,uintptr_t *,uintptr_t))590Sstevel@tonic-gate dtrace_invop_add(int (*func)(uintptr_t, uintptr_t *, uintptr_t))
600Sstevel@tonic-gate {
610Sstevel@tonic-gate dtrace_invop_hdlr_t *hdlr;
620Sstevel@tonic-gate
630Sstevel@tonic-gate hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP);
640Sstevel@tonic-gate hdlr->dtih_func = func;
650Sstevel@tonic-gate hdlr->dtih_next = dtrace_invop_hdlr;
660Sstevel@tonic-gate dtrace_invop_hdlr = hdlr;
670Sstevel@tonic-gate }
680Sstevel@tonic-gate
690Sstevel@tonic-gate void
dtrace_invop_remove(int (* func)(uintptr_t,uintptr_t *,uintptr_t))700Sstevel@tonic-gate dtrace_invop_remove(int (*func)(uintptr_t, uintptr_t *, uintptr_t))
710Sstevel@tonic-gate {
720Sstevel@tonic-gate dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL;
730Sstevel@tonic-gate
740Sstevel@tonic-gate for (;;) {
750Sstevel@tonic-gate if (hdlr == NULL)
760Sstevel@tonic-gate panic("attempt to remove non-existent invop handler");
770Sstevel@tonic-gate
780Sstevel@tonic-gate if (hdlr->dtih_func == func)
790Sstevel@tonic-gate break;
800Sstevel@tonic-gate
810Sstevel@tonic-gate prev = hdlr;
820Sstevel@tonic-gate hdlr = hdlr->dtih_next;
830Sstevel@tonic-gate }
840Sstevel@tonic-gate
850Sstevel@tonic-gate if (prev == NULL) {
860Sstevel@tonic-gate ASSERT(dtrace_invop_hdlr == hdlr);
870Sstevel@tonic-gate dtrace_invop_hdlr = hdlr->dtih_next;
880Sstevel@tonic-gate } else {
890Sstevel@tonic-gate ASSERT(dtrace_invop_hdlr != hdlr);
900Sstevel@tonic-gate prev->dtih_next = hdlr->dtih_next;
910Sstevel@tonic-gate }
920Sstevel@tonic-gate
930Sstevel@tonic-gate kmem_free(hdlr, sizeof (dtrace_invop_hdlr_t));
940Sstevel@tonic-gate }
950Sstevel@tonic-gate
960Sstevel@tonic-gate int
dtrace_getipl(void)970Sstevel@tonic-gate dtrace_getipl(void)
980Sstevel@tonic-gate {
990Sstevel@tonic-gate return (CPU->cpu_pri);
1000Sstevel@tonic-gate }
1010Sstevel@tonic-gate
1020Sstevel@tonic-gate /*ARGSUSED*/
1030Sstevel@tonic-gate void
dtrace_toxic_ranges(void (* func)(uintptr_t base,uintptr_t limit))1040Sstevel@tonic-gate dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit))
1050Sstevel@tonic-gate {
1060Sstevel@tonic-gate #ifdef __amd64
1070Sstevel@tonic-gate extern uintptr_t toxic_addr;
1080Sstevel@tonic-gate extern size_t toxic_size;
1090Sstevel@tonic-gate
1100Sstevel@tonic-gate (*func)(0, _userlimit);
1110Sstevel@tonic-gate
1120Sstevel@tonic-gate if (hole_end > hole_start)
1130Sstevel@tonic-gate (*func)(hole_start, hole_end);
1140Sstevel@tonic-gate (*func)(toxic_addr, toxic_addr + toxic_size);
1150Sstevel@tonic-gate #else
1160Sstevel@tonic-gate extern void *device_arena_contains(void *, size_t, size_t *);
1170Sstevel@tonic-gate caddr_t vaddr;
1180Sstevel@tonic-gate size_t len;
1190Sstevel@tonic-gate
1200Sstevel@tonic-gate for (vaddr = (caddr_t)kernelbase; vaddr < (caddr_t)KERNEL_TEXT;
1210Sstevel@tonic-gate vaddr += len) {
1220Sstevel@tonic-gate len = (caddr_t)KERNEL_TEXT - vaddr;
1230Sstevel@tonic-gate vaddr = device_arena_contains(vaddr, len, &len);
1240Sstevel@tonic-gate if (vaddr == NULL)
1255084Sjohnlev break;
1260Sstevel@tonic-gate (*func)((uintptr_t)vaddr, (uintptr_t)vaddr + len);
1270Sstevel@tonic-gate }
1280Sstevel@tonic-gate #endif
1290Sstevel@tonic-gate (*func)(0, _userlimit);
1300Sstevel@tonic-gate }
1310Sstevel@tonic-gate
1320Sstevel@tonic-gate static int
dtrace_xcall_func(dtrace_xcall_t func,void * arg)1330Sstevel@tonic-gate dtrace_xcall_func(dtrace_xcall_t func, void *arg)
1340Sstevel@tonic-gate {
1350Sstevel@tonic-gate (*func)(arg);
1360Sstevel@tonic-gate
1370Sstevel@tonic-gate return (0);
1380Sstevel@tonic-gate }
1390Sstevel@tonic-gate
1400Sstevel@tonic-gate /*ARGSUSED*/
1410Sstevel@tonic-gate void
dtrace_xcall(processorid_t cpu,dtrace_xcall_t func,void * arg)1420Sstevel@tonic-gate dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg)
1430Sstevel@tonic-gate {
1440Sstevel@tonic-gate cpuset_t set;
1450Sstevel@tonic-gate
1460Sstevel@tonic-gate CPUSET_ZERO(set);
1470Sstevel@tonic-gate
1480Sstevel@tonic-gate if (cpu == DTRACE_CPUALL) {
1490Sstevel@tonic-gate CPUSET_ALL(set);
1500Sstevel@tonic-gate } else {
1510Sstevel@tonic-gate CPUSET_ADD(set, cpu);
1520Sstevel@tonic-gate }
1530Sstevel@tonic-gate
1540Sstevel@tonic-gate kpreempt_disable();
155*9489SJoe.Bonasera@sun.com xc_sync((xc_arg_t)func, (xc_arg_t)arg, 0, CPUSET2BV(set),
1565084Sjohnlev (xc_func_t)dtrace_xcall_func);
1570Sstevel@tonic-gate kpreempt_enable();
1580Sstevel@tonic-gate }
1590Sstevel@tonic-gate
1600Sstevel@tonic-gate void
dtrace_sync_func(void)1610Sstevel@tonic-gate dtrace_sync_func(void)
1620Sstevel@tonic-gate {}
1630Sstevel@tonic-gate
1640Sstevel@tonic-gate void
dtrace_sync(void)1650Sstevel@tonic-gate dtrace_sync(void)
1660Sstevel@tonic-gate {
1670Sstevel@tonic-gate dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL);
1680Sstevel@tonic-gate }
1690Sstevel@tonic-gate
1700Sstevel@tonic-gate int (*dtrace_pid_probe_ptr)(struct regs *);
1710Sstevel@tonic-gate int (*dtrace_return_probe_ptr)(struct regs *);
1720Sstevel@tonic-gate
1730Sstevel@tonic-gate void
dtrace_user_probe(struct regs * rp,caddr_t addr,processorid_t cpuid)1740Sstevel@tonic-gate dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid)
1750Sstevel@tonic-gate {
1760Sstevel@tonic-gate krwlock_t *rwp;
1770Sstevel@tonic-gate proc_t *p = curproc;
1780Sstevel@tonic-gate extern void trap(struct regs *, caddr_t, processorid_t);
1790Sstevel@tonic-gate
1800Sstevel@tonic-gate if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) {
1810Sstevel@tonic-gate if (curthread->t_cred != p->p_cred) {
1820Sstevel@tonic-gate cred_t *oldcred = curthread->t_cred;
1830Sstevel@tonic-gate /*
1840Sstevel@tonic-gate * DTrace accesses t_cred in probe context. t_cred
1850Sstevel@tonic-gate * must always be either NULL, or point to a valid,
1860Sstevel@tonic-gate * allocated cred structure.
1870Sstevel@tonic-gate */
1880Sstevel@tonic-gate curthread->t_cred = crgetcred();
1890Sstevel@tonic-gate crfree(oldcred);
1900Sstevel@tonic-gate }
1910Sstevel@tonic-gate }
1920Sstevel@tonic-gate
1930Sstevel@tonic-gate if (rp->r_trapno == T_DTRACE_RET) {
1940Sstevel@tonic-gate uint8_t step = curthread->t_dtrace_step;
1950Sstevel@tonic-gate uint8_t ret = curthread->t_dtrace_ret;
1960Sstevel@tonic-gate uintptr_t npc = curthread->t_dtrace_npc;
1970Sstevel@tonic-gate
1980Sstevel@tonic-gate if (curthread->t_dtrace_ast) {
1990Sstevel@tonic-gate aston(curthread);
2000Sstevel@tonic-gate curthread->t_sig_check = 1;
2010Sstevel@tonic-gate }
2020Sstevel@tonic-gate
2030Sstevel@tonic-gate /*
2040Sstevel@tonic-gate * Clear all user tracing flags.
2050Sstevel@tonic-gate */
2060Sstevel@tonic-gate curthread->t_dtrace_ft = 0;
2070Sstevel@tonic-gate
2080Sstevel@tonic-gate /*
2090Sstevel@tonic-gate * If we weren't expecting to take a return probe trap, kill
2100Sstevel@tonic-gate * the process as though it had just executed an unassigned
2110Sstevel@tonic-gate * trap instruction.
2120Sstevel@tonic-gate */
2130Sstevel@tonic-gate if (step == 0) {
2140Sstevel@tonic-gate tsignal(curthread, SIGILL);
2150Sstevel@tonic-gate return;
2160Sstevel@tonic-gate }
2170Sstevel@tonic-gate
2180Sstevel@tonic-gate /*
2190Sstevel@tonic-gate * If we hit this trap unrelated to a return probe, we're
2200Sstevel@tonic-gate * just here to reset the AST flag since we deferred a signal
2210Sstevel@tonic-gate * until after we logically single-stepped the instruction we
2220Sstevel@tonic-gate * copied out.
2230Sstevel@tonic-gate */
2240Sstevel@tonic-gate if (ret == 0) {
2250Sstevel@tonic-gate rp->r_pc = npc;
2260Sstevel@tonic-gate return;
2270Sstevel@tonic-gate }
2280Sstevel@tonic-gate
2290Sstevel@tonic-gate /*
2300Sstevel@tonic-gate * We need to wait until after we've called the
2310Sstevel@tonic-gate * dtrace_return_probe_ptr function pointer to set %pc.
2320Sstevel@tonic-gate */
2330Sstevel@tonic-gate rwp = &CPU->cpu_ft_lock;
2340Sstevel@tonic-gate rw_enter(rwp, RW_READER);
2350Sstevel@tonic-gate if (dtrace_return_probe_ptr != NULL)
2360Sstevel@tonic-gate (void) (*dtrace_return_probe_ptr)(rp);
2370Sstevel@tonic-gate rw_exit(rwp);
2380Sstevel@tonic-gate rp->r_pc = npc;
2390Sstevel@tonic-gate
2400Sstevel@tonic-gate } else if (rp->r_trapno == T_BPTFLT) {
2413939Ssethg uint8_t instr, instr2;
2423939Ssethg caddr_t linearpc;
2430Sstevel@tonic-gate rwp = &CPU->cpu_ft_lock;
2440Sstevel@tonic-gate
2450Sstevel@tonic-gate /*
2460Sstevel@tonic-gate * The DTrace fasttrap provider uses the breakpoint trap
2470Sstevel@tonic-gate * (int 3). We let DTrace take the first crack at handling
2480Sstevel@tonic-gate * this trap; if it's not a probe that DTrace knowns about,
2490Sstevel@tonic-gate * we call into the trap() routine to handle it like a
2500Sstevel@tonic-gate * breakpoint placed by a conventional debugger.
2510Sstevel@tonic-gate */
2520Sstevel@tonic-gate rw_enter(rwp, RW_READER);
2530Sstevel@tonic-gate if (dtrace_pid_probe_ptr != NULL &&
2540Sstevel@tonic-gate (*dtrace_pid_probe_ptr)(rp) == 0) {
2550Sstevel@tonic-gate rw_exit(rwp);
2560Sstevel@tonic-gate return;
2570Sstevel@tonic-gate }
2580Sstevel@tonic-gate rw_exit(rwp);
2590Sstevel@tonic-gate
2603939Ssethg if (dtrace_linear_pc(rp, p, &linearpc) != 0) {
2613939Ssethg trap(rp, addr, cpuid);
2623939Ssethg return;
2633939Ssethg }
2643939Ssethg
2650Sstevel@tonic-gate /*
2660Sstevel@tonic-gate * If the instruction that caused the breakpoint trap doesn't
2670Sstevel@tonic-gate * look like an int 3 anymore, it may be that this tracepoint
2680Sstevel@tonic-gate * was removed just after the user thread executed it. In
2690Sstevel@tonic-gate * that case, return to user land to retry the instuction.
2703939Ssethg * Note that we assume the length of the instruction to retry
2713939Ssethg * is 1 byte because that's the length of FASTTRAP_INSTR.
2723939Ssethg * We check for r_pc > 0 and > 2 so that we don't have to
2733939Ssethg * deal with segment wraparound.
2740Sstevel@tonic-gate */
2753939Ssethg if (rp->r_pc > 0 && fuword8(linearpc - 1, &instr) == 0 &&
2763939Ssethg instr != FASTTRAP_INSTR &&
2773939Ssethg (instr != 3 || (rp->r_pc >= 2 &&
2783939Ssethg (fuword8(linearpc - 2, &instr2) != 0 || instr2 != 0xCD)))) {
2790Sstevel@tonic-gate rp->r_pc--;
2800Sstevel@tonic-gate return;
2810Sstevel@tonic-gate }
2820Sstevel@tonic-gate
2830Sstevel@tonic-gate trap(rp, addr, cpuid);
2840Sstevel@tonic-gate
2850Sstevel@tonic-gate } else {
2860Sstevel@tonic-gate trap(rp, addr, cpuid);
2870Sstevel@tonic-gate }
2880Sstevel@tonic-gate }
2890Sstevel@tonic-gate
2900Sstevel@tonic-gate void
dtrace_safe_synchronous_signal(void)2910Sstevel@tonic-gate dtrace_safe_synchronous_signal(void)
2920Sstevel@tonic-gate {
2930Sstevel@tonic-gate kthread_t *t = curthread;
2940Sstevel@tonic-gate struct regs *rp = lwptoregs(ttolwp(t));
2950Sstevel@tonic-gate size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
2960Sstevel@tonic-gate
2970Sstevel@tonic-gate ASSERT(t->t_dtrace_on);
2980Sstevel@tonic-gate
2990Sstevel@tonic-gate /*
3000Sstevel@tonic-gate * If we're not in the range of scratch addresses, we're not actually
3010Sstevel@tonic-gate * tracing user instructions so turn off the flags. If the instruction
3020Sstevel@tonic-gate * we copied out caused a synchonous trap, reset the pc back to its
3030Sstevel@tonic-gate * original value and turn off the flags.
3040Sstevel@tonic-gate */
3050Sstevel@tonic-gate if (rp->r_pc < t->t_dtrace_scrpc ||
3060Sstevel@tonic-gate rp->r_pc > t->t_dtrace_astpc + isz) {
3070Sstevel@tonic-gate t->t_dtrace_ft = 0;
3080Sstevel@tonic-gate } else if (rp->r_pc == t->t_dtrace_scrpc ||
3090Sstevel@tonic-gate rp->r_pc == t->t_dtrace_astpc) {
3100Sstevel@tonic-gate rp->r_pc = t->t_dtrace_pc;
3110Sstevel@tonic-gate t->t_dtrace_ft = 0;
3120Sstevel@tonic-gate }
3130Sstevel@tonic-gate }
3140Sstevel@tonic-gate
3150Sstevel@tonic-gate int
dtrace_safe_defer_signal(void)3160Sstevel@tonic-gate dtrace_safe_defer_signal(void)
3170Sstevel@tonic-gate {
3180Sstevel@tonic-gate kthread_t *t = curthread;
3190Sstevel@tonic-gate struct regs *rp = lwptoregs(ttolwp(t));
3200Sstevel@tonic-gate size_t isz = t->t_dtrace_npc - t->t_dtrace_pc;
3210Sstevel@tonic-gate
3220Sstevel@tonic-gate ASSERT(t->t_dtrace_on);
3230Sstevel@tonic-gate
3240Sstevel@tonic-gate /*
3250Sstevel@tonic-gate * If we're not in the range of scratch addresses, we're not actually
3260Sstevel@tonic-gate * tracing user instructions so turn off the flags.
3270Sstevel@tonic-gate */
3280Sstevel@tonic-gate if (rp->r_pc < t->t_dtrace_scrpc ||
3290Sstevel@tonic-gate rp->r_pc > t->t_dtrace_astpc + isz) {
3300Sstevel@tonic-gate t->t_dtrace_ft = 0;
3310Sstevel@tonic-gate return (0);
3320Sstevel@tonic-gate }
3330Sstevel@tonic-gate
3340Sstevel@tonic-gate /*
3350Sstevel@tonic-gate * If we've executed the original instruction, but haven't performed
3360Sstevel@tonic-gate * the jmp back to t->t_dtrace_npc or the clean up of any registers
3370Sstevel@tonic-gate * used to emulate %rip-relative instructions in 64-bit mode, do that
3380Sstevel@tonic-gate * here and take the signal right away. We detect this condition by
3390Sstevel@tonic-gate * seeing if the program counter is the range [scrpc + isz, astpc).
3400Sstevel@tonic-gate */
3410Sstevel@tonic-gate if (t->t_dtrace_astpc - rp->r_pc <
3420Sstevel@tonic-gate t->t_dtrace_astpc - t->t_dtrace_scrpc - isz) {
3430Sstevel@tonic-gate #ifdef __amd64
3440Sstevel@tonic-gate /*
3450Sstevel@tonic-gate * If there is a scratch register and we're on the
3460Sstevel@tonic-gate * instruction immediately after the modified instruction,
3470Sstevel@tonic-gate * restore the value of that scratch register.
3480Sstevel@tonic-gate */
3490Sstevel@tonic-gate if (t->t_dtrace_reg != 0 &&
3500Sstevel@tonic-gate rp->r_pc == t->t_dtrace_scrpc + isz) {
3510Sstevel@tonic-gate switch (t->t_dtrace_reg) {
3520Sstevel@tonic-gate case REG_RAX:
3530Sstevel@tonic-gate rp->r_rax = t->t_dtrace_regv;
3540Sstevel@tonic-gate break;
3550Sstevel@tonic-gate case REG_RCX:
3560Sstevel@tonic-gate rp->r_rcx = t->t_dtrace_regv;
3570Sstevel@tonic-gate break;
3580Sstevel@tonic-gate case REG_R8:
3590Sstevel@tonic-gate rp->r_r8 = t->t_dtrace_regv;
3600Sstevel@tonic-gate break;
3610Sstevel@tonic-gate case REG_R9:
3620Sstevel@tonic-gate rp->r_r9 = t->t_dtrace_regv;
3630Sstevel@tonic-gate break;
3640Sstevel@tonic-gate }
3650Sstevel@tonic-gate }
3660Sstevel@tonic-gate #endif
3670Sstevel@tonic-gate rp->r_pc = t->t_dtrace_npc;
3680Sstevel@tonic-gate t->t_dtrace_ft = 0;
3690Sstevel@tonic-gate return (0);
3700Sstevel@tonic-gate }
3710Sstevel@tonic-gate
3720Sstevel@tonic-gate /*
3730Sstevel@tonic-gate * Otherwise, make sure we'll return to the kernel after executing
3740Sstevel@tonic-gate * the copied out instruction and defer the signal.
3750Sstevel@tonic-gate */
3760Sstevel@tonic-gate if (!t->t_dtrace_step) {
3770Sstevel@tonic-gate ASSERT(rp->r_pc < t->t_dtrace_astpc);
3780Sstevel@tonic-gate rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc;
3790Sstevel@tonic-gate t->t_dtrace_step = 1;
3800Sstevel@tonic-gate }
3810Sstevel@tonic-gate
3820Sstevel@tonic-gate t->t_dtrace_ast = 1;
3830Sstevel@tonic-gate
3840Sstevel@tonic-gate return (1);
3850Sstevel@tonic-gate }
3863446Smrj
3873446Smrj /*
3883446Smrj * Additional artificial frames for the machine type. For i86pc, we're already
3895084Sjohnlev * accounted for, so return 0. On the hypervisor, we have an additional frame
3905084Sjohnlev * (xen_callback_handler).
3913446Smrj */
3923446Smrj int
dtrace_mach_aframes(void)3933446Smrj dtrace_mach_aframes(void)
3943446Smrj {
3955084Sjohnlev #ifdef __xpv
3965084Sjohnlev return (1);
3975084Sjohnlev #else
3983446Smrj return (0);
3995084Sjohnlev #endif
4003446Smrj }
401