1*12004Sjiang.liu@intel.com /* 2*12004Sjiang.liu@intel.com * CDDL HEADER START 3*12004Sjiang.liu@intel.com * 4*12004Sjiang.liu@intel.com * The contents of this file are subject to the terms of the 5*12004Sjiang.liu@intel.com * Common Development and Distribution License (the "License"). 6*12004Sjiang.liu@intel.com * You may not use this file except in compliance with the License. 7*12004Sjiang.liu@intel.com * 8*12004Sjiang.liu@intel.com * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*12004Sjiang.liu@intel.com * or http://www.opensolaris.org/os/licensing. 10*12004Sjiang.liu@intel.com * See the License for the specific language governing permissions 11*12004Sjiang.liu@intel.com * and limitations under the License. 12*12004Sjiang.liu@intel.com * 13*12004Sjiang.liu@intel.com * When distributing Covered Code, include this CDDL HEADER in each 14*12004Sjiang.liu@intel.com * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*12004Sjiang.liu@intel.com * If applicable, add the following below this CDDL HEADER, with the 16*12004Sjiang.liu@intel.com * fields enclosed by brackets "[]" replaced with your own identifying 17*12004Sjiang.liu@intel.com * information: Portions Copyright [yyyy] [name of copyright owner] 18*12004Sjiang.liu@intel.com * 19*12004Sjiang.liu@intel.com * CDDL HEADER END 20*12004Sjiang.liu@intel.com */ 21*12004Sjiang.liu@intel.com /* 22*12004Sjiang.liu@intel.com * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23*12004Sjiang.liu@intel.com * Use is subject to license terms. 24*12004Sjiang.liu@intel.com */ 25*12004Sjiang.liu@intel.com /* 26*12004Sjiang.liu@intel.com * Copyright (c) 2010, Intel Corporation. 27*12004Sjiang.liu@intel.com * All rights reserved. 28*12004Sjiang.liu@intel.com */ 29*12004Sjiang.liu@intel.com 30*12004Sjiang.liu@intel.com #ifndef _SYS_DRMACH_ACPI_H 31*12004Sjiang.liu@intel.com #define _SYS_DRMACH_ACPI_H 32*12004Sjiang.liu@intel.com #include <sys/types.h> 33*12004Sjiang.liu@intel.com #include <sys/cmn_err.h> 34*12004Sjiang.liu@intel.com #include <sys/param.h> 35*12004Sjiang.liu@intel.com #include <sys/sunddi.h> 36*12004Sjiang.liu@intel.com #include <sys/acpi/acpi.h> 37*12004Sjiang.liu@intel.com #include <sys/acpica.h> 38*12004Sjiang.liu@intel.com #include <sys/acpidev.h> 39*12004Sjiang.liu@intel.com #include <sys/drmach.h> 40*12004Sjiang.liu@intel.com 41*12004Sjiang.liu@intel.com #ifdef __cplusplus 42*12004Sjiang.liu@intel.com extern "C" { 43*12004Sjiang.liu@intel.com #endif 44*12004Sjiang.liu@intel.com 45*12004Sjiang.liu@intel.com #ifdef _KERNEL 46*12004Sjiang.liu@intel.com 47*12004Sjiang.liu@intel.com /* Use ACPI handle as DRMACH handle on x86 systems. */ 48*12004Sjiang.liu@intel.com #define DRMACH_HANDLE ACPI_HANDLE 49*12004Sjiang.liu@intel.com 50*12004Sjiang.liu@intel.com /* Macros to deal with object type. */ 51*12004Sjiang.liu@intel.com #define DRMACH_OBJ(id) ((drmach_common_t *)id) 52*12004Sjiang.liu@intel.com 53*12004Sjiang.liu@intel.com #define DRMACH_NULL_ID(id) ((id) == 0) 54*12004Sjiang.liu@intel.com 55*12004Sjiang.liu@intel.com #define DRMACH_IS_BOARD_ID(id) \ 56*12004Sjiang.liu@intel.com ((id != 0) && (DRMACH_OBJ(id)->isa == (void *)drmach_board_new)) 57*12004Sjiang.liu@intel.com 58*12004Sjiang.liu@intel.com #define DRMACH_IS_CPU_ID(id) \ 59*12004Sjiang.liu@intel.com ((id != 0) && (DRMACH_OBJ(id)->isa == (void *)drmach_cpu_new)) 60*12004Sjiang.liu@intel.com 61*12004Sjiang.liu@intel.com #define DRMACH_IS_MEM_ID(id) \ 62*12004Sjiang.liu@intel.com ((id != 0) && (DRMACH_OBJ(id)->isa == (void *)drmach_mem_new)) 63*12004Sjiang.liu@intel.com 64*12004Sjiang.liu@intel.com #define DRMACH_IS_IO_ID(id) \ 65*12004Sjiang.liu@intel.com ((id != 0) && (DRMACH_OBJ(id)->isa == (void *)drmach_io_new)) 66*12004Sjiang.liu@intel.com 67*12004Sjiang.liu@intel.com #define DRMACH_IS_DEVICE_ID(id) \ 68*12004Sjiang.liu@intel.com ((id != 0) && \ 69*12004Sjiang.liu@intel.com (DRMACH_OBJ(id)->isa == (void *)drmach_cpu_new || \ 70*12004Sjiang.liu@intel.com DRMACH_OBJ(id)->isa == (void *)drmach_mem_new || \ 71*12004Sjiang.liu@intel.com DRMACH_OBJ(id)->isa == (void *)drmach_io_new)) 72*12004Sjiang.liu@intel.com 73*12004Sjiang.liu@intel.com #define DRMACH_IS_ID(id) \ 74*12004Sjiang.liu@intel.com ((id != 0) && \ 75*12004Sjiang.liu@intel.com (DRMACH_OBJ(id)->isa == (void *)drmach_board_new || \ 76*12004Sjiang.liu@intel.com DRMACH_OBJ(id)->isa == (void *)drmach_cpu_new || \ 77*12004Sjiang.liu@intel.com DRMACH_OBJ(id)->isa == (void *)drmach_mem_new || \ 78*12004Sjiang.liu@intel.com DRMACH_OBJ(id)->isa == (void *)drmach_io_new)) 79*12004Sjiang.liu@intel.com 80*12004Sjiang.liu@intel.com #define DRMACH_INTERNAL_ERROR() \ 81*12004Sjiang.liu@intel.com drerr_new(1, EX86_INTERNAL, drmach_ie_fmt, __LINE__) 82*12004Sjiang.liu@intel.com 83*12004Sjiang.liu@intel.com #ifdef DEBUG 84*12004Sjiang.liu@intel.com extern int drmach_debug; 85*12004Sjiang.liu@intel.com 86*12004Sjiang.liu@intel.com #define DRMACH_PR if (drmach_debug) printf 87*12004Sjiang.liu@intel.com #else 88*12004Sjiang.liu@intel.com #define DRMACH_PR _NOTE(CONSTANTCONDITION) if (0) printf 89*12004Sjiang.liu@intel.com #endif /* DEBUG */ 90*12004Sjiang.liu@intel.com 91*12004Sjiang.liu@intel.com typedef struct { 92*12004Sjiang.liu@intel.com struct drmach_node *node; 93*12004Sjiang.liu@intel.com void *data; 94*12004Sjiang.liu@intel.com void *func; 95*12004Sjiang.liu@intel.com } drmach_node_walk_args_t; 96*12004Sjiang.liu@intel.com 97*12004Sjiang.liu@intel.com typedef struct drmach_node { 98*12004Sjiang.liu@intel.com void *here; 99*12004Sjiang.liu@intel.com 100*12004Sjiang.liu@intel.com DRMACH_HANDLE (*get_dnode)(struct drmach_node *node); 101*12004Sjiang.liu@intel.com dev_info_t *(*getdip)(struct drmach_node *node); 102*12004Sjiang.liu@intel.com int (*getproplen)(struct drmach_node *node, char *name, 103*12004Sjiang.liu@intel.com int *len); 104*12004Sjiang.liu@intel.com int (*getprop)(struct drmach_node *node, char *name, 105*12004Sjiang.liu@intel.com void *buf, int len); 106*12004Sjiang.liu@intel.com int (*walk)(struct drmach_node *node, void *data, 107*12004Sjiang.liu@intel.com int (*cb)(drmach_node_walk_args_t *args)); 108*12004Sjiang.liu@intel.com } drmach_node_t; 109*12004Sjiang.liu@intel.com 110*12004Sjiang.liu@intel.com typedef struct { 111*12004Sjiang.liu@intel.com int min_index; 112*12004Sjiang.liu@intel.com int max_index; 113*12004Sjiang.liu@intel.com int arr_sz; 114*12004Sjiang.liu@intel.com drmachid_t *arr; 115*12004Sjiang.liu@intel.com } drmach_array_t; 116*12004Sjiang.liu@intel.com 117*12004Sjiang.liu@intel.com typedef struct { 118*12004Sjiang.liu@intel.com void *isa; 119*12004Sjiang.liu@intel.com 120*12004Sjiang.liu@intel.com void (*dispose)(drmachid_t); 121*12004Sjiang.liu@intel.com sbd_error_t *(*release)(drmachid_t); 122*12004Sjiang.liu@intel.com sbd_error_t *(*status)(drmachid_t, drmach_status_t *); 123*12004Sjiang.liu@intel.com 124*12004Sjiang.liu@intel.com char name[MAXNAMELEN]; 125*12004Sjiang.liu@intel.com } drmach_common_t; 126*12004Sjiang.liu@intel.com 127*12004Sjiang.liu@intel.com typedef struct { 128*12004Sjiang.liu@intel.com drmach_common_t cm; 129*12004Sjiang.liu@intel.com uint_t bnum; 130*12004Sjiang.liu@intel.com int assigned; 131*12004Sjiang.liu@intel.com int powered; 132*12004Sjiang.liu@intel.com int connected; 133*12004Sjiang.liu@intel.com int cond; 134*12004Sjiang.liu@intel.com drmach_node_t *tree; 135*12004Sjiang.liu@intel.com drmach_array_t *devices; 136*12004Sjiang.liu@intel.com int boot_board; /* if board exists on bootup */ 137*12004Sjiang.liu@intel.com } drmach_board_t; 138*12004Sjiang.liu@intel.com 139*12004Sjiang.liu@intel.com typedef struct { 140*12004Sjiang.liu@intel.com drmach_common_t cm; 141*12004Sjiang.liu@intel.com drmach_board_t *bp; 142*12004Sjiang.liu@intel.com int unum; 143*12004Sjiang.liu@intel.com uint_t portid; 144*12004Sjiang.liu@intel.com int busy; 145*12004Sjiang.liu@intel.com int powered; 146*12004Sjiang.liu@intel.com const char *type; 147*12004Sjiang.liu@intel.com drmach_node_t *node; 148*12004Sjiang.liu@intel.com } drmach_device_t; 149*12004Sjiang.liu@intel.com 150*12004Sjiang.liu@intel.com typedef struct drmach_cpu { 151*12004Sjiang.liu@intel.com drmach_device_t dev; 152*12004Sjiang.liu@intel.com processorid_t cpuid; 153*12004Sjiang.liu@intel.com uint32_t apicid; 154*12004Sjiang.liu@intel.com } drmach_cpu_t; 155*12004Sjiang.liu@intel.com 156*12004Sjiang.liu@intel.com typedef struct drmach_mem { 157*12004Sjiang.liu@intel.com drmach_device_t dev; 158*12004Sjiang.liu@intel.com uint64_t mem_alignment; 159*12004Sjiang.liu@intel.com uint64_t slice_base; 160*12004Sjiang.liu@intel.com uint64_t slice_top; 161*12004Sjiang.liu@intel.com uint64_t slice_size; 162*12004Sjiang.liu@intel.com uint64_t base_pa; /* lowest installed memory base */ 163*12004Sjiang.liu@intel.com uint64_t nbytes; /* size of installed memory */ 164*12004Sjiang.liu@intel.com struct memlist *memlist; 165*12004Sjiang.liu@intel.com } drmach_mem_t; 166*12004Sjiang.liu@intel.com 167*12004Sjiang.liu@intel.com typedef struct drmach_io { 168*12004Sjiang.liu@intel.com drmach_device_t dev; 169*12004Sjiang.liu@intel.com } drmach_io_t; 170*12004Sjiang.liu@intel.com 171*12004Sjiang.liu@intel.com typedef struct drmach_domain_info { 172*12004Sjiang.liu@intel.com uint64_t floating; 173*12004Sjiang.liu@intel.com int allow_dr; 174*12004Sjiang.liu@intel.com } drmach_domain_info_t; 175*12004Sjiang.liu@intel.com 176*12004Sjiang.liu@intel.com typedef struct { 177*12004Sjiang.liu@intel.com drmach_board_t *obj; 178*12004Sjiang.liu@intel.com int ndevs; 179*12004Sjiang.liu@intel.com void *a; 180*12004Sjiang.liu@intel.com sbd_error_t *(*found)(void *a, const char *, int, drmachid_t); 181*12004Sjiang.liu@intel.com sbd_error_t *err; 182*12004Sjiang.liu@intel.com } drmach_board_cb_data_t; 183*12004Sjiang.liu@intel.com 184*12004Sjiang.liu@intel.com extern drmach_domain_info_t drmach_domain; 185*12004Sjiang.liu@intel.com 186*12004Sjiang.liu@intel.com extern drmach_board_t *drmach_board_new(uint_t, int); 187*12004Sjiang.liu@intel.com extern sbd_error_t *drmach_device_new(drmach_node_t *, 188*12004Sjiang.liu@intel.com drmach_board_t *, int, drmachid_t *); 189*12004Sjiang.liu@intel.com extern sbd_error_t *drmach_cpu_new(drmach_device_t *, drmachid_t *); 190*12004Sjiang.liu@intel.com extern sbd_error_t *drmach_mem_new(drmach_device_t *, drmachid_t *); 191*12004Sjiang.liu@intel.com extern sbd_error_t *drmach_io_new(drmach_device_t *, drmachid_t *); 192*12004Sjiang.liu@intel.com 193*12004Sjiang.liu@intel.com #endif /* _KERNEL */ 194*12004Sjiang.liu@intel.com 195*12004Sjiang.liu@intel.com #ifdef __cplusplus 196*12004Sjiang.liu@intel.com } 197*12004Sjiang.liu@intel.com #endif 198*12004Sjiang.liu@intel.com 199*12004Sjiang.liu@intel.com #endif /* _SYS_DRMACH_ACPI_H */ 200