xref: /onnv-gate/usr/src/uts/i86pc/io/acpi/acpidev/acpidev_pci.c (revision 12004:93f274d4a367)
1*12004Sjiang.liu@intel.com /*
2*12004Sjiang.liu@intel.com  * CDDL HEADER START
3*12004Sjiang.liu@intel.com  *
4*12004Sjiang.liu@intel.com  * The contents of this file are subject to the terms of the
5*12004Sjiang.liu@intel.com  * Common Development and Distribution License (the "License").
6*12004Sjiang.liu@intel.com  * You may not use this file except in compliance with the License.
7*12004Sjiang.liu@intel.com  *
8*12004Sjiang.liu@intel.com  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*12004Sjiang.liu@intel.com  * or http://www.opensolaris.org/os/licensing.
10*12004Sjiang.liu@intel.com  * See the License for the specific language governing permissions
11*12004Sjiang.liu@intel.com  * and limitations under the License.
12*12004Sjiang.liu@intel.com  *
13*12004Sjiang.liu@intel.com  * When distributing Covered Code, include this CDDL HEADER in each
14*12004Sjiang.liu@intel.com  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*12004Sjiang.liu@intel.com  * If applicable, add the following below this CDDL HEADER, with the
16*12004Sjiang.liu@intel.com  * fields enclosed by brackets "[]" replaced with your own identifying
17*12004Sjiang.liu@intel.com  * information: Portions Copyright [yyyy] [name of copyright owner]
18*12004Sjiang.liu@intel.com  *
19*12004Sjiang.liu@intel.com  * CDDL HEADER END
20*12004Sjiang.liu@intel.com  */
21*12004Sjiang.liu@intel.com 
22*12004Sjiang.liu@intel.com /*
23*12004Sjiang.liu@intel.com  * Copyright (c) 2010, Intel Corporation.
24*12004Sjiang.liu@intel.com  * All rights reserved.
25*12004Sjiang.liu@intel.com  */
26*12004Sjiang.liu@intel.com 
27*12004Sjiang.liu@intel.com #include <sys/types.h>
28*12004Sjiang.liu@intel.com #include <sys/atomic.h>
29*12004Sjiang.liu@intel.com #include <sys/sunddi.h>
30*12004Sjiang.liu@intel.com #include <sys/sunndi.h>
31*12004Sjiang.liu@intel.com #include <sys/acpi/acpi.h>
32*12004Sjiang.liu@intel.com #include <sys/acpica.h>
33*12004Sjiang.liu@intel.com #include <sys/acpidev.h>
34*12004Sjiang.liu@intel.com #include <sys/acpidev_rsc.h>
35*12004Sjiang.liu@intel.com #include <sys/acpidev_dr.h>
36*12004Sjiang.liu@intel.com #include <sys/acpidev_impl.h>
37*12004Sjiang.liu@intel.com 
38*12004Sjiang.liu@intel.com static ACPI_STATUS acpidev_pci_probe(acpidev_walk_info_t *infop);
39*12004Sjiang.liu@intel.com 
40*12004Sjiang.liu@intel.com /*
41*12004Sjiang.liu@intel.com  * Default class driver for PCI/PCIEX Host Bridge devices.
42*12004Sjiang.liu@intel.com  */
43*12004Sjiang.liu@intel.com acpidev_class_t acpidev_class_pci = {
44*12004Sjiang.liu@intel.com 	0,				/* adc_refcnt */
45*12004Sjiang.liu@intel.com 	ACPIDEV_CLASS_REV1,		/* adc_version */
46*12004Sjiang.liu@intel.com 	ACPIDEV_CLASS_ID_PCI,		/* adc_class_id */
47*12004Sjiang.liu@intel.com 	"PCI/PCIex Host Bridge",	/* adc_class_name */
48*12004Sjiang.liu@intel.com 	ACPIDEV_TYPE_PCI,		/* adc_dev_type */
49*12004Sjiang.liu@intel.com 	NULL,				/* adc_private */
50*12004Sjiang.liu@intel.com 	NULL,				/* adc_pre_probe */
51*12004Sjiang.liu@intel.com 	NULL,				/* adc_post_probe */
52*12004Sjiang.liu@intel.com 	acpidev_pci_probe,		/* adc_probe */
53*12004Sjiang.liu@intel.com 	NULL,				/* adc_filter */
54*12004Sjiang.liu@intel.com 	NULL,				/* adc_init */
55*12004Sjiang.liu@intel.com 	NULL,				/* adc_fini */
56*12004Sjiang.liu@intel.com };
57*12004Sjiang.liu@intel.com 
58*12004Sjiang.liu@intel.com static char *acpidev_pci_device_ids[] = {
59*12004Sjiang.liu@intel.com 	ACPIDEV_HID_PCIEX_HOSTBRIDGE,
60*12004Sjiang.liu@intel.com 	ACPIDEV_HID_PCI_HOSTBRIDGE,
61*12004Sjiang.liu@intel.com };
62*12004Sjiang.liu@intel.com 
63*12004Sjiang.liu@intel.com static char *acpidev_pciex_device_ids[] = {
64*12004Sjiang.liu@intel.com 	ACPIDEV_HID_PCIEX_HOSTBRIDGE,
65*12004Sjiang.liu@intel.com };
66*12004Sjiang.liu@intel.com 
67*12004Sjiang.liu@intel.com static void
acpidev_pci_update_status(acpidev_walk_info_t * infop)68*12004Sjiang.liu@intel.com acpidev_pci_update_status(acpidev_walk_info_t *infop)
69*12004Sjiang.liu@intel.com {
70*12004Sjiang.liu@intel.com 	int status;
71*12004Sjiang.liu@intel.com 	dev_info_t *dip = NULL;
72*12004Sjiang.liu@intel.com 	acpidev_data_handle_t dhdl;
73*12004Sjiang.liu@intel.com 
74*12004Sjiang.liu@intel.com 	dhdl = infop->awi_data;
75*12004Sjiang.liu@intel.com 	ASSERT((dhdl->aod_iflag & ACPIDEV_ODF_DEVINFO_CREATED) == 0);
76*12004Sjiang.liu@intel.com 	ASSERT((dhdl->aod_iflag & ACPIDEV_ODF_DEVINFO_TAGGED) == 0);
77*12004Sjiang.liu@intel.com 	if ((dhdl->aod_iflag & ACPIDEV_ODF_STATUS_VALID) == 0) {
78*12004Sjiang.liu@intel.com 		status = acpidev_query_device_status(infop->awi_hdl);
79*12004Sjiang.liu@intel.com 		dhdl->aod_status = status;
80*12004Sjiang.liu@intel.com 		dhdl->aod_iflag |= ACPIDEV_ODF_STATUS_VALID;
81*12004Sjiang.liu@intel.com 	} else {
82*12004Sjiang.liu@intel.com 		status = dhdl->aod_status;
83*12004Sjiang.liu@intel.com 	}
84*12004Sjiang.liu@intel.com 	dhdl->aod_level = infop->awi_level;
85*12004Sjiang.liu@intel.com 	dhdl->aod_hdl = infop->awi_hdl;
86*12004Sjiang.liu@intel.com 	dhdl->aod_class = NULL;
87*12004Sjiang.liu@intel.com 	dhdl->aod_class_list = NULL;
88*12004Sjiang.liu@intel.com 	if (acpidev_match_device_id(infop->awi_info,
89*12004Sjiang.liu@intel.com 	    ACPIDEV_ARRAY_PARAM(acpidev_pciex_device_ids))) {
90*12004Sjiang.liu@intel.com 		dhdl->aod_class_id = ACPIDEV_CLASS_ID_PCIEX;
91*12004Sjiang.liu@intel.com 	} else {
92*12004Sjiang.liu@intel.com 		dhdl->aod_class_id = ACPIDEV_CLASS_ID_PCI;
93*12004Sjiang.liu@intel.com 	}
94*12004Sjiang.liu@intel.com 
95*12004Sjiang.liu@intel.com 	if (ACPI_FAILURE(acpica_get_devinfo(infop->awi_hdl, &dip))) {
96*12004Sjiang.liu@intel.com 		dip = NULL;
97*12004Sjiang.liu@intel.com 	} else {
98*12004Sjiang.liu@intel.com 		ASSERT(dip != NULL);
99*12004Sjiang.liu@intel.com 	}
100*12004Sjiang.liu@intel.com 	if (acpidev_check_device_enabled(status)) {
101*12004Sjiang.liu@intel.com 		/*
102*12004Sjiang.liu@intel.com 		 * Mark the device as DISABLE if no device node created.
103*12004Sjiang.liu@intel.com 		 * BIOS may hide some special PCI/PCIex buses from OS.
104*12004Sjiang.liu@intel.com 		 */
105*12004Sjiang.liu@intel.com 		if (dip == NULL) {
106*12004Sjiang.liu@intel.com 			dhdl->aod_dip = NULL;
107*12004Sjiang.liu@intel.com 			dhdl->aod_status &= ~ACPI_STA_DEVICE_ENABLED;
108*12004Sjiang.liu@intel.com 		} else {
109*12004Sjiang.liu@intel.com 			dhdl->aod_dip = dip;
110*12004Sjiang.liu@intel.com 			dhdl->aod_iflag |= ACPIDEV_ODF_DEVINFO_CREATED;
111*12004Sjiang.liu@intel.com 		}
112*12004Sjiang.liu@intel.com 	} else {
113*12004Sjiang.liu@intel.com 		ASSERT(dip == NULL);
114*12004Sjiang.liu@intel.com 		dhdl->aod_dip = NULL;
115*12004Sjiang.liu@intel.com 		dhdl->aod_status &= ~ACPI_STA_DEVICE_ENABLED;
116*12004Sjiang.liu@intel.com 	}
117*12004Sjiang.liu@intel.com }
118*12004Sjiang.liu@intel.com 
119*12004Sjiang.liu@intel.com static ACPI_STATUS
acpidev_pci_probe(acpidev_walk_info_t * infop)120*12004Sjiang.liu@intel.com acpidev_pci_probe(acpidev_walk_info_t *infop)
121*12004Sjiang.liu@intel.com {
122*12004Sjiang.liu@intel.com 	ACPI_STATUS rc = AE_OK;
123*12004Sjiang.liu@intel.com 
124*12004Sjiang.liu@intel.com 	ASSERT(infop != NULL);
125*12004Sjiang.liu@intel.com 	ASSERT(infop->awi_hdl != NULL);
126*12004Sjiang.liu@intel.com 	ASSERT(infop->awi_info != NULL);
127*12004Sjiang.liu@intel.com 	if (infop->awi_info->Type != ACPI_TYPE_DEVICE ||
128*12004Sjiang.liu@intel.com 	    acpidev_match_device_id(infop->awi_info,
129*12004Sjiang.liu@intel.com 	    ACPIDEV_ARRAY_PARAM(acpidev_pci_device_ids)) == B_FALSE) {
130*12004Sjiang.liu@intel.com 		return (AE_OK);
131*12004Sjiang.liu@intel.com 	}
132*12004Sjiang.liu@intel.com 
133*12004Sjiang.liu@intel.com 	if (acpica_get_devcfg_feature(ACPI_DEVCFG_PCI) == 0) {
134*12004Sjiang.liu@intel.com 		return (AE_OK);
135*12004Sjiang.liu@intel.com 	}
136*12004Sjiang.liu@intel.com 
137*12004Sjiang.liu@intel.com 	if (infop->awi_op_type == ACPIDEV_OP_BOOT_PROBE) {
138*12004Sjiang.liu@intel.com 		/*
139*12004Sjiang.liu@intel.com 		 * Check hotplug capability on the first pass.
140*12004Sjiang.liu@intel.com 		 */
141*12004Sjiang.liu@intel.com 		acpidev_dr_check(infop);
142*12004Sjiang.liu@intel.com 	} else if (infop->awi_op_type == ACPIDEV_OP_BOOT_REPROBE) {
143*12004Sjiang.liu@intel.com 		/*
144*12004Sjiang.liu@intel.com 		 * Check whether the PCI device enumerator has created device
145*12004Sjiang.liu@intel.com 		 * nodes for PCI/PCIEX host bridges.
146*12004Sjiang.liu@intel.com 		 */
147*12004Sjiang.liu@intel.com 		acpidev_pci_update_status(infop);
148*12004Sjiang.liu@intel.com 	} else if (infop->awi_op_type == ACPIDEV_OP_HOTPLUG_PROBE) {
149*12004Sjiang.liu@intel.com 		/*
150*12004Sjiang.liu@intel.com 		 * No support of PCI/PCIEX host bridge hotplug yet.
151*12004Sjiang.liu@intel.com 		 * It will come in next phase.
152*12004Sjiang.liu@intel.com 		 */
153*12004Sjiang.liu@intel.com 		cmn_err(CE_WARN,
154*12004Sjiang.liu@intel.com 		    "!acpidev: no support of PCI/PCIEX host bridge hotplug.");
155*12004Sjiang.liu@intel.com 		/*
156*12004Sjiang.liu@intel.com 		 * Don't block the hot-adding process, just skip it.
157*12004Sjiang.liu@intel.com 		 */
158*12004Sjiang.liu@intel.com 		rc = AE_OK;
159*12004Sjiang.liu@intel.com 	} else {
160*12004Sjiang.liu@intel.com 		ACPIDEV_DEBUG(CE_WARN, "!acpidev: unknown operation type %u "
161*12004Sjiang.liu@intel.com 		    "in acpidev_pci_probe().", infop->awi_op_type);
162*12004Sjiang.liu@intel.com 		rc = AE_BAD_PARAMETER;
163*12004Sjiang.liu@intel.com 	}
164*12004Sjiang.liu@intel.com 	if (ACPI_FAILURE(rc) && rc != AE_NOT_EXIST && rc != AE_ALREADY_EXISTS) {
165*12004Sjiang.liu@intel.com 		cmn_err(CE_CONT, "?acpidev: failed to process PCI/PCIEX host "
166*12004Sjiang.liu@intel.com 		    "bridge object %s.\n", infop->awi_name);
167*12004Sjiang.liu@intel.com 	} else {
168*12004Sjiang.liu@intel.com 		rc = AE_OK;
169*12004Sjiang.liu@intel.com 	}
170*12004Sjiang.liu@intel.com 
171*12004Sjiang.liu@intel.com 	return (rc);
172*12004Sjiang.liu@intel.com }
173