1*3446Smrj /* 2*3446Smrj * CDDL HEADER START 3*3446Smrj * 4*3446Smrj * The contents of this file are subject to the terms of the 5*3446Smrj * Common Development and Distribution License (the "License"). 6*3446Smrj * You may not use this file except in compliance with the License. 7*3446Smrj * 8*3446Smrj * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*3446Smrj * or http://www.opensolaris.org/os/licensing. 10*3446Smrj * See the License for the specific language governing permissions 11*3446Smrj * and limitations under the License. 12*3446Smrj * 13*3446Smrj * When distributing Covered Code, include this CDDL HEADER in each 14*3446Smrj * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*3446Smrj * If applicable, add the following below this CDDL HEADER, with the 16*3446Smrj * fields enclosed by brackets "[]" replaced with your own identifying 17*3446Smrj * information: Portions Copyright [yyyy] [name of copyright owner] 18*3446Smrj * 19*3446Smrj * CDDL HEADER END 20*3446Smrj */ 21*3446Smrj /* 22*3446Smrj * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23*3446Smrj * Use is subject to license terms. 24*3446Smrj */ 25*3446Smrj 26*3446Smrj #ifndef _BOOT_SERIAL_H 27*3446Smrj #define _BOOT_SERIAL_H 28*3446Smrj 29*3446Smrj #pragma ident "%Z%%M% %I% %E% SMI" 30*3446Smrj 31*3446Smrj #ifdef __cplusplus 32*3446Smrj extern "C" { 33*3446Smrj #endif 34*3446Smrj 35*3446Smrj /* ---- ports on 16550 serial chips ---- */ 36*3446Smrj #define DAT 0 /* ... data */ 37*3446Smrj #define ICR 1 /* ... intr control reg */ 38*3446Smrj #define ISR 2 /* ... intr status reg */ 39*3446Smrj #define LCR 3 /* ... line control reg */ 40*3446Smrj #define MCR 4 /* ... modem control reg */ 41*3446Smrj #define LSR 5 /* ... line status reg */ 42*3446Smrj #define MSR 6 /* ... modem status reg */ 43*3446Smrj #define DLL 0 /* ... data latch low (used for baud rate) */ 44*3446Smrj #define DLH 1 /* ... data latch high (ditto) */ 45*3446Smrj #define FIFOR ISR /* ... fifo write reg */ 46*3446Smrj 47*3446Smrj /* ---- LSR bits ---- */ 48*3446Smrj #define RCA 0x01 /* ... receive char avail */ 49*3446Smrj #define XHRE 0x20 /* ... xmit hold buffer empty */ 50*3446Smrj 51*3446Smrj /* ---- Modem bits ---- */ 52*3446Smrj #define DTR 0x01 53*3446Smrj #define RTS 0x02 54*3446Smrj #define OUT2 0x08 55*3446Smrj 56*3446Smrj #define FIFO_ON 0x01 57*3446Smrj #define FIFO_OFF 0x00 58*3446Smrj #define FIFORXFLSH 0x02 59*3446Smrj #define FIFOTXFLSH 0x04 60*3446Smrj #define FIFODMA 0x08 61*3446Smrj 62*3446Smrj /* ---- LCR bits ---- */ 63*3446Smrj #define STOP1 00 64*3446Smrj #define STOP2 0x04 65*3446Smrj #define BITS5 0x00 /* 5 bits per char */ 66*3446Smrj #define BITS6 0x01 /* 6 bits per char */ 67*3446Smrj #define BITS7 0x02 /* 7 bits per char */ 68*3446Smrj #define BITS8 0x03 /* 8 bits per char */ 69*3446Smrj 70*3446Smrj /* baud rate definitions */ 71*3446Smrj #define DLAB 0x80 /* divisor latch access bit */ 72*3446Smrj #define ASY110 1047 /* 110 baud rate for serial console */ 73*3446Smrj #define ASY150 768 /* 150 baud rate for serial console */ 74*3446Smrj #define ASY300 384 /* 300 baud rate for serial console */ 75*3446Smrj #define ASY600 192 /* 600 baud rate for serial console */ 76*3446Smrj #define ASY1200 96 /* 1200 baud rate for serial console */ 77*3446Smrj #define ASY2400 48 /* 2400 baud rate for serial console */ 78*3446Smrj #define ASY4800 24 /* 4800 baud rate for serial console */ 79*3446Smrj #define ASY9600 12 /* 9600 baud rate for serial console */ 80*3446Smrj #define ASY19200 6 /* 19200 baud rate for serial console */ 81*3446Smrj #define ASY38400 3 /* 38400 baud rate for serial console */ 82*3446Smrj #define ASY57600 2 /* 57600 baud rate for serial console */ 83*3446Smrj #define ASY115200 1 /* 115200 baud rate for serial console */ 84*3446Smrj 85*3446Smrj 86*3446Smrj /* 87*3446Smrj * Defines for the serial port 88*3446Smrj */ 89*3446Smrj 90*3446Smrj #define SERIAL_FIFO_FLUSH 16 /* maximum number of chars to flush */ 91*3446Smrj 92*3446Smrj /* ---- Bit 11 defines direct serial port ---- */ 93*3446Smrj #define SDIRECT 0x1000 94*3446Smrj 95*3446Smrj /* ---- Bits 9-10 define flow control ---- */ 96*3446Smrj #define SSOFT 0x800 97*3446Smrj #define SHARD 0x400 98*3446Smrj 99*3446Smrj /* ---- Bits 5-8 define baud rate ---- */ 100*3446Smrj #define S110 0x00 101*3446Smrj #define S150 0x20 102*3446Smrj #define S300 0x40 103*3446Smrj #define S600 0x60 104*3446Smrj #define S1200 0x80 105*3446Smrj #define S2400 0xa0 106*3446Smrj #define S4800 0xc0 107*3446Smrj #define S9600 0xe0 108*3446Smrj #define S19200 0x100 109*3446Smrj #define S38400 0x120 110*3446Smrj #define S57600 0x140 111*3446Smrj #define S76800 0x160 112*3446Smrj #define S115200 0x180 113*3446Smrj #define S153600 0x1a0 114*3446Smrj #define S230400 0x1c0 115*3446Smrj #define S307200 0x1e0 116*3446Smrj #define S460800 0x200 117*3446Smrj 118*3446Smrj /* ---- Bits 3 & 4 are parity ---- */ 119*3446Smrj #define PARITY_NONE 0x10 120*3446Smrj #define PARITY_ODD 0x08 121*3446Smrj #define PARITY_EVEN 0x18 122*3446Smrj 123*3446Smrj /* ---- Bit 2 is stop bit ---- */ 124*3446Smrj #define STOP_1 0x00 125*3446Smrj #define STOP_2 0x04 126*3446Smrj 127*3446Smrj /* ---- Bits 0 & 1 are data bits ---- */ 128*3446Smrj #define DATA_8 0x03 129*3446Smrj #define DATA_7 0x02 130*3446Smrj #define DATA_6 0x01 131*3446Smrj #define DATA_5 0x00 132*3446Smrj 133*3446Smrj /* ---- Line Status ---- */ 134*3446Smrj #define SERIAL_TIMEOUT 0x80 135*3446Smrj #define SERIAL_XMITSHFT 0x40 136*3446Smrj #define SERIAL_XMITHOLD 0x20 137*3446Smrj #define SERIAL_BREAK 0x10 138*3446Smrj #define SERIAL_FRAME 0x08 139*3446Smrj #define SERIAL_PARITY 0x04 140*3446Smrj #define SERIAL_OVERRUN 0x02 141*3446Smrj #define SERIAL_DATA 0x01 142*3446Smrj 143*3446Smrj 144*3446Smrj #ifdef __cplusplus 145*3446Smrj } 146*3446Smrj #endif 147*3446Smrj 148*3446Smrj #endif /* _BOOT_SERIAL_H */ 149