1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright (c) 1999 by Sun Microsystems, Inc. 24*0Sstevel@tonic-gate * All rights reserved. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _PCSER_MANUSPEC_H 28*0Sstevel@tonic-gate #define _PCSER_MANUSPEC_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate #ifdef __cplusplus 33*0Sstevel@tonic-gate extern "C" { 34*0Sstevel@tonic-gate #endif 35*0Sstevel@tonic-gate 36*0Sstevel@tonic-gate /* 37*0Sstevel@tonic-gate * This file describes any manufacturer-specific capabilities of the 38*0Sstevel@tonic-gate * card. These capabilities are stored in an array of structures 39*0Sstevel@tonic-gate * and are keyed off of the card's manufacturer and card IDs; these 40*0Sstevel@tonic-gate * come from the CISTPL_MANFID tuple. 41*0Sstevel@tonic-gate * We need this file since some cards have additional features that can 42*0Sstevel@tonic-gate * not be specified in the CIS since there are not tuples to do so 43*0Sstevel@tonic-gate * while other cards have a broken CIS which prevents them from 44*0Sstevel@tonic-gate * being initialized properly. 45*0Sstevel@tonic-gate */ 46*0Sstevel@tonic-gate 47*0Sstevel@tonic-gate /* 48*0Sstevel@tonic-gate * Property used to provide manufacturer-specific parameter overrides. 49*0Sstevel@tonic-gate * This property is typically specified in a .conf file. 50*0Sstevel@tonic-gate */ 51*0Sstevel@tonic-gate #define PCSER_MODIFY_MANSPEC_PARAMS "pcser_modify_manspec_params" 52*0Sstevel@tonic-gate 53*0Sstevel@tonic-gate #define PCSPP_DEBUG_PARSE_LINE 0x00000001 54*0Sstevel@tonic-gate #define PCSPP_DEBUG_SET_MSP 0x00000002 55*0Sstevel@tonic-gate #define PCSPP_DSPMATCH 0x00000004 56*0Sstevel@tonic-gate #define PCSPP_DISPLAY 0x10000000 57*0Sstevel@tonic-gate #define PCSPP_COMMENT 0x20000000 58*0Sstevel@tonic-gate 59*0Sstevel@tonic-gate #define PCSER_PARSE_QUOTE '\'' 60*0Sstevel@tonic-gate #define PCSER_PARSE_COMMENT '#' 61*0Sstevel@tonic-gate #define PCSER_PARSE_ESCAPE '\\' 62*0Sstevel@tonic-gate #define PCSER_PARSE_UNDERSCORE '_' 63*0Sstevel@tonic-gate 64*0Sstevel@tonic-gate /* 65*0Sstevel@tonic-gate * state defines for the valued variable state machine 66*0Sstevel@tonic-gate */ 67*0Sstevel@tonic-gate #define PT_STATE_UNKNOWN 0 68*0Sstevel@tonic-gate #define PT_STATE_TOKEN 1 69*0Sstevel@tonic-gate #define PT_STATE_STRING_VAR 2 70*0Sstevel@tonic-gate #define PT_STATE_HEX_VAR 3 71*0Sstevel@tonic-gate #define PT_STATE_DEC_VAR 4 72*0Sstevel@tonic-gate #define PT_STATE_ESCAPE 5 73*0Sstevel@tonic-gate 74*0Sstevel@tonic-gate /* 75*0Sstevel@tonic-gate * Flags for pcser_manuspec_t.flags 76*0Sstevel@tonic-gate * 77*0Sstevel@tonic-gate * Matching flags 78*0Sstevel@tonic-gate */ 79*0Sstevel@tonic-gate #define PCSER_MATCH_MANUFACTURER 0x00000001 /* match manf ID */ 80*0Sstevel@tonic-gate #define PCSER_MATCH_CARD 0x00000002 /* match card ID */ 81*0Sstevel@tonic-gate #define PCSER_MATCH_VERS_1 0x00000004 /* match vers_1 */ 82*0Sstevel@tonic-gate #define PCSER_MATCH_MASK 0x00000fff 83*0Sstevel@tonic-gate 84*0Sstevel@tonic-gate /* 85*0Sstevel@tonic-gate * Parameter override flags 86*0Sstevel@tonic-gate */ 87*0Sstevel@tonic-gate #define PCSER_MANSPEC_TXBUFSIZE 0x00001000 /* txbufsize valid */ 88*0Sstevel@tonic-gate #define PCSER_MANSPEC_RXBUFSIZE 0x00002000 /* rxbufsize valid */ 89*0Sstevel@tonic-gate #define PCSER_MANSPEC_FIFO_ENABLE 0x00004000 /* Tx/Rx FIFO valid */ 90*0Sstevel@tonic-gate #define PCSER_MANSPEC_FIFO_DISABLE 0x00008000 /* Tx/Rx FIFO valid */ 91*0Sstevel@tonic-gate #define PCSER_MANSPEC_AUTO_RTS 0x00010000 /* auto_rts valid */ 92*0Sstevel@tonic-gate #define PCSER_MANSPEC_AUTO_CTS 0x00020000 /* auto_cts valid */ 93*0Sstevel@tonic-gate #define PCSER_MANSPEC_READY_DELAY_1 0x00040000 /* delay before cfg */ 94*0Sstevel@tonic-gate #define PCSER_MANSPEC_READY_DELAY_2 0x00080000 /* delay after cfg */ 95*0Sstevel@tonic-gate #define PCSER_MANSPEC_CONFIG_INDEX 0x00100000 /* config index */ 96*0Sstevel@tonic-gate #define PCSER_MANSPEC_CONFIG_ADDR 0x00200000 /* config address */ 97*0Sstevel@tonic-gate #define PCSER_MANSPEC_CONFIG_PRESENT 0x00400000 /* regs present mask */ 98*0Sstevel@tonic-gate #define PCSER_MANSPEC_NUM_IO_LINES 0x00800000 /* IO addr lines */ 99*0Sstevel@tonic-gate #define PCSER_MANSPEC_NUM_IO_PORTS 0x01000000 /* num IO ports */ 100*0Sstevel@tonic-gate #define PCSER_MANSPEC_IO_ADDR 0x02000000 /* IO address */ 101*0Sstevel@tonic-gate #define PCSER_MANSPEC_CD_TIME 0x04000000 /* CD ignore time */ 102*0Sstevel@tonic-gate #define PCSER_MANSPEC_IGN_CD_ON_OPEN 0x08000000 /* CD timer on open */ 103*0Sstevel@tonic-gate 104*0Sstevel@tonic-gate typedef struct pcser_manuspec_parse_tree_t { 105*0Sstevel@tonic-gate char *token; /* token to look for */ 106*0Sstevel@tonic-gate int state; /* state machine state */ 107*0Sstevel@tonic-gate unsigned flags; /* flags to set in manuspec struc */ 108*0Sstevel@tonic-gate unsigned ctl; /* control flags */ 109*0Sstevel@tonic-gate int fmt; /* data format type */ 110*0Sstevel@tonic-gate void *var; /* pointer to manuspec struct var */ 111*0Sstevel@tonic-gate } pcser_manuspec_parse_tree_t; 112*0Sstevel@tonic-gate 113*0Sstevel@tonic-gate typedef struct pcser_manuspec_t { 114*0Sstevel@tonic-gate uint32_t flags; /* matching flags */ 115*0Sstevel@tonic-gate uint32_t manufacturer; /* manufacturer ID */ 116*0Sstevel@tonic-gate uint32_t card; /* card ID */ 117*0Sstevel@tonic-gate uint32_t txbufsize; /* Tx FIFO buffer size */ 118*0Sstevel@tonic-gate uint32_t rxbufsize; /* Rx FIFO buffer size */ 119*0Sstevel@tonic-gate uint32_t fifo_enable; /* Tx/Rx FIFO enable code */ 120*0Sstevel@tonic-gate uint32_t fifo_disable; /* Tx/Rx FIFO disable code */ 121*0Sstevel@tonic-gate uint32_t auto_rts; /* Auto RTS enable code */ 122*0Sstevel@tonic-gate uint32_t auto_cts; /* Auto CTS enable code */ 123*0Sstevel@tonic-gate uint32_t ready_delay_1; /* READY delay before config in mS */ 124*0Sstevel@tonic-gate uint32_t ready_delay_2; /* READY delay after config in mS */ 125*0Sstevel@tonic-gate uint32_t config_index; /* config index */ 126*0Sstevel@tonic-gate uint32_t config_address; /* config regs address */ 127*0Sstevel@tonic-gate uint32_t present; /* config regs present mask */ 128*0Sstevel@tonic-gate uint32_t addr_lines; /* IO addr lines decoded */ 129*0Sstevel@tonic-gate uint32_t length; /* length of IO range */ 130*0Sstevel@tonic-gate uint32_t modem_base; /* base of UART registers */ 131*0Sstevel@tonic-gate uint32_t CD_ignore_time; /* mS to ignore CD changes */ 132*0Sstevel@tonic-gate char *vers_1; /* VERS_1 string */ 133*0Sstevel@tonic-gate } pcser_manuspec_t; 134*0Sstevel@tonic-gate 135*0Sstevel@tonic-gate pcser_manuspec_t pcser_manuspec[] = { 136*0Sstevel@tonic-gate /* Sun/USRobotics Worldport modem */ 137*0Sstevel@tonic-gate { (PCSER_MATCH_MANUFACTURER | /* matching flags */ 138*0Sstevel@tonic-gate PCSER_MATCH_CARD | 139*0Sstevel@tonic-gate PCSER_MANSPEC_TXBUFSIZE | 140*0Sstevel@tonic-gate PCSER_MANSPEC_RXBUFSIZE | 141*0Sstevel@tonic-gate PCSER_MANSPEC_FIFO_ENABLE | 142*0Sstevel@tonic-gate PCSER_MANSPEC_FIFO_DISABLE | 143*0Sstevel@tonic-gate PCSER_MANSPEC_AUTO_RTS), 144*0Sstevel@tonic-gate 0x0115, /* manufacturer ID */ 145*0Sstevel@tonic-gate 0x3330, /* card ID */ 146*0Sstevel@tonic-gate 64, /* Tx FIFO buffer size */ 147*0Sstevel@tonic-gate 64, /* Rx FIFO buffer size */ 148*0Sstevel@tonic-gate 0x0e1, /* Tx/Rx FIFO enable code */ 149*0Sstevel@tonic-gate 0, /* Tx/Rx FIFO disable code */ 150*0Sstevel@tonic-gate 0x010, /* Auto RTS enable code */ 151*0Sstevel@tonic-gate 0, /* Auto CTS enable code */ 152*0Sstevel@tonic-gate 0, /* READY_1 delay before config in mS */ 153*0Sstevel@tonic-gate 0, /* READY_2 delay after config in mS */ 154*0Sstevel@tonic-gate 0, /* config index */ 155*0Sstevel@tonic-gate 0, /* config regs address */ 156*0Sstevel@tonic-gate 0, /* config regs present mask */ 157*0Sstevel@tonic-gate 0, /* IO addr lines decoded */ 158*0Sstevel@tonic-gate 0, /* length of IO range */ 159*0Sstevel@tonic-gate 0, /* base of UART registers */ 160*0Sstevel@tonic-gate 0, /* mS to ignore CD changes */ 161*0Sstevel@tonic-gate NULL /* VERS_1 string */ 162*0Sstevel@tonic-gate }, 163*0Sstevel@tonic-gate /* USRobotics Worldport modem with broken CIS */ 164*0Sstevel@tonic-gate { (PCSER_MATCH_VERS_1 | /* matching flags */ 165*0Sstevel@tonic-gate PCSER_MANSPEC_TXBUFSIZE | 166*0Sstevel@tonic-gate PCSER_MANSPEC_RXBUFSIZE | 167*0Sstevel@tonic-gate PCSER_MANSPEC_READY_DELAY_1), 168*0Sstevel@tonic-gate 0, /* manufacturer ID */ 169*0Sstevel@tonic-gate 0, /* card ID */ 170*0Sstevel@tonic-gate 1, /* Tx FIFO buffer size */ 171*0Sstevel@tonic-gate 1, /* Rx FIFO buffer size */ 172*0Sstevel@tonic-gate 0, /* Tx/Rx FIFO enable code */ 173*0Sstevel@tonic-gate 0, /* Tx/Rx FIFO disable code */ 174*0Sstevel@tonic-gate 0, /* Auto RTS enable code */ 175*0Sstevel@tonic-gate 0, /* Auto CTS enable code */ 176*0Sstevel@tonic-gate 10000, /* READY_1 delay before config in mS */ 177*0Sstevel@tonic-gate 0, /* READY_2 delay after config in mS */ 178*0Sstevel@tonic-gate 0, /* config index */ 179*0Sstevel@tonic-gate 0, /* config regs address */ 180*0Sstevel@tonic-gate 0, /* config regs present mask */ 181*0Sstevel@tonic-gate 0, /* IO addr lines decoded */ 182*0Sstevel@tonic-gate 0, /* length of IO range */ 183*0Sstevel@tonic-gate 0, /* base of UART registers */ 184*0Sstevel@tonic-gate 0, /* mS to ignore CD changes */ 185*0Sstevel@tonic-gate "Intel MODEM 2400+ iNC110US A-0" /* VERS_1 string */ 186*0Sstevel@tonic-gate }, 187*0Sstevel@tonic-gate }; 188*0Sstevel@tonic-gate 189*0Sstevel@tonic-gate #define PT_VAR_OFFSET(v) ((void *)&(((pcser_manuspec_t *)0)->v)) 190*0Sstevel@tonic-gate /* 191*0Sstevel@tonic-gate * The PT_VAR_* values specify what type of variable should be 192*0Sstevel@tonic-gate * extracted from the token parameters. We know how to 193*0Sstevel@tonic-gate * extract hex and decimal unsigned values and strings. 194*0Sstevel@tonic-gate */ 195*0Sstevel@tonic-gate #define PT_VAR_HEX 0x0001 196*0Sstevel@tonic-gate #define PT_VAR_DEC 0x0002 197*0Sstevel@tonic-gate #define PT_VAR_STRING 0x0003 198*0Sstevel@tonic-gate #define PT_VAR_BOOL 0x0004 199*0Sstevel@tonic-gate #define PT_VAR_HEX_CTL 0x0005 200*0Sstevel@tonic-gate 201*0Sstevel@tonic-gate /* 202*0Sstevel@tonic-gate * PT_VAR_BOOL has several sub-modes defined below 203*0Sstevel@tonic-gate */ 204*0Sstevel@tonic-gate #define PT_VAR_BOOL_NONE 0x0000 205*0Sstevel@tonic-gate #define PT_VAR_BOOL_DISPLAY_ON 0x0001 206*0Sstevel@tonic-gate #define PT_VAR_BOOL_DISPLAY_OFF 0x0002 207*0Sstevel@tonic-gate #define PT_VAR_HEX_CTL_DEBUG 0x0003 208*0Sstevel@tonic-gate #define PT_VAR_BOOL_DEBUG_STAT 0x0004 209*0Sstevel@tonic-gate #define PT_VAR_BOOL_COMMENT_ON 0x0005 210*0Sstevel@tonic-gate #define PT_VAR_BOOL_COMMENT_OFF 0x0006 211*0Sstevel@tonic-gate #define PT_VAR_HEX_CTL_PCSER_DEBUG 0x0007 212*0Sstevel@tonic-gate #define PT_VAR_BOOL_DSPMATCH_ON 0x0008 213*0Sstevel@tonic-gate #define PT_VAR_BOOL_DSPMATCH_OFF 0x0009 214*0Sstevel@tonic-gate #define PT_VAR_BOOL_CD_IGN 0x000a 215*0Sstevel@tonic-gate 216*0Sstevel@tonic-gate /* 217*0Sstevel@tonic-gate * Initialize the parse tree structure 218*0Sstevel@tonic-gate */ 219*0Sstevel@tonic-gate pcser_manuspec_parse_tree_t pcser_manuspec_parse_tree[] = { 220*0Sstevel@tonic-gate 221*0Sstevel@tonic-gate { "flags", PT_STATE_HEX_VAR, 222*0Sstevel@tonic-gate 0, PT_VAR_BOOL_NONE, 223*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(flags) }, 224*0Sstevel@tonic-gate { "manufacturer", PT_STATE_HEX_VAR, 225*0Sstevel@tonic-gate PCSER_MATCH_MANUFACTURER, PT_VAR_BOOL_NONE, 226*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(manufacturer) }, 227*0Sstevel@tonic-gate { "card", PT_STATE_HEX_VAR, 228*0Sstevel@tonic-gate PCSER_MATCH_CARD, PT_VAR_BOOL_NONE, 229*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(card) }, 230*0Sstevel@tonic-gate { "vers_1", PT_STATE_STRING_VAR, 231*0Sstevel@tonic-gate PCSER_MATCH_VERS_1, PT_VAR_BOOL_NONE, 232*0Sstevel@tonic-gate PT_VAR_STRING, PT_VAR_OFFSET(vers_1) }, 233*0Sstevel@tonic-gate { "txbufsize", PT_STATE_HEX_VAR, 234*0Sstevel@tonic-gate PCSER_MANSPEC_TXBUFSIZE, PT_VAR_BOOL_NONE, 235*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(txbufsize) }, 236*0Sstevel@tonic-gate { "rxbufsize", PT_STATE_HEX_VAR, 237*0Sstevel@tonic-gate PCSER_MANSPEC_RXBUFSIZE, PT_VAR_BOOL_NONE, 238*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(rxbufsize) }, 239*0Sstevel@tonic-gate { "fifo_enable", PT_STATE_HEX_VAR, 240*0Sstevel@tonic-gate PCSER_MANSPEC_FIFO_ENABLE, PT_VAR_BOOL_NONE, 241*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(fifo_enable) }, 242*0Sstevel@tonic-gate { "fifo_disable", PT_STATE_HEX_VAR, 243*0Sstevel@tonic-gate PCSER_MANSPEC_FIFO_DISABLE, PT_VAR_BOOL_NONE, 244*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(fifo_disable) }, 245*0Sstevel@tonic-gate { "auto_rts", PT_STATE_HEX_VAR, 246*0Sstevel@tonic-gate PCSER_MANSPEC_AUTO_RTS, PT_VAR_BOOL_NONE, 247*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(auto_rts) }, 248*0Sstevel@tonic-gate { "auto_cts", PT_STATE_HEX_VAR, 249*0Sstevel@tonic-gate PCSER_MANSPEC_AUTO_CTS, PT_VAR_BOOL_NONE, 250*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(auto_cts) }, 251*0Sstevel@tonic-gate { "ready_delay_1", PT_STATE_DEC_VAR, 252*0Sstevel@tonic-gate PCSER_MANSPEC_READY_DELAY_1, PT_VAR_BOOL_NONE, 253*0Sstevel@tonic-gate PT_VAR_DEC, PT_VAR_OFFSET(ready_delay_1) }, 254*0Sstevel@tonic-gate { "ready_delay_2", PT_STATE_DEC_VAR, 255*0Sstevel@tonic-gate PCSER_MANSPEC_READY_DELAY_2, PT_VAR_BOOL_NONE, 256*0Sstevel@tonic-gate PT_VAR_DEC, PT_VAR_OFFSET(ready_delay_2) }, 257*0Sstevel@tonic-gate { "config_index", PT_STATE_HEX_VAR, 258*0Sstevel@tonic-gate PCSER_MANSPEC_CONFIG_INDEX, PT_VAR_BOOL_NONE, 259*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(config_index) }, 260*0Sstevel@tonic-gate { "config_address", PT_STATE_HEX_VAR, 261*0Sstevel@tonic-gate PCSER_MANSPEC_CONFIG_ADDR, PT_VAR_BOOL_NONE, 262*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(config_address) }, 263*0Sstevel@tonic-gate { "config_regs_present", PT_STATE_HEX_VAR, 264*0Sstevel@tonic-gate PCSER_MANSPEC_CONFIG_PRESENT, PT_VAR_BOOL_NONE, 265*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(present) }, 266*0Sstevel@tonic-gate { "IO_addr_lines", PT_STATE_HEX_VAR, 267*0Sstevel@tonic-gate PCSER_MANSPEC_NUM_IO_LINES, PT_VAR_BOOL_NONE, 268*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(addr_lines) }, 269*0Sstevel@tonic-gate { "IO_num_ports", PT_STATE_HEX_VAR, 270*0Sstevel@tonic-gate PCSER_MANSPEC_NUM_IO_PORTS, PT_VAR_BOOL_NONE, 271*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(length) }, 272*0Sstevel@tonic-gate { "IO_base_addr", PT_STATE_HEX_VAR, 273*0Sstevel@tonic-gate PCSER_MANSPEC_IO_ADDR, PT_VAR_BOOL_NONE, 274*0Sstevel@tonic-gate PT_VAR_HEX, PT_VAR_OFFSET(modem_base) }, 275*0Sstevel@tonic-gate { "CD_ignore_time", PT_STATE_DEC_VAR, 276*0Sstevel@tonic-gate PCSER_MANSPEC_CD_TIME, PT_VAR_BOOL_NONE, 277*0Sstevel@tonic-gate PT_VAR_DEC, PT_VAR_OFFSET(CD_ignore_time) }, 278*0Sstevel@tonic-gate { "ignore_CD_on_open", PT_STATE_TOKEN, 279*0Sstevel@tonic-gate PCSER_MANSPEC_IGN_CD_ON_OPEN, PT_VAR_BOOL_CD_IGN, 280*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 281*0Sstevel@tonic-gate { "display_on", PT_STATE_TOKEN, 282*0Sstevel@tonic-gate 0, PT_VAR_BOOL_DISPLAY_ON, 283*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 284*0Sstevel@tonic-gate { "display_match_on", PT_STATE_TOKEN, 285*0Sstevel@tonic-gate 0, PT_VAR_BOOL_DSPMATCH_ON, 286*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 287*0Sstevel@tonic-gate { "comment_on", PT_STATE_TOKEN, 288*0Sstevel@tonic-gate 0, PT_VAR_BOOL_COMMENT_ON, 289*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 290*0Sstevel@tonic-gate { "display_off", PT_STATE_TOKEN, 291*0Sstevel@tonic-gate 0, PT_VAR_BOOL_DISPLAY_OFF, 292*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 293*0Sstevel@tonic-gate { "display_match_off", PT_STATE_TOKEN, 294*0Sstevel@tonic-gate 0, PT_VAR_BOOL_DSPMATCH_OFF, 295*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 296*0Sstevel@tonic-gate { "comment_off", PT_STATE_TOKEN, 297*0Sstevel@tonic-gate 0, PT_VAR_BOOL_COMMENT_OFF, 298*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 299*0Sstevel@tonic-gate { "debug_stat", PT_STATE_TOKEN, 300*0Sstevel@tonic-gate 0, PT_VAR_BOOL_DEBUG_STAT, 301*0Sstevel@tonic-gate PT_VAR_BOOL, 0 }, 302*0Sstevel@tonic-gate { "debug", PT_STATE_HEX_VAR, 303*0Sstevel@tonic-gate 0, PT_VAR_HEX_CTL_DEBUG, 304*0Sstevel@tonic-gate PT_VAR_HEX_CTL, 0 }, 305*0Sstevel@tonic-gate { "pcser_debug", PT_STATE_HEX_VAR, 306*0Sstevel@tonic-gate 0, PT_VAR_HEX_CTL_PCSER_DEBUG, 307*0Sstevel@tonic-gate PT_VAR_HEX_CTL, 0 }, 308*0Sstevel@tonic-gate }; 309*0Sstevel@tonic-gate 310*0Sstevel@tonic-gate #ifdef __cplusplus 311*0Sstevel@tonic-gate } 312*0Sstevel@tonic-gate #endif 313*0Sstevel@tonic-gate 314*0Sstevel@tonic-gate #endif /* _PCSER_MANUSPEC_H */ 315