xref: /onnv-gate/usr/src/uts/common/sys/nxge/nxge_hio.h (revision 8400:773afdd54b44)
16495Sspeer /*
26495Sspeer  * CDDL HEADER START
36495Sspeer  *
46495Sspeer  * The contents of this file are subject to the terms of the
56495Sspeer  * Common Development and Distribution License (the "License").
66495Sspeer  * You may not use this file except in compliance with the License.
76495Sspeer  *
86495Sspeer  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
96495Sspeer  * or http://www.opensolaris.org/os/licensing.
106495Sspeer  * See the License for the specific language governing permissions
116495Sspeer  * and limitations under the License.
126495Sspeer  *
136495Sspeer  * When distributing Covered Code, include this CDDL HEADER in each
146495Sspeer  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
156495Sspeer  * If applicable, add the following below this CDDL HEADER, with the
166495Sspeer  * fields enclosed by brackets "[]" replaced with your own identifying
176495Sspeer  * information: Portions Copyright [yyyy] [name of copyright owner]
186495Sspeer  *
196495Sspeer  * CDDL HEADER END
206495Sspeer  */
216495Sspeer 
226495Sspeer /*
236495Sspeer  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
246495Sspeer  * Use is subject to license terms.
256495Sspeer  */
266495Sspeer 
276495Sspeer #ifndef	_SYS_NXGE_NXGE_HIO_H
286495Sspeer #define	_SYS_NXGE_NXGE_HIO_H
296495Sspeer 
306495Sspeer #ifdef	__cplusplus
316495Sspeer extern "C" {
326495Sspeer #endif
336495Sspeer 
346495Sspeer #include <nxge_mac.h>
356495Sspeer #include <nxge_ipp.h>
366495Sspeer #include <nxge_fflp.h>
378275SEric Cheng #include <sys/mac_provider.h>
386495Sspeer #if defined(sun4v)
396495Sspeer #include <sys/vnet_res.h>
406495Sspeer #endif
416495Sspeer 
426495Sspeer #define	isLDOMservice(nxge) \
436495Sspeer 	(nxge->environs == SOLARIS_SERVICE_DOMAIN)
446495Sspeer #define	isLDOMguest(nxge) \
456495Sspeer 	(nxge->environs == SOLARIS_GUEST_DOMAIN)
466495Sspeer #define	isLDOMs(nxge) \
476495Sspeer 	(isLDOMservice(nxge) || isLDOMguest(nxge))
486495Sspeer 
496495Sspeer /* ------------------------------------------------------------------ */
506495Sspeer typedef uint8_t nx_rdc_t;
516495Sspeer typedef uint8_t nx_tdc_t;
526495Sspeer 
536495Sspeer typedef uint64_t res_map_t;
546495Sspeer 
556495Sspeer typedef uint64_t hv_rv_t;
566495Sspeer 
576495Sspeer typedef hv_rv_t (*vr_assign)(uint64_t, uint64_t, uint32_t *);
586495Sspeer typedef hv_rv_t (*vr_unassign)(uint32_t);
596495Sspeer typedef hv_rv_t (*vr_getinfo)(uint32_t, uint64_t *, uint64_t *);
606495Sspeer 
616495Sspeer 
626495Sspeer typedef struct {
636495Sspeer 	vr_assign	assign;
646495Sspeer 	vr_unassign	unassign;
656495Sspeer 	vr_getinfo	getinfo;
666495Sspeer 
676495Sspeer } nxhv_vr_fp_t;
686495Sspeer 
696495Sspeer typedef hv_rv_t (*vrlp_conf)(uint64_t, uint64_t, uint64_t, uint64_t);
706495Sspeer typedef hv_rv_t (*vrlp_info)(uint64_t, uint64_t, uint64_t *, uint64_t *);
716495Sspeer 
726495Sspeer typedef hv_rv_t (*dc_assign)(uint32_t, uint64_t, uint64_t *);
736495Sspeer typedef hv_rv_t (*dc_unassign)(uint32_t, uint64_t);
746495Sspeer typedef hv_rv_t (*dc_getstate)(uint32_t, uint64_t, uint64_t *);
756495Sspeer typedef hv_rv_t (*dc_get_map)(uint32_t, uint64_t *);
766495Sspeer 
776495Sspeer typedef hv_rv_t (*dc_getinfo)(uint32_t, uint64_t, uint64_t *, uint64_t *);
786495Sspeer 
796495Sspeer typedef struct {
806495Sspeer 	dc_assign	assign;
816495Sspeer 	dc_unassign	unassign;
826495Sspeer 	dc_getstate	getstate;
836495Sspeer 	dc_get_map	get_map;
846495Sspeer 
856495Sspeer 	vrlp_conf	lp_conf;
866495Sspeer 	vrlp_info	lp_info;
876495Sspeer 
886495Sspeer 	dc_getinfo	getinfo;
896495Sspeer } nxhv_dc_fp_t;
906495Sspeer 
916495Sspeer #if defined(sun4v)
926495Sspeer typedef struct {
936495Sspeer 	vio_net_resource_reg_t	__register;
946495Sspeer 	vio_net_resource_unreg_t unregister;
956495Sspeer 
966495Sspeer 	vio_net_callbacks_t	cb;
976495Sspeer 
986495Sspeer } nx_vio_fp_t;
996495Sspeer #endif
1006495Sspeer 
1016495Sspeer typedef struct {
1026495Sspeer 	boolean_t	ldoms;
1036495Sspeer 
1046495Sspeer 	nxhv_vr_fp_t	vr;
1056495Sspeer 	nxhv_dc_fp_t	tx;
1066495Sspeer 	nxhv_dc_fp_t	rx;
1076495Sspeer 
1086495Sspeer #if defined(sun4v)
1096495Sspeer 	nx_vio_fp_t	vio;
1106495Sspeer #endif
1116495Sspeer 
1126495Sspeer } nxhv_fp_t;
1136495Sspeer 
1146495Sspeer /* ------------------------------------------------------------------ */
1156495Sspeer #define	NXGE_VR_SR_MAX		8 /* There are 8 subregions (SR). */
1166495Sspeer 
1176495Sspeer typedef enum {
1186495Sspeer 
1196495Sspeer 	NXGE_HIO_TYPE_SERVICE,	/* We are a service domain driver. */
1206495Sspeer 	NXGE_HIO_TYPE_GUEST	/* We are a guest domain driver. */
1216495Sspeer 
1226495Sspeer } nxge_hio_type_t;
1236495Sspeer 
1246495Sspeer typedef enum {
1256495Sspeer 	FUNC0_MNT,
1266495Sspeer 	FUNC0_VIR = 0x1000000,
1276495Sspeer 	FUNC1_MNT = 0x2000000,
1286495Sspeer 	FUNC1_VIR = 0x3000000,
1296495Sspeer 	FUNC2_MNT = 0x4000000,
1306495Sspeer 	FUNC2_VIR = 0x5000000,
1316495Sspeer 	FUNC3_MNT = 0x6000000,
1326495Sspeer 	FUNC3_VIR = 0x7000000
1336495Sspeer 
1346495Sspeer } vr_base_address_t;
1356495Sspeer 
1366495Sspeer #define	VR_STEP		0x2000000
1376495Sspeer #define	VR_VC_STEP	0x0004000
1386495Sspeer 
1396495Sspeer typedef enum {			/* 0-8 */
1406495Sspeer 	FUNC0_VIR0,
1416495Sspeer 	FUNC0_VIR1,
1426495Sspeer 	FUNC1_VIR0,
1436495Sspeer 	FUNC1_VIR1,
1446495Sspeer 	FUNC2_VIR0,
1456495Sspeer 	FUNC2_VIR1,
1466495Sspeer 	FUNC3_VIR0,
1476495Sspeer 	FUNC3_VIR1,
1486495Sspeer 	FUNC_VIR_MAX
1496495Sspeer 
1506495Sspeer } vr_region_t;
1516495Sspeer 
1526495Sspeer typedef enum {
1536495Sspeer 	VP_CHANNEL_0,
1546495Sspeer 	VP_CHANNEL_1,
1556495Sspeer 	VP_CHANNEL_2,
1566495Sspeer 	VP_CHANNEL_3,
1576495Sspeer 	VP_CHANNEL_4,
1586495Sspeer 	VP_CHANNEL_5,
1596495Sspeer 	VP_CHANNEL_6,
1606495Sspeer 	VP_CHANNEL_7,
1616495Sspeer 	VP_CHANNEL_MAX
1626495Sspeer 
1636495Sspeer } vp_channel_t;
1646495Sspeer 
1656495Sspeer typedef enum {
1667950SMichael.Speer@Sun.COM 	VP_BOUND_TX = 1,
1676495Sspeer 	VP_BOUND_RX
1686495Sspeer 
1696495Sspeer } vpc_type_t;
1706495Sspeer 
1716495Sspeer #define	VP_VC_OFFSET(channel)	(channel << 10)
1726495Sspeer #define	VP_RDC_OFFSET		(1 << 9)
1736495Sspeer 
1746495Sspeer typedef enum {
1756495Sspeer 	RXDMA_CFIG1		= 0,
1766495Sspeer 	RXDMA_CFIG2		= 8,
1776495Sspeer 	RBR_CFIG_A		= 0x10,
1786495Sspeer 	RBR_CFIG_B		= 0x18,
1796495Sspeer 	RBR_KICK		= 0x20,
1806495Sspeer 	RBR_STAT		= 0x28,
1816495Sspeer 	RBR_HDH			= 0x30,
1826495Sspeer 	RBR_HDL			= 0x38,
1836495Sspeer 	RCRCFIG_A		= 0x40,
1846495Sspeer 	RCRCFIG_B		= 0x48,
1856495Sspeer 	RCRSTAT_A		= 0x50,
1866495Sspeer 	RCRSTAT_B		= 0x58,
1876495Sspeer 	RCRSTAT_C		= 0x60,
1886495Sspeer 	RX_DMA_ENT_MSK		= 0x68,
1896495Sspeer 	RX_DMA_CTL_STAT		= 0x70,
1906495Sspeer 	RCR_FLSH		= 0x78,
1916495Sspeer 	RXMISC			= 0x90,
1926495Sspeer 	RX_DMA_CTL_STAT_DBG	= 0x98
1936495Sspeer 
1946495Sspeer } rdc_csr_offset_t;
1956495Sspeer 
1966495Sspeer typedef enum {
1976495Sspeer 	Tx_RNG_CFIG		= 0,
1986495Sspeer 	Tx_RNG_HDL		= 0x10,
1996495Sspeer 	Tx_RNG_KICK		= 0x18,
2006495Sspeer 	Tx_ENT_MASK		= 0x20,
2016495Sspeer 	Tx_CS			= 0x28,
2026495Sspeer 	TxDMA_MBH		= 0x30,
2036495Sspeer 	TxDMA_MBL		= 0x38,
2046495Sspeer 	TxDMA_PRE_ST		= 0x40,
2056495Sspeer 	Tx_RNG_ERR_LOGH		= 0x48,
2066495Sspeer 	Tx_RNG_ERR_LOGL		= 0x50,
2076495Sspeer 	TDMC_INTR_DBG		= 0x60,
2086495Sspeer 	Tx_CS_DBG		= 0x68
2096495Sspeer 
2106495Sspeer } tdc_csr_offset_t;
2116495Sspeer 
2126495Sspeer /*
2136495Sspeer  * -------------------------------------------------------------
2146495Sspeer  * These definitions are used to handle the virtual PIO_LDSV
2156495Sspeer  * space of a VR.
2166495Sspeer  * -------------------------------------------------------------
2176495Sspeer  */
2186495Sspeer #define	VLDG_OFFSET		0x2000
2196495Sspeer #define	VLDG_SLL		5
2206495Sspeer 
2216495Sspeer typedef enum {
2226495Sspeer 	PIO_LDSV0,		/* ldf_0, 0-63 */
2236495Sspeer 	PIO_LDSV1,		/* ldf_1, 0-63 */
2246495Sspeer 	PIO_LDSV2,		/* ldf_0 & ldf_1, 64-69 */
2256495Sspeer 	PIO_LDGIMGN		/* arm/timer */
2266495Sspeer 
2276495Sspeer } pio_ld_op_t;
2286495Sspeer 
2296495Sspeer #define	VR_INTR_BLOCK_SIZE	8
2306495Sspeer #define	HIO_INTR_BLOCK_SIZE	4
2316495Sspeer 
2326495Sspeer /* ------------------------------------------------------------------ */
2336495Sspeer typedef struct {
2346495Sspeer 	const char	*name;
2356495Sspeer 	int		offset;
2366495Sspeer } dmc_reg_name_t;
2376495Sspeer 
2386495Sspeer typedef struct {
2396495Sspeer 	uintptr_t	nxge;
2406495Sspeer 	dc_map_t	map;
2416495Sspeer 
2426495Sspeer } nx_rdc_tbl_t;
2436495Sspeer 
2446495Sspeer typedef struct nxge_hio_vr {
2456495Sspeer 	uintptr_t	nxge;
2466495Sspeer 
2476495Sspeer 	uint32_t	cookie;	/* The HV cookie. */
2486495Sspeer 	uintptr_t	address;
2496495Sspeer 	size_t		size;
2506495Sspeer 	vr_region_t	region;	/* 1 of 8 regions. */
2516495Sspeer 
2528275SEric Cheng 	int		rdc_tbl; /* 1 of 8 RDC tables. */
2538275SEric Cheng 	int		tdc_tbl; /* 1 of 8 TDC tables. */
2546495Sspeer 	ether_addr_t	altmac;	/* The alternate MAC address. */
2558275SEric Cheng 	int		slot;	/* According to nxge_m_mmac_add(). */
2566495Sspeer 
2576495Sspeer #if defined(sun4v)
2586495Sspeer 	vio_net_handle_t vhp;	/* The handle given to us by the vnet. */
2596495Sspeer #endif
2606495Sspeer 	nxge_grp_t	rx_group;
2616495Sspeer 	nxge_grp_t	tx_group;
2626495Sspeer 
2636495Sspeer } nxge_hio_vr_t;
2646495Sspeer 
2656495Sspeer typedef nxge_status_t (*dc_init_t)(nxge_t *, int);
2666495Sspeer typedef void (*dc_uninit_t)(nxge_t *, int);
2676495Sspeer 
2686495Sspeer typedef struct {
2696495Sspeer 	uint32_t	number;	/* The LDG number assigned to this DC. */
2706495Sspeer 	uint64_t	index;	/* Bits 7:5 of the (virtual) PIO_LDSV. */
2716495Sspeer 
2726495Sspeer 	uint64_t	ldsv;	/* The logical device number */
2736495Sspeer 	uint64_t	map;	/* Currently unused */
2746495Sspeer 
2756495Sspeer 	int		vector;	/* The DDI vector number (index) */
2766495Sspeer 
2776495Sspeer } hio_ldg_t;
2786495Sspeer 
2796495Sspeer /*
2806495Sspeer  * -------------------------------------------------------------
2816495Sspeer  * The service domain driver makes use of both <index>, the index
2826495Sspeer  * into a VR's virtual page, and <channel>, the absolute channel
2836495Sspeer  * number, what we will call here the physical channel number.
2846495Sspeer  *
2856495Sspeer  * The guest domain will set both fields to the same value, since
2866495Sspeer  * it doesn't know any better.  And if a service domain owns a
2876495Sspeer  * DMA channel, it will also set both fields to the same value,
2886495Sspeer  * since it is not using a VR per se.
2896495Sspeer  * -------------------------------------------------------------
2906495Sspeer  */
2916495Sspeer typedef struct nx_dc {
2926495Sspeer 
2936495Sspeer 	struct nx_dc	*next;
2946495Sspeer 
2956495Sspeer 	nxge_hio_vr_t	*vr;	/* The VR belonged to. */
2966495Sspeer 
2976495Sspeer 	vp_channel_t	page;	/* VP_CHANNEL_0 - VP_CHANNEL_7 */
2986495Sspeer 	nxge_channel_t	channel; /* 1 of 16/24 channels */
2996495Sspeer 	/*
3006495Sspeer 	 * <channel> has its normal meaning. <page> refers to the
3016495Sspeer 	 * virtual page of the VR that <channel> has been bound to.
3026495Sspeer 	 * Therefore, in the service domain, <page> & <channel>
3036495Sspeer 	 * are almost always different. While in a guest domain,
3046495Sspeer 	 * they are always the same.
3056495Sspeer 	 */
3066495Sspeer 	vpc_type_t	type;	/* VP_BOUND_XX */
3076495Sspeer 	dc_init_t	init;	/* nxge_init_xxdma_channel() */
3086495Sspeer 	dc_uninit_t	uninit;	/* nxge_uninit_xxdma_channel() */
3096495Sspeer 
3107755SMisaki.Kataoka@Sun.COM 	nxge_grp_t	*group;	/* The group belonged to. */
3116495Sspeer 	uint32_t	cookie;	/* The HV cookie. */
3126495Sspeer 
3136495Sspeer 	hio_ldg_t	ldg;
3146495Sspeer 	boolean_t	interrupting; /* Interrupt enabled? */
3156495Sspeer 
3166495Sspeer } nxge_hio_dc_t;
3176495Sspeer 
3186495Sspeer typedef struct {
3196495Sspeer 	nxge_hio_type_t		type;
3206495Sspeer 
3216495Sspeer 	kmutex_t		lock;
3227755SMisaki.Kataoka@Sun.COM 	int			vrs;
3236495Sspeer 	unsigned		sequence;
3246495Sspeer 
3256495Sspeer 	nxhv_fp_t		hio;
3266495Sspeer 
3276495Sspeer 	/* vr[0] is reserved for the service domain. */
3286495Sspeer 	nxge_hio_vr_t		vr[NXGE_VR_SR_MAX]; /* subregion map */
3296495Sspeer 	nxge_hio_dc_t		rdc[NXGE_MAX_RDCS];
3306495Sspeer 	nxge_hio_dc_t		tdc[NXGE_MAX_TDCS];
3316495Sspeer 
3326495Sspeer 	nx_rdc_tbl_t		rdc_tbl[NXGE_MAX_RDC_GROUPS];
3336495Sspeer 
3346495Sspeer } nxge_hio_data_t;
3356495Sspeer 
3366495Sspeer /*
3376495Sspeer  * -------------------------------------------------------------
3386495Sspeer  * prototypes
3396495Sspeer  * -------------------------------------------------------------
3406495Sspeer  */
3416495Sspeer extern void nxge_get_environs(nxge_t *);
3426495Sspeer extern int nxge_hio_init(nxge_t *);
3436495Sspeer extern void nxge_hio_uninit(nxge_t *);
3446495Sspeer 
3456495Sspeer extern int nxge_dci_map(nxge_t *, vpc_type_t, int);
3466495Sspeer 
3476495Sspeer /*
3486495Sspeer  * ---------------------------------------------------------------------
3496495Sspeer  * These are the general-purpose DMA channel group functions.  That is,
3506495Sspeer  * these functions are used to manage groups of TDCs or RDCs in an HIO
3516495Sspeer  * environment.
3526495Sspeer  *
3536495Sspeer  * But is also expected that in the future they will be able to manage
3546495Sspeer  * Crossbow groups.
3556495Sspeer  * ---------------------------------------------------------------------
3566495Sspeer  */
3577755SMisaki.Kataoka@Sun.COM extern nxge_grp_t *nxge_grp_add(nxge_t *, nxge_grp_type_t);
3587755SMisaki.Kataoka@Sun.COM extern void nxge_grp_remove(nxge_t *, nxge_grp_t *);
3597755SMisaki.Kataoka@Sun.COM extern int nxge_grp_dc_add(nxge_t *, nxge_grp_t *, vpc_type_t, int);
3606495Sspeer extern void nxge_grp_dc_remove(nxge_t *, vpc_type_t, int);
3616495Sspeer extern nxge_hio_dc_t *nxge_grp_dc_find(nxge_t *, vpc_type_t, int);
3626495Sspeer 
3636495Sspeer extern void nxge_delay(int);
3646495Sspeer extern const char *nxge_ddi_perror(int);
3656495Sspeer 
3666495Sspeer /*
3676495Sspeer  * ---------------------------------------------------------------------
3686495Sspeer  * These are the Sun4v HIO function prototypes.
3696495Sspeer  * ---------------------------------------------------------------------
3706495Sspeer  */
3716495Sspeer extern void nxge_hio_group_get(void *arg, mac_ring_type_t type, int group,
3726495Sspeer 	mac_group_info_t *infop, mac_group_handle_t ghdl);
3738275SEric Cheng extern int nxge_hio_share_alloc(void *arg, mac_share_handle_t *shandle);
3746495Sspeer extern void nxge_hio_share_free(mac_share_handle_t shandle);
3756495Sspeer extern void nxge_hio_share_query(mac_share_handle_t shandle,
3768275SEric Cheng 	mac_ring_type_t type, mac_ring_handle_t *rings, uint_t *n_rings);
3778275SEric Cheng extern int nxge_hio_share_add_group(mac_share_handle_t,
3788275SEric Cheng     mac_group_driver_t);
3798275SEric Cheng extern int nxge_hio_share_rem_group(mac_share_handle_t,
3808275SEric Cheng     mac_group_driver_t);
3818275SEric Cheng extern int nxge_hio_share_bind(mac_share_handle_t, uint64_t cookie,
3828275SEric Cheng     uint64_t *rcookie);
3838275SEric Cheng extern void nxge_hio_share_unbind(mac_share_handle_t);
384*8400SNicolas.Droux@Sun.COM extern int nxge_hio_rxdma_bind_intr(nxge_t *, rx_rcr_ring_t *, int);
3856495Sspeer 
3866495Sspeer 				/* nxge_hio_guest.c */
3876495Sspeer extern void nxge_hio_unregister(nxge_t *);
3886495Sspeer 
3896495Sspeer extern int nxge_guest_regs_map(nxge_t *);
3906495Sspeer extern void nxge_guest_regs_map_free(nxge_t *);
3916495Sspeer 
3926495Sspeer extern int nxge_hio_vr_add(nxge_t *nxge);
3936495Sspeer extern int nxge_hio_vr_release(nxge_t *nxge);
3946495Sspeer 
3956495Sspeer extern nxge_status_t nxge_tdc_lp_conf(p_nxge_t, int);
3966495Sspeer extern nxge_status_t nxge_rdc_lp_conf(p_nxge_t, int);
3976495Sspeer 
3986495Sspeer extern void nxge_hio_start_timer(nxge_t *);
3996495Sspeer 
4006495Sspeer 				/* nxge_intr.c */
4016495Sspeer extern nxge_status_t nxge_hio_intr_init(nxge_t *);
4026495Sspeer extern void nxge_hio_intr_uninit(nxge_t *);
4036495Sspeer 
4046495Sspeer extern nxge_status_t nxge_intr_add(nxge_t *, vpc_type_t, int);
4056495Sspeer extern nxge_status_t nxge_intr_remove(nxge_t *, vpc_type_t, int);
4066495Sspeer 
4076495Sspeer extern nxge_status_t nxge_hio_intr_add(nxge_t *, vpc_type_t, int);
4086495Sspeer extern nxge_status_t nxge_hio_intr_remove(nxge_t *, vpc_type_t, int);
4096495Sspeer 
4106495Sspeer extern nxge_status_t nxge_hio_intr_add(nxge_t *, vpc_type_t, int);
4116495Sspeer extern nxge_status_t nxge_hio_intr_rem(nxge_t *, int);
4126495Sspeer 
4136495Sspeer extern hv_rv_t nxge_hio_ldsv_add(nxge_t *, nxge_hio_dc_t *);
4146495Sspeer 
4156495Sspeer extern void nxge_hio_ldsv_im(nxge_t *, nxge_ldg_t *, pio_ld_op_t, uint64_t *);
4166495Sspeer extern void nxge_hio_ldgimgn(nxge_t *, nxge_ldg_t *);
4176495Sspeer 
4186495Sspeer 				/* nxge_hv.c */
4196495Sspeer extern void nxge_hio_hv_init(nxge_t *);
4206495Sspeer 
4216495Sspeer 				/* nxge_mac.c */
4226495Sspeer extern int nxge_hio_hostinfo_get_rdc_table(p_nxge_t);
4236495Sspeer extern int nxge_hio_hostinfo_init(nxge_t *, nxge_hio_vr_t *, ether_addr_t *);
4246495Sspeer extern void nxge_hio_hostinfo_uninit(nxge_t *, nxge_hio_vr_t *);
4256495Sspeer 
4266495Sspeer #ifdef	__cplusplus
4276495Sspeer }
4286495Sspeer #endif
4296495Sspeer 
4306495Sspeer #endif	/* _SYS_NXGE_NXGE_HIO_H */
431