18275SEric Cheng /* 28275SEric Cheng * CDDL HEADER START 38275SEric Cheng * 48275SEric Cheng * The contents of this file are subject to the terms of the 58275SEric Cheng * Common Development and Distribution License (the "License"). 68275SEric Cheng * You may not use this file except in compliance with the License. 78275SEric Cheng * 88275SEric Cheng * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 98275SEric Cheng * or http://www.opensolaris.org/os/licensing. 108275SEric Cheng * See the License for the specific language governing permissions 118275SEric Cheng * and limitations under the License. 128275SEric Cheng * 138275SEric Cheng * When distributing Covered Code, include this CDDL HEADER in each 148275SEric Cheng * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 158275SEric Cheng * If applicable, add the following below this CDDL HEADER, with the 168275SEric Cheng * fields enclosed by brackets "[]" replaced with your own identifying 178275SEric Cheng * information: Portions Copyright [yyyy] [name of copyright owner] 188275SEric Cheng * 198275SEric Cheng * CDDL HEADER END 208275SEric Cheng */ 218275SEric Cheng 228275SEric Cheng /* 23*8558SGirish.Moodalbail@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 248275SEric Cheng * Use is subject to license terms. 258275SEric Cheng */ 268275SEric Cheng 278275SEric Cheng #ifndef _MAC_FLOW_H 288275SEric Cheng #define _MAC_FLOW_H 298275SEric Cheng 308275SEric Cheng /* 318275SEric Cheng * Main structure describing a flow of packets, for classification use 328275SEric Cheng */ 338275SEric Cheng 348275SEric Cheng #ifdef __cplusplus 358275SEric Cheng extern "C" { 368275SEric Cheng #endif 378275SEric Cheng 388275SEric Cheng #include <sys/types.h> 398275SEric Cheng #include <netinet/in.h> /* for IPPROTO_* constants */ 408275SEric Cheng #include <sys/ethernet.h> 418275SEric Cheng 42*8558SGirish.Moodalbail@Sun.COM /* 43*8558SGirish.Moodalbail@Sun.COM * MAXFLOWNAMELEN defines the longest possible permitted flow name, 44*8558SGirish.Moodalbail@Sun.COM * including the terminating NUL. 45*8558SGirish.Moodalbail@Sun.COM */ 46*8558SGirish.Moodalbail@Sun.COM #define MAXFLOWNAMELEN 128 478275SEric Cheng 488275SEric Cheng /* need to use MAXMACADDRLEN from dld.h instead of this one */ 498275SEric Cheng #define MAXMACADDR 20 508275SEric Cheng 518275SEric Cheng /* Bit-mask for the selectors carried in the flow descriptor */ 528275SEric Cheng typedef uint64_t flow_mask_t; 538275SEric Cheng 548275SEric Cheng #define FLOW_LINK_DST 0x00000001 /* Destination MAC addr */ 558275SEric Cheng #define FLOW_LINK_SRC 0x00000002 /* Source MAC address */ 568275SEric Cheng #define FLOW_LINK_VID 0x00000004 /* VLAN ID */ 578275SEric Cheng #define FLOW_LINK_SAP 0x00000008 /* SAP value */ 588275SEric Cheng 598275SEric Cheng #define FLOW_IP_VERSION 0x00000010 /* V4 or V6 */ 608275SEric Cheng #define FLOW_IP_PROTOCOL 0x00000020 /* Protocol type */ 618275SEric Cheng #define FLOW_IP_LOCAL 0x00000040 /* Local address */ 628275SEric Cheng #define FLOW_IP_REMOTE 0x00000080 /* Remote address */ 638275SEric Cheng #define FLOW_IP_DSFIELD 0x00000100 /* DSfield value */ 648275SEric Cheng 658275SEric Cheng #define FLOW_ULP_PORT_LOCAL 0x00001000 /* ULP local port */ 668275SEric Cheng #define FLOW_ULP_PORT_REMOTE 0x00002000 /* ULP remote port */ 678275SEric Cheng 688275SEric Cheng #if _LONG_LONG_ALIGNMENT == 8 && _LONG_LONG_ALIGNMENT_32 == 4 698275SEric Cheng #pragma pack(4) 708275SEric Cheng #endif 718275SEric Cheng 728275SEric Cheng typedef struct flow_desc_s { 738275SEric Cheng flow_mask_t fd_mask; 748275SEric Cheng uint32_t fd_mac_len; 758275SEric Cheng uint8_t fd_dst_mac[MAXMACADDR]; 768275SEric Cheng uint8_t fd_src_mac[MAXMACADDR]; 778275SEric Cheng uint16_t fd_vid; 788275SEric Cheng uint32_t fd_sap; 798275SEric Cheng uint8_t fd_ipversion; 808275SEric Cheng uint8_t fd_protocol; 818275SEric Cheng in6_addr_t fd_local_addr; 828275SEric Cheng in6_addr_t fd_local_netmask; 838275SEric Cheng in6_addr_t fd_remote_addr; 848275SEric Cheng in6_addr_t fd_remote_netmask; 858275SEric Cheng in_port_t fd_local_port; 868275SEric Cheng in_port_t fd_remote_port; 878275SEric Cheng uint8_t fd_dsfield; 888275SEric Cheng uint8_t fd_dsfield_mask; 898275SEric Cheng } flow_desc_t; 908275SEric Cheng 918275SEric Cheng #define MRP_NCPUS 128 928275SEric Cheng 938275SEric Cheng /* 948275SEric Cheng * In MCM_CPUS mode, cpu bindings is user specified. In MCM_FANOUT mode, 958275SEric Cheng * user only specifies a fanout count. 968275SEric Cheng * mc_fanout_cnt gives the number of CPUs used for fanout soft rings. 978275SEric Cheng * mc_fanout_cpus[] array stores the CPUs used for fanout soft rings. 988275SEric Cheng */ 998275SEric Cheng typedef enum { 1008275SEric Cheng MCM_FANOUT = 1, 1018275SEric Cheng MCM_CPUS 1028275SEric Cheng } mac_cpu_mode_t; 1038275SEric Cheng 1048275SEric Cheng typedef struct mac_cpus_props_s { 1058275SEric Cheng uint32_t mc_ncpus; /* num of cpus */ 1068275SEric Cheng uint32_t mc_cpus[MRP_NCPUS]; /* cpu list */ 1078275SEric Cheng uint32_t mc_fanout_cnt; /* soft ring cpu cnt */ 1088275SEric Cheng uint32_t mc_fanout_cpus[MRP_NCPUS]; /* SR cpu list */ 1098275SEric Cheng uint32_t mc_pollid; /* poll thr binding */ 1108275SEric Cheng uint32_t mc_workerid; /* worker thr binding */ 1118275SEric Cheng /* 1128275SEric Cheng * interrupt cpu: mrp_intr_cpu less than 0 implies platform limitation 1138275SEric Cheng * in retargetting the interrupt assignment. 1148275SEric Cheng */ 1158275SEric Cheng int32_t mc_intr_cpu; 1168275SEric Cheng mac_cpu_mode_t mc_fanout_mode; /* fanout mode */ 1178275SEric Cheng } mac_cpus_t; 1188275SEric Cheng 1198275SEric Cheng /* Priority values */ 1208275SEric Cheng typedef enum { 1218275SEric Cheng MPL_LOW, 1228275SEric Cheng MPL_MEDIUM, 1238275SEric Cheng MPL_HIGH, 1248275SEric Cheng MPL_RESET 1258275SEric Cheng } mac_priority_level_t; 1268275SEric Cheng 1278275SEric Cheng /* The default priority for links */ 1288275SEric Cheng #define MPL_LINK_DEFAULT MPL_HIGH 1298275SEric Cheng 1308275SEric Cheng /* The default priority for flows */ 1318275SEric Cheng #define MPL_SUBFLOW_DEFAULT MPL_MEDIUM 1328275SEric Cheng 1338275SEric Cheng #define MRP_MAXBW 0x00000001 /* Limit set */ 1348275SEric Cheng #define MRP_CPUS 0x00000002 /* CPU/fanout set */ 1358275SEric Cheng #define MRP_CPUS_USERSPEC 0x00000004 /* CPU/fanout from user */ 1368275SEric Cheng #define MRP_PRIORITY 0x00000008 /* Priority set */ 1378275SEric Cheng 1388275SEric Cheng #define MRP_THROTTLE MRP_MAXBW 1398275SEric Cheng 1408275SEric Cheng /* 3 levels - low, medium, high */ 1418275SEric Cheng #define MRP_PRIORITY_LEVELS 3 1428275SEric Cheng 1438275SEric Cheng /* Special value denoting no bandwidth control */ 1448275SEric Cheng #define MRP_MAXBW_RESETVAL -1ULL 1458275SEric Cheng 1468275SEric Cheng /* 1478275SEric Cheng * Until sub-megabit limit is implemented, 1488275SEric Cheng * reject values lower than 1 MTU per tick or 1.2Mbps 1498275SEric Cheng */ 1508275SEric Cheng #define MRP_MAXBW_MINVAL 1200000 1518275SEric Cheng 1528275SEric Cheng typedef struct mac_resource_props_s { 1538275SEric Cheng /* 1548275SEric Cheng * Bit-mask for the network resource control types types 1558275SEric Cheng */ 1568275SEric Cheng uint32_t mrp_mask; 1578275SEric Cheng uint64_t mrp_maxbw; /* bandwidth limit in bps */ 1588275SEric Cheng mac_priority_level_t mrp_priority; /* relative flow priority */ 1598275SEric Cheng mac_cpus_t mrp_cpus; 1608275SEric Cheng } mac_resource_props_t; 1618275SEric Cheng 1628275SEric Cheng #define mrp_ncpus mrp_cpus.mc_ncpus 1638275SEric Cheng #define mrp_cpu mrp_cpus.mc_cpus 1648275SEric Cheng #define mrp_fanout_cnt mrp_cpus.mc_fanout_cnt 1658275SEric Cheng #define mrp_fanout_cpu mrp_cpus.mc_fanout_cpus 1668275SEric Cheng #define mrp_pollid mrp_cpus.mc_pollid 1678275SEric Cheng #define mrp_workerid mrp_cpus.mc_workerid 1688275SEric Cheng #define mrp_intr_cpu mrp_cpus.mc_intr_cpu 1698275SEric Cheng #define mrp_fanout_mode mrp_cpus.mc_fanout_mode 1708275SEric Cheng 1718275SEric Cheng #define MAC_COPY_CPUS(mrp, fmrp) { \ 1728275SEric Cheng int ncpus; \ 1738275SEric Cheng (fmrp)->mrp_ncpus = (mrp)->mrp_ncpus; \ 1748275SEric Cheng (fmrp)->mrp_intr_cpu = (mrp)->mrp_intr_cpu; \ 1758275SEric Cheng (fmrp)->mrp_fanout_mode = (mrp)->mrp_fanout_mode; \ 1768275SEric Cheng if ((mrp)->mrp_ncpus == 0) { \ 1778275SEric Cheng (fmrp)->mrp_mask &= ~MRP_CPUS; \ 1788275SEric Cheng (fmrp)->mrp_mask &= ~MRP_CPUS_USERSPEC; \ 1798275SEric Cheng } else { \ 1808275SEric Cheng for (ncpus = 0; ncpus < (fmrp)->mrp_ncpus; ncpus++) \ 1818275SEric Cheng (fmrp)->mrp_cpu[ncpus] = (mrp)->mrp_cpu[ncpus];\ 1828275SEric Cheng (fmrp)->mrp_mask |= MRP_CPUS; \ 1838275SEric Cheng if ((mrp)->mrp_mask & MRP_CPUS_USERSPEC) \ 1848275SEric Cheng (fmrp)->mrp_mask |= MRP_CPUS_USERSPEC; \ 1858275SEric Cheng } \ 1868275SEric Cheng } 1878275SEric Cheng 1888275SEric Cheng typedef struct flow_stats_s { 1898275SEric Cheng uint64_t fs_rbytes; 1908275SEric Cheng uint64_t fs_ipackets; 1918275SEric Cheng uint64_t fs_ierrors; 1928275SEric Cheng uint64_t fs_obytes; 1938275SEric Cheng uint64_t fs_opackets; 1948275SEric Cheng uint64_t fs_oerrors; 1958275SEric Cheng } flow_stats_t; 1968275SEric Cheng 1978275SEric Cheng typedef enum { 1988275SEric Cheng FLOW_STAT_RBYTES, 1998275SEric Cheng FLOW_STAT_IPACKETS, 2008275SEric Cheng FLOW_STAT_IERRORS, 2018275SEric Cheng FLOW_STAT_OBYTES, 2028275SEric Cheng FLOW_STAT_OPACKETS, 2038275SEric Cheng FLOW_STAT_OERRORS 2048275SEric Cheng } flow_stat_t; 2058275SEric Cheng 2068275SEric Cheng #if _LONG_LONG_ALIGNMENT == 8 && _LONG_LONG_ALIGNMENT_32 == 4 2078275SEric Cheng #pragma pack() 2088275SEric Cheng #endif 2098275SEric Cheng 2108275SEric Cheng #ifdef __cplusplus 2118275SEric Cheng } 2128275SEric Cheng #endif 2138275SEric Cheng 2148275SEric Cheng #endif /* _MAC_FLOW_H */ 215