1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SYS_ISA_DEFS_H 28*0Sstevel@tonic-gate #define _SYS_ISA_DEFS_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate /* 33*0Sstevel@tonic-gate * This header file serves to group a set of well known defines and to 34*0Sstevel@tonic-gate * set these for each instruction set architecture. These defines may 35*0Sstevel@tonic-gate * be divided into two groups; characteristics of the processor and 36*0Sstevel@tonic-gate * implementation choices for Solaris on a processor. 37*0Sstevel@tonic-gate * 38*0Sstevel@tonic-gate * Processor Characteristics: 39*0Sstevel@tonic-gate * 40*0Sstevel@tonic-gate * _LITTLE_ENDIAN / _BIG_ENDIAN: 41*0Sstevel@tonic-gate * The natural byte order of the processor. A pointer to an int points 42*0Sstevel@tonic-gate * to the least/most significant byte of that int. 43*0Sstevel@tonic-gate * 44*0Sstevel@tonic-gate * _STACK_GROWS_UPWARD / _STACK_GROWS_DOWNWARD: 45*0Sstevel@tonic-gate * The processor specific direction of stack growth. A push onto the 46*0Sstevel@tonic-gate * stack increases/decreases the stack pointer, so it stores data at 47*0Sstevel@tonic-gate * successively higher/lower addresses. (Stackless machines ignored 48*0Sstevel@tonic-gate * without regrets). 49*0Sstevel@tonic-gate * 50*0Sstevel@tonic-gate * _LONG_LONG_HTOL / _LONG_LONG_LTOH: 51*0Sstevel@tonic-gate * A pointer to a long long points to the most/least significant long 52*0Sstevel@tonic-gate * within that long long. 53*0Sstevel@tonic-gate * 54*0Sstevel@tonic-gate * _BIT_FIELDS_HTOL / _BIT_FIELDS_LTOH: 55*0Sstevel@tonic-gate * The C compiler assigns bit fields from the high/low to the low/high end 56*0Sstevel@tonic-gate * of an int (most to least significant vs. least to most significant). 57*0Sstevel@tonic-gate * 58*0Sstevel@tonic-gate * _IEEE_754: 59*0Sstevel@tonic-gate * The processor (or supported implementations of the processor) 60*0Sstevel@tonic-gate * supports the ieee-754 floating point standard. No other floating 61*0Sstevel@tonic-gate * point standards are supported (or significant). Any other supported 62*0Sstevel@tonic-gate * floating point formats are expected to be cased on the ISA processor 63*0Sstevel@tonic-gate * symbol. 64*0Sstevel@tonic-gate * 65*0Sstevel@tonic-gate * _CHAR_IS_UNSIGNED / _CHAR_IS_SIGNED: 66*0Sstevel@tonic-gate * The C Compiler implements objects of type `char' as `unsigned' or 67*0Sstevel@tonic-gate * `signed' respectively. This is really an implementation choice of 68*0Sstevel@tonic-gate * the compiler writer, but it is specified in the ABI and tends to 69*0Sstevel@tonic-gate * be uniform across compilers for an instruction set architecture. 70*0Sstevel@tonic-gate * Hence, it has the properties of a processor characteristic. 71*0Sstevel@tonic-gate * 72*0Sstevel@tonic-gate * _CHAR_ALIGNMENT / _SHORT_ALIGNMENT / _INT_ALIGNMENT / _LONG_ALIGNMENT / 73*0Sstevel@tonic-gate * _LONG_LONG_ALIGNMENT / _DOUBLE_ALIGNMENT / _LONG_DOUBLE_ALIGNMENT / 74*0Sstevel@tonic-gate * _POINTER_ALIGNMENT / _FLOAT_ALIGNMENT: 75*0Sstevel@tonic-gate * The ABI defines alignment requirements of each of the primitive 76*0Sstevel@tonic-gate * object types. Some, if not all, may be hardware requirements as 77*0Sstevel@tonic-gate * well. The values are expressed in "byte-alignment" units. 78*0Sstevel@tonic-gate * 79*0Sstevel@tonic-gate * _MAX_ALIGNMENT: 80*0Sstevel@tonic-gate * The most stringent alignment requirement as specified by the ABI. 81*0Sstevel@tonic-gate * Equal to the maximum of all the above _XXX_ALIGNMENT values. 82*0Sstevel@tonic-gate * 83*0Sstevel@tonic-gate * _ALIGNMENT_REQUIRED: 84*0Sstevel@tonic-gate * True or false (1 or 0) whether or not the hardware requires the ABI 85*0Sstevel@tonic-gate * alignment. 86*0Sstevel@tonic-gate * 87*0Sstevel@tonic-gate * _LONG_LONG_ALIGNMENT_32 88*0Sstevel@tonic-gate * The 32-bit ABI supported by a 64-bit kernel may have different 89*0Sstevel@tonic-gate * alignment requirements for primitive object types. The value of this 90*0Sstevel@tonic-gate * identifier is expressed in "byte-alignment" units. 91*0Sstevel@tonic-gate * 92*0Sstevel@tonic-gate * _HAVE_CPUID_INSN 93*0Sstevel@tonic-gate * This indicates that the architecture supports the 'cpuid' 94*0Sstevel@tonic-gate * instruction as defined by Intel. (Intel allows other vendors 95*0Sstevel@tonic-gate * to extend the instruction for their own purposes.) 96*0Sstevel@tonic-gate * 97*0Sstevel@tonic-gate * 98*0Sstevel@tonic-gate * Implementation Choices: 99*0Sstevel@tonic-gate * 100*0Sstevel@tonic-gate * _ILP32 / _LP64: 101*0Sstevel@tonic-gate * This specifies the compiler data type implementation as specified in 102*0Sstevel@tonic-gate * the relevant ABI. The choice between these is strongly influenced 103*0Sstevel@tonic-gate * by the underlying hardware, but is not absolutely tied to it. 104*0Sstevel@tonic-gate * Currently only two data type models are supported: 105*0Sstevel@tonic-gate * 106*0Sstevel@tonic-gate * _ILP32: 107*0Sstevel@tonic-gate * Int/Long/Pointer are 32 bits. This is the historical UNIX 108*0Sstevel@tonic-gate * and Solaris implementation. Due to its historical standing, 109*0Sstevel@tonic-gate * this is the default case. 110*0Sstevel@tonic-gate * 111*0Sstevel@tonic-gate * _LP64: 112*0Sstevel@tonic-gate * Long/Pointer are 64 bits, Int is 32 bits. This is the chosen 113*0Sstevel@tonic-gate * implementation for 64-bit ABIs such as SPARC V9. 114*0Sstevel@tonic-gate * 115*0Sstevel@tonic-gate * _I32LPx: 116*0Sstevel@tonic-gate * A compilation environment where 'int' is 32-bit, and 117*0Sstevel@tonic-gate * longs and pointers are simply the same size. 118*0Sstevel@tonic-gate * 119*0Sstevel@tonic-gate * In all cases, Char is 8 bits and Short is 16 bits. 120*0Sstevel@tonic-gate * 121*0Sstevel@tonic-gate * _SUNOS_VTOC_8 / _SUNOS_VTOC_16 / _SVR4_VTOC_16: 122*0Sstevel@tonic-gate * This specifies the form of the disk VTOC (or label): 123*0Sstevel@tonic-gate * 124*0Sstevel@tonic-gate * _SUNOS_VTOC_8: 125*0Sstevel@tonic-gate * This is a VTOC form which is upwardly compatible with the 126*0Sstevel@tonic-gate * SunOS 4.x disk label and allows 8 partitions per disk. 127*0Sstevel@tonic-gate * 128*0Sstevel@tonic-gate * _SUNOS_VTOC_16: 129*0Sstevel@tonic-gate * In this format the incore vtoc image matches the ondisk 130*0Sstevel@tonic-gate * version. It allows 16 slices per disk, and is not 131*0Sstevel@tonic-gate * compatible with the SunOS 4.x disk label. 132*0Sstevel@tonic-gate * 133*0Sstevel@tonic-gate * Note that these are not the only two VTOC forms possible and 134*0Sstevel@tonic-gate * additional forms may be added. One possible form would be the 135*0Sstevel@tonic-gate * SVr4 VTOC form. The symbol for that is reserved now, although 136*0Sstevel@tonic-gate * it is not implemented. 137*0Sstevel@tonic-gate * 138*0Sstevel@tonic-gate * _SVR4_VTOC_16: 139*0Sstevel@tonic-gate * This VTOC form is compatible with the System V Release 4 140*0Sstevel@tonic-gate * VTOC (as implemented on the SVr4 Intel and 3b ports) with 141*0Sstevel@tonic-gate * 16 partitions per disk. 142*0Sstevel@tonic-gate * 143*0Sstevel@tonic-gate * 144*0Sstevel@tonic-gate * _DMA_USES_PHYSADDR / _DMA_USES_VIRTADDR 145*0Sstevel@tonic-gate * This describes the type of addresses used by system DMA: 146*0Sstevel@tonic-gate * 147*0Sstevel@tonic-gate * _DMA_USES_PHYSADDR: 148*0Sstevel@tonic-gate * This type of DMA, used in the x86 implementation, 149*0Sstevel@tonic-gate * requires physical addresses for DMA buffers. The 24-bit 150*0Sstevel@tonic-gate * addresses used by some legacy boards is the source of the 151*0Sstevel@tonic-gate * "low-memory" (<16MB) requirement for some devices using DMA. 152*0Sstevel@tonic-gate * 153*0Sstevel@tonic-gate * _DMA_USES_VIRTADDR: 154*0Sstevel@tonic-gate * This method of DMA allows the use of virtual addresses for 155*0Sstevel@tonic-gate * DMA transfers. 156*0Sstevel@tonic-gate * 157*0Sstevel@tonic-gate * _FIRMWARE_NEEDS_FDISK / _NO_FDISK_PRESENT 158*0Sstevel@tonic-gate * This indicates the presence/absence of an fdisk table. 159*0Sstevel@tonic-gate * 160*0Sstevel@tonic-gate * _FIRMWARE_NEEDS_FDISK 161*0Sstevel@tonic-gate * The fdisk table is required by system firmware. If present, 162*0Sstevel@tonic-gate * it allows a disk to be subdivided into multiple fdisk 163*0Sstevel@tonic-gate * partitions, each of which is equivalent to a separate, 164*0Sstevel@tonic-gate * virtual disk. This enables the co-existence of multiple 165*0Sstevel@tonic-gate * operating systems on a shared hard disk. 166*0Sstevel@tonic-gate * 167*0Sstevel@tonic-gate * _NO_FDISK_PRESENT 168*0Sstevel@tonic-gate * If the fdisk table is absent, it is assumed that the entire 169*0Sstevel@tonic-gate * media is allocated for a single operating system. 170*0Sstevel@tonic-gate * 171*0Sstevel@tonic-gate * _CONSOLE_OUTPUT_VIA_FIRMWARE / _CONSOLE_OUTPUT_VIA_SOFTWARE 172*0Sstevel@tonic-gate * This indicates whether framebuffer console output is done by 173*0Sstevel@tonic-gate * firmware or software. 174*0Sstevel@tonic-gate * 175*0Sstevel@tonic-gate * _CONSOLE_OUTPUT_VIA_FIRMWARE 176*0Sstevel@tonic-gate * Framebuffer console output is done via prom_* calls. 177*0Sstevel@tonic-gate * 178*0Sstevel@tonic-gate * _CONSOLE_OUTPUT_VIA_SOFTWARE 179*0Sstevel@tonic-gate * Framebuffer console output is done via the software 180*0Sstevel@tonic-gate * terminal emulator. 181*0Sstevel@tonic-gate * _DONT_USE_1275_GENERIC_NAMES 182*0Sstevel@tonic-gate * Controls whether or not device tree node names should 183*0Sstevel@tonic-gate * comply with the IEEE 1275 "Generic Names" Recommended 184*0Sstevel@tonic-gate * Practice. With _DONT_USE_GENERIC_NAMES, device-specific 185*0Sstevel@tonic-gate * names identifying the particular device will be used. 186*0Sstevel@tonic-gate * 187*0Sstevel@tonic-gate * __i386_COMPAT 188*0Sstevel@tonic-gate * This indicates whether the i386 ABI is supported as a *non-native* 189*0Sstevel@tonic-gate * mode for the platform. When this symbol is defined: 190*0Sstevel@tonic-gate * - 32-bit xstat-style system calls are enabled 191*0Sstevel@tonic-gate * - 32-bit xmknod-style system calls are enabled 192*0Sstevel@tonic-gate * - 32-bit system calls use i386 sizes -and- alignments 193*0Sstevel@tonic-gate * 194*0Sstevel@tonic-gate * Note that this is NOT defined for the i386 native environment! 195*0Sstevel@tonic-gate * 196*0Sstevel@tonic-gate * __x86 197*0Sstevel@tonic-gate * This is ONLY a synonym for defined(__i386) || defined(__amd64) 198*0Sstevel@tonic-gate * which is useful only insofar as these two architectures share 199*0Sstevel@tonic-gate * common attributes. Analogous to __sparc. 200*0Sstevel@tonic-gate * 201*0Sstevel@tonic-gate * _PSM_MODULES 202*0Sstevel@tonic-gate * This indicates whether or not the implementation uses PSM 203*0Sstevel@tonic-gate * modules for processor support, reading /etc/mach from inside 204*0Sstevel@tonic-gate * the kernel to extract a list. 205*0Sstevel@tonic-gate * 206*0Sstevel@tonic-gate * _RTC_CONFIG 207*0Sstevel@tonic-gate * This indicates whether or not the implementation uses /etc/rtc_config 208*0Sstevel@tonic-gate * to configure the real-time clock in the kernel. 209*0Sstevel@tonic-gate */ 210*0Sstevel@tonic-gate 211*0Sstevel@tonic-gate #ifdef __cplusplus 212*0Sstevel@tonic-gate extern "C" { 213*0Sstevel@tonic-gate #endif 214*0Sstevel@tonic-gate 215*0Sstevel@tonic-gate /* 216*0Sstevel@tonic-gate * The feature test macro __ia64 is generic for all processors implementing 217*0Sstevel@tonic-gate * the Intel ia64 instruction set. 218*0Sstevel@tonic-gate */ 219*0Sstevel@tonic-gate #if defined(__ia64) || defined(__ia64__) 220*0Sstevel@tonic-gate #if !defined(__ia64) 221*0Sstevel@tonic-gate #define __ia64 222*0Sstevel@tonic-gate #endif 223*0Sstevel@tonic-gate 224*0Sstevel@tonic-gate /* 225*0Sstevel@tonic-gate * Define the appropriate "processor characteristics" 226*0Sstevel@tonic-gate */ 227*0Sstevel@tonic-gate #define _LITTLE_ENDIAN 228*0Sstevel@tonic-gate #define _STACK_GROWS_DOWNWARD /* sort of */ 229*0Sstevel@tonic-gate #define _LONG_LONG_LTOH 230*0Sstevel@tonic-gate #define _BIT_FIELDS_LTOH 231*0Sstevel@tonic-gate #define _IEEE_754 232*0Sstevel@tonic-gate #define _CHAR_IS_SIGNED 233*0Sstevel@tonic-gate #define _CHAR_ALIGNMENT 1 234*0Sstevel@tonic-gate #define _SHORT_ALIGNMENT 2 235*0Sstevel@tonic-gate #define _INT_ALIGNMENT 4 236*0Sstevel@tonic-gate #define _FLOAT_ALIGNMENT 4 237*0Sstevel@tonic-gate #define _LONG_ALIGNMENT 8 238*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT 8 239*0Sstevel@tonic-gate #define _DOUBLE_ALIGNMENT 8 240*0Sstevel@tonic-gate #define _LONG_DOUBLE_ALIGNMENT 16 241*0Sstevel@tonic-gate #define _POINTER_ALIGNMENT 8 242*0Sstevel@tonic-gate #define _MAX_ALIGNMENT 16 243*0Sstevel@tonic-gate #define _ALIGNMENT_REQUIRED 1 244*0Sstevel@tonic-gate 245*0Sstevel@tonic-gate /* 246*0Sstevel@tonic-gate * Different alignment constraints for the i386 ABI in compatibility mode 247*0Sstevel@tonic-gate */ 248*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT_32 4 249*0Sstevel@tonic-gate 250*0Sstevel@tonic-gate /* 251*0Sstevel@tonic-gate * Define the appropriate "implementation choices". 252*0Sstevel@tonic-gate */ 253*0Sstevel@tonic-gate #if !defined(_LP64) 254*0Sstevel@tonic-gate #define _LP64 255*0Sstevel@tonic-gate #endif 256*0Sstevel@tonic-gate #if !defined(_I32LPx) && defined(_KERNEL) 257*0Sstevel@tonic-gate #define _I32LPx 258*0Sstevel@tonic-gate #endif 259*0Sstevel@tonic-gate #define _MULTI_DATAMODEL 260*0Sstevel@tonic-gate #define _SUNOS_VTOC_16 261*0Sstevel@tonic-gate #define _DMA_USES_PHYSADDR 262*0Sstevel@tonic-gate #define _FIRMWARE_NEEDS_FDISK 263*0Sstevel@tonic-gate #define _CONSOLE_OUTPUT_VIA_SOFTWARE 264*0Sstevel@tonic-gate #define __i386_COMPAT 265*0Sstevel@tonic-gate #define _PSM_MODULES 266*0Sstevel@tonic-gate #define _RTC_CONFIG 267*0Sstevel@tonic-gate #define _HAVE_CPUID_INSN 268*0Sstevel@tonic-gate 269*0Sstevel@tonic-gate /* 270*0Sstevel@tonic-gate * The following set of definitions characterize Solaris on AMD's 271*0Sstevel@tonic-gate * 64-bit systems. 272*0Sstevel@tonic-gate */ 273*0Sstevel@tonic-gate #elif defined(__x86_64) || defined(__amd64) 274*0Sstevel@tonic-gate 275*0Sstevel@tonic-gate #if !defined(__amd64) 276*0Sstevel@tonic-gate #define __amd64 /* preferred guard */ 277*0Sstevel@tonic-gate #endif 278*0Sstevel@tonic-gate 279*0Sstevel@tonic-gate #if !defined(__x86) 280*0Sstevel@tonic-gate #define __x86 281*0Sstevel@tonic-gate #endif 282*0Sstevel@tonic-gate 283*0Sstevel@tonic-gate /* 284*0Sstevel@tonic-gate * Define the appropriate "processor characteristics" 285*0Sstevel@tonic-gate */ 286*0Sstevel@tonic-gate #define _LITTLE_ENDIAN 287*0Sstevel@tonic-gate #define _STACK_GROWS_DOWNWARD 288*0Sstevel@tonic-gate #define _LONG_LONG_LTOH 289*0Sstevel@tonic-gate #define _BIT_FIELDS_LTOH 290*0Sstevel@tonic-gate #define _IEEE_754 291*0Sstevel@tonic-gate #define _CHAR_IS_SIGNED 292*0Sstevel@tonic-gate #define _BOOL_ALIGNMENT 1 293*0Sstevel@tonic-gate #define _CHAR_ALIGNMENT 1 294*0Sstevel@tonic-gate #define _SHORT_ALIGNMENT 2 295*0Sstevel@tonic-gate #define _INT_ALIGNMENT 4 296*0Sstevel@tonic-gate #define _FLOAT_ALIGNMENT 4 297*0Sstevel@tonic-gate #define _FLOAT_COMPLEX_ALIGNMENT 4 298*0Sstevel@tonic-gate #define _LONG_ALIGNMENT 8 299*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT 8 300*0Sstevel@tonic-gate #define _DOUBLE_ALIGNMENT 8 301*0Sstevel@tonic-gate #define _DOUBLE_COMPLEX_ALIGNMENT 8 302*0Sstevel@tonic-gate #define _LONG_DOUBLE_ALIGNMENT 16 303*0Sstevel@tonic-gate #define _LONG_DOUBLE_COMPLEX_ALIGNMENT 16 304*0Sstevel@tonic-gate #define _POINTER_ALIGNMENT 8 305*0Sstevel@tonic-gate #define _MAX_ALIGNMENT 16 306*0Sstevel@tonic-gate #define _ALIGNMENT_REQUIRED 1 307*0Sstevel@tonic-gate 308*0Sstevel@tonic-gate /* 309*0Sstevel@tonic-gate * Different alignment constraints for the i386 ABI in compatibility mode 310*0Sstevel@tonic-gate */ 311*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT_32 4 312*0Sstevel@tonic-gate 313*0Sstevel@tonic-gate /* 314*0Sstevel@tonic-gate * Define the appropriate "implementation choices". 315*0Sstevel@tonic-gate */ 316*0Sstevel@tonic-gate #if !defined(_LP64) 317*0Sstevel@tonic-gate #define _LP64 318*0Sstevel@tonic-gate #endif 319*0Sstevel@tonic-gate #if !defined(_I32LPx) && defined(_KERNEL) 320*0Sstevel@tonic-gate #define _I32LPx 321*0Sstevel@tonic-gate #endif 322*0Sstevel@tonic-gate #define _MULTI_DATAMODEL 323*0Sstevel@tonic-gate #define _SUNOS_VTOC_16 324*0Sstevel@tonic-gate #define _DMA_USES_PHYSADDR 325*0Sstevel@tonic-gate #define _FIRMWARE_NEEDS_FDISK 326*0Sstevel@tonic-gate #define _CONSOLE_OUTPUT_VIA_SOFTWARE 327*0Sstevel@tonic-gate #define __i386_COMPAT 328*0Sstevel@tonic-gate #define _PSM_MODULES 329*0Sstevel@tonic-gate #define _RTC_CONFIG 330*0Sstevel@tonic-gate #define _DONT_USE_1275_GENERIC_NAMES 331*0Sstevel@tonic-gate #define _HAVE_CPUID_INSN 332*0Sstevel@tonic-gate 333*0Sstevel@tonic-gate /* 334*0Sstevel@tonic-gate * The feature test macro __i386 is generic for all processors implementing 335*0Sstevel@tonic-gate * the Intel 386 instruction set or a superset of it. Specifically, this 336*0Sstevel@tonic-gate * includes all members of the 386, 486, and Pentium family of processors. 337*0Sstevel@tonic-gate */ 338*0Sstevel@tonic-gate #elif defined(__i386) || defined(__i386__) 339*0Sstevel@tonic-gate 340*0Sstevel@tonic-gate #if !defined(__i386) 341*0Sstevel@tonic-gate #define __i386 342*0Sstevel@tonic-gate #endif 343*0Sstevel@tonic-gate 344*0Sstevel@tonic-gate #if !defined(__x86) 345*0Sstevel@tonic-gate #define __x86 346*0Sstevel@tonic-gate #endif 347*0Sstevel@tonic-gate 348*0Sstevel@tonic-gate /* 349*0Sstevel@tonic-gate * Define the appropriate "processor characteristics" 350*0Sstevel@tonic-gate */ 351*0Sstevel@tonic-gate #define _LITTLE_ENDIAN 352*0Sstevel@tonic-gate #define _STACK_GROWS_DOWNWARD 353*0Sstevel@tonic-gate #define _LONG_LONG_LTOH 354*0Sstevel@tonic-gate #define _BIT_FIELDS_LTOH 355*0Sstevel@tonic-gate #define _IEEE_754 356*0Sstevel@tonic-gate #define _CHAR_IS_SIGNED 357*0Sstevel@tonic-gate #define _BOOL_ALIGNMENT 1 358*0Sstevel@tonic-gate #define _CHAR_ALIGNMENT 1 359*0Sstevel@tonic-gate #define _SHORT_ALIGNMENT 2 360*0Sstevel@tonic-gate #define _INT_ALIGNMENT 4 361*0Sstevel@tonic-gate #define _FLOAT_ALIGNMENT 4 362*0Sstevel@tonic-gate #define _FLOAT_COMPLEX_ALIGNMENT 4 363*0Sstevel@tonic-gate #define _LONG_ALIGNMENT 4 364*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT 4 365*0Sstevel@tonic-gate #define _DOUBLE_ALIGNMENT 4 366*0Sstevel@tonic-gate #define _DOUBLE_COMPLEX_ALIGNMENT 4 367*0Sstevel@tonic-gate #define _LONG_DOUBLE_ALIGNMENT 4 368*0Sstevel@tonic-gate #define _LONG_DOUBLE_COMPLEX_ALIGNMENT 4 369*0Sstevel@tonic-gate #define _POINTER_ALIGNMENT 4 370*0Sstevel@tonic-gate #define _MAX_ALIGNMENT 4 371*0Sstevel@tonic-gate #define _ALIGNMENT_REQUIRED 0 372*0Sstevel@tonic-gate 373*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT_32 _LONG_LONG_ALIGNMENT 374*0Sstevel@tonic-gate 375*0Sstevel@tonic-gate /* 376*0Sstevel@tonic-gate * Define the appropriate "implementation choices". 377*0Sstevel@tonic-gate */ 378*0Sstevel@tonic-gate #define _ILP32 379*0Sstevel@tonic-gate #if !defined(_I32LPx) && defined(_KERNEL) 380*0Sstevel@tonic-gate #define _I32LPx 381*0Sstevel@tonic-gate #endif 382*0Sstevel@tonic-gate #define _SUNOS_VTOC_16 383*0Sstevel@tonic-gate #define _DMA_USES_PHYSADDR 384*0Sstevel@tonic-gate #define _FIRMWARE_NEEDS_FDISK 385*0Sstevel@tonic-gate #define _CONSOLE_OUTPUT_VIA_SOFTWARE 386*0Sstevel@tonic-gate #define _PSM_MODULES 387*0Sstevel@tonic-gate #define _RTC_CONFIG 388*0Sstevel@tonic-gate #define _DONT_USE_1275_GENERIC_NAMES 389*0Sstevel@tonic-gate #define _HAVE_CPUID_INSN 390*0Sstevel@tonic-gate 391*0Sstevel@tonic-gate /* 392*0Sstevel@tonic-gate * The following set of definitions characterize the Solaris on SPARC systems. 393*0Sstevel@tonic-gate * 394*0Sstevel@tonic-gate * The symbol __sparc indicates any of the SPARC family of processor 395*0Sstevel@tonic-gate * architectures. This includes SPARC V7, SPARC V8 and SPARC V9. 396*0Sstevel@tonic-gate * 397*0Sstevel@tonic-gate * The symbol __sparcv8 indicates the 32-bit SPARC V8 architecture as defined 398*0Sstevel@tonic-gate * by Version 8 of the SPARC Architecture Manual. (SPARC V7 is close enough 399*0Sstevel@tonic-gate * to SPARC V8 for the former to be subsumed into the latter definition.) 400*0Sstevel@tonic-gate * 401*0Sstevel@tonic-gate * The symbol __sparcv9 indicates the 64-bit SPARC V9 architecture as defined 402*0Sstevel@tonic-gate * by Version 9 of the SPARC Architecture Manual. 403*0Sstevel@tonic-gate * 404*0Sstevel@tonic-gate * The symbols __sparcv8 and __sparcv9 are mutually exclusive, and are only 405*0Sstevel@tonic-gate * relevant when the symbol __sparc is defined. 406*0Sstevel@tonic-gate */ 407*0Sstevel@tonic-gate /* 408*0Sstevel@tonic-gate * XXX Due to the existence of 5110166, "defined(__sparcv9)" needs to be added 409*0Sstevel@tonic-gate * to support backwards builds. This workaround should be removed in s10_71. 410*0Sstevel@tonic-gate */ 411*0Sstevel@tonic-gate #elif defined(__sparc) || defined(__sparcv9) || defined(__sparc__) 412*0Sstevel@tonic-gate #if !defined(__sparc) 413*0Sstevel@tonic-gate #define __sparc 414*0Sstevel@tonic-gate #endif 415*0Sstevel@tonic-gate 416*0Sstevel@tonic-gate /* 417*0Sstevel@tonic-gate * You can be 32-bit or 64-bit, but not both at the same time. 418*0Sstevel@tonic-gate */ 419*0Sstevel@tonic-gate #if defined(__sparcv8) && defined(__sparcv9) 420*0Sstevel@tonic-gate #error "SPARC Versions 8 and 9 are mutually exclusive choices" 421*0Sstevel@tonic-gate #endif 422*0Sstevel@tonic-gate 423*0Sstevel@tonic-gate /* 424*0Sstevel@tonic-gate * Existing compilers do not set __sparcv8. Years will transpire before 425*0Sstevel@tonic-gate * the compilers can be depended on to set the feature test macro. In 426*0Sstevel@tonic-gate * the interim, we'll set it here on the basis of historical behaviour; 427*0Sstevel@tonic-gate * if you haven't asked for SPARC V9, then you must've meant SPARC V8. 428*0Sstevel@tonic-gate */ 429*0Sstevel@tonic-gate #if !defined(__sparcv9) && !defined(__sparcv8) 430*0Sstevel@tonic-gate #define __sparcv8 431*0Sstevel@tonic-gate #endif 432*0Sstevel@tonic-gate 433*0Sstevel@tonic-gate /* 434*0Sstevel@tonic-gate * Define the appropriate "processor characteristics" shared between 435*0Sstevel@tonic-gate * all Solaris on SPARC systems. 436*0Sstevel@tonic-gate */ 437*0Sstevel@tonic-gate #define _BIG_ENDIAN 438*0Sstevel@tonic-gate #define _STACK_GROWS_DOWNWARD 439*0Sstevel@tonic-gate #define _LONG_LONG_HTOL 440*0Sstevel@tonic-gate #define _BIT_FIELDS_HTOL 441*0Sstevel@tonic-gate #define _IEEE_754 442*0Sstevel@tonic-gate #define _CHAR_IS_SIGNED 443*0Sstevel@tonic-gate #define _BOOL_ALIGNMENT 1 444*0Sstevel@tonic-gate #define _CHAR_ALIGNMENT 1 445*0Sstevel@tonic-gate #define _SHORT_ALIGNMENT 2 446*0Sstevel@tonic-gate #define _INT_ALIGNMENT 4 447*0Sstevel@tonic-gate #define _FLOAT_ALIGNMENT 4 448*0Sstevel@tonic-gate #define _FLOAT_COMPLEX_ALIGNMENT 4 449*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT 8 450*0Sstevel@tonic-gate #define _DOUBLE_ALIGNMENT 8 451*0Sstevel@tonic-gate #define _DOUBLE_COMPLEX_ALIGNMENT 8 452*0Sstevel@tonic-gate #define _ALIGNMENT_REQUIRED 1 453*0Sstevel@tonic-gate 454*0Sstevel@tonic-gate /* 455*0Sstevel@tonic-gate * Define the appropriate "implementation choices" shared between versions. 456*0Sstevel@tonic-gate */ 457*0Sstevel@tonic-gate #define _SUNOS_VTOC_8 458*0Sstevel@tonic-gate #define _DMA_USES_VIRTADDR 459*0Sstevel@tonic-gate #define _NO_FDISK_PRESENT 460*0Sstevel@tonic-gate #define _CONSOLE_OUTPUT_VIA_FIRMWARE 461*0Sstevel@tonic-gate 462*0Sstevel@tonic-gate /* 463*0Sstevel@tonic-gate * The following set of definitions characterize the implementation of 464*0Sstevel@tonic-gate * 32-bit Solaris on SPARC V8 systems. 465*0Sstevel@tonic-gate */ 466*0Sstevel@tonic-gate #if defined(__sparcv8) 467*0Sstevel@tonic-gate 468*0Sstevel@tonic-gate /* 469*0Sstevel@tonic-gate * Define the appropriate "processor characteristics" 470*0Sstevel@tonic-gate */ 471*0Sstevel@tonic-gate #define _LONG_ALIGNMENT 4 472*0Sstevel@tonic-gate #define _LONG_DOUBLE_ALIGNMENT 8 473*0Sstevel@tonic-gate #define _LONG_DOUBLE_COMPLEX_ALIGNMENT 8 474*0Sstevel@tonic-gate #define _POINTER_ALIGNMENT 4 475*0Sstevel@tonic-gate #define _MAX_ALIGNMENT 8 476*0Sstevel@tonic-gate 477*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT_32 _LONG_LONG_ALIGNMENT 478*0Sstevel@tonic-gate 479*0Sstevel@tonic-gate /* 480*0Sstevel@tonic-gate * Define the appropriate "implementation choices" 481*0Sstevel@tonic-gate */ 482*0Sstevel@tonic-gate #define _ILP32 483*0Sstevel@tonic-gate #if !defined(_I32LPx) && defined(_KERNEL) 484*0Sstevel@tonic-gate #define _I32LPx 485*0Sstevel@tonic-gate #endif 486*0Sstevel@tonic-gate 487*0Sstevel@tonic-gate /* 488*0Sstevel@tonic-gate * The following set of definitions characterize the implementation of 489*0Sstevel@tonic-gate * 64-bit Solaris on SPARC V9 systems. 490*0Sstevel@tonic-gate */ 491*0Sstevel@tonic-gate #elif defined(__sparcv9) 492*0Sstevel@tonic-gate 493*0Sstevel@tonic-gate /* 494*0Sstevel@tonic-gate * Define the appropriate "processor characteristics" 495*0Sstevel@tonic-gate */ 496*0Sstevel@tonic-gate #define _LONG_ALIGNMENT 8 497*0Sstevel@tonic-gate #define _LONG_DOUBLE_ALIGNMENT 16 498*0Sstevel@tonic-gate #define _LONG_DOUBLE_COMPLEX_ALIGNMENT 16 499*0Sstevel@tonic-gate #define _POINTER_ALIGNMENT 8 500*0Sstevel@tonic-gate #define _MAX_ALIGNMENT 16 501*0Sstevel@tonic-gate 502*0Sstevel@tonic-gate #define _LONG_LONG_ALIGNMENT_32 _LONG_LONG_ALIGMENT 503*0Sstevel@tonic-gate 504*0Sstevel@tonic-gate /* 505*0Sstevel@tonic-gate * Define the appropriate "implementation choices" 506*0Sstevel@tonic-gate */ 507*0Sstevel@tonic-gate #if !defined(_LP64) 508*0Sstevel@tonic-gate #define _LP64 509*0Sstevel@tonic-gate #endif 510*0Sstevel@tonic-gate #if !defined(_I32LPx) 511*0Sstevel@tonic-gate #define _I32LPx 512*0Sstevel@tonic-gate #endif 513*0Sstevel@tonic-gate #define _MULTI_DATAMODEL 514*0Sstevel@tonic-gate 515*0Sstevel@tonic-gate #else 516*0Sstevel@tonic-gate #error "unknown SPARC version" 517*0Sstevel@tonic-gate #endif 518*0Sstevel@tonic-gate 519*0Sstevel@tonic-gate /* 520*0Sstevel@tonic-gate * #error is strictly ansi-C, but works as well as anything for K&R systems. 521*0Sstevel@tonic-gate */ 522*0Sstevel@tonic-gate #else 523*0Sstevel@tonic-gate #error "ISA not supported" 524*0Sstevel@tonic-gate #endif 525*0Sstevel@tonic-gate 526*0Sstevel@tonic-gate #if defined(_ILP32) && defined(_LP64) 527*0Sstevel@tonic-gate #error "Both _ILP32 and _LP64 are defined" 528*0Sstevel@tonic-gate #endif 529*0Sstevel@tonic-gate 530*0Sstevel@tonic-gate #ifdef __cplusplus 531*0Sstevel@tonic-gate } 532*0Sstevel@tonic-gate #endif 533*0Sstevel@tonic-gate 534*0Sstevel@tonic-gate #endif /* _SYS_ISA_DEFS_H */ 535