xref: /onnv-gate/usr/src/uts/common/sys/fm/io/pci.h (revision 6313:3f914b76f189)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
51865Sdilpreet  * Common Development and Distribution License (the "License").
61865Sdilpreet  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
210Sstevel@tonic-gate /*
22*6313Skrishnae  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
230Sstevel@tonic-gate  * Use is subject to license terms.
240Sstevel@tonic-gate  */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate #ifndef _SYS_FM_IO_PCI_H
270Sstevel@tonic-gate #define	_SYS_FM_IO_PCI_H
280Sstevel@tonic-gate 
290Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
300Sstevel@tonic-gate 
310Sstevel@tonic-gate #ifdef	__cplusplus
320Sstevel@tonic-gate extern "C" {
330Sstevel@tonic-gate #endif
340Sstevel@tonic-gate 
350Sstevel@tonic-gate #define	PCI_ERROR_SUBCLASS	"pci"
360Sstevel@tonic-gate #define	PCI_SEC_ERROR_SUBCLASS	"sec"
370Sstevel@tonic-gate 
380Sstevel@tonic-gate /* Common PCI ereport classes */
390Sstevel@tonic-gate #define	PCI_DET_PERR		"dpe"
400Sstevel@tonic-gate #define	PCI_MDPE		"mdpe"
410Sstevel@tonic-gate #define	PCI_REC_SERR		"rserr"
420Sstevel@tonic-gate #define	PCI_SIG_SERR		"sserr"
430Sstevel@tonic-gate #define	PCI_MA			"ma"
440Sstevel@tonic-gate #define	PCI_REC_TA		"rta"
450Sstevel@tonic-gate #define	PCI_SIG_TA		"sta"
460Sstevel@tonic-gate #define	PCI_DTO			"dto"
470Sstevel@tonic-gate #define	PCI_TARG_MDPE		"target-mdpe"
480Sstevel@tonic-gate #define	PCI_TARG_MA		"target-ma"
490Sstevel@tonic-gate #define	PCI_TARG_REC_TA		"target-rta"
500Sstevel@tonic-gate #define	PCI_NR			"nr"
510Sstevel@tonic-gate 
520Sstevel@tonic-gate /* PCI Error payload name fields */
530Sstevel@tonic-gate #define	PCI_CONFIG_STATUS	"pci-status"
540Sstevel@tonic-gate #define	PCI_CONFIG_COMMAND	"pci-command"
550Sstevel@tonic-gate #define	PCI_SEC_CONFIG_STATUS	"pci-sec-status"
560Sstevel@tonic-gate #define	PCI_BCNTRL		"pci-bdg-ctrl"
570Sstevel@tonic-gate #define	PCI_PA			"pci-pa"
580Sstevel@tonic-gate 
591865Sdilpreet /*
601865Sdilpreet  * PCI-X extensions
611865Sdilpreet  */
621865Sdilpreet #define	PCIX_ERROR_SUBCLASS	"pcix"
631865Sdilpreet #define	PCIX_SEC_ERROR_SUBCLASS "sec-"
641865Sdilpreet 
651865Sdilpreet /* Common PCI-X ereport classes */
661865Sdilpreet #define	PCIX_ECC_CE_ADDR	"ecc.ce-addr"
671865Sdilpreet #define	PCIX_ECC_CE_ATTR	"ecc.ce-attr"
681865Sdilpreet #define	PCIX_ECC_CE_DATA	"ecc.ce-data"
691865Sdilpreet #define	PCIX_ECC_UE_ADDR	"ecc.ue-addr"
701865Sdilpreet #define	PCIX_ECC_UE_ATTR	"ecc.ue-attr"
711865Sdilpreet #define	PCIX_ECC_UE_DATA	"ecc.ue-data"
721865Sdilpreet #define	PCIX_RX_SPL_MSG		"rx-spl"
731865Sdilpreet #define	PCIX_ECC_S_CE		"s-ce"
741865Sdilpreet #define	PCIX_ECC_S_UE		"s-ue"
751865Sdilpreet #define	PCIX_SPL_DIS		"spl-dis"
761865Sdilpreet #define	PCIX_BSS_SPL_DLY	"spl-dly"
771865Sdilpreet #define	PCIX_BSS_SPL_OR		"spl-or"
781865Sdilpreet #define	PCIX_UNEX_SPL		"unex-spl"
791865Sdilpreet 
801865Sdilpreet #define	PCIX_SEC_STATUS		"pcix-sec-status"
811865Sdilpreet #define	PCIX_BDG_STAT		"pcix-bdg-stat"
821865Sdilpreet #define	PCIX_COMMAND		"pcix-command"
831865Sdilpreet #define	PCIX_STATUS		"pcix-status"
841865Sdilpreet #define	PCIX_ECC_CTLSTAT	"pcix-ecc-ctlstat"
851865Sdilpreet #define	PCIX_ECC_ATTR		"pcix-ecc-attr"
861865Sdilpreet 
871865Sdilpreet /*
881865Sdilpreet  * PCI Express extensions
891865Sdilpreet  */
901865Sdilpreet #define	PCIEX_ERROR_SUBCLASS		"pciex"
911865Sdilpreet 
921865Sdilpreet /* Common PCI Express ereport classes */
931865Sdilpreet #define	PCIEX_RE		"pl.re"
941865Sdilpreet #define	PCIEX_TE		"pl.te"
951865Sdilpreet 
961865Sdilpreet #define	PCIEX_SD		"dl.sd"
971865Sdilpreet #define	PCIEX_BDP		"dl.bdllp"
981865Sdilpreet #define	PCIEX_BTP		"dl.btlp"
991865Sdilpreet #define	PCIEX_DLP		"dl.dllp"
1001865Sdilpreet #define	PCIEX_RNR		"dl.rnr"
1011865Sdilpreet #define	PCIEX_RTO		"dl.rto"
1021865Sdilpreet 
1031865Sdilpreet #define	PCIEX_CA		"tl.ca"
1041865Sdilpreet #define	PCIEX_CTO		"tl.cto"
1051865Sdilpreet #define	PCIEX_ECRC		"tl.ecrc"
1061865Sdilpreet #define	PCIEX_FCP		"tl.fcp"
1071865Sdilpreet #define	PCIEX_MFP		"tl.mtlp"
1081865Sdilpreet #define	PCIEX_POIS		"tl.ptlp"
1091865Sdilpreet #define	PCIEX_ROF		"tl.rof"
1101865Sdilpreet #define	PCIEX_UC		"tl.uc"
1111865Sdilpreet #define	PCIEX_UR		"tl.ur"
1121865Sdilpreet 
1131865Sdilpreet #define	PCIEX_INTERR		"bdg.sec-interr"
1141865Sdilpreet #define	PCIEX_S_MA_SC		"bdg.sec-ma-sc"
1151865Sdilpreet #define	PCIEX_S_PERR		"bdg.sec-perr"
1161865Sdilpreet #define	PCIEX_S_RMA		"bdg.sec-rma"
1171865Sdilpreet #define	PCIEX_S_RTA		"bdg.sec-rta"
1181865Sdilpreet #define	PCIEX_S_SERR		"bdg.sec-serr"
1191865Sdilpreet #define	PCIEX_S_TA_SC		"bdg.sec-ta-sc"
1201865Sdilpreet #define	PCIEX_S_TEX		"bdg.sec-tex"
1211865Sdilpreet #define	PCIEX_S_UADR		"bdg.sec-uadr"
1221865Sdilpreet #define	PCIEX_S_UAT		"bdg.sec-uat"
1231865Sdilpreet #define	PCIEX_S_UDE		"bdg.sec-ude"
1241865Sdilpreet #define	PCIEX_S_USC		"bdg.usc"
1251865Sdilpreet #define	PCIEX_S_USCMD		"bdg.uscmd"
1261865Sdilpreet 
1271865Sdilpreet #define	PCIEX_RC_FE_MSG		"rc.fe-msg"
1281865Sdilpreet #define	PCIEX_RC_NFE_MSG	"rc.nfe-msg"
1291865Sdilpreet #define	PCIEX_RC_CE_MSG		"rc.ce-msg"
1301865Sdilpreet #define	PCIEX_RC_MCE_MSG	"rc.mce-msg"
1311865Sdilpreet #define	PCIEX_RC_MUE_MSG	"rc.mue-msg"
1321865Sdilpreet 
1331865Sdilpreet #define	PCIEX_CORR		"correctable"
1341865Sdilpreet #define	PCIEX_FAT		"fatal"
1351865Sdilpreet #define	PCIEX_NONFAT		"nonfatal"
1361865Sdilpreet #define	PCIEX_NADV		"noadverr"
1371865Sdilpreet #define	PCIEX_ANFE		"a-nonfatal"
1381865Sdilpreet 
1391865Sdilpreet /* PCI Express payload name fields */
1401865Sdilpreet #define	PCIEX_DEVSTS_REG	"dev-status"
1411865Sdilpreet #define	PCIEX_LINKSTS_REG	"link-status"
1421865Sdilpreet #define	PCIEX_ROOT_ERRSTS_REG	"rc-status"
1431865Sdilpreet #define	PCIEX_CE_STATUS_REG	"ce-status"
1441865Sdilpreet #define	PCIEX_UE_STATUS_REG	"ue-status"
1451865Sdilpreet #define	PCIEX_UE_SEV_REG	"ue-severity"
1461865Sdilpreet #define	PCIEX_SEC_UE_STATUS	"sue-status"
1471865Sdilpreet #define	PCIEX_SRC_ID		"source-id"
1481865Sdilpreet #define	PCIEX_SRC_VALID		"source-valid"
1491865Sdilpreet #define	PCIEX_ADV_CTL		"adv-ctl"
1501865Sdilpreet #define	PCIEX_UE_HDR0		"ue_hdr0"
1511865Sdilpreet #define	PCIEX_UE_HDR1		"ue_hdr1"
1521865Sdilpreet #define	PCIEX_UE_HDR2		"ue_hdr2"
1531865Sdilpreet #define	PCIEX_UE_HDR3		"ue_hdr3"
1541865Sdilpreet #define	PCIEX_SUE_HDR0		"sue_hdr0"
1551865Sdilpreet #define	PCIEX_SUE_HDR1		"sue_hdr1"
1561865Sdilpreet #define	PCIEX_SUE_HDR2		"sue_hdr2"
1571865Sdilpreet #define	PCIEX_SUE_HDR3		"sue_hdr3"
1581865Sdilpreet 
159*6313Skrishnae /* Common fabric class names */
160*6313Skrishnae #define	PCIEX_FABRIC		"fabric"
161*6313Skrishnae 
1620Sstevel@tonic-gate #ifdef	__cplusplus
1630Sstevel@tonic-gate }
1640Sstevel@tonic-gate #endif
1650Sstevel@tonic-gate 
1660Sstevel@tonic-gate #endif	/* _SYS_FM_IO_PCI_H */
167