10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5713Swesolows * Common Development and Distribution License (the "License"). 6713Swesolows * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 21713Swesolows 220Sstevel@tonic-gate /* 23*8803SJonathan.Haslam@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #ifndef _SYS_CPUVAR_H 280Sstevel@tonic-gate #define _SYS_CPUVAR_H 290Sstevel@tonic-gate 300Sstevel@tonic-gate #include <sys/thread.h> 310Sstevel@tonic-gate #include <sys/sysinfo.h> /* has cpu_stat_t definition */ 320Sstevel@tonic-gate #include <sys/disp.h> 330Sstevel@tonic-gate #include <sys/processor.h> 340Sstevel@tonic-gate 350Sstevel@tonic-gate #if (defined(_KERNEL) || defined(_KMEMUSER)) && defined(_MACHDEP) 360Sstevel@tonic-gate #include <sys/machcpuvar.h> 370Sstevel@tonic-gate #endif 380Sstevel@tonic-gate 390Sstevel@tonic-gate #include <sys/types.h> 400Sstevel@tonic-gate #include <sys/file.h> 410Sstevel@tonic-gate #include <sys/bitmap.h> 420Sstevel@tonic-gate #include <sys/rwlock.h> 430Sstevel@tonic-gate #include <sys/msacct.h> 44713Swesolows #if defined(__GNUC__) && defined(_ASM_INLINES) && defined(_KERNEL) && \ 45713Swesolows (defined(__i386) || defined(__amd64)) 460Sstevel@tonic-gate #include <asm/cpuvar.h> 470Sstevel@tonic-gate #endif 480Sstevel@tonic-gate 490Sstevel@tonic-gate #ifdef __cplusplus 500Sstevel@tonic-gate extern "C" { 510Sstevel@tonic-gate #endif 520Sstevel@tonic-gate 530Sstevel@tonic-gate struct squeue_set_s; 540Sstevel@tonic-gate 550Sstevel@tonic-gate #define CPU_CACHE_COHERENCE_SIZE 64 560Sstevel@tonic-gate #define S_LOADAVG_SZ 11 570Sstevel@tonic-gate #define S_MOVAVG_SZ 10 580Sstevel@tonic-gate 590Sstevel@tonic-gate struct loadavg_s { 600Sstevel@tonic-gate int lg_cur; /* current loadavg entry */ 610Sstevel@tonic-gate unsigned int lg_len; /* number entries recorded */ 620Sstevel@tonic-gate hrtime_t lg_total; /* used to temporarily hold load totals */ 630Sstevel@tonic-gate hrtime_t lg_loads[S_LOADAVG_SZ]; /* table of recorded entries */ 640Sstevel@tonic-gate }; 650Sstevel@tonic-gate 660Sstevel@tonic-gate /* 670Sstevel@tonic-gate * For fast event tracing. 680Sstevel@tonic-gate */ 690Sstevel@tonic-gate struct ftrace_record; 700Sstevel@tonic-gate typedef struct ftrace_data { 710Sstevel@tonic-gate int ftd_state; /* ftrace flags */ 723647Sbs21162 kmutex_t ftd_unused; /* ftrace buffer lock, unused */ 730Sstevel@tonic-gate struct ftrace_record *ftd_cur; /* current record */ 740Sstevel@tonic-gate struct ftrace_record *ftd_first; /* first record */ 750Sstevel@tonic-gate struct ftrace_record *ftd_last; /* last record */ 760Sstevel@tonic-gate } ftrace_data_t; 770Sstevel@tonic-gate 780Sstevel@tonic-gate struct cyc_cpu; 790Sstevel@tonic-gate struct nvlist; 800Sstevel@tonic-gate 810Sstevel@tonic-gate /* 820Sstevel@tonic-gate * Per-CPU data. 832722Sjohnlev * 842722Sjohnlev * Be careful adding new members: if they are not the same in all modules (e.g. 852722Sjohnlev * change size depending on a #define), CTF uniquification can fail to work 862722Sjohnlev * properly. Furthermore, this is transitive in that it applies recursively to 872722Sjohnlev * all types pointed to by cpu_t. 880Sstevel@tonic-gate */ 890Sstevel@tonic-gate typedef struct cpu { 900Sstevel@tonic-gate processorid_t cpu_id; /* CPU number */ 910Sstevel@tonic-gate processorid_t cpu_seqid; /* sequential CPU id (0..ncpus-1) */ 920Sstevel@tonic-gate volatile cpu_flag_t cpu_flags; /* flags indicating CPU state */ 930Sstevel@tonic-gate struct cpu *cpu_self; /* pointer to itself */ 940Sstevel@tonic-gate kthread_t *cpu_thread; /* current thread */ 950Sstevel@tonic-gate kthread_t *cpu_idle_thread; /* idle thread for this CPU */ 960Sstevel@tonic-gate kthread_t *cpu_pause_thread; /* pause thread for this CPU */ 970Sstevel@tonic-gate klwp_id_t cpu_lwp; /* current lwp (if any) */ 980Sstevel@tonic-gate klwp_id_t cpu_fpowner; /* currently loaded fpu owner */ 990Sstevel@tonic-gate struct cpupart *cpu_part; /* partition with this CPU */ 1000Sstevel@tonic-gate struct lgrp_ld *cpu_lpl; /* pointer to this cpu's load */ 1010Sstevel@tonic-gate int cpu_cache_offset; /* see kmem.c for details */ 1020Sstevel@tonic-gate 1030Sstevel@tonic-gate /* 1040Sstevel@tonic-gate * Links to other CPUs. It is safe to walk these lists if 1050Sstevel@tonic-gate * one of the following is true: 1060Sstevel@tonic-gate * - cpu_lock held 1070Sstevel@tonic-gate * - preemption disabled via kpreempt_disable 1080Sstevel@tonic-gate * - PIL >= DISP_LEVEL 1090Sstevel@tonic-gate * - acting thread is an interrupt thread 1100Sstevel@tonic-gate * - all other CPUs are paused 1110Sstevel@tonic-gate */ 1120Sstevel@tonic-gate struct cpu *cpu_next; /* next existing CPU */ 1130Sstevel@tonic-gate struct cpu *cpu_prev; /* prev existing CPU */ 1140Sstevel@tonic-gate struct cpu *cpu_next_onln; /* next online (enabled) CPU */ 1150Sstevel@tonic-gate struct cpu *cpu_prev_onln; /* prev online (enabled) CPU */ 1160Sstevel@tonic-gate struct cpu *cpu_next_part; /* next CPU in partition */ 1170Sstevel@tonic-gate struct cpu *cpu_prev_part; /* prev CPU in partition */ 1180Sstevel@tonic-gate struct cpu *cpu_next_lgrp; /* next CPU in latency group */ 1190Sstevel@tonic-gate struct cpu *cpu_prev_lgrp; /* prev CPU in latency group */ 1200Sstevel@tonic-gate struct cpu *cpu_next_lpl; /* next CPU in lgrp partition */ 1210Sstevel@tonic-gate struct cpu *cpu_prev_lpl; 1223434Sesaxe 1233434Sesaxe struct cpu_pg *cpu_pg; /* cpu's processor groups */ 1243434Sesaxe 1250Sstevel@tonic-gate void *cpu_reserved[4]; /* reserved for future use */ 1260Sstevel@tonic-gate 1270Sstevel@tonic-gate /* 1280Sstevel@tonic-gate * Scheduling variables. 1290Sstevel@tonic-gate */ 1300Sstevel@tonic-gate disp_t *cpu_disp; /* dispatch queue data */ 1310Sstevel@tonic-gate /* 1320Sstevel@tonic-gate * Note that cpu_disp is set before the CPU is added to the system 1330Sstevel@tonic-gate * and is never modified. Hence, no additional locking is needed 1340Sstevel@tonic-gate * beyond what's necessary to access the cpu_t structure. 1350Sstevel@tonic-gate */ 1360Sstevel@tonic-gate char cpu_runrun; /* scheduling flag - set to preempt */ 1370Sstevel@tonic-gate char cpu_kprunrun; /* force kernel preemption */ 1380Sstevel@tonic-gate pri_t cpu_chosen_level; /* priority at which cpu */ 1390Sstevel@tonic-gate /* was chosen for scheduling */ 1400Sstevel@tonic-gate kthread_t *cpu_dispthread; /* thread selected for dispatch */ 1410Sstevel@tonic-gate disp_lock_t cpu_thread_lock; /* dispatcher lock on current thread */ 1420Sstevel@tonic-gate uint8_t cpu_disp_flags; /* flags used by dispatcher */ 1430Sstevel@tonic-gate /* 1440Sstevel@tonic-gate * The following field is updated when ever the cpu_dispthread 1450Sstevel@tonic-gate * changes. Also in places, where the current thread(cpu_dispthread) 1460Sstevel@tonic-gate * priority changes. This is used in disp_lowpri_cpu() 1470Sstevel@tonic-gate */ 1480Sstevel@tonic-gate pri_t cpu_dispatch_pri; /* priority of cpu_dispthread */ 1490Sstevel@tonic-gate clock_t cpu_last_swtch; /* last time switched to new thread */ 1500Sstevel@tonic-gate 1510Sstevel@tonic-gate /* 1520Sstevel@tonic-gate * Interrupt data. 1530Sstevel@tonic-gate */ 1540Sstevel@tonic-gate caddr_t cpu_intr_stack; /* interrupt stack */ 1550Sstevel@tonic-gate kthread_t *cpu_intr_thread; /* interrupt thread list */ 1560Sstevel@tonic-gate uint_t cpu_intr_actv; /* interrupt levels active (bitmask) */ 1570Sstevel@tonic-gate int cpu_base_spl; /* priority for highest rupt active */ 1580Sstevel@tonic-gate 1590Sstevel@tonic-gate /* 1600Sstevel@tonic-gate * Statistics. 1610Sstevel@tonic-gate */ 1620Sstevel@tonic-gate cpu_stats_t cpu_stats; /* per-CPU statistics */ 1630Sstevel@tonic-gate struct kstat *cpu_info_kstat; /* kstat for cpu info */ 1640Sstevel@tonic-gate 1650Sstevel@tonic-gate uintptr_t cpu_profile_pc; /* kernel PC in profile interrupt */ 1660Sstevel@tonic-gate uintptr_t cpu_profile_upc; /* user PC in profile interrupt */ 1670Sstevel@tonic-gate uintptr_t cpu_profile_pil; /* PIL when profile interrupted */ 1680Sstevel@tonic-gate 1690Sstevel@tonic-gate ftrace_data_t cpu_ftrace; /* per cpu ftrace data */ 1700Sstevel@tonic-gate 1710Sstevel@tonic-gate clock_t cpu_deadman_lbolt; /* used by deadman() */ 1720Sstevel@tonic-gate uint_t cpu_deadman_countdown; /* used by deadman() */ 1730Sstevel@tonic-gate 1740Sstevel@tonic-gate kmutex_t cpu_cpc_ctxlock; /* protects context for idle thread */ 1750Sstevel@tonic-gate kcpc_ctx_t *cpu_cpc_ctx; /* performance counter context */ 1760Sstevel@tonic-gate 1770Sstevel@tonic-gate /* 1780Sstevel@tonic-gate * Configuration information for the processor_info system call. 1790Sstevel@tonic-gate */ 1800Sstevel@tonic-gate processor_info_t cpu_type_info; /* config info */ 1810Sstevel@tonic-gate time_t cpu_state_begin; /* when CPU entered current state */ 1820Sstevel@tonic-gate char cpu_cpr_flags; /* CPR related info */ 1830Sstevel@tonic-gate struct cyc_cpu *cpu_cyclic; /* per cpu cyclic subsystem data */ 1840Sstevel@tonic-gate struct squeue_set_s *cpu_squeue_set; /* per cpu squeue set */ 1850Sstevel@tonic-gate struct nvlist *cpu_props; /* pool-related properties */ 1860Sstevel@tonic-gate 1870Sstevel@tonic-gate krwlock_t cpu_ft_lock; /* DTrace: fasttrap lock */ 1880Sstevel@tonic-gate uintptr_t cpu_dtrace_caller; /* DTrace: caller, if any */ 1890Sstevel@tonic-gate hrtime_t cpu_dtrace_chillmark; /* DTrace: chill mark time */ 1900Sstevel@tonic-gate hrtime_t cpu_dtrace_chilled; /* DTrace: total chill time */ 1911058Sesolom volatile uint16_t cpu_mstate; /* cpu microstate */ 1921058Sesolom volatile uint16_t cpu_mstate_gen; /* generation counter */ 1931058Sesolom volatile hrtime_t cpu_mstate_start; /* cpu microstate start time */ 1941058Sesolom volatile hrtime_t cpu_acct[NCMSTATES]; /* cpu microstate data */ 195590Sesolom hrtime_t cpu_intracct[NCMSTATES]; /* interrupt mstate data */ 1960Sstevel@tonic-gate hrtime_t cpu_waitrq; /* cpu run-queue wait time */ 1970Sstevel@tonic-gate struct loadavg_s cpu_loadavg; /* loadavg info for this cpu */ 1980Sstevel@tonic-gate 1990Sstevel@tonic-gate char *cpu_idstr; /* for printing and debugging */ 2000Sstevel@tonic-gate char *cpu_brandstr; /* for printing */ 2010Sstevel@tonic-gate 2020Sstevel@tonic-gate /* 2030Sstevel@tonic-gate * Sum of all device interrupt weights that are currently directed at 2040Sstevel@tonic-gate * this cpu. Cleared at start of interrupt redistribution. 2050Sstevel@tonic-gate */ 2060Sstevel@tonic-gate int32_t cpu_intr_weight; 207414Skchow void *cpu_vm_data; 2080Sstevel@tonic-gate 2091892Sesaxe struct cpu_physid *cpu_physid; /* physical associations */ 2101892Sesaxe 2114718Smh27603 uint64_t cpu_curr_clock; /* current clock freq in Hz */ 2124718Smh27603 char *cpu_supp_freqs; /* supported freqs in Hz */ 2134718Smh27603 214*8803SJonathan.Haslam@Sun.COM uintptr_t cpu_cpcprofile_pc; /* kernel PC in cpc interrupt */ 215*8803SJonathan.Haslam@Sun.COM uintptr_t cpu_cpcprofile_upc; /* user PC in cpc interrupt */ 216*8803SJonathan.Haslam@Sun.COM 2172722Sjohnlev /* 2185076Smishra * Interrupt load factor used by dispatcher & softcall 2195076Smishra */ 2205076Smishra hrtime_t cpu_intrlast; /* total interrupt time (nsec) */ 2215076Smishra int cpu_intrload; /* interrupt load factor (0-99%) */ 2225076Smishra 2238408SEric.Saxe@Sun.COM uint_t cpu_rotor; /* for cheap pseudo-random numbers */ 2248408SEric.Saxe@Sun.COM 2255076Smishra /* 2262722Sjohnlev * New members must be added /before/ this member, as the CTF tools 2272722Sjohnlev * rely on this being the last field before cpu_m, so they can 2282722Sjohnlev * correctly calculate the offset when synthetically adding the cpu_m 2292722Sjohnlev * member in objects that do not have it. This fixup is required for 2302722Sjohnlev * uniquification to work correctly. 2312722Sjohnlev */ 2322722Sjohnlev uintptr_t cpu_m_pad; 2332722Sjohnlev 2340Sstevel@tonic-gate #if (defined(_KERNEL) || defined(_KMEMUSER)) && defined(_MACHDEP) 2350Sstevel@tonic-gate struct machcpu cpu_m; /* per architecture info */ 2360Sstevel@tonic-gate #endif 2370Sstevel@tonic-gate } cpu_t; 2380Sstevel@tonic-gate 2390Sstevel@tonic-gate /* 2400Sstevel@tonic-gate * The cpu_core structure consists of per-CPU state available in any context. 2410Sstevel@tonic-gate * On some architectures, this may mean that the page(s) containing the 2420Sstevel@tonic-gate * NCPU-sized array of cpu_core structures must be locked in the TLB -- it 2430Sstevel@tonic-gate * is up to the platform to assure that this is performed properly. Note that 2440Sstevel@tonic-gate * the structure is sized to avoid false sharing. 2450Sstevel@tonic-gate */ 246*8803SJonathan.Haslam@Sun.COM #define CPUC_SIZE (sizeof (uint16_t) + sizeof (uint8_t) + \ 247*8803SJonathan.Haslam@Sun.COM sizeof (uintptr_t) + sizeof (kmutex_t)) 2480Sstevel@tonic-gate #define CPUC_PADSIZE CPU_CACHE_COHERENCE_SIZE - CPUC_SIZE 2490Sstevel@tonic-gate 2500Sstevel@tonic-gate typedef struct cpu_core { 2510Sstevel@tonic-gate uint16_t cpuc_dtrace_flags; /* DTrace flags */ 252*8803SJonathan.Haslam@Sun.COM uint8_t cpuc_dcpc_intr_state; /* DCPC provider intr state */ 2530Sstevel@tonic-gate uint8_t cpuc_pad[CPUC_PADSIZE]; /* padding */ 2540Sstevel@tonic-gate uintptr_t cpuc_dtrace_illval; /* DTrace illegal value */ 2550Sstevel@tonic-gate kmutex_t cpuc_pid_lock; /* DTrace pid provider lock */ 2560Sstevel@tonic-gate } cpu_core_t; 2570Sstevel@tonic-gate 2580Sstevel@tonic-gate #ifdef _KERNEL 2590Sstevel@tonic-gate extern cpu_core_t cpu_core[]; 2600Sstevel@tonic-gate #endif /* _KERNEL */ 2610Sstevel@tonic-gate 2620Sstevel@tonic-gate /* 2630Sstevel@tonic-gate * CPU_ON_INTR() macro. Returns non-zero if currently on interrupt stack. 2640Sstevel@tonic-gate * Note that this isn't a test for a high PIL. For example, cpu_intr_actv 2650Sstevel@tonic-gate * does not get updated when we go through sys_trap from TL>0 at high PIL. 2660Sstevel@tonic-gate * getpil() should be used instead to check for PIL levels. 2670Sstevel@tonic-gate */ 2680Sstevel@tonic-gate #define CPU_ON_INTR(cpup) ((cpup)->cpu_intr_actv >> (LOCK_LEVEL + 1)) 2690Sstevel@tonic-gate 2708408SEric.Saxe@Sun.COM /* 2718408SEric.Saxe@Sun.COM * CPU_PSEUDO_RANDOM() returns a per CPU value that changes each time one 2728408SEric.Saxe@Sun.COM * looks at it. It's meant as a cheap mechanism to be incorporated in routines 2738408SEric.Saxe@Sun.COM * wanting to avoid biasing, but where true randomness isn't needed (just 2748408SEric.Saxe@Sun.COM * something that changes). 2758408SEric.Saxe@Sun.COM */ 2768408SEric.Saxe@Sun.COM #define CPU_PSEUDO_RANDOM() (CPU->cpu_rotor++) 2778408SEric.Saxe@Sun.COM 2780Sstevel@tonic-gate #if defined(_KERNEL) || defined(_KMEMUSER) 2790Sstevel@tonic-gate 2800Sstevel@tonic-gate #define INTR_STACK_SIZE MAX(DEFAULTSTKSZ, PAGESIZE) 2810Sstevel@tonic-gate 2820Sstevel@tonic-gate /* MEMBERS PROTECTED BY "atomicity": cpu_flags */ 2830Sstevel@tonic-gate 2840Sstevel@tonic-gate /* 2850Sstevel@tonic-gate * Flags in the CPU structure. 2860Sstevel@tonic-gate * 2870Sstevel@tonic-gate * These are protected by cpu_lock (except during creation). 2880Sstevel@tonic-gate * 2890Sstevel@tonic-gate * Offlined-CPUs have three stages of being offline: 2900Sstevel@tonic-gate * 2910Sstevel@tonic-gate * CPU_ENABLE indicates that the CPU is participating in I/O interrupts 2920Sstevel@tonic-gate * that can be directed at a number of different CPUs. If CPU_ENABLE 2930Sstevel@tonic-gate * is off, the CPU will not be given interrupts that can be sent elsewhere, 2940Sstevel@tonic-gate * but will still get interrupts from devices associated with that CPU only, 2950Sstevel@tonic-gate * and from other CPUs. 2960Sstevel@tonic-gate * 2970Sstevel@tonic-gate * CPU_OFFLINE indicates that the dispatcher should not allow any threads 2980Sstevel@tonic-gate * other than interrupt threads to run on that CPU. A CPU will not have 2990Sstevel@tonic-gate * CPU_OFFLINE set if there are any bound threads (besides interrupts). 3000Sstevel@tonic-gate * 3010Sstevel@tonic-gate * CPU_QUIESCED is set if p_offline was able to completely turn idle the 3020Sstevel@tonic-gate * CPU and it will not have to run interrupt threads. In this case it'll 3030Sstevel@tonic-gate * stay in the idle loop until CPU_QUIESCED is turned off. 3040Sstevel@tonic-gate * 3050Sstevel@tonic-gate * CPU_FROZEN is used only by CPR to mark CPUs that have been successfully 3060Sstevel@tonic-gate * suspended (in the suspend path), or have yet to be resumed (in the resume 3070Sstevel@tonic-gate * case). 3080Sstevel@tonic-gate * 3090Sstevel@tonic-gate * On some platforms CPUs can be individually powered off. 3100Sstevel@tonic-gate * The following flags are set for powered off CPUs: CPU_QUIESCED, 3110Sstevel@tonic-gate * CPU_OFFLINE, and CPU_POWEROFF. The following flags are cleared: 3120Sstevel@tonic-gate * CPU_RUNNING, CPU_READY, CPU_EXISTS, and CPU_ENABLE. 3130Sstevel@tonic-gate */ 3140Sstevel@tonic-gate #define CPU_RUNNING 0x001 /* CPU running */ 3150Sstevel@tonic-gate #define CPU_READY 0x002 /* CPU ready for cross-calls */ 3160Sstevel@tonic-gate #define CPU_QUIESCED 0x004 /* CPU will stay in idle */ 3170Sstevel@tonic-gate #define CPU_EXISTS 0x008 /* CPU is configured */ 3180Sstevel@tonic-gate #define CPU_ENABLE 0x010 /* CPU enabled for interrupts */ 3190Sstevel@tonic-gate #define CPU_OFFLINE 0x020 /* CPU offline via p_online */ 3200Sstevel@tonic-gate #define CPU_POWEROFF 0x040 /* CPU is powered off */ 3210Sstevel@tonic-gate #define CPU_FROZEN 0x080 /* CPU is frozen via CPR suspend */ 3220Sstevel@tonic-gate #define CPU_SPARE 0x100 /* CPU offline available for use */ 3230Sstevel@tonic-gate #define CPU_FAULTED 0x200 /* CPU offline diagnosed faulty */ 3240Sstevel@tonic-gate 3253446Smrj #define FMT_CPU_FLAGS \ 3263446Smrj "\20\12fault\11spare\10frozen" \ 3273446Smrj "\7poweroff\6offline\5enable\4exist\3quiesced\2ready\1run" 3283446Smrj 3290Sstevel@tonic-gate #define CPU_ACTIVE(cpu) (((cpu)->cpu_flags & CPU_OFFLINE) == 0) 3300Sstevel@tonic-gate 3310Sstevel@tonic-gate /* 3320Sstevel@tonic-gate * Flags for cpu_offline(), cpu_faulted(), and cpu_spare(). 3330Sstevel@tonic-gate */ 3340Sstevel@tonic-gate #define CPU_FORCED 0x0001 /* Force CPU offline */ 3350Sstevel@tonic-gate 3360Sstevel@tonic-gate /* 3370Sstevel@tonic-gate * DTrace flags. 3380Sstevel@tonic-gate */ 3390Sstevel@tonic-gate #define CPU_DTRACE_NOFAULT 0x0001 /* Don't fault */ 3400Sstevel@tonic-gate #define CPU_DTRACE_DROP 0x0002 /* Drop this ECB */ 3410Sstevel@tonic-gate #define CPU_DTRACE_BADADDR 0x0004 /* DTrace fault: bad address */ 3420Sstevel@tonic-gate #define CPU_DTRACE_BADALIGN 0x0008 /* DTrace fault: bad alignment */ 3430Sstevel@tonic-gate #define CPU_DTRACE_DIVZERO 0x0010 /* DTrace fault: divide by zero */ 3440Sstevel@tonic-gate #define CPU_DTRACE_ILLOP 0x0020 /* DTrace fault: illegal operation */ 3450Sstevel@tonic-gate #define CPU_DTRACE_NOSCRATCH 0x0040 /* DTrace fault: out of scratch */ 3460Sstevel@tonic-gate #define CPU_DTRACE_KPRIV 0x0080 /* DTrace fault: bad kernel access */ 3470Sstevel@tonic-gate #define CPU_DTRACE_UPRIV 0x0100 /* DTrace fault: bad user access */ 3480Sstevel@tonic-gate #define CPU_DTRACE_TUPOFLOW 0x0200 /* DTrace fault: tuple stack overflow */ 3490Sstevel@tonic-gate #if defined(__sparc) 3500Sstevel@tonic-gate #define CPU_DTRACE_FAKERESTORE 0x0400 /* pid provider hint to getreg */ 3510Sstevel@tonic-gate #endif 3520Sstevel@tonic-gate #define CPU_DTRACE_ENTRY 0x0800 /* pid provider hint to ustack() */ 3533682Sjhaslam #define CPU_DTRACE_BADSTACK 0x1000 /* DTrace fault: bad stack */ 3540Sstevel@tonic-gate 3550Sstevel@tonic-gate #define CPU_DTRACE_FAULT (CPU_DTRACE_BADADDR | CPU_DTRACE_BADALIGN | \ 3560Sstevel@tonic-gate CPU_DTRACE_DIVZERO | CPU_DTRACE_ILLOP | \ 3570Sstevel@tonic-gate CPU_DTRACE_NOSCRATCH | CPU_DTRACE_KPRIV | \ 3583682Sjhaslam CPU_DTRACE_UPRIV | CPU_DTRACE_TUPOFLOW | \ 3593682Sjhaslam CPU_DTRACE_BADSTACK) 3600Sstevel@tonic-gate #define CPU_DTRACE_ERROR (CPU_DTRACE_FAULT | CPU_DTRACE_DROP) 3610Sstevel@tonic-gate 3620Sstevel@tonic-gate /* 3630Sstevel@tonic-gate * Dispatcher flags 3640Sstevel@tonic-gate * These flags must be changed only by the current CPU. 3650Sstevel@tonic-gate */ 3660Sstevel@tonic-gate #define CPU_DISP_DONTSTEAL 0x01 /* CPU undergoing context swtch */ 3670Sstevel@tonic-gate #define CPU_DISP_HALTED 0x02 /* CPU halted waiting for interrupt */ 3680Sstevel@tonic-gate 3690Sstevel@tonic-gate 3700Sstevel@tonic-gate #endif /* _KERNEL || _KMEMUSER */ 3710Sstevel@tonic-gate 3720Sstevel@tonic-gate #if (defined(_KERNEL) || defined(_KMEMUSER)) && defined(_MACHDEP) 3730Sstevel@tonic-gate 3740Sstevel@tonic-gate /* 3750Sstevel@tonic-gate * Macros for manipulating sets of CPUs as a bitmap. Note that this 3760Sstevel@tonic-gate * bitmap may vary in size depending on the maximum CPU id a specific 3770Sstevel@tonic-gate * platform supports. This may be different than the number of CPUs 3780Sstevel@tonic-gate * the platform supports, since CPU ids can be sparse. We define two 3790Sstevel@tonic-gate * sets of macros; one for platforms where the maximum CPU id is less 3800Sstevel@tonic-gate * than the number of bits in a single word (32 in a 32-bit kernel, 3810Sstevel@tonic-gate * 64 in a 64-bit kernel), and one for platforms that require bitmaps 3820Sstevel@tonic-gate * of more than one word. 3830Sstevel@tonic-gate */ 3840Sstevel@tonic-gate 3850Sstevel@tonic-gate #define CPUSET_WORDS BT_BITOUL(NCPU) 3860Sstevel@tonic-gate #define CPUSET_NOTINSET ((uint_t)-1) 3870Sstevel@tonic-gate 3880Sstevel@tonic-gate #if CPUSET_WORDS > 1 3890Sstevel@tonic-gate 3900Sstevel@tonic-gate typedef struct cpuset { 3910Sstevel@tonic-gate ulong_t cpub[CPUSET_WORDS]; 3920Sstevel@tonic-gate } cpuset_t; 3930Sstevel@tonic-gate 3940Sstevel@tonic-gate /* 3950Sstevel@tonic-gate * Private functions for manipulating cpusets that do not fit in a 3960Sstevel@tonic-gate * single word. These should not be used directly; instead the 3970Sstevel@tonic-gate * CPUSET_* macros should be used so the code will be portable 3980Sstevel@tonic-gate * across different definitions of NCPU. 3990Sstevel@tonic-gate */ 4000Sstevel@tonic-gate extern void cpuset_all(cpuset_t *); 4010Sstevel@tonic-gate extern void cpuset_all_but(cpuset_t *, uint_t); 4020Sstevel@tonic-gate extern int cpuset_isnull(cpuset_t *); 4030Sstevel@tonic-gate extern int cpuset_cmp(cpuset_t *, cpuset_t *); 4040Sstevel@tonic-gate extern void cpuset_only(cpuset_t *, uint_t); 4050Sstevel@tonic-gate extern uint_t cpuset_find(cpuset_t *); 4062492Sha137994 extern void cpuset_bounds(cpuset_t *, uint_t *, uint_t *); 4070Sstevel@tonic-gate 4080Sstevel@tonic-gate #define CPUSET_ALL(set) cpuset_all(&(set)) 4090Sstevel@tonic-gate #define CPUSET_ALL_BUT(set, cpu) cpuset_all_but(&(set), cpu) 4100Sstevel@tonic-gate #define CPUSET_ONLY(set, cpu) cpuset_only(&(set), cpu) 4110Sstevel@tonic-gate #define CPU_IN_SET(set, cpu) BT_TEST((set).cpub, cpu) 4120Sstevel@tonic-gate #define CPUSET_ADD(set, cpu) BT_SET((set).cpub, cpu) 4130Sstevel@tonic-gate #define CPUSET_DEL(set, cpu) BT_CLEAR((set).cpub, cpu) 4140Sstevel@tonic-gate #define CPUSET_ISNULL(set) cpuset_isnull(&(set)) 4150Sstevel@tonic-gate #define CPUSET_ISEQUAL(set1, set2) cpuset_cmp(&(set1), &(set2)) 4160Sstevel@tonic-gate 4170Sstevel@tonic-gate /* 4180Sstevel@tonic-gate * Find one CPU in the cpuset. 4190Sstevel@tonic-gate * Sets "cpu" to the id of the found CPU, or CPUSET_NOTINSET if no cpu 4200Sstevel@tonic-gate * could be found. (i.e. empty set) 4210Sstevel@tonic-gate */ 4220Sstevel@tonic-gate #define CPUSET_FIND(set, cpu) { \ 4230Sstevel@tonic-gate cpu = cpuset_find(&(set)); \ 4240Sstevel@tonic-gate } 4250Sstevel@tonic-gate 4260Sstevel@tonic-gate /* 4272492Sha137994 * Determine the smallest and largest CPU id in the set. Returns 4282492Sha137994 * CPUSET_NOTINSET in smallest and largest when set is empty. 4292492Sha137994 */ 4302492Sha137994 #define CPUSET_BOUNDS(set, smallest, largest) { \ 4312492Sha137994 cpuset_bounds(&(set), &(smallest), &(largest)); \ 4322492Sha137994 } 4332492Sha137994 4342492Sha137994 /* 4350Sstevel@tonic-gate * Atomic cpuset operations 4360Sstevel@tonic-gate * These are safe to use for concurrent cpuset manipulations. 4370Sstevel@tonic-gate * "xdel" and "xadd" are exclusive operations, that set "result" to "0" 4380Sstevel@tonic-gate * if the add or del was successful, or "-1" if not successful. 4390Sstevel@tonic-gate * (e.g. attempting to add a cpu to a cpuset that's already there, or 4400Sstevel@tonic-gate * deleting a cpu that's not in the cpuset) 4410Sstevel@tonic-gate */ 4420Sstevel@tonic-gate 4430Sstevel@tonic-gate #define CPUSET_ATOMIC_DEL(set, cpu) BT_ATOMIC_CLEAR((set).cpub, (cpu)) 4440Sstevel@tonic-gate #define CPUSET_ATOMIC_ADD(set, cpu) BT_ATOMIC_SET((set).cpub, (cpu)) 4450Sstevel@tonic-gate 4460Sstevel@tonic-gate #define CPUSET_ATOMIC_XADD(set, cpu, result) \ 4470Sstevel@tonic-gate BT_ATOMIC_SET_EXCL((set).cpub, cpu, result) 4480Sstevel@tonic-gate 4490Sstevel@tonic-gate #define CPUSET_ATOMIC_XDEL(set, cpu, result) \ 4500Sstevel@tonic-gate BT_ATOMIC_CLEAR_EXCL((set).cpub, cpu, result) 4510Sstevel@tonic-gate 4520Sstevel@tonic-gate 4530Sstevel@tonic-gate #define CPUSET_OR(set1, set2) { \ 4540Sstevel@tonic-gate int _i; \ 4550Sstevel@tonic-gate for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4560Sstevel@tonic-gate (set1).cpub[_i] |= (set2).cpub[_i]; \ 4570Sstevel@tonic-gate } 4580Sstevel@tonic-gate 4595076Smishra #define CPUSET_XOR(set1, set2) { \ 4605076Smishra int _i; \ 4615076Smishra for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4625076Smishra (set1).cpub[_i] ^= (set2).cpub[_i]; \ 4635076Smishra } 4645076Smishra 4650Sstevel@tonic-gate #define CPUSET_AND(set1, set2) { \ 4660Sstevel@tonic-gate int _i; \ 4670Sstevel@tonic-gate for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4680Sstevel@tonic-gate (set1).cpub[_i] &= (set2).cpub[_i]; \ 4690Sstevel@tonic-gate } 4700Sstevel@tonic-gate 4710Sstevel@tonic-gate #define CPUSET_ZERO(set) { \ 4720Sstevel@tonic-gate int _i; \ 4730Sstevel@tonic-gate for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4740Sstevel@tonic-gate (set).cpub[_i] = 0; \ 4750Sstevel@tonic-gate } 4760Sstevel@tonic-gate 4770Sstevel@tonic-gate #elif CPUSET_WORDS == 1 4780Sstevel@tonic-gate 4790Sstevel@tonic-gate typedef ulong_t cpuset_t; /* a set of CPUs */ 4800Sstevel@tonic-gate 4810Sstevel@tonic-gate #define CPUSET(cpu) (1UL << (cpu)) 4820Sstevel@tonic-gate 4830Sstevel@tonic-gate #define CPUSET_ALL(set) ((void)((set) = ~0UL)) 4840Sstevel@tonic-gate #define CPUSET_ALL_BUT(set, cpu) ((void)((set) = ~CPUSET(cpu))) 4850Sstevel@tonic-gate #define CPUSET_ONLY(set, cpu) ((void)((set) = CPUSET(cpu))) 4860Sstevel@tonic-gate #define CPU_IN_SET(set, cpu) ((set) & CPUSET(cpu)) 4870Sstevel@tonic-gate #define CPUSET_ADD(set, cpu) ((void)((set) |= CPUSET(cpu))) 4880Sstevel@tonic-gate #define CPUSET_DEL(set, cpu) ((void)((set) &= ~CPUSET(cpu))) 4890Sstevel@tonic-gate #define CPUSET_ISNULL(set) ((set) == 0) 4900Sstevel@tonic-gate #define CPUSET_ISEQUAL(set1, set2) ((set1) == (set2)) 4910Sstevel@tonic-gate #define CPUSET_OR(set1, set2) ((void)((set1) |= (set2))) 4925076Smishra #define CPUSET_XOR(set1, set2) ((void)((set1) ^= (set2))) 4930Sstevel@tonic-gate #define CPUSET_AND(set1, set2) ((void)((set1) &= (set2))) 4940Sstevel@tonic-gate #define CPUSET_ZERO(set) ((void)((set) = 0)) 4950Sstevel@tonic-gate 4960Sstevel@tonic-gate #define CPUSET_FIND(set, cpu) { \ 4970Sstevel@tonic-gate cpu = (uint_t)(lowbit(set) - 1); \ 4980Sstevel@tonic-gate } 4990Sstevel@tonic-gate 5002492Sha137994 #define CPUSET_BOUNDS(set, smallest, largest) { \ 5012492Sha137994 smallest = (uint_t)(lowbit(set) - 1); \ 5022492Sha137994 largest = (uint_t)(highbit(set) - 1); \ 5032492Sha137994 } 5042492Sha137994 5050Sstevel@tonic-gate #define CPUSET_ATOMIC_DEL(set, cpu) atomic_and_long(&(set), ~CPUSET(cpu)) 5060Sstevel@tonic-gate #define CPUSET_ATOMIC_ADD(set, cpu) atomic_or_long(&(set), CPUSET(cpu)) 5070Sstevel@tonic-gate 5080Sstevel@tonic-gate #define CPUSET_ATOMIC_XADD(set, cpu, result) \ 5090Sstevel@tonic-gate { result = atomic_set_long_excl(&(set), (cpu)); } 5100Sstevel@tonic-gate 5110Sstevel@tonic-gate #define CPUSET_ATOMIC_XDEL(set, cpu, result) \ 5120Sstevel@tonic-gate { result = atomic_clear_long_excl(&(set), (cpu)); } 5130Sstevel@tonic-gate 5140Sstevel@tonic-gate #else /* CPUSET_WORDS <= 0 */ 5150Sstevel@tonic-gate 5160Sstevel@tonic-gate #error NCPU is undefined or invalid 5170Sstevel@tonic-gate 5180Sstevel@tonic-gate #endif /* CPUSET_WORDS */ 5190Sstevel@tonic-gate 5200Sstevel@tonic-gate extern cpuset_t cpu_seqid_inuse; 5210Sstevel@tonic-gate 5220Sstevel@tonic-gate #endif /* (_KERNEL || _KMEMUSER) && _MACHDEP */ 5230Sstevel@tonic-gate 5240Sstevel@tonic-gate #define CPU_CPR_OFFLINE 0x0 5250Sstevel@tonic-gate #define CPU_CPR_ONLINE 0x1 5260Sstevel@tonic-gate #define CPU_CPR_IS_OFFLINE(cpu) (((cpu)->cpu_cpr_flags & CPU_CPR_ONLINE) == 0) 5275295Srandyf #define CPU_CPR_IS_ONLINE(cpu) ((cpu)->cpu_cpr_flags & CPU_CPR_ONLINE) 5280Sstevel@tonic-gate #define CPU_SET_CPR_FLAGS(cpu, flag) ((cpu)->cpu_cpr_flags |= flag) 5290Sstevel@tonic-gate 5300Sstevel@tonic-gate #if defined(_KERNEL) || defined(_KMEMUSER) 5310Sstevel@tonic-gate 5320Sstevel@tonic-gate extern struct cpu *cpu[]; /* indexed by CPU number */ 5338408SEric.Saxe@Sun.COM extern struct cpu **cpu_seq; /* indexed by sequential CPU id */ 5340Sstevel@tonic-gate extern cpu_t *cpu_list; /* list of CPUs */ 5355788Smv143129 extern cpu_t *cpu_active; /* list of active CPUs */ 5360Sstevel@tonic-gate extern int ncpus; /* number of CPUs present */ 5370Sstevel@tonic-gate extern int ncpus_online; /* number of CPUs not quiesced */ 5380Sstevel@tonic-gate extern int max_ncpus; /* max present before ncpus is known */ 5390Sstevel@tonic-gate extern int boot_max_ncpus; /* like max_ncpus but for real */ 5406880Sdv142724 extern int boot_ncpus; /* # cpus present @ boot */ 5410Sstevel@tonic-gate extern processorid_t max_cpuid; /* maximum CPU number */ 5420Sstevel@tonic-gate extern struct cpu *cpu_inmotion; /* offline or partition move target */ 5433792Sakolb extern cpu_t *clock_cpu_list; 5440Sstevel@tonic-gate 5450Sstevel@tonic-gate #if defined(__i386) || defined(__amd64) 5460Sstevel@tonic-gate extern struct cpu *curcpup(void); 5470Sstevel@tonic-gate #define CPU (curcpup()) /* Pointer to current CPU */ 5480Sstevel@tonic-gate #else 5490Sstevel@tonic-gate #define CPU (curthread->t_cpu) /* Pointer to current CPU */ 5500Sstevel@tonic-gate #endif 5510Sstevel@tonic-gate 5520Sstevel@tonic-gate /* 5530Sstevel@tonic-gate * CPU_CURRENT indicates to thread_affinity_set to use CPU->cpu_id 5540Sstevel@tonic-gate * as the target and to grab cpu_lock instead of requiring the caller 5550Sstevel@tonic-gate * to grab it. 5560Sstevel@tonic-gate */ 5570Sstevel@tonic-gate #define CPU_CURRENT -3 5580Sstevel@tonic-gate 5590Sstevel@tonic-gate /* 5600Sstevel@tonic-gate * Per-CPU statistics 5610Sstevel@tonic-gate * 5620Sstevel@tonic-gate * cpu_stats_t contains numerous system and VM-related statistics, in the form 5630Sstevel@tonic-gate * of gauges or monotonically-increasing event occurrence counts. 5640Sstevel@tonic-gate */ 5650Sstevel@tonic-gate 5660Sstevel@tonic-gate #define CPU_STATS_ENTER_K() kpreempt_disable() 5670Sstevel@tonic-gate #define CPU_STATS_EXIT_K() kpreempt_enable() 5680Sstevel@tonic-gate 5690Sstevel@tonic-gate #define CPU_STATS_ADD_K(class, stat, amount) \ 5700Sstevel@tonic-gate { kpreempt_disable(); /* keep from switching CPUs */\ 5710Sstevel@tonic-gate CPU_STATS_ADDQ(CPU, class, stat, amount); \ 5720Sstevel@tonic-gate kpreempt_enable(); \ 5730Sstevel@tonic-gate } 5740Sstevel@tonic-gate 5750Sstevel@tonic-gate #define CPU_STATS_ADDQ(cp, class, stat, amount) { \ 5760Sstevel@tonic-gate extern void __dtrace_probe___cpu_##class##info_##stat(uint_t, \ 5770Sstevel@tonic-gate uint64_t *, cpu_t *); \ 5780Sstevel@tonic-gate uint64_t *stataddr = &((cp)->cpu_stats.class.stat); \ 5790Sstevel@tonic-gate __dtrace_probe___cpu_##class##info_##stat((amount), \ 5800Sstevel@tonic-gate stataddr, cp); \ 5810Sstevel@tonic-gate *(stataddr) += (amount); \ 5820Sstevel@tonic-gate } 5830Sstevel@tonic-gate 5840Sstevel@tonic-gate #define CPU_STATS(cp, stat) \ 5850Sstevel@tonic-gate ((cp)->cpu_stats.stat) 5860Sstevel@tonic-gate 5870Sstevel@tonic-gate #endif /* _KERNEL || _KMEMUSER */ 5880Sstevel@tonic-gate 5890Sstevel@tonic-gate /* 5900Sstevel@tonic-gate * CPU support routines. 5910Sstevel@tonic-gate */ 5920Sstevel@tonic-gate #if defined(_KERNEL) && defined(__STDC__) /* not for genassym.c */ 5930Sstevel@tonic-gate 5940Sstevel@tonic-gate struct zone; 5950Sstevel@tonic-gate 5960Sstevel@tonic-gate void cpu_list_init(cpu_t *); 5970Sstevel@tonic-gate void cpu_add_unit(cpu_t *); 5980Sstevel@tonic-gate void cpu_del_unit(int cpuid); 5990Sstevel@tonic-gate void cpu_add_active(cpu_t *); 6000Sstevel@tonic-gate void cpu_kstat_init(cpu_t *); 6010Sstevel@tonic-gate void cpu_visibility_add(cpu_t *, struct zone *); 6020Sstevel@tonic-gate void cpu_visibility_remove(cpu_t *, struct zone *); 6030Sstevel@tonic-gate void cpu_visibility_configure(cpu_t *, struct zone *); 6040Sstevel@tonic-gate void cpu_visibility_unconfigure(cpu_t *, struct zone *); 6050Sstevel@tonic-gate void cpu_visibility_online(cpu_t *, struct zone *); 6060Sstevel@tonic-gate void cpu_visibility_offline(cpu_t *, struct zone *); 6070Sstevel@tonic-gate void cpu_create_intrstat(cpu_t *); 6080Sstevel@tonic-gate void cpu_delete_intrstat(cpu_t *); 6090Sstevel@tonic-gate int cpu_kstat_intrstat_update(kstat_t *, int); 6100Sstevel@tonic-gate void cpu_intr_swtch_enter(kthread_t *); 6110Sstevel@tonic-gate void cpu_intr_swtch_exit(kthread_t *); 6120Sstevel@tonic-gate 6130Sstevel@tonic-gate void mbox_lock_init(void); /* initialize cross-call locks */ 6140Sstevel@tonic-gate void mbox_init(int cpun); /* initialize cross-calls */ 6150Sstevel@tonic-gate void poke_cpu(int cpun); /* interrupt another CPU (to preempt) */ 6160Sstevel@tonic-gate 6173446Smrj /* 6183446Smrj * values for safe_list. Pause state that CPUs are in. 6193446Smrj */ 6203446Smrj #define PAUSE_IDLE 0 /* normal state */ 6213446Smrj #define PAUSE_READY 1 /* paused thread ready to spl */ 6223446Smrj #define PAUSE_WAIT 2 /* paused thread is spl-ed high */ 6233446Smrj #define PAUSE_DIE 3 /* tell pause thread to leave */ 6243446Smrj #define PAUSE_DEAD 4 /* pause thread has left */ 6253446Smrj 6263446Smrj void mach_cpu_pause(volatile char *); 6273446Smrj 6280Sstevel@tonic-gate void pause_cpus(cpu_t *off_cp); 6290Sstevel@tonic-gate void start_cpus(void); 6300Sstevel@tonic-gate int cpus_paused(void); 6310Sstevel@tonic-gate 6320Sstevel@tonic-gate void cpu_pause_init(void); 6330Sstevel@tonic-gate cpu_t *cpu_get(processorid_t cpun); /* get the CPU struct associated */ 6340Sstevel@tonic-gate 6350Sstevel@tonic-gate int cpu_online(cpu_t *cp); /* take cpu online */ 6360Sstevel@tonic-gate int cpu_offline(cpu_t *cp, int flags); /* take cpu offline */ 6370Sstevel@tonic-gate int cpu_spare(cpu_t *cp, int flags); /* take cpu to spare */ 6380Sstevel@tonic-gate int cpu_faulted(cpu_t *cp, int flags); /* take cpu to faulted */ 6390Sstevel@tonic-gate int cpu_poweron(cpu_t *cp); /* take powered-off cpu to offline */ 6400Sstevel@tonic-gate int cpu_poweroff(cpu_t *cp); /* take offline cpu to powered-off */ 6410Sstevel@tonic-gate 6420Sstevel@tonic-gate cpu_t *cpu_intr_next(cpu_t *cp); /* get next online CPU taking intrs */ 6430Sstevel@tonic-gate int cpu_intr_count(cpu_t *cp); /* count # of CPUs handling intrs */ 6440Sstevel@tonic-gate int cpu_intr_on(cpu_t *cp); /* CPU taking I/O interrupts? */ 6450Sstevel@tonic-gate void cpu_intr_enable(cpu_t *cp); /* enable I/O interrupts */ 6460Sstevel@tonic-gate int cpu_intr_disable(cpu_t *cp); /* disable I/O interrupts */ 6471455Sandrei void cpu_intr_alloc(cpu_t *cp, int n); /* allocate interrupt threads */ 6480Sstevel@tonic-gate 6490Sstevel@tonic-gate /* 6500Sstevel@tonic-gate * Routines for checking CPU states. 6510Sstevel@tonic-gate */ 6520Sstevel@tonic-gate int cpu_is_online(cpu_t *); /* check if CPU is online */ 6530Sstevel@tonic-gate int cpu_is_nointr(cpu_t *); /* check if CPU can service intrs */ 6540Sstevel@tonic-gate int cpu_is_active(cpu_t *); /* check if CPU can run threads */ 6550Sstevel@tonic-gate int cpu_is_offline(cpu_t *); /* check if CPU is offline */ 6560Sstevel@tonic-gate int cpu_is_poweredoff(cpu_t *); /* check if CPU is powered off */ 6570Sstevel@tonic-gate 6580Sstevel@tonic-gate int cpu_flagged_online(cpu_flag_t); /* flags show CPU is online */ 6590Sstevel@tonic-gate int cpu_flagged_nointr(cpu_flag_t); /* flags show CPU not handling intrs */ 6600Sstevel@tonic-gate int cpu_flagged_active(cpu_flag_t); /* flags show CPU scheduling threads */ 6610Sstevel@tonic-gate int cpu_flagged_offline(cpu_flag_t); /* flags show CPU is offline */ 6620Sstevel@tonic-gate int cpu_flagged_poweredoff(cpu_flag_t); /* flags show CPU is powered off */ 6630Sstevel@tonic-gate 6640Sstevel@tonic-gate /* 6650Sstevel@tonic-gate * The processor_info(2) state of a CPU is a simplified representation suitable 6660Sstevel@tonic-gate * for use by an application program. Kernel subsystems should utilize the 6670Sstevel@tonic-gate * internal per-CPU state as given by the cpu_flags member of the cpu structure, 6680Sstevel@tonic-gate * as this information may include platform- or architecture-specific state 6690Sstevel@tonic-gate * critical to a subsystem's disposition of a particular CPU. 6700Sstevel@tonic-gate */ 6710Sstevel@tonic-gate void cpu_set_state(cpu_t *); /* record/timestamp current state */ 6720Sstevel@tonic-gate int cpu_get_state(cpu_t *); /* get current cpu state */ 6730Sstevel@tonic-gate const char *cpu_get_state_str(cpu_t *); /* get current cpu state as string */ 6740Sstevel@tonic-gate 6754877Smh27603 6764877Smh27603 void cpu_set_supp_freqs(cpu_t *, const char *); /* set the CPU supported */ 6774877Smh27603 /* frequencies */ 6784877Smh27603 6790Sstevel@tonic-gate int cpu_configure(int); 6800Sstevel@tonic-gate int cpu_unconfigure(int); 6810Sstevel@tonic-gate void cpu_destroy_bound_threads(cpu_t *cp); 6820Sstevel@tonic-gate 6830Sstevel@tonic-gate extern int cpu_bind_thread(kthread_t *tp, processorid_t bind, 6840Sstevel@tonic-gate processorid_t *obind, int *error); 6856298Sakolb extern int cpu_unbind(processorid_t cpu_id, boolean_t force); 6860Sstevel@tonic-gate extern void thread_affinity_set(kthread_t *t, int cpu_id); 6870Sstevel@tonic-gate extern void thread_affinity_clear(kthread_t *t); 6880Sstevel@tonic-gate extern void affinity_set(int cpu_id); 6890Sstevel@tonic-gate extern void affinity_clear(void); 6900Sstevel@tonic-gate extern void init_cpu_mstate(struct cpu *, int); 6910Sstevel@tonic-gate extern void term_cpu_mstate(struct cpu *); 692590Sesolom extern void new_cpu_mstate(int, hrtime_t); 693590Sesolom extern void get_cpu_mstate(struct cpu *, hrtime_t *); 6940Sstevel@tonic-gate extern void thread_nomigrate(void); 6950Sstevel@tonic-gate extern void thread_allowmigrate(void); 6960Sstevel@tonic-gate extern void weakbinding_stop(void); 6970Sstevel@tonic-gate extern void weakbinding_start(void); 6980Sstevel@tonic-gate 6990Sstevel@tonic-gate /* 7000Sstevel@tonic-gate * The following routines affect the CPUs participation in interrupt processing, 7010Sstevel@tonic-gate * if that is applicable on the architecture. This only affects interrupts 7020Sstevel@tonic-gate * which aren't directed at the processor (not cross calls). 7030Sstevel@tonic-gate * 7040Sstevel@tonic-gate * cpu_disable_intr returns non-zero if interrupts were previously enabled. 7050Sstevel@tonic-gate */ 7060Sstevel@tonic-gate int cpu_disable_intr(struct cpu *cp); /* stop issuing interrupts to cpu */ 7070Sstevel@tonic-gate void cpu_enable_intr(struct cpu *cp); /* start issuing interrupts to cpu */ 7080Sstevel@tonic-gate 7090Sstevel@tonic-gate /* 7100Sstevel@tonic-gate * The mutex cpu_lock protects cpu_flags for all CPUs, as well as the ncpus 7110Sstevel@tonic-gate * and ncpus_online counts. 7120Sstevel@tonic-gate */ 7130Sstevel@tonic-gate extern kmutex_t cpu_lock; /* lock protecting CPU data */ 7140Sstevel@tonic-gate 7150Sstevel@tonic-gate typedef enum { 7160Sstevel@tonic-gate CPU_INIT, 7170Sstevel@tonic-gate CPU_CONFIG, 7180Sstevel@tonic-gate CPU_UNCONFIG, 7190Sstevel@tonic-gate CPU_ON, 7200Sstevel@tonic-gate CPU_OFF, 7210Sstevel@tonic-gate CPU_CPUPART_IN, 722*8803SJonathan.Haslam@Sun.COM CPU_CPUPART_OUT, 723*8803SJonathan.Haslam@Sun.COM CPU_SETUP 7240Sstevel@tonic-gate } cpu_setup_t; 7250Sstevel@tonic-gate 7260Sstevel@tonic-gate typedef int cpu_setup_func_t(cpu_setup_t, int, void *); 7270Sstevel@tonic-gate 7280Sstevel@tonic-gate /* 7290Sstevel@tonic-gate * Routines used to register interest in cpu's being added to or removed 7300Sstevel@tonic-gate * from the system. 7310Sstevel@tonic-gate */ 7320Sstevel@tonic-gate extern void register_cpu_setup_func(cpu_setup_func_t *, void *); 7330Sstevel@tonic-gate extern void unregister_cpu_setup_func(cpu_setup_func_t *, void *); 7340Sstevel@tonic-gate extern void cpu_state_change_notify(int, cpu_setup_t); 7350Sstevel@tonic-gate 7360Sstevel@tonic-gate /* 7370Sstevel@tonic-gate * Create various strings that describe the given CPU for the 7380Sstevel@tonic-gate * processor_info system call and configuration-related kstats. 7390Sstevel@tonic-gate */ 7400Sstevel@tonic-gate #define CPU_IDSTRLEN 100 7410Sstevel@tonic-gate 7420Sstevel@tonic-gate extern void init_cpu_info(struct cpu *); 7437718SJason.Beloro@Sun.COM extern void populate_idstr(struct cpu *); 744414Skchow extern void cpu_vm_data_init(struct cpu *); 745414Skchow extern void cpu_vm_data_destroy(struct cpu *); 7460Sstevel@tonic-gate 7470Sstevel@tonic-gate #endif /* _KERNEL */ 7480Sstevel@tonic-gate 7490Sstevel@tonic-gate #ifdef __cplusplus 7500Sstevel@tonic-gate } 7510Sstevel@tonic-gate #endif 7520Sstevel@tonic-gate 7530Sstevel@tonic-gate #endif /* _SYS_CPUVAR_H */ 754