10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5713Swesolows * Common Development and Distribution License (the "License"). 6713Swesolows * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 21713Swesolows 220Sstevel@tonic-gate /* 23*1455Sandrei * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #ifndef _SYS_CPUVAR_H 280Sstevel@tonic-gate #define _SYS_CPUVAR_H 290Sstevel@tonic-gate 300Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 310Sstevel@tonic-gate 320Sstevel@tonic-gate #include <sys/thread.h> 330Sstevel@tonic-gate #include <sys/sysinfo.h> /* has cpu_stat_t definition */ 340Sstevel@tonic-gate #include <sys/disp.h> 350Sstevel@tonic-gate #include <sys/processor.h> 360Sstevel@tonic-gate 370Sstevel@tonic-gate #if (defined(_KERNEL) || defined(_KMEMUSER)) && defined(_MACHDEP) 380Sstevel@tonic-gate #include <sys/machcpuvar.h> 390Sstevel@tonic-gate #endif 400Sstevel@tonic-gate 410Sstevel@tonic-gate #include <sys/types.h> 420Sstevel@tonic-gate #include <sys/file.h> 430Sstevel@tonic-gate #include <sys/bitmap.h> 440Sstevel@tonic-gate #include <sys/rwlock.h> 450Sstevel@tonic-gate #include <sys/msacct.h> 46713Swesolows #if defined(__GNUC__) && defined(_ASM_INLINES) && defined(_KERNEL) && \ 47713Swesolows (defined(__i386) || defined(__amd64)) 480Sstevel@tonic-gate #include <asm/cpuvar.h> 490Sstevel@tonic-gate #endif 500Sstevel@tonic-gate 510Sstevel@tonic-gate #ifdef __cplusplus 520Sstevel@tonic-gate extern "C" { 530Sstevel@tonic-gate #endif 540Sstevel@tonic-gate 550Sstevel@tonic-gate struct squeue_set_s; 560Sstevel@tonic-gate 570Sstevel@tonic-gate #define CPU_CACHE_COHERENCE_SIZE 64 580Sstevel@tonic-gate #define S_LOADAVG_SZ 11 590Sstevel@tonic-gate #define S_MOVAVG_SZ 10 600Sstevel@tonic-gate 610Sstevel@tonic-gate struct loadavg_s { 620Sstevel@tonic-gate int lg_cur; /* current loadavg entry */ 630Sstevel@tonic-gate unsigned int lg_len; /* number entries recorded */ 640Sstevel@tonic-gate hrtime_t lg_total; /* used to temporarily hold load totals */ 650Sstevel@tonic-gate hrtime_t lg_loads[S_LOADAVG_SZ]; /* table of recorded entries */ 660Sstevel@tonic-gate }; 670Sstevel@tonic-gate 680Sstevel@tonic-gate /* 690Sstevel@tonic-gate * For fast event tracing. 700Sstevel@tonic-gate */ 710Sstevel@tonic-gate struct ftrace_record; 720Sstevel@tonic-gate typedef struct ftrace_data { 730Sstevel@tonic-gate int ftd_state; /* ftrace flags */ 740Sstevel@tonic-gate kmutex_t ftd_mutex; /* ftrace buffer lock */ 750Sstevel@tonic-gate struct ftrace_record *ftd_cur; /* current record */ 760Sstevel@tonic-gate struct ftrace_record *ftd_first; /* first record */ 770Sstevel@tonic-gate struct ftrace_record *ftd_last; /* last record */ 780Sstevel@tonic-gate } ftrace_data_t; 790Sstevel@tonic-gate 800Sstevel@tonic-gate struct cyc_cpu; 810Sstevel@tonic-gate struct nvlist; 820Sstevel@tonic-gate 830Sstevel@tonic-gate /* 840Sstevel@tonic-gate * Per-CPU data. 850Sstevel@tonic-gate */ 860Sstevel@tonic-gate typedef struct cpu { 870Sstevel@tonic-gate processorid_t cpu_id; /* CPU number */ 880Sstevel@tonic-gate processorid_t cpu_seqid; /* sequential CPU id (0..ncpus-1) */ 890Sstevel@tonic-gate volatile cpu_flag_t cpu_flags; /* flags indicating CPU state */ 900Sstevel@tonic-gate struct cpu *cpu_self; /* pointer to itself */ 910Sstevel@tonic-gate kthread_t *cpu_thread; /* current thread */ 920Sstevel@tonic-gate kthread_t *cpu_idle_thread; /* idle thread for this CPU */ 930Sstevel@tonic-gate kthread_t *cpu_pause_thread; /* pause thread for this CPU */ 940Sstevel@tonic-gate klwp_id_t cpu_lwp; /* current lwp (if any) */ 950Sstevel@tonic-gate klwp_id_t cpu_fpowner; /* currently loaded fpu owner */ 960Sstevel@tonic-gate struct cpupart *cpu_part; /* partition with this CPU */ 970Sstevel@tonic-gate struct lgrp_ld *cpu_lpl; /* pointer to this cpu's load */ 980Sstevel@tonic-gate struct chip *cpu_chip; /* cpu's chip data */ 990Sstevel@tonic-gate int cpu_rechoose; /* cpu's rechoose_interval */ 1000Sstevel@tonic-gate int cpu_cache_offset; /* see kmem.c for details */ 1010Sstevel@tonic-gate 1020Sstevel@tonic-gate /* 1030Sstevel@tonic-gate * Links to other CPUs. It is safe to walk these lists if 1040Sstevel@tonic-gate * one of the following is true: 1050Sstevel@tonic-gate * - cpu_lock held 1060Sstevel@tonic-gate * - preemption disabled via kpreempt_disable 1070Sstevel@tonic-gate * - PIL >= DISP_LEVEL 1080Sstevel@tonic-gate * - acting thread is an interrupt thread 1090Sstevel@tonic-gate * - all other CPUs are paused 1100Sstevel@tonic-gate */ 1110Sstevel@tonic-gate struct cpu *cpu_next; /* next existing CPU */ 1120Sstevel@tonic-gate struct cpu *cpu_prev; /* prev existing CPU */ 1130Sstevel@tonic-gate struct cpu *cpu_next_onln; /* next online (enabled) CPU */ 1140Sstevel@tonic-gate struct cpu *cpu_prev_onln; /* prev online (enabled) CPU */ 1150Sstevel@tonic-gate struct cpu *cpu_next_part; /* next CPU in partition */ 1160Sstevel@tonic-gate struct cpu *cpu_prev_part; /* prev CPU in partition */ 1170Sstevel@tonic-gate struct cpu *cpu_next_lgrp; /* next CPU in latency group */ 1180Sstevel@tonic-gate struct cpu *cpu_prev_lgrp; /* prev CPU in latency group */ 1190Sstevel@tonic-gate struct cpu *cpu_next_chip; /* next CPU on chip */ 1200Sstevel@tonic-gate struct cpu *cpu_prev_chip; /* prev CPU on chip */ 1210Sstevel@tonic-gate struct cpu *cpu_next_lpl; /* next CPU in lgrp partition */ 1220Sstevel@tonic-gate struct cpu *cpu_prev_lpl; 1230Sstevel@tonic-gate void *cpu_reserved[4]; /* reserved for future use */ 1240Sstevel@tonic-gate 1250Sstevel@tonic-gate /* 1260Sstevel@tonic-gate * Scheduling variables. 1270Sstevel@tonic-gate */ 1280Sstevel@tonic-gate disp_t *cpu_disp; /* dispatch queue data */ 1290Sstevel@tonic-gate /* 1300Sstevel@tonic-gate * Note that cpu_disp is set before the CPU is added to the system 1310Sstevel@tonic-gate * and is never modified. Hence, no additional locking is needed 1320Sstevel@tonic-gate * beyond what's necessary to access the cpu_t structure. 1330Sstevel@tonic-gate */ 1340Sstevel@tonic-gate char cpu_runrun; /* scheduling flag - set to preempt */ 1350Sstevel@tonic-gate char cpu_kprunrun; /* force kernel preemption */ 1360Sstevel@tonic-gate pri_t cpu_chosen_level; /* priority at which cpu */ 1370Sstevel@tonic-gate /* was chosen for scheduling */ 1380Sstevel@tonic-gate kthread_t *cpu_dispthread; /* thread selected for dispatch */ 1390Sstevel@tonic-gate disp_lock_t cpu_thread_lock; /* dispatcher lock on current thread */ 1400Sstevel@tonic-gate uint8_t cpu_disp_flags; /* flags used by dispatcher */ 1410Sstevel@tonic-gate /* 1420Sstevel@tonic-gate * The following field is updated when ever the cpu_dispthread 1430Sstevel@tonic-gate * changes. Also in places, where the current thread(cpu_dispthread) 1440Sstevel@tonic-gate * priority changes. This is used in disp_lowpri_cpu() 1450Sstevel@tonic-gate */ 1460Sstevel@tonic-gate pri_t cpu_dispatch_pri; /* priority of cpu_dispthread */ 1470Sstevel@tonic-gate clock_t cpu_last_swtch; /* last time switched to new thread */ 1480Sstevel@tonic-gate 1490Sstevel@tonic-gate /* 1500Sstevel@tonic-gate * Interrupt data. 1510Sstevel@tonic-gate */ 1520Sstevel@tonic-gate caddr_t cpu_intr_stack; /* interrupt stack */ 1530Sstevel@tonic-gate kthread_t *cpu_intr_thread; /* interrupt thread list */ 1540Sstevel@tonic-gate uint_t cpu_intr_actv; /* interrupt levels active (bitmask) */ 1550Sstevel@tonic-gate int cpu_base_spl; /* priority for highest rupt active */ 1560Sstevel@tonic-gate 1570Sstevel@tonic-gate /* 1580Sstevel@tonic-gate * Statistics. 1590Sstevel@tonic-gate */ 1600Sstevel@tonic-gate cpu_stats_t cpu_stats; /* per-CPU statistics */ 1610Sstevel@tonic-gate struct kstat *cpu_info_kstat; /* kstat for cpu info */ 1620Sstevel@tonic-gate 1630Sstevel@tonic-gate uintptr_t cpu_profile_pc; /* kernel PC in profile interrupt */ 1640Sstevel@tonic-gate uintptr_t cpu_profile_upc; /* user PC in profile interrupt */ 1650Sstevel@tonic-gate uintptr_t cpu_profile_pil; /* PIL when profile interrupted */ 1660Sstevel@tonic-gate 1670Sstevel@tonic-gate ftrace_data_t cpu_ftrace; /* per cpu ftrace data */ 1680Sstevel@tonic-gate 1690Sstevel@tonic-gate clock_t cpu_deadman_lbolt; /* used by deadman() */ 1700Sstevel@tonic-gate uint_t cpu_deadman_countdown; /* used by deadman() */ 1710Sstevel@tonic-gate 1720Sstevel@tonic-gate kmutex_t cpu_cpc_ctxlock; /* protects context for idle thread */ 1730Sstevel@tonic-gate kcpc_ctx_t *cpu_cpc_ctx; /* performance counter context */ 1740Sstevel@tonic-gate 1750Sstevel@tonic-gate /* 1760Sstevel@tonic-gate * Configuration information for the processor_info system call. 1770Sstevel@tonic-gate */ 1780Sstevel@tonic-gate processor_info_t cpu_type_info; /* config info */ 1790Sstevel@tonic-gate time_t cpu_state_begin; /* when CPU entered current state */ 1800Sstevel@tonic-gate char cpu_cpr_flags; /* CPR related info */ 1810Sstevel@tonic-gate struct cyc_cpu *cpu_cyclic; /* per cpu cyclic subsystem data */ 1820Sstevel@tonic-gate struct squeue_set_s *cpu_squeue_set; /* per cpu squeue set */ 1830Sstevel@tonic-gate struct nvlist *cpu_props; /* pool-related properties */ 1840Sstevel@tonic-gate 1850Sstevel@tonic-gate krwlock_t cpu_ft_lock; /* DTrace: fasttrap lock */ 1860Sstevel@tonic-gate uintptr_t cpu_dtrace_caller; /* DTrace: caller, if any */ 1870Sstevel@tonic-gate hrtime_t cpu_dtrace_chillmark; /* DTrace: chill mark time */ 1880Sstevel@tonic-gate hrtime_t cpu_dtrace_chilled; /* DTrace: total chill time */ 1891058Sesolom volatile uint16_t cpu_mstate; /* cpu microstate */ 1901058Sesolom volatile uint16_t cpu_mstate_gen; /* generation counter */ 1911058Sesolom volatile hrtime_t cpu_mstate_start; /* cpu microstate start time */ 1921058Sesolom volatile hrtime_t cpu_acct[NCMSTATES]; /* cpu microstate data */ 193590Sesolom hrtime_t cpu_intracct[NCMSTATES]; /* interrupt mstate data */ 1940Sstevel@tonic-gate hrtime_t cpu_waitrq; /* cpu run-queue wait time */ 1950Sstevel@tonic-gate struct loadavg_s cpu_loadavg; /* loadavg info for this cpu */ 1960Sstevel@tonic-gate 1970Sstevel@tonic-gate char *cpu_idstr; /* for printing and debugging */ 1980Sstevel@tonic-gate char *cpu_brandstr; /* for printing */ 1990Sstevel@tonic-gate 2000Sstevel@tonic-gate /* 2010Sstevel@tonic-gate * Sum of all device interrupt weights that are currently directed at 2020Sstevel@tonic-gate * this cpu. Cleared at start of interrupt redistribution. 2030Sstevel@tonic-gate */ 2040Sstevel@tonic-gate int32_t cpu_intr_weight; 205414Skchow void *cpu_vm_data; 2060Sstevel@tonic-gate 2070Sstevel@tonic-gate #if (defined(_KERNEL) || defined(_KMEMUSER)) && defined(_MACHDEP) 2080Sstevel@tonic-gate /* 2090Sstevel@tonic-gate * XXX - needs to be fixed. Structure size should not change. 2100Sstevel@tonic-gate * probably needs to be a pointer to an opaque structure. 2110Sstevel@tonic-gate * XXX - this is OK as long as cpu structs aren't in an array. 2120Sstevel@tonic-gate * A user program will either read the first part, 2130Sstevel@tonic-gate * which is machine-independent, or read the whole thing. 2140Sstevel@tonic-gate */ 2150Sstevel@tonic-gate struct machcpu cpu_m; /* per architecture info */ 2160Sstevel@tonic-gate #endif 2170Sstevel@tonic-gate } cpu_t; 2180Sstevel@tonic-gate 2190Sstevel@tonic-gate /* 2200Sstevel@tonic-gate * The cpu_core structure consists of per-CPU state available in any context. 2210Sstevel@tonic-gate * On some architectures, this may mean that the page(s) containing the 2220Sstevel@tonic-gate * NCPU-sized array of cpu_core structures must be locked in the TLB -- it 2230Sstevel@tonic-gate * is up to the platform to assure that this is performed properly. Note that 2240Sstevel@tonic-gate * the structure is sized to avoid false sharing. 2250Sstevel@tonic-gate */ 2260Sstevel@tonic-gate #define CPUC_SIZE (sizeof (uint16_t) + sizeof (uintptr_t) + \ 2270Sstevel@tonic-gate sizeof (kmutex_t)) 2280Sstevel@tonic-gate #define CPUC_PADSIZE CPU_CACHE_COHERENCE_SIZE - CPUC_SIZE 2290Sstevel@tonic-gate 2300Sstevel@tonic-gate typedef struct cpu_core { 2310Sstevel@tonic-gate uint16_t cpuc_dtrace_flags; /* DTrace flags */ 2320Sstevel@tonic-gate uint8_t cpuc_pad[CPUC_PADSIZE]; /* padding */ 2330Sstevel@tonic-gate uintptr_t cpuc_dtrace_illval; /* DTrace illegal value */ 2340Sstevel@tonic-gate kmutex_t cpuc_pid_lock; /* DTrace pid provider lock */ 2350Sstevel@tonic-gate } cpu_core_t; 2360Sstevel@tonic-gate 2370Sstevel@tonic-gate #ifdef _KERNEL 2380Sstevel@tonic-gate extern cpu_core_t cpu_core[]; 2390Sstevel@tonic-gate #endif /* _KERNEL */ 2400Sstevel@tonic-gate 2410Sstevel@tonic-gate /* 2420Sstevel@tonic-gate * CPU_ON_INTR() macro. Returns non-zero if currently on interrupt stack. 2430Sstevel@tonic-gate * Note that this isn't a test for a high PIL. For example, cpu_intr_actv 2440Sstevel@tonic-gate * does not get updated when we go through sys_trap from TL>0 at high PIL. 2450Sstevel@tonic-gate * getpil() should be used instead to check for PIL levels. 2460Sstevel@tonic-gate */ 2470Sstevel@tonic-gate #define CPU_ON_INTR(cpup) ((cpup)->cpu_intr_actv >> (LOCK_LEVEL + 1)) 2480Sstevel@tonic-gate 2490Sstevel@tonic-gate #if defined(_KERNEL) || defined(_KMEMUSER) 2500Sstevel@tonic-gate 2510Sstevel@tonic-gate #define INTR_STACK_SIZE MAX(DEFAULTSTKSZ, PAGESIZE) 2520Sstevel@tonic-gate 2530Sstevel@tonic-gate /* MEMBERS PROTECTED BY "atomicity": cpu_flags */ 2540Sstevel@tonic-gate 2550Sstevel@tonic-gate /* 2560Sstevel@tonic-gate * Flags in the CPU structure. 2570Sstevel@tonic-gate * 2580Sstevel@tonic-gate * These are protected by cpu_lock (except during creation). 2590Sstevel@tonic-gate * 2600Sstevel@tonic-gate * Offlined-CPUs have three stages of being offline: 2610Sstevel@tonic-gate * 2620Sstevel@tonic-gate * CPU_ENABLE indicates that the CPU is participating in I/O interrupts 2630Sstevel@tonic-gate * that can be directed at a number of different CPUs. If CPU_ENABLE 2640Sstevel@tonic-gate * is off, the CPU will not be given interrupts that can be sent elsewhere, 2650Sstevel@tonic-gate * but will still get interrupts from devices associated with that CPU only, 2660Sstevel@tonic-gate * and from other CPUs. 2670Sstevel@tonic-gate * 2680Sstevel@tonic-gate * CPU_OFFLINE indicates that the dispatcher should not allow any threads 2690Sstevel@tonic-gate * other than interrupt threads to run on that CPU. A CPU will not have 2700Sstevel@tonic-gate * CPU_OFFLINE set if there are any bound threads (besides interrupts). 2710Sstevel@tonic-gate * 2720Sstevel@tonic-gate * CPU_QUIESCED is set if p_offline was able to completely turn idle the 2730Sstevel@tonic-gate * CPU and it will not have to run interrupt threads. In this case it'll 2740Sstevel@tonic-gate * stay in the idle loop until CPU_QUIESCED is turned off. 2750Sstevel@tonic-gate * 2760Sstevel@tonic-gate * CPU_FROZEN is used only by CPR to mark CPUs that have been successfully 2770Sstevel@tonic-gate * suspended (in the suspend path), or have yet to be resumed (in the resume 2780Sstevel@tonic-gate * case). 2790Sstevel@tonic-gate * 2800Sstevel@tonic-gate * On some platforms CPUs can be individually powered off. 2810Sstevel@tonic-gate * The following flags are set for powered off CPUs: CPU_QUIESCED, 2820Sstevel@tonic-gate * CPU_OFFLINE, and CPU_POWEROFF. The following flags are cleared: 2830Sstevel@tonic-gate * CPU_RUNNING, CPU_READY, CPU_EXISTS, and CPU_ENABLE. 2840Sstevel@tonic-gate */ 2850Sstevel@tonic-gate #define CPU_RUNNING 0x001 /* CPU running */ 2860Sstevel@tonic-gate #define CPU_READY 0x002 /* CPU ready for cross-calls */ 2870Sstevel@tonic-gate #define CPU_QUIESCED 0x004 /* CPU will stay in idle */ 2880Sstevel@tonic-gate #define CPU_EXISTS 0x008 /* CPU is configured */ 2890Sstevel@tonic-gate #define CPU_ENABLE 0x010 /* CPU enabled for interrupts */ 2900Sstevel@tonic-gate #define CPU_OFFLINE 0x020 /* CPU offline via p_online */ 2910Sstevel@tonic-gate #define CPU_POWEROFF 0x040 /* CPU is powered off */ 2920Sstevel@tonic-gate #define CPU_FROZEN 0x080 /* CPU is frozen via CPR suspend */ 2930Sstevel@tonic-gate #define CPU_SPARE 0x100 /* CPU offline available for use */ 2940Sstevel@tonic-gate #define CPU_FAULTED 0x200 /* CPU offline diagnosed faulty */ 2950Sstevel@tonic-gate 2960Sstevel@tonic-gate #define CPU_ACTIVE(cpu) (((cpu)->cpu_flags & CPU_OFFLINE) == 0) 2970Sstevel@tonic-gate 2980Sstevel@tonic-gate /* 2990Sstevel@tonic-gate * Flags for cpu_offline(), cpu_faulted(), and cpu_spare(). 3000Sstevel@tonic-gate */ 3010Sstevel@tonic-gate #define CPU_FORCED 0x0001 /* Force CPU offline */ 3020Sstevel@tonic-gate 3030Sstevel@tonic-gate /* 3040Sstevel@tonic-gate * DTrace flags. 3050Sstevel@tonic-gate */ 3060Sstevel@tonic-gate #define CPU_DTRACE_NOFAULT 0x0001 /* Don't fault */ 3070Sstevel@tonic-gate #define CPU_DTRACE_DROP 0x0002 /* Drop this ECB */ 3080Sstevel@tonic-gate #define CPU_DTRACE_BADADDR 0x0004 /* DTrace fault: bad address */ 3090Sstevel@tonic-gate #define CPU_DTRACE_BADALIGN 0x0008 /* DTrace fault: bad alignment */ 3100Sstevel@tonic-gate #define CPU_DTRACE_DIVZERO 0x0010 /* DTrace fault: divide by zero */ 3110Sstevel@tonic-gate #define CPU_DTRACE_ILLOP 0x0020 /* DTrace fault: illegal operation */ 3120Sstevel@tonic-gate #define CPU_DTRACE_NOSCRATCH 0x0040 /* DTrace fault: out of scratch */ 3130Sstevel@tonic-gate #define CPU_DTRACE_KPRIV 0x0080 /* DTrace fault: bad kernel access */ 3140Sstevel@tonic-gate #define CPU_DTRACE_UPRIV 0x0100 /* DTrace fault: bad user access */ 3150Sstevel@tonic-gate #define CPU_DTRACE_TUPOFLOW 0x0200 /* DTrace fault: tuple stack overflow */ 3160Sstevel@tonic-gate #if defined(__sparc) 3170Sstevel@tonic-gate #define CPU_DTRACE_FAKERESTORE 0x0400 /* pid provider hint to getreg */ 3180Sstevel@tonic-gate #endif 3190Sstevel@tonic-gate #define CPU_DTRACE_ENTRY 0x0800 /* pid provider hint to ustack() */ 3200Sstevel@tonic-gate 3210Sstevel@tonic-gate #define CPU_DTRACE_FAULT (CPU_DTRACE_BADADDR | CPU_DTRACE_BADALIGN | \ 3220Sstevel@tonic-gate CPU_DTRACE_DIVZERO | CPU_DTRACE_ILLOP | \ 3230Sstevel@tonic-gate CPU_DTRACE_NOSCRATCH | CPU_DTRACE_KPRIV | \ 3240Sstevel@tonic-gate CPU_DTRACE_UPRIV | CPU_DTRACE_TUPOFLOW) 3250Sstevel@tonic-gate #define CPU_DTRACE_ERROR (CPU_DTRACE_FAULT | CPU_DTRACE_DROP) 3260Sstevel@tonic-gate 3270Sstevel@tonic-gate /* 3280Sstevel@tonic-gate * Dispatcher flags 3290Sstevel@tonic-gate * These flags must be changed only by the current CPU. 3300Sstevel@tonic-gate */ 3310Sstevel@tonic-gate #define CPU_DISP_DONTSTEAL 0x01 /* CPU undergoing context swtch */ 3320Sstevel@tonic-gate #define CPU_DISP_HALTED 0x02 /* CPU halted waiting for interrupt */ 3330Sstevel@tonic-gate 3340Sstevel@tonic-gate 3350Sstevel@tonic-gate #endif /* _KERNEL || _KMEMUSER */ 3360Sstevel@tonic-gate 3370Sstevel@tonic-gate #if (defined(_KERNEL) || defined(_KMEMUSER)) && defined(_MACHDEP) 3380Sstevel@tonic-gate 3390Sstevel@tonic-gate /* 3400Sstevel@tonic-gate * Macros for manipulating sets of CPUs as a bitmap. Note that this 3410Sstevel@tonic-gate * bitmap may vary in size depending on the maximum CPU id a specific 3420Sstevel@tonic-gate * platform supports. This may be different than the number of CPUs 3430Sstevel@tonic-gate * the platform supports, since CPU ids can be sparse. We define two 3440Sstevel@tonic-gate * sets of macros; one for platforms where the maximum CPU id is less 3450Sstevel@tonic-gate * than the number of bits in a single word (32 in a 32-bit kernel, 3460Sstevel@tonic-gate * 64 in a 64-bit kernel), and one for platforms that require bitmaps 3470Sstevel@tonic-gate * of more than one word. 3480Sstevel@tonic-gate */ 3490Sstevel@tonic-gate 3500Sstevel@tonic-gate #define CPUSET_WORDS BT_BITOUL(NCPU) 3510Sstevel@tonic-gate #define CPUSET_NOTINSET ((uint_t)-1) 3520Sstevel@tonic-gate 3530Sstevel@tonic-gate #if CPUSET_WORDS > 1 3540Sstevel@tonic-gate 3550Sstevel@tonic-gate typedef struct cpuset { 3560Sstevel@tonic-gate ulong_t cpub[CPUSET_WORDS]; 3570Sstevel@tonic-gate } cpuset_t; 3580Sstevel@tonic-gate 3590Sstevel@tonic-gate /* 3600Sstevel@tonic-gate * Private functions for manipulating cpusets that do not fit in a 3610Sstevel@tonic-gate * single word. These should not be used directly; instead the 3620Sstevel@tonic-gate * CPUSET_* macros should be used so the code will be portable 3630Sstevel@tonic-gate * across different definitions of NCPU. 3640Sstevel@tonic-gate */ 3650Sstevel@tonic-gate extern void cpuset_all(cpuset_t *); 3660Sstevel@tonic-gate extern void cpuset_all_but(cpuset_t *, uint_t); 3670Sstevel@tonic-gate extern int cpuset_isnull(cpuset_t *); 3680Sstevel@tonic-gate extern int cpuset_cmp(cpuset_t *, cpuset_t *); 3690Sstevel@tonic-gate extern void cpuset_only(cpuset_t *, uint_t); 3700Sstevel@tonic-gate extern uint_t cpuset_find(cpuset_t *); 3710Sstevel@tonic-gate 3720Sstevel@tonic-gate #define CPUSET_ALL(set) cpuset_all(&(set)) 3730Sstevel@tonic-gate #define CPUSET_ALL_BUT(set, cpu) cpuset_all_but(&(set), cpu) 3740Sstevel@tonic-gate #define CPUSET_ONLY(set, cpu) cpuset_only(&(set), cpu) 3750Sstevel@tonic-gate #define CPU_IN_SET(set, cpu) BT_TEST((set).cpub, cpu) 3760Sstevel@tonic-gate #define CPUSET_ADD(set, cpu) BT_SET((set).cpub, cpu) 3770Sstevel@tonic-gate #define CPUSET_DEL(set, cpu) BT_CLEAR((set).cpub, cpu) 3780Sstevel@tonic-gate #define CPUSET_ISNULL(set) cpuset_isnull(&(set)) 3790Sstevel@tonic-gate #define CPUSET_ISEQUAL(set1, set2) cpuset_cmp(&(set1), &(set2)) 3800Sstevel@tonic-gate 3810Sstevel@tonic-gate /* 3820Sstevel@tonic-gate * Find one CPU in the cpuset. 3830Sstevel@tonic-gate * Sets "cpu" to the id of the found CPU, or CPUSET_NOTINSET if no cpu 3840Sstevel@tonic-gate * could be found. (i.e. empty set) 3850Sstevel@tonic-gate */ 3860Sstevel@tonic-gate #define CPUSET_FIND(set, cpu) { \ 3870Sstevel@tonic-gate cpu = cpuset_find(&(set)); \ 3880Sstevel@tonic-gate } 3890Sstevel@tonic-gate 3900Sstevel@tonic-gate /* 3910Sstevel@tonic-gate * Atomic cpuset operations 3920Sstevel@tonic-gate * These are safe to use for concurrent cpuset manipulations. 3930Sstevel@tonic-gate * "xdel" and "xadd" are exclusive operations, that set "result" to "0" 3940Sstevel@tonic-gate * if the add or del was successful, or "-1" if not successful. 3950Sstevel@tonic-gate * (e.g. attempting to add a cpu to a cpuset that's already there, or 3960Sstevel@tonic-gate * deleting a cpu that's not in the cpuset) 3970Sstevel@tonic-gate */ 3980Sstevel@tonic-gate 3990Sstevel@tonic-gate #define CPUSET_ATOMIC_DEL(set, cpu) BT_ATOMIC_CLEAR((set).cpub, (cpu)) 4000Sstevel@tonic-gate #define CPUSET_ATOMIC_ADD(set, cpu) BT_ATOMIC_SET((set).cpub, (cpu)) 4010Sstevel@tonic-gate 4020Sstevel@tonic-gate #define CPUSET_ATOMIC_XADD(set, cpu, result) \ 4030Sstevel@tonic-gate BT_ATOMIC_SET_EXCL((set).cpub, cpu, result) 4040Sstevel@tonic-gate 4050Sstevel@tonic-gate #define CPUSET_ATOMIC_XDEL(set, cpu, result) \ 4060Sstevel@tonic-gate BT_ATOMIC_CLEAR_EXCL((set).cpub, cpu, result) 4070Sstevel@tonic-gate 4080Sstevel@tonic-gate 4090Sstevel@tonic-gate #define CPUSET_OR(set1, set2) { \ 4100Sstevel@tonic-gate int _i; \ 4110Sstevel@tonic-gate for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4120Sstevel@tonic-gate (set1).cpub[_i] |= (set2).cpub[_i]; \ 4130Sstevel@tonic-gate } 4140Sstevel@tonic-gate 4150Sstevel@tonic-gate #define CPUSET_AND(set1, set2) { \ 4160Sstevel@tonic-gate int _i; \ 4170Sstevel@tonic-gate for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4180Sstevel@tonic-gate (set1).cpub[_i] &= (set2).cpub[_i]; \ 4190Sstevel@tonic-gate } 4200Sstevel@tonic-gate 4210Sstevel@tonic-gate #define CPUSET_ZERO(set) { \ 4220Sstevel@tonic-gate int _i; \ 4230Sstevel@tonic-gate for (_i = 0; _i < CPUSET_WORDS; _i++) \ 4240Sstevel@tonic-gate (set).cpub[_i] = 0; \ 4250Sstevel@tonic-gate } 4260Sstevel@tonic-gate 4270Sstevel@tonic-gate #elif CPUSET_WORDS == 1 4280Sstevel@tonic-gate 4290Sstevel@tonic-gate typedef ulong_t cpuset_t; /* a set of CPUs */ 4300Sstevel@tonic-gate 4310Sstevel@tonic-gate #define CPUSET(cpu) (1UL << (cpu)) 4320Sstevel@tonic-gate 4330Sstevel@tonic-gate #define CPUSET_ALL(set) ((void)((set) = ~0UL)) 4340Sstevel@tonic-gate #define CPUSET_ALL_BUT(set, cpu) ((void)((set) = ~CPUSET(cpu))) 4350Sstevel@tonic-gate #define CPUSET_ONLY(set, cpu) ((void)((set) = CPUSET(cpu))) 4360Sstevel@tonic-gate #define CPU_IN_SET(set, cpu) ((set) & CPUSET(cpu)) 4370Sstevel@tonic-gate #define CPUSET_ADD(set, cpu) ((void)((set) |= CPUSET(cpu))) 4380Sstevel@tonic-gate #define CPUSET_DEL(set, cpu) ((void)((set) &= ~CPUSET(cpu))) 4390Sstevel@tonic-gate #define CPUSET_ISNULL(set) ((set) == 0) 4400Sstevel@tonic-gate #define CPUSET_ISEQUAL(set1, set2) ((set1) == (set2)) 4410Sstevel@tonic-gate #define CPUSET_OR(set1, set2) ((void)((set1) |= (set2))) 4420Sstevel@tonic-gate #define CPUSET_AND(set1, set2) ((void)((set1) &= (set2))) 4430Sstevel@tonic-gate #define CPUSET_ZERO(set) ((void)((set) = 0)) 4440Sstevel@tonic-gate 4450Sstevel@tonic-gate #define CPUSET_FIND(set, cpu) { \ 4460Sstevel@tonic-gate cpu = (uint_t)(lowbit(set) - 1); \ 4470Sstevel@tonic-gate } 4480Sstevel@tonic-gate 4490Sstevel@tonic-gate #define CPUSET_ATOMIC_DEL(set, cpu) atomic_and_long(&(set), ~CPUSET(cpu)) 4500Sstevel@tonic-gate #define CPUSET_ATOMIC_ADD(set, cpu) atomic_or_long(&(set), CPUSET(cpu)) 4510Sstevel@tonic-gate 4520Sstevel@tonic-gate #define CPUSET_ATOMIC_XADD(set, cpu, result) \ 4530Sstevel@tonic-gate { result = atomic_set_long_excl(&(set), (cpu)); } 4540Sstevel@tonic-gate 4550Sstevel@tonic-gate #define CPUSET_ATOMIC_XDEL(set, cpu, result) \ 4560Sstevel@tonic-gate { result = atomic_clear_long_excl(&(set), (cpu)); } 4570Sstevel@tonic-gate 4580Sstevel@tonic-gate #else /* CPUSET_WORDS <= 0 */ 4590Sstevel@tonic-gate 4600Sstevel@tonic-gate #error NCPU is undefined or invalid 4610Sstevel@tonic-gate 4620Sstevel@tonic-gate #endif /* CPUSET_WORDS */ 4630Sstevel@tonic-gate 4640Sstevel@tonic-gate extern cpuset_t cpu_seqid_inuse; 4650Sstevel@tonic-gate 4660Sstevel@tonic-gate #endif /* (_KERNEL || _KMEMUSER) && _MACHDEP */ 4670Sstevel@tonic-gate 4680Sstevel@tonic-gate #define CPU_CPR_OFFLINE 0x0 4690Sstevel@tonic-gate #define CPU_CPR_ONLINE 0x1 4700Sstevel@tonic-gate #define CPU_CPR_IS_OFFLINE(cpu) (((cpu)->cpu_cpr_flags & CPU_CPR_ONLINE) == 0) 4710Sstevel@tonic-gate #define CPU_SET_CPR_FLAGS(cpu, flag) ((cpu)->cpu_cpr_flags |= flag) 4720Sstevel@tonic-gate 4730Sstevel@tonic-gate #if defined(_KERNEL) || defined(_KMEMUSER) 4740Sstevel@tonic-gate 4750Sstevel@tonic-gate extern struct cpu *cpu[]; /* indexed by CPU number */ 4760Sstevel@tonic-gate extern cpu_t *cpu_list; /* list of CPUs */ 4770Sstevel@tonic-gate extern int ncpus; /* number of CPUs present */ 4780Sstevel@tonic-gate extern int ncpus_online; /* number of CPUs not quiesced */ 4790Sstevel@tonic-gate extern int max_ncpus; /* max present before ncpus is known */ 4800Sstevel@tonic-gate extern int boot_max_ncpus; /* like max_ncpus but for real */ 4810Sstevel@tonic-gate extern processorid_t max_cpuid; /* maximum CPU number */ 4820Sstevel@tonic-gate extern struct cpu *cpu_inmotion; /* offline or partition move target */ 4830Sstevel@tonic-gate 4840Sstevel@tonic-gate #if defined(__i386) || defined(__amd64) 4850Sstevel@tonic-gate extern struct cpu *curcpup(void); 4860Sstevel@tonic-gate #define CPU (curcpup()) /* Pointer to current CPU */ 4870Sstevel@tonic-gate #else 4880Sstevel@tonic-gate #define CPU (curthread->t_cpu) /* Pointer to current CPU */ 4890Sstevel@tonic-gate #endif 4900Sstevel@tonic-gate 4910Sstevel@tonic-gate /* 4920Sstevel@tonic-gate * CPU_CURRENT indicates to thread_affinity_set to use CPU->cpu_id 4930Sstevel@tonic-gate * as the target and to grab cpu_lock instead of requiring the caller 4940Sstevel@tonic-gate * to grab it. 4950Sstevel@tonic-gate */ 4960Sstevel@tonic-gate #define CPU_CURRENT -3 4970Sstevel@tonic-gate 4980Sstevel@tonic-gate /* 4990Sstevel@tonic-gate * Per-CPU statistics 5000Sstevel@tonic-gate * 5010Sstevel@tonic-gate * cpu_stats_t contains numerous system and VM-related statistics, in the form 5020Sstevel@tonic-gate * of gauges or monotonically-increasing event occurrence counts. 5030Sstevel@tonic-gate */ 5040Sstevel@tonic-gate 5050Sstevel@tonic-gate #define CPU_STATS_ENTER_K() kpreempt_disable() 5060Sstevel@tonic-gate #define CPU_STATS_EXIT_K() kpreempt_enable() 5070Sstevel@tonic-gate 5080Sstevel@tonic-gate #define CPU_STATS_ADD_K(class, stat, amount) \ 5090Sstevel@tonic-gate { kpreempt_disable(); /* keep from switching CPUs */\ 5100Sstevel@tonic-gate CPU_STATS_ADDQ(CPU, class, stat, amount); \ 5110Sstevel@tonic-gate kpreempt_enable(); \ 5120Sstevel@tonic-gate } 5130Sstevel@tonic-gate 5140Sstevel@tonic-gate #define CPU_STATS_ADDQ(cp, class, stat, amount) { \ 5150Sstevel@tonic-gate extern void __dtrace_probe___cpu_##class##info_##stat(uint_t, \ 5160Sstevel@tonic-gate uint64_t *, cpu_t *); \ 5170Sstevel@tonic-gate uint64_t *stataddr = &((cp)->cpu_stats.class.stat); \ 5180Sstevel@tonic-gate __dtrace_probe___cpu_##class##info_##stat((amount), \ 5190Sstevel@tonic-gate stataddr, cp); \ 5200Sstevel@tonic-gate *(stataddr) += (amount); \ 5210Sstevel@tonic-gate } 5220Sstevel@tonic-gate 5230Sstevel@tonic-gate #define CPU_STATS(cp, stat) \ 5240Sstevel@tonic-gate ((cp)->cpu_stats.stat) 5250Sstevel@tonic-gate 5260Sstevel@tonic-gate #endif /* _KERNEL || _KMEMUSER */ 5270Sstevel@tonic-gate 5280Sstevel@tonic-gate /* 5290Sstevel@tonic-gate * CPU support routines. 5300Sstevel@tonic-gate */ 5310Sstevel@tonic-gate #if defined(_KERNEL) && defined(__STDC__) /* not for genassym.c */ 5320Sstevel@tonic-gate 5330Sstevel@tonic-gate struct zone; 5340Sstevel@tonic-gate 5350Sstevel@tonic-gate void cpu_list_init(cpu_t *); 5360Sstevel@tonic-gate void cpu_add_unit(cpu_t *); 5370Sstevel@tonic-gate void cpu_del_unit(int cpuid); 5380Sstevel@tonic-gate void cpu_add_active(cpu_t *); 5390Sstevel@tonic-gate void cpu_kstat_init(cpu_t *); 5400Sstevel@tonic-gate void cpu_visibility_add(cpu_t *, struct zone *); 5410Sstevel@tonic-gate void cpu_visibility_remove(cpu_t *, struct zone *); 5420Sstevel@tonic-gate void cpu_visibility_configure(cpu_t *, struct zone *); 5430Sstevel@tonic-gate void cpu_visibility_unconfigure(cpu_t *, struct zone *); 5440Sstevel@tonic-gate void cpu_visibility_online(cpu_t *, struct zone *); 5450Sstevel@tonic-gate void cpu_visibility_offline(cpu_t *, struct zone *); 5460Sstevel@tonic-gate void cpu_create_intrstat(cpu_t *); 5470Sstevel@tonic-gate void cpu_delete_intrstat(cpu_t *); 5480Sstevel@tonic-gate int cpu_kstat_intrstat_update(kstat_t *, int); 5490Sstevel@tonic-gate void cpu_intr_swtch_enter(kthread_t *); 5500Sstevel@tonic-gate void cpu_intr_swtch_exit(kthread_t *); 5510Sstevel@tonic-gate 5520Sstevel@tonic-gate void mbox_lock_init(void); /* initialize cross-call locks */ 5530Sstevel@tonic-gate void mbox_init(int cpun); /* initialize cross-calls */ 5540Sstevel@tonic-gate void poke_cpu(int cpun); /* interrupt another CPU (to preempt) */ 5550Sstevel@tonic-gate 5560Sstevel@tonic-gate void pause_cpus(cpu_t *off_cp); 5570Sstevel@tonic-gate void start_cpus(void); 5580Sstevel@tonic-gate int cpus_paused(void); 5590Sstevel@tonic-gate 5600Sstevel@tonic-gate void cpu_pause_init(void); 5610Sstevel@tonic-gate cpu_t *cpu_get(processorid_t cpun); /* get the CPU struct associated */ 5620Sstevel@tonic-gate 5630Sstevel@tonic-gate int cpu_online(cpu_t *cp); /* take cpu online */ 5640Sstevel@tonic-gate int cpu_offline(cpu_t *cp, int flags); /* take cpu offline */ 5650Sstevel@tonic-gate int cpu_spare(cpu_t *cp, int flags); /* take cpu to spare */ 5660Sstevel@tonic-gate int cpu_faulted(cpu_t *cp, int flags); /* take cpu to faulted */ 5670Sstevel@tonic-gate int cpu_poweron(cpu_t *cp); /* take powered-off cpu to offline */ 5680Sstevel@tonic-gate int cpu_poweroff(cpu_t *cp); /* take offline cpu to powered-off */ 5690Sstevel@tonic-gate 5700Sstevel@tonic-gate cpu_t *cpu_intr_next(cpu_t *cp); /* get next online CPU taking intrs */ 5710Sstevel@tonic-gate int cpu_intr_count(cpu_t *cp); /* count # of CPUs handling intrs */ 5720Sstevel@tonic-gate int cpu_intr_on(cpu_t *cp); /* CPU taking I/O interrupts? */ 5730Sstevel@tonic-gate void cpu_intr_enable(cpu_t *cp); /* enable I/O interrupts */ 5740Sstevel@tonic-gate int cpu_intr_disable(cpu_t *cp); /* disable I/O interrupts */ 575*1455Sandrei void cpu_intr_alloc(cpu_t *cp, int n); /* allocate interrupt threads */ 5760Sstevel@tonic-gate 5770Sstevel@tonic-gate /* 5780Sstevel@tonic-gate * Routines for checking CPU states. 5790Sstevel@tonic-gate */ 5800Sstevel@tonic-gate int cpu_is_online(cpu_t *); /* check if CPU is online */ 5810Sstevel@tonic-gate int cpu_is_nointr(cpu_t *); /* check if CPU can service intrs */ 5820Sstevel@tonic-gate int cpu_is_active(cpu_t *); /* check if CPU can run threads */ 5830Sstevel@tonic-gate int cpu_is_offline(cpu_t *); /* check if CPU is offline */ 5840Sstevel@tonic-gate int cpu_is_poweredoff(cpu_t *); /* check if CPU is powered off */ 5850Sstevel@tonic-gate 5860Sstevel@tonic-gate int cpu_flagged_online(cpu_flag_t); /* flags show CPU is online */ 5870Sstevel@tonic-gate int cpu_flagged_nointr(cpu_flag_t); /* flags show CPU not handling intrs */ 5880Sstevel@tonic-gate int cpu_flagged_active(cpu_flag_t); /* flags show CPU scheduling threads */ 5890Sstevel@tonic-gate int cpu_flagged_offline(cpu_flag_t); /* flags show CPU is offline */ 5900Sstevel@tonic-gate int cpu_flagged_poweredoff(cpu_flag_t); /* flags show CPU is powered off */ 5910Sstevel@tonic-gate 5920Sstevel@tonic-gate /* 5930Sstevel@tonic-gate * The processor_info(2) state of a CPU is a simplified representation suitable 5940Sstevel@tonic-gate * for use by an application program. Kernel subsystems should utilize the 5950Sstevel@tonic-gate * internal per-CPU state as given by the cpu_flags member of the cpu structure, 5960Sstevel@tonic-gate * as this information may include platform- or architecture-specific state 5970Sstevel@tonic-gate * critical to a subsystem's disposition of a particular CPU. 5980Sstevel@tonic-gate */ 5990Sstevel@tonic-gate void cpu_set_state(cpu_t *); /* record/timestamp current state */ 6000Sstevel@tonic-gate int cpu_get_state(cpu_t *); /* get current cpu state */ 6010Sstevel@tonic-gate const char *cpu_get_state_str(cpu_t *); /* get current cpu state as string */ 6020Sstevel@tonic-gate 6030Sstevel@tonic-gate int cpu_configure(int); 6040Sstevel@tonic-gate int cpu_unconfigure(int); 6050Sstevel@tonic-gate void cpu_destroy_bound_threads(cpu_t *cp); 6060Sstevel@tonic-gate 6070Sstevel@tonic-gate extern int cpu_bind_thread(kthread_t *tp, processorid_t bind, 6080Sstevel@tonic-gate processorid_t *obind, int *error); 6090Sstevel@tonic-gate extern int cpu_unbind(processorid_t cpu_id); 6100Sstevel@tonic-gate extern void thread_affinity_set(kthread_t *t, int cpu_id); 6110Sstevel@tonic-gate extern void thread_affinity_clear(kthread_t *t); 6120Sstevel@tonic-gate extern void affinity_set(int cpu_id); 6130Sstevel@tonic-gate extern void affinity_clear(void); 6140Sstevel@tonic-gate extern void init_cpu_mstate(struct cpu *, int); 6150Sstevel@tonic-gate extern void term_cpu_mstate(struct cpu *); 616590Sesolom extern void new_cpu_mstate(int, hrtime_t); 617590Sesolom extern void get_cpu_mstate(struct cpu *, hrtime_t *); 6180Sstevel@tonic-gate extern void thread_nomigrate(void); 6190Sstevel@tonic-gate extern void thread_allowmigrate(void); 6200Sstevel@tonic-gate extern void weakbinding_stop(void); 6210Sstevel@tonic-gate extern void weakbinding_start(void); 6220Sstevel@tonic-gate 6230Sstevel@tonic-gate /* 6240Sstevel@tonic-gate * The following routines affect the CPUs participation in interrupt processing, 6250Sstevel@tonic-gate * if that is applicable on the architecture. This only affects interrupts 6260Sstevel@tonic-gate * which aren't directed at the processor (not cross calls). 6270Sstevel@tonic-gate * 6280Sstevel@tonic-gate * cpu_disable_intr returns non-zero if interrupts were previously enabled. 6290Sstevel@tonic-gate */ 6300Sstevel@tonic-gate int cpu_disable_intr(struct cpu *cp); /* stop issuing interrupts to cpu */ 6310Sstevel@tonic-gate void cpu_enable_intr(struct cpu *cp); /* start issuing interrupts to cpu */ 6320Sstevel@tonic-gate 6330Sstevel@tonic-gate /* 6340Sstevel@tonic-gate * The mutex cpu_lock protects cpu_flags for all CPUs, as well as the ncpus 6350Sstevel@tonic-gate * and ncpus_online counts. 6360Sstevel@tonic-gate */ 6370Sstevel@tonic-gate extern kmutex_t cpu_lock; /* lock protecting CPU data */ 6380Sstevel@tonic-gate 6390Sstevel@tonic-gate typedef enum { 6400Sstevel@tonic-gate CPU_INIT, 6410Sstevel@tonic-gate CPU_CONFIG, 6420Sstevel@tonic-gate CPU_UNCONFIG, 6430Sstevel@tonic-gate CPU_ON, 6440Sstevel@tonic-gate CPU_OFF, 6450Sstevel@tonic-gate CPU_CPUPART_IN, 6460Sstevel@tonic-gate CPU_CPUPART_OUT 6470Sstevel@tonic-gate } cpu_setup_t; 6480Sstevel@tonic-gate 6490Sstevel@tonic-gate typedef int cpu_setup_func_t(cpu_setup_t, int, void *); 6500Sstevel@tonic-gate 6510Sstevel@tonic-gate /* 6520Sstevel@tonic-gate * Routines used to register interest in cpu's being added to or removed 6530Sstevel@tonic-gate * from the system. 6540Sstevel@tonic-gate */ 6550Sstevel@tonic-gate extern void register_cpu_setup_func(cpu_setup_func_t *, void *); 6560Sstevel@tonic-gate extern void unregister_cpu_setup_func(cpu_setup_func_t *, void *); 6570Sstevel@tonic-gate extern void cpu_state_change_notify(int, cpu_setup_t); 6580Sstevel@tonic-gate 6590Sstevel@tonic-gate /* 6600Sstevel@tonic-gate * Create various strings that describe the given CPU for the 6610Sstevel@tonic-gate * processor_info system call and configuration-related kstats. 6620Sstevel@tonic-gate */ 6630Sstevel@tonic-gate #define CPU_IDSTRLEN 100 6640Sstevel@tonic-gate 6650Sstevel@tonic-gate extern void init_cpu_info(struct cpu *); 666414Skchow extern void cpu_vm_data_init(struct cpu *); 667414Skchow extern void cpu_vm_data_destroy(struct cpu *); 6680Sstevel@tonic-gate 6690Sstevel@tonic-gate #endif /* _KERNEL */ 6700Sstevel@tonic-gate 6710Sstevel@tonic-gate #ifdef __cplusplus 6720Sstevel@tonic-gate } 6730Sstevel@tonic-gate #endif 6740Sstevel@tonic-gate 6750Sstevel@tonic-gate #endif /* _SYS_CPUVAR_H */ 676