1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright (c) 1999-2000 by Sun Microsystems, Inc. 24*0Sstevel@tonic-gate * All rights reserved. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SYS_1394_IEEE1394_H 28*0Sstevel@tonic-gate #define _SYS_1394_IEEE1394_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate /* 33*0Sstevel@tonic-gate * ieee1394.h 34*0Sstevel@tonic-gate * This file contains various defines that go with IEEE 1394 35*0Sstevel@tonic-gate */ 36*0Sstevel@tonic-gate 37*0Sstevel@tonic-gate #ifdef __cplusplus 38*0Sstevel@tonic-gate extern "C" { 39*0Sstevel@tonic-gate #endif 40*0Sstevel@tonic-gate 41*0Sstevel@tonic-gate 42*0Sstevel@tonic-gate /* 43*0Sstevel@tonic-gate * IEEE1394_MAX_NODES defines the maximum number of nodes 44*0Sstevel@tonic-gate * that can be addressed on a single 1394 bus. There are 45*0Sstevel@tonic-gate * a 63 physical nodes that can be present and 1 broadcast 46*0Sstevel@tonic-gate * node id. The range of 1394 nodeid's are 47*0Sstevel@tonic-gate * 0 ... (IEEE1394_MAX_NODES - 1) 48*0Sstevel@tonic-gate */ 49*0Sstevel@tonic-gate #define IEEE1394_MAX_NODES 64 50*0Sstevel@tonic-gate 51*0Sstevel@tonic-gate /* The node id for broadcast writes */ 52*0Sstevel@tonic-gate #define IEEE1394_BROADCAST_NODEID 63 53*0Sstevel@tonic-gate 54*0Sstevel@tonic-gate /* Maximum number of ports per node */ 55*0Sstevel@tonic-gate #define IEEE1394_MAX_NUM_PORTS 16 56*0Sstevel@tonic-gate 57*0Sstevel@tonic-gate #define IEEE1394_BUS_NUM_MASK 0x0000FFC0 58*0Sstevel@tonic-gate #define IEEE1394_LOCAL_BUS 0x3FF 59*0Sstevel@tonic-gate 60*0Sstevel@tonic-gate #define IEEE1394_NODE_NUM_MASK 0x0000003F 61*0Sstevel@tonic-gate #define IEEE1394_NODE_NUM(DATA) ((DATA) & IEEE1394_NODE_NUM_MASK) 62*0Sstevel@tonic-gate 63*0Sstevel@tonic-gate #define IEEE1394_BUS_CYCLES_PER_SEC 8000 64*0Sstevel@tonic-gate 65*0Sstevel@tonic-gate /* IEEE 1394 Bus related definitions */ 66*0Sstevel@tonic-gate #define IEEE1394_ADDR_NODE_ID_MASK 0xFFFF000000000000 67*0Sstevel@tonic-gate #define IEEE1394_ADDR_NODE_ID_SHIFT 48 68*0Sstevel@tonic-gate #define IEEE1394_ADDR_NODE_ID(ADDR) \ 69*0Sstevel@tonic-gate (((ADDR) & IEEE1394_ADDR_NODE_ID_MASK) >> \ 70*0Sstevel@tonic-gate IEEE1394_ADDR_NODE_ID_SHIFT) 71*0Sstevel@tonic-gate 72*0Sstevel@tonic-gate #define IEEE1394_ADDR_BUS_ID_MASK 0xFFC0000000000000 73*0Sstevel@tonic-gate #define IEEE1394_ADDR_BUS_ID_SHIFT 54 74*0Sstevel@tonic-gate #define IEEE1394_ADDR_BUS_ID(ADDR) \ 75*0Sstevel@tonic-gate (((ADDR) & IEEE1394_ADDR_BUS_ID_MASK) >> \ 76*0Sstevel@tonic-gate IEEE1394_ADDR_BUS_ID_SHIFT) 77*0Sstevel@tonic-gate 78*0Sstevel@tonic-gate #define IEEE1394_ADDR_PHY_ID_MASK 0x003F000000000000 79*0Sstevel@tonic-gate #define IEEE1394_ADDR_PHY_ID_SHIFT 48 80*0Sstevel@tonic-gate #define IEEE1394_ADDR_PHY_ID(ADDR) \ 81*0Sstevel@tonic-gate (((ADDR) & IEEE1394_ADDR_PHY_ID_MASK) >> \ 82*0Sstevel@tonic-gate IEEE1394_ADDR_PHY_ID_SHIFT) 83*0Sstevel@tonic-gate 84*0Sstevel@tonic-gate #define IEEE1394_ADDR_OFFSET_MASK 0x0000FFFFFFFFFFFF 85*0Sstevel@tonic-gate 86*0Sstevel@tonic-gate /* IEEE 1394 data sizes */ 87*0Sstevel@tonic-gate #define IEEE1394_QUADLET (sizeof (uint32_t)) 88*0Sstevel@tonic-gate #define IEEE1394_OCTLET (sizeof (uint64_t)) 89*0Sstevel@tonic-gate 90*0Sstevel@tonic-gate /* Still need to look at these */ 91*0Sstevel@tonic-gate /* TCODES - packet transaction codes (as defined in 1394-1995 6.2.4.5) */ 92*0Sstevel@tonic-gate #define IEEE1394_TCODE_WRITE_QUADLET 0x0 93*0Sstevel@tonic-gate #define IEEE1394_TCODE_WRITE_BLOCK 0x1 94*0Sstevel@tonic-gate #define IEEE1394_TCODE_WRITE_RESP 0x2 95*0Sstevel@tonic-gate #define IEEE1394_TCODE_RES1 0x3 96*0Sstevel@tonic-gate #define IEEE1394_TCODE_READ_QUADLET 0x4 97*0Sstevel@tonic-gate #define IEEE1394_TCODE_READ_BLOCK 0x5 98*0Sstevel@tonic-gate #define IEEE1394_TCODE_READ_QUADLET_RESP 0x6 99*0Sstevel@tonic-gate #define IEEE1394_TCODE_READ_BLOCK_RESP 0x7 100*0Sstevel@tonic-gate #define IEEE1394_TCODE_CYCLE_START 0x8 101*0Sstevel@tonic-gate #define IEEE1394_TCODE_LOCK 0x9 102*0Sstevel@tonic-gate #define IEEE1394_TCODE_ISOCH 0xA 103*0Sstevel@tonic-gate #define IEEE1394_TCODE_LOCK_RESP 0xB 104*0Sstevel@tonic-gate #define IEEE1394_TCODE_RES2 0xC 105*0Sstevel@tonic-gate #define IEEE1394_TCODE_RES3 0xD 106*0Sstevel@tonic-gate #define IEEE1394_TCODE_PHY 0xE 107*0Sstevel@tonic-gate #define IEEE1394_TCODE_RES4 0xF 108*0Sstevel@tonic-gate 109*0Sstevel@tonic-gate #define IEEE1394_RESP_COMPLETE 0x0 110*0Sstevel@tonic-gate #define IEEE1394_RESP_CONFLICT_ERROR 0x4 111*0Sstevel@tonic-gate #define IEEE1394_RESP_DATA_ERROR 0x5 112*0Sstevel@tonic-gate #define IEEE1394_RESP_TYPE_ERROR 0x6 113*0Sstevel@tonic-gate #define IEEE1394_RESP_ADDRESS_ERROR 0x7 114*0Sstevel@tonic-gate 115*0Sstevel@tonic-gate #define IEEE1394_ISOCH_HDR_QUAD_SZ 3 116*0Sstevel@tonic-gate 117*0Sstevel@tonic-gate /* Self ID packet definitions */ 118*0Sstevel@tonic-gate #define IEEE1394_SELFID_PCKT_ID_MASK 0xC0000000 119*0Sstevel@tonic-gate #define IEEE1394_SELFID_PCKT_ID_SHIFT 30 120*0Sstevel@tonic-gate #define IEEE1394_SELFID_PCKT_ID_VALID 0x2 121*0Sstevel@tonic-gate #define IEEE1394_SELFID_ISVALID(S_PKT) \ 122*0Sstevel@tonic-gate (~((S_PKT)->spkt_data ^ (S_PKT)->spkt_inverse) ? 0 : 1) 123*0Sstevel@tonic-gate 124*0Sstevel@tonic-gate #define IEEE1394_SELFID_PHYID_MASK 0x3F000000 125*0Sstevel@tonic-gate #define IEEE1394_SELFID_PHYID_SHIFT 24 126*0Sstevel@tonic-gate #define IEEE1394_SELFID_PHYID(S_PKT) \ 127*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_PHYID_MASK) >> \ 128*0Sstevel@tonic-gate IEEE1394_SELFID_PHYID_SHIFT) 129*0Sstevel@tonic-gate 130*0Sstevel@tonic-gate /* SelfID PKT #0 */ 131*0Sstevel@tonic-gate #define IEEE1394_SELFID_L_MASK 0x00400000 132*0Sstevel@tonic-gate #define IEEE1394_SELFID_L_SHIFT 22 133*0Sstevel@tonic-gate #define IEEE1394_SELFID_ISLINKON(S_PKT) \ 134*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_L_MASK) >> \ 135*0Sstevel@tonic-gate IEEE1394_SELFID_L_SHIFT) 136*0Sstevel@tonic-gate 137*0Sstevel@tonic-gate #define IEEE1394_SELFID_GAP_CNT_MASK 0x003F0000 138*0Sstevel@tonic-gate #define IEEE1394_SELFID_GAP_CNT_SHIFT 16 139*0Sstevel@tonic-gate #define IEEE1394_SELFID_GAP_CNT(S_PKT) \ 140*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_GAP_CNT_MASK) >> \ 141*0Sstevel@tonic-gate IEEE1394_SELFID_GAP_CNT_SHIFT) 142*0Sstevel@tonic-gate 143*0Sstevel@tonic-gate #define IEEE1394_SELFID_SP_MASK 0x0000C000 144*0Sstevel@tonic-gate #define IEEE1394_SELFID_SP_SHIFT 14 145*0Sstevel@tonic-gate 146*0Sstevel@tonic-gate #define IEEE1394_SELFID_DEL_MASK (0x00003000) 147*0Sstevel@tonic-gate #define IEEE1394_SELFID_DEL_SHIFT 12 148*0Sstevel@tonic-gate #define IEEE1394_SELFID_DELAY(S_PKT) \ 149*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_DEL_MASK) >> \ 150*0Sstevel@tonic-gate IEEE1394_SELFID_DEL_SHIFT) 151*0Sstevel@tonic-gate 152*0Sstevel@tonic-gate #define IEEE1394_SELFID_C_MASK 0x00000800 153*0Sstevel@tonic-gate #define IEEE1394_SELFID_C_SHIFT 11 154*0Sstevel@tonic-gate #define IEEE1394_SELFID_ISCONTENDER(S_PKT) \ 155*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_C_MASK) >> \ 156*0Sstevel@tonic-gate IEEE1394_SELFID_C_SHIFT) 157*0Sstevel@tonic-gate 158*0Sstevel@tonic-gate #define IEEE1394_SELFID_PWR_MASK 0x00000700 159*0Sstevel@tonic-gate #define IEEE1394_SELFID_PWR_SHIFT 8 160*0Sstevel@tonic-gate #define IEEE1394_SELFID_POWER(S_PKT) \ 161*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_PWR_MASK) >> \ 162*0Sstevel@tonic-gate IEEE1394_SELFID_PWR_SHIFT) 163*0Sstevel@tonic-gate 164*0Sstevel@tonic-gate #define IEEE1394_SELFID_PORT_TO_CHILD 0x3 165*0Sstevel@tonic-gate #define IEEE1394_SELFID_PORT_TO_PARENT 0x2 166*0Sstevel@tonic-gate #define IEEE1394_SELFID_PORT_NOT_CONNECTED 0x1 167*0Sstevel@tonic-gate #define IEEE1394_SELFID_PORT_NO_PORT 0x0 168*0Sstevel@tonic-gate 169*0Sstevel@tonic-gate #define IEEE1394_SELFID_I_MASK 0x00000002 170*0Sstevel@tonic-gate #define IEEE1394_SELFID_I_SHIFT 1 171*0Sstevel@tonic-gate #define IEEE1394_SELFID_INITIATED_RESET(S_PKT) \ 172*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_I_MASK) >> \ 173*0Sstevel@tonic-gate IEEE1394_SELFID_I_SHIFT) 174*0Sstevel@tonic-gate 175*0Sstevel@tonic-gate #define IEEE1394_SELFID_M_MASK 0x00000001 176*0Sstevel@tonic-gate #define IEEE1394_SELFID_M_SHIFT 0 177*0Sstevel@tonic-gate #define IEEE1394_SELFID_ISMORE(S_PKT) \ 178*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_M_MASK) >> \ 179*0Sstevel@tonic-gate IEEE1394_SELFID_M_SHIFT) 180*0Sstevel@tonic-gate 181*0Sstevel@tonic-gate #define IEEE1394_SELFID_PORT_OFFSET_FIRST 6 182*0Sstevel@tonic-gate 183*0Sstevel@tonic-gate /* SelfID PKT #1 (n=0) */ 184*0Sstevel@tonic-gate #define IEEE1394_SELFID_N_MASK 0x00700000 185*0Sstevel@tonic-gate #define IEEE1394_SELFID_N_SHIFT 20 186*0Sstevel@tonic-gate #define IEEE1394_SELFID_PKT_NUM(S_PKT) \ 187*0Sstevel@tonic-gate (((S_PKT)->spkt_data & IEEE1394_SELFID_N_MASK) >> \ 188*0Sstevel@tonic-gate IEEE1394_SELFID_N_SHIFT) 189*0Sstevel@tonic-gate 190*0Sstevel@tonic-gate #define IEEE1394_SELFID_PORT_OFFSET_OTHERS 16 191*0Sstevel@tonic-gate 192*0Sstevel@tonic-gate /* PHY Config Packet definitions */ 193*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_T_BIT_MASK 0x00400000 194*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_T_BIT_SHIFT 22 195*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_GAP_CNT_MASK 0x003F0000 196*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_GAP_CNT_SHIFT 16 197*0Sstevel@tonic-gate 198*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_R_BIT_MASK 0x00800000 199*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_R_BIT_SHIFT 23 200*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_ROOT_HOLD_MASK 0x3F000000 201*0Sstevel@tonic-gate #define IEEE1394_PHY_CONFIG_ROOT_HOLD_SHIFT 24 202*0Sstevel@tonic-gate 203*0Sstevel@tonic-gate 204*0Sstevel@tonic-gate /* 205*0Sstevel@tonic-gate * CSR Registers and register fields. 206*0Sstevel@tonic-gate */ 207*0Sstevel@tonic-gate /* CSR Register Addresses (IEEE1394-1995 8.3.2.2) */ 208*0Sstevel@tonic-gate #define IEEE1394_CSR_STATE_CLEAR 0xFFFFF0000000 209*0Sstevel@tonic-gate #define IEEE1394_CSR_STATE_SET 0xFFFFF0000004 210*0Sstevel@tonic-gate #define IEEE1394_CSR_NODE_IDS 0xFFFFF0000008 211*0Sstevel@tonic-gate #define IEEE1394_CSR_RESET_START 0xFFFFF000000C 212*0Sstevel@tonic-gate #define IEEE1394_CSR_SPLIT_TIMEOUT_HI 0xFFFFF0000018 213*0Sstevel@tonic-gate #define IEEE1394_CSR_SPLIT_TIMEOUT_LO 0xFFFFF000001C 214*0Sstevel@tonic-gate #define IEEE1394_CSR_ARG_HI 0xFFFFF0000020 215*0Sstevel@tonic-gate #define IEEE1394_CSR_ARG_LO 0xFFFFF0000024 216*0Sstevel@tonic-gate #define IEEE1394_CSR_TEST_START 0xFFFFF0000028 217*0Sstevel@tonic-gate #define IEEE1394_CSR_TEST_STATUS 0xFFFFF000002C 218*0Sstevel@tonic-gate 219*0Sstevel@tonic-gate /* Optional Register Addresses */ 220*0Sstevel@tonic-gate #define IEEE1394_CSR_INTERRUPT_TARGET 0xFFFFF0000050 221*0Sstevel@tonic-gate #define IEEE1394_CSR_INTERRUPT_MASK 0xFFFFF0000054 222*0Sstevel@tonic-gate #define IEEE1394_CSR_CLOCK_VALUE 0xFFFFF0000058 223*0Sstevel@tonic-gate #define IEEE1394_CSR_CLOCK_VALUE_SZ 0x28 224*0Sstevel@tonic-gate #define IEEE1394_CSR_MESSAGE_REQUEST 0xFFFFF0000080 225*0Sstevel@tonic-gate #define IEEE1394_CSR_MESSAGE_REQUEST_SZ 0x80 226*0Sstevel@tonic-gate 227*0Sstevel@tonic-gate /* Serial Bus CSR Register Addresss (IEEE1394-1995 8.3.2.3) */ 228*0Sstevel@tonic-gate #define IEEE1394_SCSR_CYCLE_TIME 0xFFFFF0000200 229*0Sstevel@tonic-gate #define IEEE1394_SCSR_BUS_TIME 0xFFFFF0000204 230*0Sstevel@tonic-gate #define IEEE1394_SCSR_PWRFAIL_IMMINENT 0xFFFFF0000208 231*0Sstevel@tonic-gate #define IEEE1394_SCSR_PWRSRC 0xFFFFF000020C 232*0Sstevel@tonic-gate #define IEEE1394_SCSR_BUSY_TIMEOUT 0xFFFFF0000210 233*0Sstevel@tonic-gate #define IEEE1394_SCSR_BUSMGR_ID 0xFFFFF000021C 234*0Sstevel@tonic-gate #define IEEE1394_SCSR_BANDWIDTH_AVAIL 0xFFFFF0000220 235*0Sstevel@tonic-gate #define IEEE1394_SCSR_CHANS_AVAIL_HI 0xFFFFF0000224 236*0Sstevel@tonic-gate #define IEEE1394_SCSR_CHANS_AVAIL_LO 0xFFFFF0000228 237*0Sstevel@tonic-gate 238*0Sstevel@tonic-gate /* Config ROM Address */ 239*0Sstevel@tonic-gate #define IEEE1394_CONFIG_ROM_ADDR 0xFFFFF0000400 240*0Sstevel@tonic-gate #define IEEE1394_CONFIG_ROM_SZ 0x400 241*0Sstevel@tonic-gate #define IEEE1394_CONFIG_ROM_QUAD_SZ 0x100 242*0Sstevel@tonic-gate 243*0Sstevel@tonic-gate /* Unit CSR Register Addresses */ 244*0Sstevel@tonic-gate #define IEEE1394_UCSR_TOPOLOGY_MAP 0xFFFFF0001000 245*0Sstevel@tonic-gate #define IEEE1394_UCSR_TOPOLOGY_MAP_SZ 0x400 246*0Sstevel@tonic-gate #define IEEE1394_UCSR_SPEED_MAP 0xFFFFF0002000 247*0Sstevel@tonic-gate #define IEEE1394_UCSR_SPEED_MAP_SZ 0x1000 248*0Sstevel@tonic-gate 249*0Sstevel@tonic-gate /* Boundary for "reserved" CSR registers */ 250*0Sstevel@tonic-gate #define IEEE1394_UCSR_RESERVED_BOUNDARY 0xFFFFF0010000 251*0Sstevel@tonic-gate 252*0Sstevel@tonic-gate #define IEEE1394_CSR_OFFSET_MASK 0x00000000FFFF 253*0Sstevel@tonic-gate 254*0Sstevel@tonic-gate /* 1394 Bus Speeds */ 255*0Sstevel@tonic-gate #define IEEE1394_S100 0 256*0Sstevel@tonic-gate #define IEEE1394_S200 1 257*0Sstevel@tonic-gate #define IEEE1394_S400 2 258*0Sstevel@tonic-gate #define IEEE1394_S800 3 259*0Sstevel@tonic-gate #define IEEE1394_S1600 4 260*0Sstevel@tonic-gate #define IEEE1394_S3200 5 261*0Sstevel@tonic-gate 262*0Sstevel@tonic-gate /* IEEE 1394 Bandwidth bounds */ 263*0Sstevel@tonic-gate #define IEEE1394_BANDWIDTH_MIN 0 264*0Sstevel@tonic-gate #define IEEE1394_BANDWIDTH_MAX 0x1333 265*0Sstevel@tonic-gate 266*0Sstevel@tonic-gate /* Speed Map specific defines */ 267*0Sstevel@tonic-gate #define IEEE1394_SPEED_MAP_CRC_LEN 0x03F1 268*0Sstevel@tonic-gate #define IEEE1394_SPEED_MAP_LEN_MASK 0x0000FFFF 269*0Sstevel@tonic-gate #define IEEE1394_SPEED_MAP_LEN_SHIFT 16 270*0Sstevel@tonic-gate #define IEEE1394_SPEED_MAP_DATA_LEN 0x0FBE 271*0Sstevel@tonic-gate 272*0Sstevel@tonic-gate /* Topology Map specific defines */ 273*0Sstevel@tonic-gate #define IEEE1394_TOP_MAP_LEN_MASK 0x0000FFFF 274*0Sstevel@tonic-gate #define IEEE1394_TOP_MAP_LEN_SHIFT 16 275*0Sstevel@tonic-gate 276*0Sstevel@tonic-gate /* Config ROM specific defines */ 277*0Sstevel@tonic-gate #define IEEE1394_CFG_ROM_CRC_VALUE_MASK 0x0000FFFF 278*0Sstevel@tonic-gate #define IEEE1394_CFG_ROM_CRC_LEN_SHIFT 16 279*0Sstevel@tonic-gate #define IEEE1394_CFG_ROM_CRC_LEN_MASK 0xFF 280*0Sstevel@tonic-gate #define IEEE1394_CFG_ROM_LEN_SHIFT 16 281*0Sstevel@tonic-gate 282*0Sstevel@tonic-gate /* CRC16 defines */ 283*0Sstevel@tonic-gate #define IEEE1394_CRC16_MASK 0xFFFF 284*0Sstevel@tonic-gate 285*0Sstevel@tonic-gate /* Bit positions in the STATE register */ 286*0Sstevel@tonic-gate #define IEEE1394_CSR_STATE_CMSTR 0x00000100 287*0Sstevel@tonic-gate #define IEEE1394_CSR_STATE_DREQ 0x00000040 288*0Sstevel@tonic-gate #define IEEE1394_CSR_STATE_ABDICATE 0x00000400 289*0Sstevel@tonic-gate 290*0Sstevel@tonic-gate /* Positions in the BUS_INFO_BLOCK */ 291*0Sstevel@tonic-gate #define IEEE1394_BIB_LNK_SPD_MASK 0x00000007 292*0Sstevel@tonic-gate #define IEEE1394_BIB_LNK_SPD_SHIFT 0 293*0Sstevel@tonic-gate #define IEEE1394_BIB_GEN_MASK 0x000000F0 294*0Sstevel@tonic-gate #define IEEE1394_BIB_GEN_SHIFT 4 295*0Sstevel@tonic-gate #define IEEE1394_BIB_MROM_MASK 0x00000300 296*0Sstevel@tonic-gate #define IEEE1394_BIB_MROM_SHIFT 8 297*0Sstevel@tonic-gate #define IEEE1394_BIB_IRMC_MASK 0x80000000 298*0Sstevel@tonic-gate #define IEEE1394_BIB_IRMC_SHIFT 31 299*0Sstevel@tonic-gate #define IEEE1394_BIB_BMC_MASK 0x10000000 300*0Sstevel@tonic-gate #define IEEE1394_BIB_BMC_SHIFT 28 301*0Sstevel@tonic-gate #define IEEE1394_BIB_CMC_MASK 0x40000000 302*0Sstevel@tonic-gate #define IEEE1394_BIB_CMC_SHIFT 30 303*0Sstevel@tonic-gate #define IEEE1394_BIB_MAXREC_MASK 0x0000F000 304*0Sstevel@tonic-gate #define IEEE1394_BIB_MAXREC_SHIFT 12 305*0Sstevel@tonic-gate 306*0Sstevel@tonic-gate #define IEEE1394_BIB_QUAD_SZ 5 307*0Sstevel@tonic-gate #define IEEE1394_BIB_SZ 0x14 308*0Sstevel@tonic-gate 309*0Sstevel@tonic-gate /* Bus Manager specific defines */ 310*0Sstevel@tonic-gate #define IEEE1394_BM_IRM_TIMEOUT 625000 311*0Sstevel@tonic-gate #define IEEE1394_BM_INCUMBENT_TIMEOUT 125000 312*0Sstevel@tonic-gate #ifdef __cplusplus 313*0Sstevel@tonic-gate } 314*0Sstevel@tonic-gate #endif 315*0Sstevel@tonic-gate 316*0Sstevel@tonic-gate #endif /* _SYS_1394_IEEE1394_H */ 317