1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SYS_1394_ADAPTERS_HCI1394_ISOCH_H 28*0Sstevel@tonic-gate #define _SYS_1394_ADAPTERS_HCI1394_ISOCH_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate /* 33*0Sstevel@tonic-gate * hci1394_isoch.h 34*0Sstevel@tonic-gate * Function declarations for front-end functions for hci1394 isochronous 35*0Sstevel@tonic-gate * support. Also all isochronous related soft_state structures and defs. 36*0Sstevel@tonic-gate */ 37*0Sstevel@tonic-gate 38*0Sstevel@tonic-gate #ifdef __cplusplus 39*0Sstevel@tonic-gate extern "C" { 40*0Sstevel@tonic-gate #endif 41*0Sstevel@tonic-gate 42*0Sstevel@tonic-gate #include <sys/note.h> 43*0Sstevel@tonic-gate #include <sys/1394/adapters/hci1394_def.h> 44*0Sstevel@tonic-gate 45*0Sstevel@tonic-gate 46*0Sstevel@tonic-gate /* handle passed back from init() and used for rest of functions */ 47*0Sstevel@tonic-gate typedef struct hci1394_isoch_s *hci1394_isoch_handle_t; 48*0Sstevel@tonic-gate 49*0Sstevel@tonic-gate /* 50*0Sstevel@tonic-gate * Isochronous structures and defs used in the hci1394 soft state. 51*0Sstevel@tonic-gate * (see hci1394_state.h). 52*0Sstevel@tonic-gate */ 53*0Sstevel@tonic-gate 54*0Sstevel@tonic-gate /* 55*0Sstevel@tonic-gate * control structure for allocated isochronous dma descriptor memory. 56*0Sstevel@tonic-gate * when attempting to bind memory, if ddi_addr_bind_handle indicates multiple 57*0Sstevel@tonic-gate * cookies, each cookie will be tracked within a separate copy of this 58*0Sstevel@tonic-gate * structure. Only the last cookie's idma_desc_mem structure will contain 59*0Sstevel@tonic-gate * a valid mem_handle and mem, to be used when freeing all the memory. 60*0Sstevel@tonic-gate * 61*0Sstevel@tonic-gate * 'used' specifies the number of bytes used for descriptors in this cookie. 62*0Sstevel@tonic-gate * 'offset' is this cookie's offset relative to the beginning of the buffer. 63*0Sstevel@tonic-gate */ 64*0Sstevel@tonic-gate typedef struct hci1394_idma_desc_mem_s { 65*0Sstevel@tonic-gate struct hci1394_idma_desc_mem_s *dma_nextp; 66*0Sstevel@tonic-gate hci1394_buf_handle_t mem_handle; 67*0Sstevel@tonic-gate hci1394_buf_info_t mem; 68*0Sstevel@tonic-gate uint32_t used; 69*0Sstevel@tonic-gate uint32_t offset; 70*0Sstevel@tonic-gate } hci1394_idma_desc_mem_t; 71*0Sstevel@tonic-gate 72*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Single thread modifies", hci1394_idma_desc_mem_s)) 73*0Sstevel@tonic-gate 74*0Sstevel@tonic-gate /* structure to track one isochronous context */ 75*0Sstevel@tonic-gate /* XXX if IR Multichan mode support is added, this must be modified */ 76*0Sstevel@tonic-gate typedef struct hci1394_iso_ctxt_s { 77*0Sstevel@tonic-gate int ctxt_index; /* 0-31 -- which context this is */ 78*0Sstevel@tonic-gate int ctxt_io_mode; /* xmit, recv pkt or buf, hdrs, multi */ 79*0Sstevel@tonic-gate uint32_t ctxt_flags; /* general context info */ 80*0Sstevel@tonic-gate volatile uint32_t intr_flags; /* flags while context is running */ 81*0Sstevel@tonic-gate kmutex_t intrprocmutex; /* interrupt/update coordination */ 82*0Sstevel@tonic-gate kcondvar_t intr_cv; /* interrupt completion cv */ 83*0Sstevel@tonic-gate uint16_t isospd; /* speed of packets for context */ 84*0Sstevel@tonic-gate uint16_t isochan; /* isochronous channel for contxt */ 85*0Sstevel@tonic-gate 86*0Sstevel@tonic-gate hci1394_ctxt_regs_t *ctxt_regsp; /* ctxt regs within hci1394_regs_t */ 87*0Sstevel@tonic-gate 88*0Sstevel@tonic-gate void *xcs_firstp; /* first alloc xfer_ctl_t struct */ 89*0Sstevel@tonic-gate hci1394_idma_desc_mem_t *dma_firstp; /* 1st alloc dma descriptor mem */ 90*0Sstevel@tonic-gate uint32_t dma_mem_execp; /* exec start(bound mem w/Z bits) */ 91*0Sstevel@tonic-gate uint32_t reserved; 92*0Sstevel@tonic-gate 93*0Sstevel@tonic-gate ixl1394_command_t *ixl_firstp; /* 1st ixl cmmand in linked list */ 94*0Sstevel@tonic-gate ixl1394_command_t *ixl_execp; /* currently executing ixl cmmand */ 95*0Sstevel@tonic-gate uint_t ixl_exec_depth; /* curr exec ixl cmd xfer_ctl idx */ 96*0Sstevel@tonic-gate 97*0Sstevel@tonic-gate uint_t max_dma_skips; /* max skips allowed before xmit */ 98*0Sstevel@tonic-gate /* recovery required (16 => 2ms) */ 99*0Sstevel@tonic-gate uint_t max_noadv_intrs; /* max intrs with no dma descriptor */ 100*0Sstevel@tonic-gate /* block advances (8) */ 101*0Sstevel@tonic-gate uint_t rem_noadv_intrs; /* remaining intrs allowed with no */ 102*0Sstevel@tonic-gate /* dma advances (i.e. no status set) */ 103*0Sstevel@tonic-gate 104*0Sstevel@tonic-gate uint16_t dma_last_time; /* last completd desc blk tmestmp */ 105*0Sstevel@tonic-gate 106*0Sstevel@tonic-gate uint16_t default_tag; /* default tag value */ 107*0Sstevel@tonic-gate uint16_t default_sync; /* default sync value */ 108*0Sstevel@tonic-gate uint16_t default_skipmode; /* default skip mode */ 109*0Sstevel@tonic-gate 110*0Sstevel@tonic-gate ixl1394_command_t *default_skiplabelp; /* set if needed */ 111*0Sstevel@tonic-gate ixl1394_command_t *default_skipxferp; /* xfercmd for default skiplabl */ 112*0Sstevel@tonic-gate 113*0Sstevel@tonic-gate void *global_callback_arg; /* provided to IXLcallbacks */ 114*0Sstevel@tonic-gate opaque_t idma_evt_arg; /* provided to "stopped" callback */ 115*0Sstevel@tonic-gate 116*0Sstevel@tonic-gate /* target callback if dma stops */ 117*0Sstevel@tonic-gate void (*isoch_dma_stopped)(struct isoch_dma_handle *idma_hdl, 118*0Sstevel@tonic-gate opaque_t idma_evt_arg, id1394_isoch_dma_stopped_t idma_stop_args); 119*0Sstevel@tonic-gate 120*0Sstevel@tonic-gate } hci1394_iso_ctxt_t; 121*0Sstevel@tonic-gate 122*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Single thread modifies", hci1394_iso_ctxt_s)) 123*0Sstevel@tonic-gate 124*0Sstevel@tonic-gate /* 125*0Sstevel@tonic-gate * defs for hci1394_iso_ctxt_t.ctxt_io_mode. 126*0Sstevel@tonic-gate * overall io characteristics of the contexts, initialized during isoch init 127*0Sstevel@tonic-gate * and never changed. 128*0Sstevel@tonic-gate */ 129*0Sstevel@tonic-gate /* 130*0Sstevel@tonic-gate * defs for hci1394_iso_ctxt_t.ctxt_flags 131*0Sstevel@tonic-gate * These flags are protected by the context list mutex in the isoch handle 132*0Sstevel@tonic-gate * (see hci1394_isoch.c for mutex definition) 133*0Sstevel@tonic-gate */ 134*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_INUSE 0x00000001 /* context is in use */ 135*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_RUNNING 0x00000002 /* context is running */ 136*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_RECV 0x00000004 /* isoch receive context */ 137*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_CMDREG 0x00000008 /* dev has readable dma cmdptr */ 138*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_BFFILL 0x00000010 /* on=BufFill off=Pkt IR only */ 139*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_RHDRS 0x00000020 /* recv packet hdrs into mem */ 140*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_MULTI 0x00000040 /* in multichan mode - IR only */ 141*0Sstevel@tonic-gate 142*0Sstevel@tonic-gate /* 143*0Sstevel@tonic-gate * defs for hci1394_iso_ctxt_t.intr_flags 144*0Sstevel@tonic-gate * These flags are protected by the per-context mutex "intrprocmutex" 145*0Sstevel@tonic-gate */ 146*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_STOP 0x00000010 /* context stopped */ 147*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_INTRSET 0x00000020 /* intr flagged, not processed */ 148*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_ININTR 0x00000040 /* in intrproc, not due to int */ 149*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_INUPDATE 0x00000080 /* in intrproc, not due to int */ 150*0Sstevel@tonic-gate #define HCI1394_ISO_CTXT_INCALL 0x00000100 /* intrproc is doing callback */ 151*0Sstevel@tonic-gate 152*0Sstevel@tonic-gate /* 153*0Sstevel@tonic-gate * structure used to do accounting for interrupt usage. Specifically, 154*0Sstevel@tonic-gate * used to determine when CYCLE_LOST or CYCLE_INCONSISTENT storms 155*0Sstevel@tonic-gate * should cause us to disable those interrupts. 156*0Sstevel@tonic-gate */ 157*0Sstevel@tonic-gate typedef struct hci1394_intr_thresh_s { 158*0Sstevel@tonic-gate hrtime_t last_intr_time; 159*0Sstevel@tonic-gate hrtime_t delta_t_thresh; 160*0Sstevel@tonic-gate int delta_t_counter; 161*0Sstevel@tonic-gate int counter_thresh; 162*0Sstevel@tonic-gate } hci1394_intr_thresh_t; 163*0Sstevel@tonic-gate 164*0Sstevel@tonic-gate /* defs for the hci1394_intr_thresh_t struct */ 165*0Sstevel@tonic-gate #define HCI1394_CYC_LOST_DELTA 400000; /* 400ms */ 166*0Sstevel@tonic-gate #define HCI1394_CYC_LOST_COUNT 25; 167*0Sstevel@tonic-gate #define HCI1394_CYC_INCON_DELTA 400000; /* 400ms */ 168*0Sstevel@tonic-gate #define HCI1394_CYC_INCON_COUNT 25; 169*0Sstevel@tonic-gate 170*0Sstevel@tonic-gate /* 171*0Sstevel@tonic-gate * Structure used for tracking all transmit and receive isochronous contexts 172*0Sstevel@tonic-gate * Also contains the information necessary for tracking CYCLE_LOST and 173*0Sstevel@tonic-gate * CYCLE_INCONSISTENT interrupt usage. 174*0Sstevel@tonic-gate * The ctxt_list mutex protects the in-use status of the contexts while 175*0Sstevel@tonic-gate * searching for a free isoch context to use in hci1394_alloc_isoch_dma(), 176*0Sstevel@tonic-gate * during interrupt processing, and during free_isoch_dma processing. 177*0Sstevel@tonic-gate * An openHCI 1.0 hardware implementation may support up to 32 separate DMA 178*0Sstevel@tonic-gate * engines each for transmit and receive, referred to as "contexts". 179*0Sstevel@tonic-gate * The number of supported contexts is determined during ohci board 180*0Sstevel@tonic-gate * initialization, and can be different for transmit vs. receive. 181*0Sstevel@tonic-gate */ 182*0Sstevel@tonic-gate typedef struct hci1394_isoch_s { 183*0Sstevel@tonic-gate hci1394_intr_thresh_t cycle_lost_thresh; 184*0Sstevel@tonic-gate hci1394_intr_thresh_t cycle_incon_thresh; 185*0Sstevel@tonic-gate int isoch_dma_alloc_cnt; 186*0Sstevel@tonic-gate int unused; 187*0Sstevel@tonic-gate int ctxt_xmit_count; 188*0Sstevel@tonic-gate int ctxt_recv_count; 189*0Sstevel@tonic-gate hci1394_iso_ctxt_t ctxt_xmit[HCI1394_MAX_ISOCH_CONTEXTS]; 190*0Sstevel@tonic-gate hci1394_iso_ctxt_t ctxt_recv[HCI1394_MAX_ISOCH_CONTEXTS]; 191*0Sstevel@tonic-gate kmutex_t ctxt_list_mutex; 192*0Sstevel@tonic-gate } hci1394_isoch_t; 193*0Sstevel@tonic-gate 194*0Sstevel@tonic-gate 195*0Sstevel@tonic-gate void hci1394_isoch_init(hci1394_drvinfo_t *drvinfo, hci1394_ohci_handle_t ohci, 196*0Sstevel@tonic-gate hci1394_isoch_handle_t *isoch_hdl); 197*0Sstevel@tonic-gate void hci1394_isoch_fini(hci1394_isoch_handle_t *isoch_hdl); 198*0Sstevel@tonic-gate void hci1394_isoch_cycle_inconsistent(hci1394_state_t *soft_statep); 199*0Sstevel@tonic-gate void hci1394_isoch_cycle_lost(hci1394_state_t *soft_statep); 200*0Sstevel@tonic-gate int hci1394_isoch_resume(hci1394_state_t *soft_statep); 201*0Sstevel@tonic-gate void hci1394_isoch_error_ints_enable(hci1394_state_t *soft_statep); 202*0Sstevel@tonic-gate 203*0Sstevel@tonic-gate int hci1394_isoch_recv_count_get(hci1394_isoch_handle_t isoch_hdl); 204*0Sstevel@tonic-gate hci1394_iso_ctxt_t *hci1394_isoch_recv_ctxt_get(hci1394_isoch_handle_t 205*0Sstevel@tonic-gate isoch_hdl, int num); 206*0Sstevel@tonic-gate int hci1394_isoch_xmit_count_get(hci1394_isoch_handle_t isoch_hdl); 207*0Sstevel@tonic-gate hci1394_iso_ctxt_t *hci1394_isoch_xmit_ctxt_get(hci1394_isoch_handle_t 208*0Sstevel@tonic-gate isoch_hdl, int num); 209*0Sstevel@tonic-gate 210*0Sstevel@tonic-gate 211*0Sstevel@tonic-gate int hci1394_alloc_isoch_dma(void *hal_private, id1394_isoch_dmainfo_t *idi, 212*0Sstevel@tonic-gate void **hal_idma_handle, int *resultp); 213*0Sstevel@tonic-gate void hci1394_free_isoch_dma(void *hal_private, void *hal_isoch_dma_handle); 214*0Sstevel@tonic-gate int hci1394_start_isoch_dma(void *hal_private, void *hal_isoch_dma_handle, 215*0Sstevel@tonic-gate id1394_isoch_dma_ctrlinfo_t *idma_ctrlinfo, uint_t flags, int *resultp); 216*0Sstevel@tonic-gate int hci1394_update_isoch_dma(void *hal_private, void *hal_isoch_dma_handle, 217*0Sstevel@tonic-gate id1394_isoch_dma_updateinfo_t *idma_updateinfop, uint_t flags, 218*0Sstevel@tonic-gate int *resultp); 219*0Sstevel@tonic-gate void hci1394_stop_isoch_dma(void *hal_private, void *hal_isoch_dma_handle, 220*0Sstevel@tonic-gate int *resultp); 221*0Sstevel@tonic-gate void hci1394_do_stop(hci1394_state_t *soft_statep, hci1394_iso_ctxt_t *ctxtp, 222*0Sstevel@tonic-gate boolean_t do_callback, id1394_isoch_dma_stopped_t stop_args); 223*0Sstevel@tonic-gate 224*0Sstevel@tonic-gate #ifdef __cplusplus 225*0Sstevel@tonic-gate } 226*0Sstevel@tonic-gate #endif 227*0Sstevel@tonic-gate 228*0Sstevel@tonic-gate #endif /* _SYS_1394_ADAPTERS_HCI1394_ISOCH_H */ 229