1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright (c) 1999-2000 by Sun Microsystems, Inc. 24*0Sstevel@tonic-gate * All rights reserved. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SYS_1394_ADAPTERS_HCI1394_ASYNC_H 28*0Sstevel@tonic-gate #define _SYS_1394_ADAPTERS_HCI1394_ASYNC_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate /* 33*0Sstevel@tonic-gate * hci1394_async.h 34*0Sstevel@tonic-gate * These routines the 1394 asynchronous dma engines. These include incoming 35*0Sstevel@tonic-gate * and outgoing reads, writes, and lock and their associated responses. 36*0Sstevel@tonic-gate */ 37*0Sstevel@tonic-gate 38*0Sstevel@tonic-gate #ifdef __cplusplus 39*0Sstevel@tonic-gate extern "C" { 40*0Sstevel@tonic-gate #endif 41*0Sstevel@tonic-gate 42*0Sstevel@tonic-gate #include <sys/ddi.h> 43*0Sstevel@tonic-gate #include <sys/modctl.h> 44*0Sstevel@tonic-gate #include <sys/sunddi.h> 45*0Sstevel@tonic-gate #include <sys/types.h> 46*0Sstevel@tonic-gate 47*0Sstevel@tonic-gate #include <sys/1394/h1394.h> 48*0Sstevel@tonic-gate 49*0Sstevel@tonic-gate #include <sys/1394/adapters/hci1394_def.h> 50*0Sstevel@tonic-gate #include <sys/1394/adapters/hci1394_tlist.h> 51*0Sstevel@tonic-gate #include <sys/1394/adapters/hci1394_q.h> 52*0Sstevel@tonic-gate 53*0Sstevel@tonic-gate 54*0Sstevel@tonic-gate /* 55*0Sstevel@tonic-gate * Async descriptor and data buffer sizes. The AR descriptor buffers do not need 56*0Sstevel@tonic-gate * to be very big. There will be 1 16 byte IM for every AR data buffer. If we 57*0Sstevel@tonic-gate * alloc a 16KByte ARRESP data buffer on X86, we could get 4 4KByte cookies. 58*0Sstevel@tonic-gate * This would use up 64 bytes in the descriptor buffer. We will never need more 59*0Sstevel@tonic-gate * space than that. A 256 byte descriptor should handle a 64K buffer on x86 60*0Sstevel@tonic-gate * if it is broken into 16 cookies. 61*0Sstevel@tonic-gate */ 62*0Sstevel@tonic-gate #define ASYNC_ATREQ_DESC_SIZE 16384 63*0Sstevel@tonic-gate #define ASYNC_ATREQ_DATA_SIZE 16384 64*0Sstevel@tonic-gate #define ASYNC_ARRESP_DESC_SIZE 256 65*0Sstevel@tonic-gate #define ASYNC_ARRESP_DATA_SIZE 16384 66*0Sstevel@tonic-gate #define ASYNC_ARREQ_DESC_SIZE 256 67*0Sstevel@tonic-gate #define ASYNC_ARREQ_DATA_SIZE 16384 68*0Sstevel@tonic-gate #define ASYNC_ATRESP_DESC_SIZE 16384 69*0Sstevel@tonic-gate #define ASYNC_ATRESP_DATA_SIZE 16384 70*0Sstevel@tonic-gate 71*0Sstevel@tonic-gate 72*0Sstevel@tonic-gate /* handle passed back from init() and used for rest of functions */ 73*0Sstevel@tonic-gate typedef struct hci1394_async_s *hci1394_async_handle_t; 74*0Sstevel@tonic-gate 75*0Sstevel@tonic-gate /* 76*0Sstevel@tonic-gate * Async Command State. This state is used to catch a race condition between 77*0Sstevel@tonic-gate * the ATREQ complete interrupt handler and the ARRESP interrupt handler. The 78*0Sstevel@tonic-gate * ATREQ will always complete before the ARRESP arrives, but SW may not see it 79*0Sstevel@tonic-gate * that way. See hci1394_async_atreq_process() for more information on this. 80*0Sstevel@tonic-gate */ 81*0Sstevel@tonic-gate typedef enum { 82*0Sstevel@tonic-gate HCI1394_CMD_STATE_IN_PROGRESS, 83*0Sstevel@tonic-gate HCI1394_CMD_STATE_PENDING, 84*0Sstevel@tonic-gate HCI1394_CMD_STATE_COMPLETED 85*0Sstevel@tonic-gate } hci1394_async_cstate_t; 86*0Sstevel@tonic-gate 87*0Sstevel@tonic-gate 88*0Sstevel@tonic-gate typedef struct hci1394_async_cmd_s { 89*0Sstevel@tonic-gate /* Pointer to framework command allocted by services layer */ 90*0Sstevel@tonic-gate cmd1394_cmd_t *ac_cmd; 91*0Sstevel@tonic-gate 92*0Sstevel@tonic-gate /* 93*0Sstevel@tonic-gate * Pointer to HAL/SL private area in the command. This is private info 94*0Sstevel@tonic-gate * shared between the HAL and Services Layer on a per command basis. 95*0Sstevel@tonic-gate */ 96*0Sstevel@tonic-gate h1394_cmd_priv_t *ac_priv; 97*0Sstevel@tonic-gate 98*0Sstevel@tonic-gate /* 99*0Sstevel@tonic-gate * Status on if we allocated a tlabel for an ATREQ. Normally we will 100*0Sstevel@tonic-gate * allocate a tlabel with every ATREQ. But, we will not allocate a 101*0Sstevel@tonic-gate * tlabel for a PHY packet. When we initialize the command, we will 102*0Sstevel@tonic-gate * assume that we are going to allocate a tlabel. The async phy command 103*0Sstevel@tonic-gate * will "override" this setting and set ac_tlabel_alloc to b_false. 104*0Sstevel@tonic-gate */ 105*0Sstevel@tonic-gate boolean_t ac_tlabel_alloc; 106*0Sstevel@tonic-gate 107*0Sstevel@tonic-gate /* handle for tlabel logic */ 108*0Sstevel@tonic-gate hci1394_tlabel_info_t ac_tlabel; 109*0Sstevel@tonic-gate 110*0Sstevel@tonic-gate /* 111*0Sstevel@tonic-gate * This is used for ARREQs. When we get a block read or write request, 112*0Sstevel@tonic-gate * we allocate a mblk to put the data into. After the ATRESP has been 113*0Sstevel@tonic-gate * sent out and has completed, hci1394_async_response_complete() is 114*0Sstevel@tonic-gate * called to free up the ARREQ resources which were allocated. This 115*0Sstevel@tonic-gate * routine will free the mblk if we allocated it in ARREQ. If an ARREQ 116*0Sstevel@tonic-gate * block write is received and the target driver wishes to keep the 117*0Sstevel@tonic-gate * mblk w/ the data (to pass it up a stream), but releases the command, 118*0Sstevel@tonic-gate * it can set the mblk pointer in the command to null. We will check 119*0Sstevel@tonic-gate * for mblk being == to NULL even if ac_mblk_alloc is set to true. 120*0Sstevel@tonic-gate */ 121*0Sstevel@tonic-gate boolean_t ac_mblk_alloc; 122*0Sstevel@tonic-gate 123*0Sstevel@tonic-gate /* 124*0Sstevel@tonic-gate * ac_status contains the 1394 RESP for an ARRESP or the ACK for ARREQ. 125*0Sstevel@tonic-gate * This status is set in either hci1394_async_arresp_read() or 126*0Sstevel@tonic-gate * hci1394_arreq_read() 127*0Sstevel@tonic-gate */ 128*0Sstevel@tonic-gate int ac_status; 129*0Sstevel@tonic-gate 130*0Sstevel@tonic-gate /* 131*0Sstevel@tonic-gate * Destination packet was sent to. This is used to determine if the 132*0Sstevel@tonic-gate * packet was broadcast or not in hci1394_async_arreq_read(). 133*0Sstevel@tonic-gate */ 134*0Sstevel@tonic-gate uint_t ac_dest; 135*0Sstevel@tonic-gate 136*0Sstevel@tonic-gate /* 137*0Sstevel@tonic-gate * Async command state. See comments above for more information. Other 138*0Sstevel@tonic-gate * than initialization, this field is only accessed in the ISR. State 139*0Sstevel@tonic-gate * is only used in ATREQ/ARRESP processing. 140*0Sstevel@tonic-gate */ 141*0Sstevel@tonic-gate hci1394_async_cstate_t ac_state; 142*0Sstevel@tonic-gate 143*0Sstevel@tonic-gate /* 144*0Sstevel@tonic-gate * Pointer back to the Async private state. This allows us to access 145*0Sstevel@tonic-gate * the async state structures if all we have is a pointer to the async 146*0Sstevel@tonic-gate * command. 147*0Sstevel@tonic-gate */ 148*0Sstevel@tonic-gate struct hci1394_async_s *ac_async; 149*0Sstevel@tonic-gate 150*0Sstevel@tonic-gate /* 151*0Sstevel@tonic-gate * pending list node structure. If a command is pended, this node is 152*0Sstevel@tonic-gate * what's passed to the tlist code to add the node to the pending list. 153*0Sstevel@tonic-gate * It contains all the pointers the linked list needs so that we do not 154*0Sstevel@tonic-gate * need to allocate any space every time we add something to the list. 155*0Sstevel@tonic-gate */ 156*0Sstevel@tonic-gate hci1394_tlist_node_t ac_plist_node; 157*0Sstevel@tonic-gate 158*0Sstevel@tonic-gate /* 159*0Sstevel@tonic-gate * hci1394_q information about this command. This is used for AT 160*0Sstevel@tonic-gate * commands. It contains information passed down to the hci1394_q_at*() 161*0Sstevel@tonic-gate * routines like qc_timestamp which is used to tell the HW when an 162*0Sstevel@tonic-gate * ATRESP has timed out out. The status of the AT command is returned 163*0Sstevel@tonic-gate * in qc_status after calling hci1394_q_at_next(). The rest of the 164*0Sstevel@tonic-gate * structure members are private members used to track the descriptor 165*0Sstevel@tonic-gate * and data buffer usage. 166*0Sstevel@tonic-gate */ 167*0Sstevel@tonic-gate hci1394_q_cmd_t ac_qcmd; 168*0Sstevel@tonic-gate } hci1394_async_cmd_t; 169*0Sstevel@tonic-gate 170*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Used only by one thread", hci1394_async_cmd_s \ 171*0Sstevel@tonic-gate hci1394_async_cmd_s::ac_qcmd.qc_arg \ 172*0Sstevel@tonic-gate hci1394_async_cmd_s::ac_qcmd.qc_generation \ 173*0Sstevel@tonic-gate hci1394_async_cmd_s::ac_qcmd.qc_timestamp \ 174*0Sstevel@tonic-gate hci1394_async_cmd_s::ac_tlabel_alloc \ 175*0Sstevel@tonic-gate hci1394_async_cmd_s::ac_tlabel.tbi_destination \ 176*0Sstevel@tonic-gate hci1394_async_cmd_s::ac_tlabel.tbi_tlabel)) 177*0Sstevel@tonic-gate 178*0Sstevel@tonic-gate /* 179*0Sstevel@tonic-gate * async private state information. It contains handles for the various modules 180*0Sstevel@tonic-gate * that async uses. 181*0Sstevel@tonic-gate */ 182*0Sstevel@tonic-gate typedef struct hci1394_async_s { 183*0Sstevel@tonic-gate hci1394_tlist_handle_t as_pending_list; 184*0Sstevel@tonic-gate hci1394_ohci_handle_t as_ohci; 185*0Sstevel@tonic-gate hci1394_tlabel_handle_t as_tlabel; 186*0Sstevel@tonic-gate hci1394_csr_handle_t as_csr; 187*0Sstevel@tonic-gate hci1394_q_handle_t as_atreq_q; 188*0Sstevel@tonic-gate hci1394_q_handle_t as_arresp_q; 189*0Sstevel@tonic-gate hci1394_q_handle_t as_arreq_q; 190*0Sstevel@tonic-gate hci1394_q_handle_t as_atresp_q; 191*0Sstevel@tonic-gate hci1394_drvinfo_t *as_drvinfo; 192*0Sstevel@tonic-gate 193*0Sstevel@tonic-gate /* 194*0Sstevel@tonic-gate * as_flushing_arreq is used in bus reset processing. It is set by 195*0Sstevel@tonic-gate * hci1394_async_arreq_flush() and tells hci1394_async_arreq_process() 196*0Sstevel@tonic-gate * not to send the ARREQ up to the Services Layer. It will be set to 197*0Sstevel@tonic-gate * FALSE by hci1394_async_arreq_read_phy() when a bus reset token with 198*0Sstevel@tonic-gate * the current bus generation is found. as_phy_reset is used to store 199*0Sstevel@tonic-gate * the last PHY packet generation seen in the ARREQ Q. The HW puts a 200*0Sstevel@tonic-gate * token in the ARREQ Q so that the SW can flush the Q up to and 201*0Sstevel@tonic-gate * including the token. 202*0Sstevel@tonic-gate */ 203*0Sstevel@tonic-gate boolean_t as_flushing_arreq; 204*0Sstevel@tonic-gate uint_t as_phy_reset; 205*0Sstevel@tonic-gate 206*0Sstevel@tonic-gate /* 207*0Sstevel@tonic-gate * as_atomic_lookup is used to protect the cmd from a race condition 208*0Sstevel@tonic-gate * between the ARRESP and the Pending Timeout callback. This is 209*0Sstevel@tonic-gate * explained in more detail in hci1394_async_atreq_process(). 210*0Sstevel@tonic-gate */ 211*0Sstevel@tonic-gate kmutex_t as_atomic_lookup; 212*0Sstevel@tonic-gate } hci1394_async_t; 213*0Sstevel@tonic-gate 214*0Sstevel@tonic-gate _NOTE(SCHEME_PROTECTS_DATA("Used only by one thread", \ 215*0Sstevel@tonic-gate hci1394_async_s::as_flushing_arreq hci1394_async_s::as_phy_reset)) 216*0Sstevel@tonic-gate 217*0Sstevel@tonic-gate int hci1394_async_init(hci1394_drvinfo_t *drvinfo, 218*0Sstevel@tonic-gate hci1394_ohci_handle_t ohci_handle, hci1394_csr_handle_t csr_handle, 219*0Sstevel@tonic-gate hci1394_async_handle_t *async_handle); 220*0Sstevel@tonic-gate void hci1394_async_fini(hci1394_async_handle_t *async_handle); 221*0Sstevel@tonic-gate void hci1394_async_suspend(hci1394_async_handle_t async_handle); 222*0Sstevel@tonic-gate int hci1394_async_resume(hci1394_async_handle_t async_handle); 223*0Sstevel@tonic-gate uint_t hci1394_async_cmd_overhead(); 224*0Sstevel@tonic-gate 225*0Sstevel@tonic-gate void hci1394_async_flush(hci1394_async_handle_t async_handle); 226*0Sstevel@tonic-gate void hci1394_async_atreq_reset(hci1394_async_handle_t async_handle); 227*0Sstevel@tonic-gate void hci1394_async_atresp_reset(hci1394_async_handle_t async_handle); 228*0Sstevel@tonic-gate void hci1394_async_pending_timeout_update(hci1394_async_handle_t async_handle, 229*0Sstevel@tonic-gate hrtime_t timeout); 230*0Sstevel@tonic-gate 231*0Sstevel@tonic-gate int hci1394_async_atreq_process(hci1394_async_handle_t async_handle, 232*0Sstevel@tonic-gate boolean_t flush_q, boolean_t *request_available); 233*0Sstevel@tonic-gate int hci1394_async_arresp_process(hci1394_async_handle_t async_handle, 234*0Sstevel@tonic-gate boolean_t *response_available); 235*0Sstevel@tonic-gate int hci1394_async_arreq_process(hci1394_async_handle_t async_handle, 236*0Sstevel@tonic-gate boolean_t *request_available); 237*0Sstevel@tonic-gate int hci1394_async_atresp_process(hci1394_async_handle_t async_handle, 238*0Sstevel@tonic-gate boolean_t flush_q, boolean_t *response_available); 239*0Sstevel@tonic-gate 240*0Sstevel@tonic-gate int hci1394_async_phy(hci1394_async_handle_t async_handle, 241*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 242*0Sstevel@tonic-gate int hci1394_async_write(hci1394_async_handle_t async_handle, 243*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 244*0Sstevel@tonic-gate int hci1394_async_read(hci1394_async_handle_t async_handle, 245*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 246*0Sstevel@tonic-gate int hci1394_async_lock(hci1394_async_handle_t async_handle, 247*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 248*0Sstevel@tonic-gate int hci1394_async_write_response(hci1394_async_handle_t async_handle, 249*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 250*0Sstevel@tonic-gate int hci1394_async_read_response(hci1394_async_handle_t async_handle, 251*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 252*0Sstevel@tonic-gate int hci1394_async_lock_response(hci1394_async_handle_t async_handle, 253*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv, int *result); 254*0Sstevel@tonic-gate void hci1394_async_response_complete(hci1394_async_handle_t async_handle, 255*0Sstevel@tonic-gate cmd1394_cmd_t *cmd, h1394_cmd_priv_t *cmd_priv); 256*0Sstevel@tonic-gate 257*0Sstevel@tonic-gate 258*0Sstevel@tonic-gate #ifdef __cplusplus 259*0Sstevel@tonic-gate } 260*0Sstevel@tonic-gate #endif 261*0Sstevel@tonic-gate 262*0Sstevel@tonic-gate #endif /* _SYS_1394_ADAPTERS_HCI1394_ASYNC_H */ 263