xref: /onnv-gate/usr/src/uts/common/io/wpi/wpi.c (revision 7865:597819f481f4)
14128Shx147065 /*
26062Shx147065  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
34128Shx147065  * Use is subject to license terms.
44128Shx147065  */
54128Shx147065 
64128Shx147065 /*
74128Shx147065  * Copyright (c) 2006
84128Shx147065  *	Damien Bergamini <damien.bergamini@free.fr>
94128Shx147065  *
104128Shx147065  * Permission to use, copy, modify, and distribute this software for any
114128Shx147065  * purpose with or without fee is hereby granted, provided that the above
124128Shx147065  * copyright notice and this permission notice appear in all copies.
134128Shx147065  *
144128Shx147065  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
154128Shx147065  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
164128Shx147065  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
174128Shx147065  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
184128Shx147065  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
194128Shx147065  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
204128Shx147065  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
214128Shx147065  */
224128Shx147065 
234128Shx147065 /*
244128Shx147065  * Driver for Intel PRO/Wireless 3945ABG 802.11 network adapters.
254128Shx147065  */
264128Shx147065 
274128Shx147065 #include <sys/types.h>
284128Shx147065 #include <sys/byteorder.h>
294128Shx147065 #include <sys/conf.h>
304128Shx147065 #include <sys/cmn_err.h>
314128Shx147065 #include <sys/stat.h>
324128Shx147065 #include <sys/ddi.h>
334128Shx147065 #include <sys/sunddi.h>
344128Shx147065 #include <sys/strsubr.h>
354128Shx147065 #include <sys/ethernet.h>
364128Shx147065 #include <inet/common.h>
374128Shx147065 #include <inet/nd.h>
384128Shx147065 #include <inet/mi.h>
394128Shx147065 #include <sys/note.h>
404128Shx147065 #include <sys/stream.h>
414128Shx147065 #include <sys/strsun.h>
424128Shx147065 #include <sys/modctl.h>
434128Shx147065 #include <sys/devops.h>
444128Shx147065 #include <sys/dlpi.h>
454128Shx147065 #include <sys/mac.h>
464128Shx147065 #include <sys/mac_wifi.h>
474128Shx147065 #include <sys/net80211.h>
484128Shx147065 #include <sys/net80211_proto.h>
494128Shx147065 #include <sys/varargs.h>
504128Shx147065 #include <sys/policy.h>
514128Shx147065 #include <sys/pci.h>
524128Shx147065 
534128Shx147065 #include "wpireg.h"
544128Shx147065 #include "wpivar.h"
554128Shx147065 #include <inet/wifi_ioctl.h>
564128Shx147065 
574128Shx147065 #ifdef DEBUG
584128Shx147065 #define	WPI_DEBUG_80211		(1 << 0)
594128Shx147065 #define	WPI_DEBUG_CMD		(1 << 1)
604128Shx147065 #define	WPI_DEBUG_DMA		(1 << 2)
614128Shx147065 #define	WPI_DEBUG_EEPROM	(1 << 3)
624128Shx147065 #define	WPI_DEBUG_FW		(1 << 4)
634128Shx147065 #define	WPI_DEBUG_HW		(1 << 5)
644128Shx147065 #define	WPI_DEBUG_INTR		(1 << 6)
654128Shx147065 #define	WPI_DEBUG_MRR		(1 << 7)
664128Shx147065 #define	WPI_DEBUG_PIO		(1 << 8)
674128Shx147065 #define	WPI_DEBUG_RX		(1 << 9)
684128Shx147065 #define	WPI_DEBUG_SCAN		(1 << 10)
694128Shx147065 #define	WPI_DEBUG_TX		(1 << 11)
704128Shx147065 #define	WPI_DEBUG_RATECTL	(1 << 12)
714128Shx147065 #define	WPI_DEBUG_RADIO		(1 << 13)
726062Shx147065 #define	WPI_DEBUG_RESUME	(1 << 14)
734128Shx147065 uint32_t wpi_dbg_flags = 0;
744128Shx147065 #define	WPI_DBG(x) \
754128Shx147065 	wpi_dbg x
764128Shx147065 #else
774128Shx147065 #define	WPI_DBG(x)
784128Shx147065 #endif
794128Shx147065 
804128Shx147065 static void	*wpi_soft_state_p = NULL;
814128Shx147065 static uint8_t wpi_fw_bin [] = {
824128Shx147065 #include "fw-wpi/ipw3945.ucode.hex"
834128Shx147065 };
844128Shx147065 
854128Shx147065 /* DMA attributes for a shared page */
864128Shx147065 static ddi_dma_attr_t sh_dma_attr = {
874128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
884128Shx147065 	0,		/* lowest usable address */
894128Shx147065 	0xffffffffU,	/* highest usable address */
904128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
914128Shx147065 	0x1000,		/* alignment in bytes */
924128Shx147065 	0x1000,		/* burst sizes (any?) */
934128Shx147065 	1,		/* minimum transfer */
944128Shx147065 	0xffffffffU,	/* maximum transfer */
954128Shx147065 	0xffffffffU,	/* maximum segment length */
964128Shx147065 	1,		/* maximum number of segments */
974128Shx147065 	1,		/* granularity */
984128Shx147065 	0,		/* flags (reserved) */
994128Shx147065 };
1004128Shx147065 
1014128Shx147065 /* DMA attributes for a ring descriptor */
1024128Shx147065 static ddi_dma_attr_t ring_desc_dma_attr = {
1034128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1044128Shx147065 	0,		/* lowest usable address */
1054128Shx147065 	0xffffffffU,	/* highest usable address */
1064128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1074128Shx147065 	0x4000,		/* alignment in bytes */
1084128Shx147065 	0x100,		/* burst sizes (any?) */
1094128Shx147065 	1,		/* minimum transfer */
1104128Shx147065 	0xffffffffU,	/* maximum transfer */
1114128Shx147065 	0xffffffffU,	/* maximum segment length */
1124128Shx147065 	1,		/* maximum number of segments */
1134128Shx147065 	1,		/* granularity */
1144128Shx147065 	0,		/* flags (reserved) */
1154128Shx147065 };
1164128Shx147065 
1174128Shx147065 
1184128Shx147065 /* DMA attributes for a tx cmd */
1194128Shx147065 static ddi_dma_attr_t tx_cmd_dma_attr = {
1204128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1214128Shx147065 	0,		/* lowest usable address */
1224128Shx147065 	0xffffffffU,	/* highest usable address */
1234128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1244128Shx147065 	4,		/* alignment in bytes */
1254128Shx147065 	0x100,		/* burst sizes (any?) */
1264128Shx147065 	1,		/* minimum transfer */
1274128Shx147065 	0xffffffffU,	/* maximum transfer */
1284128Shx147065 	0xffffffffU,	/* maximum segment length */
1294128Shx147065 	1,		/* maximum number of segments */
1304128Shx147065 	1,		/* granularity */
1314128Shx147065 	0,		/* flags (reserved) */
1324128Shx147065 };
1334128Shx147065 
1344128Shx147065 /* DMA attributes for a rx buffer */
1354128Shx147065 static ddi_dma_attr_t rx_buffer_dma_attr = {
1364128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1374128Shx147065 	0,		/* lowest usable address */
1384128Shx147065 	0xffffffffU,	/* highest usable address */
1394128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1404128Shx147065 	1,		/* alignment in bytes */
1414128Shx147065 	0x100,		/* burst sizes (any?) */
1424128Shx147065 	1,		/* minimum transfer */
1434128Shx147065 	0xffffffffU,	/* maximum transfer */
1444128Shx147065 	0xffffffffU,	/* maximum segment length */
1454128Shx147065 	1,		/* maximum number of segments */
1464128Shx147065 	1,		/* granularity */
1474128Shx147065 	0,		/* flags (reserved) */
1484128Shx147065 };
1494128Shx147065 
1504128Shx147065 /*
1514128Shx147065  * DMA attributes for a tx buffer.
1524128Shx147065  * the maximum number of segments is 4 for the hardware.
1534128Shx147065  * now all the wifi drivers put the whole frame in a single
1544128Shx147065  * descriptor, so we define the maximum  number of segments 4,
1554128Shx147065  * just the same as the rx_buffer. we consider leverage the HW
1564128Shx147065  * ability in the future, that is why we don't define rx and tx
1574128Shx147065  * buffer_dma_attr as the same.
1584128Shx147065  */
1594128Shx147065 static ddi_dma_attr_t tx_buffer_dma_attr = {
1604128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1614128Shx147065 	0,		/* lowest usable address */
1624128Shx147065 	0xffffffffU,	/* highest usable address */
1634128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1644128Shx147065 	1,		/* alignment in bytes */
1654128Shx147065 	0x100,		/* burst sizes (any?) */
1664128Shx147065 	1,		/* minimum transfer */
1674128Shx147065 	0xffffffffU,	/* maximum transfer */
1684128Shx147065 	0xffffffffU,	/* maximum segment length */
1694128Shx147065 	1,		/* maximum number of segments */
1704128Shx147065 	1,		/* granularity */
1714128Shx147065 	0,		/* flags (reserved) */
1724128Shx147065 };
1734128Shx147065 
1744128Shx147065 /* DMA attributes for a load firmware */
1754128Shx147065 static ddi_dma_attr_t fw_buffer_dma_attr = {
1764128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1774128Shx147065 	0,		/* lowest usable address */
1784128Shx147065 	0xffffffffU,	/* highest usable address */
1794128Shx147065 	0x7fffffff,	/* maximum DMAable byte count */
1804128Shx147065 	4,		/* alignment in bytes */
1814128Shx147065 	0x100,		/* burst sizes (any?) */
1824128Shx147065 	1,		/* minimum transfer */
1834128Shx147065 	0xffffffffU,	/* maximum transfer */
1844128Shx147065 	0xffffffffU,	/* maximum segment length */
1854128Shx147065 	4,		/* maximum number of segments */
1864128Shx147065 	1,		/* granularity */
1874128Shx147065 	0,		/* flags (reserved) */
1884128Shx147065 };
1894128Shx147065 
1904128Shx147065 /* regs access attributes */
1914128Shx147065 static ddi_device_acc_attr_t wpi_reg_accattr = {
1924128Shx147065 	DDI_DEVICE_ATTR_V0,
1934128Shx147065 	DDI_STRUCTURE_LE_ACC,
1944128Shx147065 	DDI_STRICTORDER_ACC,
1954128Shx147065 	DDI_DEFAULT_ACC
1964128Shx147065 };
1974128Shx147065 
1984128Shx147065 /* DMA access attributes */
1994128Shx147065 static ddi_device_acc_attr_t wpi_dma_accattr = {
2004128Shx147065 	DDI_DEVICE_ATTR_V0,
2014128Shx147065 	DDI_NEVERSWAP_ACC,
2024128Shx147065 	DDI_STRICTORDER_ACC,
2034128Shx147065 	DDI_DEFAULT_ACC
2044128Shx147065 };
2054128Shx147065 
2064128Shx147065 static int	wpi_ring_init(wpi_sc_t *);
2074128Shx147065 static void	wpi_ring_free(wpi_sc_t *);
2084128Shx147065 static int	wpi_alloc_shared(wpi_sc_t *);
2094128Shx147065 static void	wpi_free_shared(wpi_sc_t *);
2104128Shx147065 static int	wpi_alloc_fw_dma(wpi_sc_t *);
2114128Shx147065 static void	wpi_free_fw_dma(wpi_sc_t *);
2124128Shx147065 static int	wpi_alloc_rx_ring(wpi_sc_t *);
2134128Shx147065 static void	wpi_reset_rx_ring(wpi_sc_t *);
2144128Shx147065 static void	wpi_free_rx_ring(wpi_sc_t *);
2154128Shx147065 static int	wpi_alloc_tx_ring(wpi_sc_t *, wpi_tx_ring_t *, int, int);
2164128Shx147065 static void	wpi_reset_tx_ring(wpi_sc_t *, wpi_tx_ring_t *);
2174128Shx147065 static void	wpi_free_tx_ring(wpi_sc_t *, wpi_tx_ring_t *);
2184128Shx147065 
2194128Shx147065 static ieee80211_node_t *wpi_node_alloc(ieee80211com_t *);
2204128Shx147065 static void	wpi_node_free(ieee80211_node_t *);
2214128Shx147065 static int	wpi_newstate(ieee80211com_t *, enum ieee80211_state, int);
2225296Szf162725 static int	wpi_key_set(ieee80211com_t *, const struct ieee80211_key *,
2235296Szf162725     const uint8_t mac[IEEE80211_ADDR_LEN]);
2244128Shx147065 static void	wpi_mem_lock(wpi_sc_t *);
2254128Shx147065 static void	wpi_mem_unlock(wpi_sc_t *);
2264128Shx147065 static uint32_t	wpi_mem_read(wpi_sc_t *, uint16_t);
2274128Shx147065 static void	wpi_mem_write(wpi_sc_t *, uint16_t, uint32_t);
2284128Shx147065 static void	wpi_mem_write_region_4(wpi_sc_t *, uint16_t,
2294128Shx147065 		    const uint32_t *, int);
2304128Shx147065 static uint16_t	wpi_read_prom_word(wpi_sc_t *, uint32_t);
2314128Shx147065 static int	wpi_load_microcode(wpi_sc_t *);
2324128Shx147065 static int	wpi_load_firmware(wpi_sc_t *, uint32_t);
2334128Shx147065 static void	wpi_rx_intr(wpi_sc_t *, wpi_rx_desc_t *,
2344128Shx147065 		    wpi_rx_data_t *);
2354128Shx147065 static void	wpi_tx_intr(wpi_sc_t *, wpi_rx_desc_t *,
2364128Shx147065 		    wpi_rx_data_t *);
2374128Shx147065 static void	wpi_cmd_intr(wpi_sc_t *, wpi_rx_desc_t *);
2384128Shx147065 static uint_t	wpi_intr(caddr_t);
2394128Shx147065 static uint_t	wpi_notif_softintr(caddr_t);
2404128Shx147065 static uint8_t	wpi_plcp_signal(int);
2414128Shx147065 static void	wpi_read_eeprom(wpi_sc_t *);
2424128Shx147065 static int	wpi_cmd(wpi_sc_t *, int, const void *, int, int);
2434128Shx147065 static int	wpi_mrr_setup(wpi_sc_t *);
2444128Shx147065 static void	wpi_set_led(wpi_sc_t *, uint8_t, uint8_t, uint8_t);
2454128Shx147065 static int	wpi_auth(wpi_sc_t *);
2464128Shx147065 static int	wpi_scan(wpi_sc_t *);
2474128Shx147065 static int	wpi_config(wpi_sc_t *);
2484128Shx147065 static void	wpi_stop_master(wpi_sc_t *);
2494128Shx147065 static int	wpi_power_up(wpi_sc_t *);
2504128Shx147065 static int	wpi_reset(wpi_sc_t *);
2514128Shx147065 static void	wpi_hw_config(wpi_sc_t *);
2524128Shx147065 static int	wpi_init(wpi_sc_t *);
2534128Shx147065 static void	wpi_stop(wpi_sc_t *);
2544128Shx147065 static void	wpi_amrr_init(wpi_amrr_t *);
2554128Shx147065 static void	wpi_amrr_timeout(wpi_sc_t *);
2564128Shx147065 static void	wpi_amrr_ratectl(void *, ieee80211_node_t *);
2574128Shx147065 
2584128Shx147065 static int wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
2594128Shx147065 static int wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
2604128Shx147065 
2614128Shx147065 /*
2624128Shx147065  * GLD specific operations
2634128Shx147065  */
2644128Shx147065 static int	wpi_m_stat(void *arg, uint_t stat, uint64_t *val);
2654128Shx147065 static int	wpi_m_start(void *arg);
2664128Shx147065 static void	wpi_m_stop(void *arg);
2674128Shx147065 static int	wpi_m_unicst(void *arg, const uint8_t *macaddr);
2684128Shx147065 static int	wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m);
2694128Shx147065 static int	wpi_m_promisc(void *arg, boolean_t on);
2704128Shx147065 static mblk_t  *wpi_m_tx(void *arg, mblk_t *mp);
2714128Shx147065 static void	wpi_m_ioctl(void *arg, queue_t *wq, mblk_t *mp);
2727663SSowmini.Varadhan@Sun.COM static int	wpi_m_setprop(void *arg, const char *pr_name,
2737663SSowmini.Varadhan@Sun.COM     mac_prop_id_t wldp_pr_num, uint_t wldp_length, const void *wldp_buf);
2747663SSowmini.Varadhan@Sun.COM static int	wpi_m_getprop(void *arg, const char *pr_name,
2757663SSowmini.Varadhan@Sun.COM     mac_prop_id_t wldp_pr_num, uint_t pr_flags, uint_t wldp_lenth,
2767663SSowmini.Varadhan@Sun.COM     void *wldp_buf);
2774128Shx147065 static void	wpi_destroy_locks(wpi_sc_t *sc);
2784128Shx147065 static int	wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type);
2794128Shx147065 static void	wpi_thread(wpi_sc_t *sc);
2804128Shx147065 
2814128Shx147065 /*
2824128Shx147065  * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
2834128Shx147065  */
2844128Shx147065 static const struct ieee80211_rateset wpi_rateset_11b =
2854128Shx147065 	{ 4, { 2, 4, 11, 22 } };
2864128Shx147065 
2874128Shx147065 static const struct ieee80211_rateset wpi_rateset_11g =
2884128Shx147065 	{ 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
2894128Shx147065 
2904128Shx147065 static const uint8_t wpi_ridx_to_signal[] = {
2914128Shx147065 	/* OFDM: IEEE Std 802.11a-1999, pp. 14 Table 80 */
2924128Shx147065 	/* R1-R4 (ral/ural is R4-R1) */
2934128Shx147065 	0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3,
2944128Shx147065 	/* CCK: device-dependent */
2954128Shx147065 	10, 20, 55, 110
2964128Shx147065 };
2974128Shx147065 
2984128Shx147065 /*
2994128Shx147065  * For mfthread only
3004128Shx147065  */
3014128Shx147065 extern pri_t minclsyspri;
3024128Shx147065 
3034128Shx147065 /*
3044128Shx147065  * Module Loading Data & Entry Points
3054128Shx147065  */
3064128Shx147065 DDI_DEFINE_STREAM_OPS(wpi_devops, nulldev, nulldev, wpi_attach,
3077656SSherry.Moore@Sun.COM     wpi_detach, nodev, NULL, D_MP, NULL, ddi_quiesce_not_supported);
3084128Shx147065 
3094128Shx147065 static struct modldrv wpi_modldrv = {
3104128Shx147065 	&mod_driverops,
3114128Shx147065 	"Intel(R) PRO/Wireless 3945ABG driver",
3124128Shx147065 	&wpi_devops
3134128Shx147065 };
3144128Shx147065 
3154128Shx147065 static struct modlinkage wpi_modlinkage = {
3164128Shx147065 	MODREV_1,
3174128Shx147065 	&wpi_modldrv,
3184128Shx147065 	NULL
3194128Shx147065 };
3204128Shx147065 
3214128Shx147065 int
3224128Shx147065 _init(void)
3234128Shx147065 {
3244128Shx147065 	int	status;
3254128Shx147065 
3264128Shx147065 	status = ddi_soft_state_init(&wpi_soft_state_p,
3274128Shx147065 	    sizeof (wpi_sc_t), 1);
3284128Shx147065 	if (status != DDI_SUCCESS)
3294128Shx147065 		return (status);
3304128Shx147065 
3314128Shx147065 	mac_init_ops(&wpi_devops, "wpi");
3324128Shx147065 	status = mod_install(&wpi_modlinkage);
3334128Shx147065 	if (status != DDI_SUCCESS) {
3344128Shx147065 		mac_fini_ops(&wpi_devops);
3354128Shx147065 		ddi_soft_state_fini(&wpi_soft_state_p);
3364128Shx147065 	}
3374128Shx147065 
3384128Shx147065 	return (status);
3394128Shx147065 }
3404128Shx147065 
3414128Shx147065 int
3424128Shx147065 _fini(void)
3434128Shx147065 {
3444128Shx147065 	int status;
3454128Shx147065 
3464128Shx147065 	status = mod_remove(&wpi_modlinkage);
3474128Shx147065 	if (status == DDI_SUCCESS) {
3484128Shx147065 		mac_fini_ops(&wpi_devops);
3494128Shx147065 		ddi_soft_state_fini(&wpi_soft_state_p);
3504128Shx147065 	}
3514128Shx147065 
3524128Shx147065 	return (status);
3534128Shx147065 }
3544128Shx147065 
3554128Shx147065 int
3564128Shx147065 _info(struct modinfo *mip)
3574128Shx147065 {
3584128Shx147065 	return (mod_info(&wpi_modlinkage, mip));
3594128Shx147065 }
3604128Shx147065 
3614128Shx147065 /*
3624128Shx147065  * Mac Call Back entries
3634128Shx147065  */
3644128Shx147065 mac_callbacks_t	wpi_m_callbacks = {
3657663SSowmini.Varadhan@Sun.COM 	MC_IOCTL | MC_SETPROP | MC_GETPROP,
3664128Shx147065 	wpi_m_stat,
3674128Shx147065 	wpi_m_start,
3684128Shx147065 	wpi_m_stop,
3694128Shx147065 	wpi_m_promisc,
3704128Shx147065 	wpi_m_multicst,
3714128Shx147065 	wpi_m_unicst,
3724128Shx147065 	wpi_m_tx,
3734128Shx147065 	NULL,
3747663SSowmini.Varadhan@Sun.COM 	wpi_m_ioctl,
3757663SSowmini.Varadhan@Sun.COM 	NULL,
3767663SSowmini.Varadhan@Sun.COM 	NULL,
3777663SSowmini.Varadhan@Sun.COM 	NULL,
3787663SSowmini.Varadhan@Sun.COM 	wpi_m_setprop,
3797663SSowmini.Varadhan@Sun.COM 	wpi_m_getprop
3804128Shx147065 };
3814128Shx147065 
3824128Shx147065 #ifdef DEBUG
3834128Shx147065 void
3844128Shx147065 wpi_dbg(uint32_t flags, const char *fmt, ...)
3854128Shx147065 {
3864128Shx147065 	va_list	ap;
3874128Shx147065 
3884128Shx147065 	if (flags & wpi_dbg_flags) {
3894128Shx147065 		va_start(ap, fmt);
3904128Shx147065 		vcmn_err(CE_NOTE, fmt, ap);
3914128Shx147065 		va_end(ap);
3924128Shx147065 	}
3934128Shx147065 }
3944128Shx147065 #endif
3954128Shx147065 /*
3964128Shx147065  * device operations
3974128Shx147065  */
3984128Shx147065 int
3994128Shx147065 wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
4004128Shx147065 {
4014128Shx147065 	wpi_sc_t		*sc;
4024128Shx147065 	ddi_acc_handle_t	cfg_handle;
4034128Shx147065 	caddr_t			cfg_base;
4044128Shx147065 	ieee80211com_t	*ic;
4054128Shx147065 	int			instance, err, i;
4064128Shx147065 	char			strbuf[32];
4074128Shx147065 	wifi_data_t		wd = { 0 };
4084128Shx147065 	mac_register_t		*macp;
4094128Shx147065 
4106062Shx147065 	switch (cmd) {
4116062Shx147065 	case DDI_ATTACH:
4126062Shx147065 		break;
4136062Shx147065 	case DDI_RESUME:
4146062Shx147065 		sc = ddi_get_soft_state(wpi_soft_state_p,
4156062Shx147065 		    ddi_get_instance(dip));
4166062Shx147065 		ASSERT(sc != NULL);
4176062Shx147065 		mutex_enter(&sc->sc_glock);
4186062Shx147065 		sc->sc_flags &= ~WPI_F_SUSPEND;
4196062Shx147065 		mutex_exit(&sc->sc_glock);
4206062Shx147065 		if (sc->sc_flags & WPI_F_RUNNING) {
4216062Shx147065 			(void) wpi_init(sc);
4226062Shx147065 			ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
4236062Shx147065 		}
4246062Shx147065 		WPI_DBG((WPI_DEBUG_RESUME, "wpi: resume \n"));
4256062Shx147065 		return (DDI_SUCCESS);
4266062Shx147065 	default:
4274128Shx147065 		err = DDI_FAILURE;
4284128Shx147065 		goto attach_fail1;
4294128Shx147065 	}
4304128Shx147065 
4314128Shx147065 	instance = ddi_get_instance(dip);
4324128Shx147065 	err = ddi_soft_state_zalloc(wpi_soft_state_p, instance);
4334128Shx147065 	if (err != DDI_SUCCESS) {
4344128Shx147065 		cmn_err(CE_WARN,
4354128Shx147065 		    "wpi_attach(): failed to allocate soft state\n");
4364128Shx147065 		goto attach_fail1;
4374128Shx147065 	}
4384128Shx147065 	sc = ddi_get_soft_state(wpi_soft_state_p, instance);
4394128Shx147065 	sc->sc_dip = dip;
4404128Shx147065 
4414128Shx147065 	err = ddi_regs_map_setup(dip, 0, &cfg_base, 0, 0,
4424128Shx147065 	    &wpi_reg_accattr, &cfg_handle);
4434128Shx147065 	if (err != DDI_SUCCESS) {
4444128Shx147065 		cmn_err(CE_WARN,
4454128Shx147065 		    "wpi_attach(): failed to map config spaces regs\n");
4464128Shx147065 		goto attach_fail2;
4474128Shx147065 	}
4484128Shx147065 	sc->sc_rev = ddi_get8(cfg_handle,
4494128Shx147065 	    (uint8_t *)(cfg_base + PCI_CONF_REVID));
4504128Shx147065 	ddi_put8(cfg_handle, (uint8_t *)(cfg_base + 0x41), 0);
4514128Shx147065 	sc->sc_clsz = ddi_get16(cfg_handle,
4524128Shx147065 	    (uint16_t *)(cfg_base + PCI_CONF_CACHE_LINESZ));
4534128Shx147065 	ddi_regs_map_free(&cfg_handle);
4544128Shx147065 	if (!sc->sc_clsz)
4554128Shx147065 		sc->sc_clsz = 16;
4564128Shx147065 	sc->sc_clsz = (sc->sc_clsz << 2);
4574128Shx147065 	sc->sc_dmabuf_sz = roundup(0x1000 + sizeof (struct ieee80211_frame) +
4584128Shx147065 	    IEEE80211_MTU + IEEE80211_CRC_LEN +
4594128Shx147065 	    (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN +
4604128Shx147065 	    IEEE80211_WEP_CRCLEN), sc->sc_clsz);
4614128Shx147065 	/*
4624128Shx147065 	 * Map operating registers
4634128Shx147065 	 */
4644128Shx147065 	err = ddi_regs_map_setup(dip, 1, &sc->sc_base,
4654128Shx147065 	    0, 0, &wpi_reg_accattr, &sc->sc_handle);
4664128Shx147065 	if (err != DDI_SUCCESS) {
4674128Shx147065 		cmn_err(CE_WARN,
4684128Shx147065 		    "wpi_attach(): failed to map device regs\n");
4694128Shx147065 		goto attach_fail2;
4704128Shx147065 	}
4714128Shx147065 
4724128Shx147065 	/*
4734128Shx147065 	 * Allocate shared page.
4744128Shx147065 	 */
4754128Shx147065 	err = wpi_alloc_shared(sc);
4764128Shx147065 	if (err != DDI_SUCCESS) {
4774128Shx147065 		cmn_err(CE_WARN, "failed to allocate shared page\n");
4784128Shx147065 		goto attach_fail3;
4794128Shx147065 	}
4804128Shx147065 
4814128Shx147065 	/*
4824128Shx147065 	 * Get the hw conf, including MAC address, then init all rings.
4834128Shx147065 	 */
4844128Shx147065 	wpi_read_eeprom(sc);
4854128Shx147065 	err = wpi_ring_init(sc);
4864128Shx147065 	if (err != DDI_SUCCESS) {
4874128Shx147065 		cmn_err(CE_WARN, "wpi_attach(): "
4884128Shx147065 		    "failed to allocate and initialize ring\n");
4894128Shx147065 		goto attach_fail4;
4904128Shx147065 	}
4914128Shx147065 
4924128Shx147065 	sc->sc_hdr = (const wpi_firmware_hdr_t *)wpi_fw_bin;
4934128Shx147065 
4944128Shx147065 	/* firmware image layout: |HDR|<--TEXT-->|<--DATA-->|<--BOOT-->| */
4954128Shx147065 	sc->sc_text = (const char *)(sc->sc_hdr + 1);
4964128Shx147065 	sc->sc_data = sc->sc_text + LE_32(sc->sc_hdr->textsz);
4974128Shx147065 	sc->sc_boot = sc->sc_data + LE_32(sc->sc_hdr->datasz);
4984128Shx147065 	err = wpi_alloc_fw_dma(sc);
4994128Shx147065 	if (err != DDI_SUCCESS) {
5004128Shx147065 		cmn_err(CE_WARN, "wpi_attach(): "
5014128Shx147065 		    "failed to allocate firmware dma\n");
5024128Shx147065 		goto attach_fail5;
5034128Shx147065 	}
5044128Shx147065 
5054128Shx147065 	/*
5064128Shx147065 	 * Initialize mutexs and condvars
5074128Shx147065 	 */
5084128Shx147065 	err = ddi_get_iblock_cookie(dip, 0, &sc->sc_iblk);
5094128Shx147065 	if (err != DDI_SUCCESS) {
5104128Shx147065 		cmn_err(CE_WARN,
5114128Shx147065 		    "wpi_attach(): failed to do ddi_get_iblock_cookie()\n");
5124128Shx147065 		goto attach_fail6;
5134128Shx147065 	}
5144128Shx147065 	mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, sc->sc_iblk);
5154128Shx147065 	mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, sc->sc_iblk);
5164128Shx147065 	cv_init(&sc->sc_fw_cv, NULL, CV_DRIVER, NULL);
5174128Shx147065 	cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL);
518*7865SPengcheng.Chen@Sun.COM 
5194128Shx147065 	/*
5204128Shx147065 	 * initialize the mfthread
5214128Shx147065 	 */
5224128Shx147065 	mutex_init(&sc->sc_mt_lock, NULL, MUTEX_DRIVER,
5234128Shx147065 	    (void *) sc->sc_iblk);
5244128Shx147065 	cv_init(&sc->sc_mt_cv, NULL, CV_DRIVER, NULL);
5254128Shx147065 	sc->sc_mf_thread = NULL;
5264128Shx147065 	sc->sc_mf_thread_switch = 0;
5274128Shx147065 	/*
5284128Shx147065 	 * Initialize the wifi part, which will be used by
5294128Shx147065 	 * generic layer
5304128Shx147065 	 */
5314128Shx147065 	ic = &sc->sc_ic;
5324128Shx147065 	ic->ic_phytype  = IEEE80211_T_OFDM;
5334128Shx147065 	ic->ic_opmode   = IEEE80211_M_STA; /* default to BSS mode */
5344128Shx147065 	ic->ic_state    = IEEE80211_S_INIT;
5354128Shx147065 	ic->ic_maxrssi  = 70; /* experimental number */
5364128Shx147065 	ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
5374499Shx147065 	    IEEE80211_C_PMGT | IEEE80211_C_SHSLOT;
5384128Shx147065 
5395296Szf162725 	/*
5405296Szf162725 	 * use software WEP and TKIP, hardware CCMP;
5415296Szf162725 	 */
5425296Szf162725 	ic->ic_caps |= IEEE80211_C_AES_CCM;
5435296Szf162725 	ic->ic_caps |= IEEE80211_C_WPA; /* Support WPA/WPA2 */
5445296Szf162725 
5454128Shx147065 	/* set supported .11b and .11g rates */
5464128Shx147065 	ic->ic_sup_rates[IEEE80211_MODE_11B] = wpi_rateset_11b;
5474128Shx147065 	ic->ic_sup_rates[IEEE80211_MODE_11G] = wpi_rateset_11g;
5484128Shx147065 
5494128Shx147065 	/* set supported .11b and .11g channels (1 through 14) */
5504128Shx147065 	for (i = 1; i <= 14; i++) {
5514128Shx147065 		ic->ic_sup_channels[i].ich_freq =
5524128Shx147065 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
5534128Shx147065 		ic->ic_sup_channels[i].ich_flags =
5544128Shx147065 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
555*7865SPengcheng.Chen@Sun.COM 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ |
556*7865SPengcheng.Chen@Sun.COM 		    IEEE80211_CHAN_PASSIVE;
5574128Shx147065 	}
5584128Shx147065 	ic->ic_ibss_chan = &ic->ic_sup_channels[0];
5594128Shx147065 	ic->ic_xmit = wpi_send;
5604128Shx147065 	/*
5614128Shx147065 	 * init Wifi layer
5624128Shx147065 	 */
5634128Shx147065 	ieee80211_attach(ic);
5644128Shx147065 
5655296Szf162725 	/* register WPA door */
5665296Szf162725 	ieee80211_register_door(ic, ddi_driver_name(dip),
5675296Szf162725 	    ddi_get_instance(dip));
5685296Szf162725 
5694128Shx147065 	/*
5704128Shx147065 	 * Override 80211 default routines
5714128Shx147065 	 */
5724128Shx147065 	sc->sc_newstate = ic->ic_newstate;
5734128Shx147065 	ic->ic_newstate = wpi_newstate;
5744128Shx147065 	ic->ic_node_alloc = wpi_node_alloc;
5754128Shx147065 	ic->ic_node_free = wpi_node_free;
5765296Szf162725 	ic->ic_crypto.cs_key_set = wpi_key_set;
5774128Shx147065 	ieee80211_media_init(ic);
5784128Shx147065 	/*
5794128Shx147065 	 * initialize default tx key
5804128Shx147065 	 */
5814128Shx147065 	ic->ic_def_txkey = 0;
5824128Shx147065 
5834128Shx147065 	err = ddi_add_softintr(dip, DDI_SOFTINT_LOW,
5844128Shx147065 	    &sc->sc_notif_softint_id, &sc->sc_iblk, NULL, wpi_notif_softintr,
5854128Shx147065 	    (caddr_t)sc);
5864128Shx147065 	if (err != DDI_SUCCESS) {
5874128Shx147065 		cmn_err(CE_WARN,
5884128Shx147065 		    "wpi_attach(): failed to do ddi_add_softintr()\n");
5894128Shx147065 		goto attach_fail7;
5904128Shx147065 	}
5914128Shx147065 
5924128Shx147065 	/*
5934128Shx147065 	 * Add the interrupt handler
5944128Shx147065 	 */
5954128Shx147065 	err = ddi_add_intr(dip, 0, &sc->sc_iblk, NULL,
5964128Shx147065 	    wpi_intr, (caddr_t)sc);
5974128Shx147065 	if (err != DDI_SUCCESS) {
5984128Shx147065 		cmn_err(CE_WARN,
5994128Shx147065 		    "wpi_attach(): failed to do ddi_add_intr()\n");
6004128Shx147065 		goto attach_fail8;
6014128Shx147065 	}
6024128Shx147065 
6034128Shx147065 	/*
6044128Shx147065 	 * Initialize pointer to device specific functions
6054128Shx147065 	 */
6064128Shx147065 	wd.wd_secalloc = WIFI_SEC_NONE;
6074128Shx147065 	wd.wd_opmode = ic->ic_opmode;
6084128Shx147065 	IEEE80211_ADDR_COPY(wd.wd_bssid, ic->ic_macaddr);
6094128Shx147065 
6104128Shx147065 	macp = mac_alloc(MAC_VERSION);
6114128Shx147065 	if (err != DDI_SUCCESS) {
6124128Shx147065 		cmn_err(CE_WARN,
6134128Shx147065 		    "wpi_attach(): failed to do mac_alloc()\n");
6144128Shx147065 		goto attach_fail9;
6154128Shx147065 	}
6164128Shx147065 
6174128Shx147065 	macp->m_type_ident	= MAC_PLUGIN_IDENT_WIFI;
6184128Shx147065 	macp->m_driver		= sc;
6194128Shx147065 	macp->m_dip		= dip;
6204128Shx147065 	macp->m_src_addr	= ic->ic_macaddr;
6214128Shx147065 	macp->m_callbacks	= &wpi_m_callbacks;
6224128Shx147065 	macp->m_min_sdu		= 0;
6234128Shx147065 	macp->m_max_sdu		= IEEE80211_MTU;
6244128Shx147065 	macp->m_pdata		= &wd;
6254128Shx147065 	macp->m_pdata_size	= sizeof (wd);
6264128Shx147065 
6274128Shx147065 	/*
6284128Shx147065 	 * Register the macp to mac
6294128Shx147065 	 */
6304128Shx147065 	err = mac_register(macp, &ic->ic_mach);
6314128Shx147065 	mac_free(macp);
6324128Shx147065 	if (err != DDI_SUCCESS) {
6334128Shx147065 		cmn_err(CE_WARN,
6344128Shx147065 		    "wpi_attach(): failed to do mac_register()\n");
6354128Shx147065 		goto attach_fail9;
6364128Shx147065 	}
6374128Shx147065 
6384128Shx147065 	/*
6394128Shx147065 	 * Create minor node of type DDI_NT_NET_WIFI
6404128Shx147065 	 */
6414128Shx147065 	(void) snprintf(strbuf, sizeof (strbuf), "wpi%d", instance);
6424128Shx147065 	err = ddi_create_minor_node(dip, strbuf, S_IFCHR,
6434128Shx147065 	    instance + 1, DDI_NT_NET_WIFI, 0);
6444128Shx147065 	if (err != DDI_SUCCESS)
6454128Shx147065 		cmn_err(CE_WARN,
6464128Shx147065 		    "wpi_attach(): failed to do ddi_create_minor_node()\n");
6474128Shx147065 
6484128Shx147065 	/*
6494128Shx147065 	 * Notify link is down now
6504128Shx147065 	 */
6514128Shx147065 	mac_link_update(ic->ic_mach, LINK_STATE_DOWN);
6524128Shx147065 
6534128Shx147065 	/*
6544128Shx147065 	 * create the mf thread to handle the link status,
6554128Shx147065 	 * recovery fatal error, etc.
6564128Shx147065 	 */
6574128Shx147065 
6584128Shx147065 	sc->sc_mf_thread_switch = 1;
6594128Shx147065 	if (sc->sc_mf_thread == NULL)
6604128Shx147065 		sc->sc_mf_thread = thread_create((caddr_t)NULL, 0,
6614128Shx147065 		    wpi_thread, sc, 0, &p0, TS_RUN, minclsyspri);
6624128Shx147065 
6634128Shx147065 	sc->sc_flags |= WPI_F_ATTACHED;
6644128Shx147065 
6654128Shx147065 	return (DDI_SUCCESS);
6664128Shx147065 attach_fail9:
6674128Shx147065 	ddi_remove_intr(dip, 0, sc->sc_iblk);
6684128Shx147065 attach_fail8:
6694128Shx147065 	ddi_remove_softintr(sc->sc_notif_softint_id);
6704128Shx147065 	sc->sc_notif_softint_id = NULL;
6714128Shx147065 attach_fail7:
6724128Shx147065 	ieee80211_detach(ic);
6734128Shx147065 	wpi_destroy_locks(sc);
6744128Shx147065 attach_fail6:
6754128Shx147065 	wpi_free_fw_dma(sc);
6764128Shx147065 attach_fail5:
6774128Shx147065 	wpi_ring_free(sc);
6784128Shx147065 attach_fail4:
6794128Shx147065 	wpi_free_shared(sc);
6804128Shx147065 attach_fail3:
6814128Shx147065 	ddi_regs_map_free(&sc->sc_handle);
6824128Shx147065 attach_fail2:
6834128Shx147065 	ddi_soft_state_free(wpi_soft_state_p, instance);
6844128Shx147065 attach_fail1:
6854128Shx147065 	return (err);
6864128Shx147065 }
6874128Shx147065 
6884128Shx147065 int
6894128Shx147065 wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
6904128Shx147065 {
6914128Shx147065 	wpi_sc_t	*sc;
6924128Shx147065 	int err;
6934128Shx147065 
6944128Shx147065 	sc = ddi_get_soft_state(wpi_soft_state_p, ddi_get_instance(dip));
6954128Shx147065 	ASSERT(sc != NULL);
6964128Shx147065 
6976062Shx147065 	switch (cmd) {
6986062Shx147065 	case DDI_DETACH:
6996062Shx147065 		break;
7006062Shx147065 	case DDI_SUSPEND:
7016062Shx147065 		if (sc->sc_flags & WPI_F_RUNNING) {
7026062Shx147065 			wpi_stop(sc);
7036062Shx147065 		}
7046062Shx147065 		mutex_enter(&sc->sc_glock);
7056062Shx147065 		sc->sc_flags |= WPI_F_SUSPEND;
7066062Shx147065 		mutex_exit(&sc->sc_glock);
7076062Shx147065 		WPI_DBG((WPI_DEBUG_RESUME, "wpi: suspend \n"));
7086062Shx147065 		return (DDI_SUCCESS);
7096062Shx147065 	default:
7104128Shx147065 		return (DDI_FAILURE);
7116062Shx147065 	}
7124128Shx147065 	if (!(sc->sc_flags & WPI_F_ATTACHED))
7134128Shx147065 		return (DDI_FAILURE);
7144128Shx147065 
7157507SXinghua.Wen@Sun.COM 	err = mac_disable(sc->sc_ic.ic_mach);
7167507SXinghua.Wen@Sun.COM 	if (err != DDI_SUCCESS)
7177507SXinghua.Wen@Sun.COM 		return (err);
7187507SXinghua.Wen@Sun.COM 
7194128Shx147065 	/*
7204128Shx147065 	 * Destroy the mf_thread
7214128Shx147065 	 */
7224128Shx147065 	mutex_enter(&sc->sc_mt_lock);
7234128Shx147065 	sc->sc_mf_thread_switch = 0;
7244128Shx147065 	while (sc->sc_mf_thread != NULL) {
7254128Shx147065 		if (cv_wait_sig(&sc->sc_mt_cv, &sc->sc_mt_lock) == 0)
7264128Shx147065 			break;
7274128Shx147065 	}
7284128Shx147065 	mutex_exit(&sc->sc_mt_lock);
7294128Shx147065 
7304128Shx147065 	wpi_stop(sc);
7314128Shx147065 
7324128Shx147065 	/*
7334128Shx147065 	 * Unregiste from the MAC layer subsystem
7344128Shx147065 	 */
7357507SXinghua.Wen@Sun.COM 	(void) mac_unregister(sc->sc_ic.ic_mach);
7364128Shx147065 
7374128Shx147065 	mutex_enter(&sc->sc_glock);
7384128Shx147065 	wpi_free_fw_dma(sc);
7394128Shx147065 	wpi_ring_free(sc);
7404128Shx147065 	wpi_free_shared(sc);
7414128Shx147065 	mutex_exit(&sc->sc_glock);
7424128Shx147065 
7434128Shx147065 	ddi_remove_intr(dip, 0, sc->sc_iblk);
7444128Shx147065 	ddi_remove_softintr(sc->sc_notif_softint_id);
7454128Shx147065 	sc->sc_notif_softint_id = NULL;
7464128Shx147065 
7474128Shx147065 	/*
7484128Shx147065 	 * detach ieee80211
7494128Shx147065 	 */
7504128Shx147065 	ieee80211_detach(&sc->sc_ic);
7514128Shx147065 
7524128Shx147065 	wpi_destroy_locks(sc);
7534128Shx147065 
7544128Shx147065 	ddi_regs_map_free(&sc->sc_handle);
7554128Shx147065 	ddi_remove_minor_node(dip, NULL);
7564128Shx147065 	ddi_soft_state_free(wpi_soft_state_p, ddi_get_instance(dip));
7574128Shx147065 
7584128Shx147065 	return (DDI_SUCCESS);
7594128Shx147065 }
7604128Shx147065 
7614128Shx147065 static void
7624128Shx147065 wpi_destroy_locks(wpi_sc_t *sc)
7634128Shx147065 {
7644128Shx147065 	cv_destroy(&sc->sc_mt_cv);
7654128Shx147065 	mutex_destroy(&sc->sc_mt_lock);
7664128Shx147065 	cv_destroy(&sc->sc_cmd_cv);
7674128Shx147065 	cv_destroy(&sc->sc_fw_cv);
7684128Shx147065 	mutex_destroy(&sc->sc_tx_lock);
7694128Shx147065 	mutex_destroy(&sc->sc_glock);
7704128Shx147065 }
7714128Shx147065 
7724128Shx147065 /*
7734128Shx147065  * Allocate an area of memory and a DMA handle for accessing it
7744128Shx147065  */
7754128Shx147065 static int
7764128Shx147065 wpi_alloc_dma_mem(wpi_sc_t *sc, size_t memsize, ddi_dma_attr_t *dma_attr_p,
7774128Shx147065 	ddi_device_acc_attr_t *acc_attr_p, uint_t dma_flags, wpi_dma_t *dma_p)
7784128Shx147065 {
7794128Shx147065 	caddr_t vaddr;
7804128Shx147065 	int err;
7814128Shx147065 
7824128Shx147065 	/*
7834128Shx147065 	 * Allocate handle
7844128Shx147065 	 */
7854128Shx147065 	err = ddi_dma_alloc_handle(sc->sc_dip, dma_attr_p,
7864499Shx147065 	    DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl);
7874128Shx147065 	if (err != DDI_SUCCESS) {
7884128Shx147065 		dma_p->dma_hdl = NULL;
7894128Shx147065 		return (DDI_FAILURE);
7904128Shx147065 	}
7914128Shx147065 
7924128Shx147065 	/*
7934128Shx147065 	 * Allocate memory
7944128Shx147065 	 */
7954128Shx147065 	err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, acc_attr_p,
7964128Shx147065 	    dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING),
7974128Shx147065 	    DDI_DMA_SLEEP, NULL, &vaddr, &dma_p->alength, &dma_p->acc_hdl);
7984128Shx147065 	if (err != DDI_SUCCESS) {
7994128Shx147065 		ddi_dma_free_handle(&dma_p->dma_hdl);
8004128Shx147065 		dma_p->dma_hdl = NULL;
8014128Shx147065 		dma_p->acc_hdl = NULL;
8024128Shx147065 		return (DDI_FAILURE);
8034128Shx147065 	}
8044128Shx147065 
8054128Shx147065 	/*
8064128Shx147065 	 * Bind the two together
8074128Shx147065 	 */
8084128Shx147065 	dma_p->mem_va = vaddr;
8094128Shx147065 	err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL,
8104128Shx147065 	    vaddr, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL,
8114128Shx147065 	    &dma_p->cookie, &dma_p->ncookies);
8124128Shx147065 	if (err != DDI_DMA_MAPPED) {
8134128Shx147065 		ddi_dma_mem_free(&dma_p->acc_hdl);
8144128Shx147065 		ddi_dma_free_handle(&dma_p->dma_hdl);
8154128Shx147065 		dma_p->acc_hdl = NULL;
8164128Shx147065 		dma_p->dma_hdl = NULL;
8174128Shx147065 		return (DDI_FAILURE);
8184128Shx147065 	}
8194128Shx147065 
8204128Shx147065 	dma_p->nslots = ~0U;
8214128Shx147065 	dma_p->size = ~0U;
8224128Shx147065 	dma_p->token = ~0U;
8234128Shx147065 	dma_p->offset = 0;
8244128Shx147065 	return (DDI_SUCCESS);
8254128Shx147065 }
8264128Shx147065 
8274128Shx147065 /*
8284128Shx147065  * Free one allocated area of DMAable memory
8294128Shx147065  */
8304128Shx147065 static void
8314128Shx147065 wpi_free_dma_mem(wpi_dma_t *dma_p)
8324128Shx147065 {
8334128Shx147065 	if (dma_p->dma_hdl != NULL) {
8344128Shx147065 		if (dma_p->ncookies) {
8354128Shx147065 			(void) ddi_dma_unbind_handle(dma_p->dma_hdl);
8364128Shx147065 			dma_p->ncookies = 0;
8374128Shx147065 		}
8384128Shx147065 		ddi_dma_free_handle(&dma_p->dma_hdl);
8394128Shx147065 		dma_p->dma_hdl = NULL;
8404128Shx147065 	}
8414128Shx147065 
8424128Shx147065 	if (dma_p->acc_hdl != NULL) {
8434128Shx147065 		ddi_dma_mem_free(&dma_p->acc_hdl);
8444128Shx147065 		dma_p->acc_hdl = NULL;
8454128Shx147065 	}
8464128Shx147065 }
8474128Shx147065 
8484128Shx147065 /*
8494128Shx147065  * Allocate an area of dma memory for firmware load.
8504128Shx147065  * Idealy, this allocation should be a one time action, that is,
8514128Shx147065  * the memory will be freed after the firmware is uploaded to the
8524128Shx147065  * card. but since a recovery mechanism for the fatal firmware need
8534128Shx147065  * reload the firmware, and re-allocate dma at run time may be failed,
8544128Shx147065  * so we allocate it at attach and keep it in the whole lifecycle of
8554128Shx147065  * the driver.
8564128Shx147065  */
8574128Shx147065 static int
8584128Shx147065 wpi_alloc_fw_dma(wpi_sc_t *sc)
8594128Shx147065 {
8604128Shx147065 	int i, err = DDI_SUCCESS;
8614128Shx147065 	wpi_dma_t *dma_p;
8624128Shx147065 
8634128Shx147065 	err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->textsz),
8644128Shx147065 	    &fw_buffer_dma_attr, &wpi_dma_accattr,
8654128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
8664128Shx147065 	    &sc->sc_dma_fw_text);
8674128Shx147065 	dma_p = &sc->sc_dma_fw_text;
8684128Shx147065 	WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n",
8694128Shx147065 	    dma_p->ncookies, dma_p->cookie.dmac_address,
8704128Shx147065 	    dma_p->cookie.dmac_size));
8714128Shx147065 	if (err != DDI_SUCCESS) {
8724128Shx147065 		cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc"
8734128Shx147065 		    "text dma memory");
8744128Shx147065 		goto fail;
8754128Shx147065 	}
8764128Shx147065 	for (i = 0; i < dma_p->ncookies; i++) {
8774128Shx147065 		sc->sc_fw_text_cookie[i] = dma_p->cookie;
8784128Shx147065 		ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie);
8794128Shx147065 	}
8804128Shx147065 	err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz),
8814128Shx147065 	    &fw_buffer_dma_attr, &wpi_dma_accattr,
8824128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
8834128Shx147065 	    &sc->sc_dma_fw_data);
8844128Shx147065 	dma_p = &sc->sc_dma_fw_data;
8854128Shx147065 	WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n",
8864128Shx147065 	    dma_p->ncookies, dma_p->cookie.dmac_address,
8874128Shx147065 	    dma_p->cookie.dmac_size));
8884128Shx147065 	if (err != DDI_SUCCESS) {
8894128Shx147065 		cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc"
8904128Shx147065 		    "data dma memory");
8914128Shx147065 		goto fail;
8924128Shx147065 	}
8934128Shx147065 	for (i = 0; i < dma_p->ncookies; i++) {
8944128Shx147065 		sc->sc_fw_data_cookie[i] = dma_p->cookie;
8954128Shx147065 		ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie);
8964128Shx147065 	}
8974128Shx147065 fail:
8984128Shx147065 	return (err);
8994128Shx147065 }
9004128Shx147065 
9014128Shx147065 static void
9024128Shx147065 wpi_free_fw_dma(wpi_sc_t *sc)
9034128Shx147065 {
9044128Shx147065 	wpi_free_dma_mem(&sc->sc_dma_fw_text);
9054128Shx147065 	wpi_free_dma_mem(&sc->sc_dma_fw_data);
9064128Shx147065 }
9074128Shx147065 
9084128Shx147065 /*
9094128Shx147065  * Allocate a shared page between host and NIC.
9104128Shx147065  */
9114128Shx147065 static int
9124128Shx147065 wpi_alloc_shared(wpi_sc_t *sc)
9134128Shx147065 {
9144128Shx147065 	int err = DDI_SUCCESS;
9154128Shx147065 
9164128Shx147065 	/* must be aligned on a 4K-page boundary */
9174128Shx147065 	err = wpi_alloc_dma_mem(sc, sizeof (wpi_shared_t),
9184128Shx147065 	    &sh_dma_attr, &wpi_dma_accattr,
9194128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
9204128Shx147065 	    &sc->sc_dma_sh);
9214128Shx147065 	if (err != DDI_SUCCESS)
9224128Shx147065 		goto fail;
9234128Shx147065 	sc->sc_shared = (wpi_shared_t *)sc->sc_dma_sh.mem_va;
9244128Shx147065 	return (err);
9254128Shx147065 
9264128Shx147065 fail:
9274128Shx147065 	wpi_free_shared(sc);
9284128Shx147065 	return (err);
9294128Shx147065 }
9304128Shx147065 
9314128Shx147065 static void
9324128Shx147065 wpi_free_shared(wpi_sc_t *sc)
9334128Shx147065 {
9344128Shx147065 	wpi_free_dma_mem(&sc->sc_dma_sh);
9354128Shx147065 }
9364128Shx147065 
9374128Shx147065 static int
9384128Shx147065 wpi_alloc_rx_ring(wpi_sc_t *sc)
9394128Shx147065 {
9404128Shx147065 	wpi_rx_ring_t *ring;
9414128Shx147065 	wpi_rx_data_t *data;
9424128Shx147065 	int i, err = DDI_SUCCESS;
9434128Shx147065 
9444128Shx147065 	ring = &sc->sc_rxq;
9454128Shx147065 	ring->cur = 0;
9464128Shx147065 
9474128Shx147065 	err = wpi_alloc_dma_mem(sc, WPI_RX_RING_COUNT * sizeof (uint32_t),
9484128Shx147065 	    &ring_desc_dma_attr, &wpi_dma_accattr,
9494128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
9504128Shx147065 	    &ring->dma_desc);
9514128Shx147065 	if (err != DDI_SUCCESS) {
9524128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring desc failed\n"));
9534128Shx147065 		goto fail;
9544128Shx147065 	}
9554128Shx147065 	ring->desc = (uint32_t *)ring->dma_desc.mem_va;
9564128Shx147065 
9574128Shx147065 	/*
9584128Shx147065 	 * Allocate Rx buffers.
9594128Shx147065 	 */
9604128Shx147065 	for (i = 0; i < WPI_RX_RING_COUNT; i++) {
9614128Shx147065 		data = &ring->data[i];
9624128Shx147065 		err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz,
9634128Shx147065 		    &rx_buffer_dma_attr, &wpi_dma_accattr,
9644128Shx147065 		    DDI_DMA_READ | DDI_DMA_STREAMING,
9654128Shx147065 		    &data->dma_data);
9664128Shx147065 		if (err != DDI_SUCCESS) {
9674128Shx147065 			WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring buf[%d] "
9684128Shx147065 			    "failed\n", i));
9694128Shx147065 			goto fail;
9704128Shx147065 		}
9714128Shx147065 
9724128Shx147065 		ring->desc[i] = LE_32(data->dma_data.cookie.dmac_address);
9734128Shx147065 	}
9744128Shx147065 
9754128Shx147065 	WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
9764128Shx147065 
9774128Shx147065 	return (err);
9784128Shx147065 
9794128Shx147065 fail:
9804128Shx147065 	wpi_free_rx_ring(sc);
9814128Shx147065 	return (err);
9824128Shx147065 }
9834128Shx147065 
9844128Shx147065 static void
9854128Shx147065 wpi_reset_rx_ring(wpi_sc_t *sc)
9864128Shx147065 {
9874128Shx147065 	int ntries;
9884128Shx147065 
9894128Shx147065 	wpi_mem_lock(sc);
9904128Shx147065 
9914128Shx147065 	WPI_WRITE(sc, WPI_RX_CONFIG, 0);
9924128Shx147065 	for (ntries = 0; ntries < 2000; ntries++) {
9934128Shx147065 		if (WPI_READ(sc, WPI_RX_STATUS) & WPI_RX_IDLE)
9944128Shx147065 			break;
9954128Shx147065 		DELAY(1000);
9964128Shx147065 	}
9974128Shx147065 	if (ntries == 2000)
9984128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Rx ring\n"));
999*7865SPengcheng.Chen@Sun.COM 
10004128Shx147065 	wpi_mem_unlock(sc);
10014128Shx147065 
10024128Shx147065 	sc->sc_rxq.cur = 0;
10034128Shx147065 }
10044128Shx147065 
10054128Shx147065 static void
10064128Shx147065 wpi_free_rx_ring(wpi_sc_t *sc)
10074128Shx147065 {
10084128Shx147065 	int i;
10094128Shx147065 
10104128Shx147065 	for (i = 0; i < WPI_RX_RING_COUNT; i++) {
10114128Shx147065 		if (sc->sc_rxq.data[i].dma_data.dma_hdl)
10124128Shx147065 			WPI_DMA_SYNC(sc->sc_rxq.data[i].dma_data,
10134128Shx147065 			    DDI_DMA_SYNC_FORCPU);
10144128Shx147065 		wpi_free_dma_mem(&sc->sc_rxq.data[i].dma_data);
10154128Shx147065 	}
10164128Shx147065 
10174128Shx147065 	if (sc->sc_rxq.dma_desc.dma_hdl)
10184128Shx147065 		WPI_DMA_SYNC(sc->sc_rxq.dma_desc, DDI_DMA_SYNC_FORDEV);
10194128Shx147065 	wpi_free_dma_mem(&sc->sc_rxq.dma_desc);
10204128Shx147065 }
10214128Shx147065 
10224128Shx147065 static int
10234128Shx147065 wpi_alloc_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring, int count, int qid)
10244128Shx147065 {
10254128Shx147065 	wpi_tx_data_t *data;
10264128Shx147065 	wpi_tx_desc_t *desc_h;
10274128Shx147065 	uint32_t paddr_desc_h;
10284128Shx147065 	wpi_tx_cmd_t *cmd_h;
10294128Shx147065 	uint32_t paddr_cmd_h;
10304128Shx147065 	int i, err = DDI_SUCCESS;
10314128Shx147065 
10324128Shx147065 	ring->qid = qid;
10334128Shx147065 	ring->count = count;
10344128Shx147065 	ring->queued = 0;
10354128Shx147065 	ring->cur = 0;
10364128Shx147065 
10374128Shx147065 	err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_desc_t),
10384128Shx147065 	    &ring_desc_dma_attr, &wpi_dma_accattr,
10394128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
10404128Shx147065 	    &ring->dma_desc);
10414128Shx147065 	if (err != DDI_SUCCESS) {
10424128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring desc[%d] failed\n",
10434128Shx147065 		    qid));
10444128Shx147065 		goto fail;
10454128Shx147065 	}
10464128Shx147065 
10474128Shx147065 	/* update shared page with ring's base address */
10484128Shx147065 	sc->sc_shared->txbase[qid] = ring->dma_desc.cookie.dmac_address;
10494128Shx147065 
10504128Shx147065 	desc_h = (wpi_tx_desc_t *)ring->dma_desc.mem_va;
10514128Shx147065 	paddr_desc_h = ring->dma_desc.cookie.dmac_address;
10524128Shx147065 
10534128Shx147065 	err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_cmd_t),
10544128Shx147065 	    &tx_cmd_dma_attr, &wpi_dma_accattr,
10554128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
10564128Shx147065 	    &ring->dma_cmd);
10574128Shx147065 	if (err != DDI_SUCCESS) {
10584128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring cmd[%d] failed\n",
10594128Shx147065 		    qid));
10604128Shx147065 		goto fail;
10614128Shx147065 	}
10624128Shx147065 
10634128Shx147065 	cmd_h = (wpi_tx_cmd_t *)ring->dma_cmd.mem_va;
10644128Shx147065 	paddr_cmd_h = ring->dma_cmd.cookie.dmac_address;
10654128Shx147065 
10664128Shx147065 	/*
10674128Shx147065 	 * Allocate Tx buffers.
10684128Shx147065 	 */
10694128Shx147065 	ring->data = kmem_zalloc(sizeof (wpi_tx_data_t) * count, KM_NOSLEEP);
10704128Shx147065 	if (ring->data == NULL) {
10714128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "could not allocate tx data slots\n"));
10724128Shx147065 		goto fail;
10734128Shx147065 	}
10744128Shx147065 
10754128Shx147065 	for (i = 0; i < count; i++) {
10764128Shx147065 		data = &ring->data[i];
10774128Shx147065 		err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz,
10784128Shx147065 		    &tx_buffer_dma_attr, &wpi_dma_accattr,
10794128Shx147065 		    DDI_DMA_WRITE | DDI_DMA_STREAMING,
10804128Shx147065 		    &data->dma_data);
10814128Shx147065 		if (err != DDI_SUCCESS) {
10824128Shx147065 			WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring buf[%d] "
10834128Shx147065 			    "failed\n", i));
10844128Shx147065 			goto fail;
10854128Shx147065 		}
10864128Shx147065 
10874128Shx147065 		data->desc = desc_h + i;
10884128Shx147065 		data->paddr_desc = paddr_desc_h +
10896990Sgd78059 		    ((uintptr_t)data->desc - (uintptr_t)desc_h);
10904128Shx147065 		data->cmd = cmd_h + i;
10914128Shx147065 		data->paddr_cmd = paddr_cmd_h +
10926990Sgd78059 		    ((uintptr_t)data->cmd - (uintptr_t)cmd_h);
10934128Shx147065 	}
10944128Shx147065 
10954128Shx147065 	return (err);
10964128Shx147065 
10974128Shx147065 fail:
10984128Shx147065 	wpi_free_tx_ring(sc, ring);
10994128Shx147065 	return (err);
11004128Shx147065 }
11014128Shx147065 
11024128Shx147065 static void
11034128Shx147065 wpi_reset_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring)
11044128Shx147065 {
11054128Shx147065 	wpi_tx_data_t *data;
11064128Shx147065 	int i, ntries;
11074128Shx147065 
11084128Shx147065 	wpi_mem_lock(sc);
11094128Shx147065 
11104128Shx147065 	WPI_WRITE(sc, WPI_TX_CONFIG(ring->qid), 0);
11114128Shx147065 	for (ntries = 0; ntries < 100; ntries++) {
11124128Shx147065 		if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(ring->qid))
11134128Shx147065 			break;
11144128Shx147065 		DELAY(10);
11154128Shx147065 	}
11164128Shx147065 #ifdef DEBUG
11174128Shx147065 	if (ntries == 100 && wpi_dbg_flags > 0) {
11184128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Tx ring %d\n",
11194128Shx147065 		    ring->qid));
11204128Shx147065 	}
11214128Shx147065 #endif
11224128Shx147065 	wpi_mem_unlock(sc);
11234128Shx147065 
11244128Shx147065 	for (i = 0; i < ring->count; i++) {
11254128Shx147065 		data = &ring->data[i];
11264128Shx147065 		WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
11274128Shx147065 	}
11284128Shx147065 
11294128Shx147065 	ring->queued = 0;
11304128Shx147065 	ring->cur = 0;
11314128Shx147065 }
11324128Shx147065 
11334128Shx147065 /*ARGSUSED*/
11344128Shx147065 static void
11354128Shx147065 wpi_free_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring)
11364128Shx147065 {
11374128Shx147065 	int i;
11384128Shx147065 
11394128Shx147065 	if (ring->dma_desc.dma_hdl != NULL)
11404128Shx147065 		WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
11414128Shx147065 	wpi_free_dma_mem(&ring->dma_desc);
11424128Shx147065 
11434128Shx147065 	if (ring->dma_cmd.dma_hdl != NULL)
11444128Shx147065 		WPI_DMA_SYNC(ring->dma_cmd, DDI_DMA_SYNC_FORDEV);
11454128Shx147065 	wpi_free_dma_mem(&ring->dma_cmd);
11464128Shx147065 
11474128Shx147065 	if (ring->data != NULL) {
11484128Shx147065 		for (i = 0; i < ring->count; i++) {
11494128Shx147065 			if (ring->data[i].dma_data.dma_hdl)
11504128Shx147065 				WPI_DMA_SYNC(ring->data[i].dma_data,
11514128Shx147065 				    DDI_DMA_SYNC_FORDEV);
11524128Shx147065 			wpi_free_dma_mem(&ring->data[i].dma_data);
11534128Shx147065 		}
11544128Shx147065 		kmem_free(ring->data, ring->count * sizeof (wpi_tx_data_t));
1155*7865SPengcheng.Chen@Sun.COM 		ring->data = NULL;
11564128Shx147065 	}
11574128Shx147065 }
11584128Shx147065 
11594128Shx147065 static int
11604128Shx147065 wpi_ring_init(wpi_sc_t *sc)
11614128Shx147065 {
11624128Shx147065 	int i, err = DDI_SUCCESS;
11634128Shx147065 
11644128Shx147065 	for (i = 0; i < 4; i++) {
11654128Shx147065 		err = wpi_alloc_tx_ring(sc, &sc->sc_txq[i], WPI_TX_RING_COUNT,
11664128Shx147065 		    i);
11674128Shx147065 		if (err != DDI_SUCCESS)
11684128Shx147065 			goto fail;
11694128Shx147065 	}
11704128Shx147065 	err = wpi_alloc_tx_ring(sc, &sc->sc_cmdq, WPI_CMD_RING_COUNT, 4);
11714128Shx147065 	if (err != DDI_SUCCESS)
11724128Shx147065 		goto fail;
11734128Shx147065 	err = wpi_alloc_tx_ring(sc, &sc->sc_svcq, WPI_SVC_RING_COUNT, 5);
11744128Shx147065 	if (err != DDI_SUCCESS)
11754128Shx147065 		goto fail;
11764128Shx147065 	err = wpi_alloc_rx_ring(sc);
11774128Shx147065 	if (err != DDI_SUCCESS)
11784128Shx147065 		goto fail;
11794128Shx147065 	return (err);
11804128Shx147065 
11814128Shx147065 fail:
11824128Shx147065 	return (err);
11834128Shx147065 }
11844128Shx147065 
11854128Shx147065 static void
11864128Shx147065 wpi_ring_free(wpi_sc_t *sc)
11874128Shx147065 {
11884128Shx147065 	int i = 4;
11894128Shx147065 
11904128Shx147065 	wpi_free_rx_ring(sc);
11914128Shx147065 	wpi_free_tx_ring(sc, &sc->sc_svcq);
11924128Shx147065 	wpi_free_tx_ring(sc, &sc->sc_cmdq);
11934128Shx147065 	while (--i >= 0) {
11944128Shx147065 		wpi_free_tx_ring(sc, &sc->sc_txq[i]);
11954128Shx147065 	}
11964128Shx147065 }
11974128Shx147065 
11984128Shx147065 /* ARGSUSED */
11994128Shx147065 static ieee80211_node_t *
12004128Shx147065 wpi_node_alloc(ieee80211com_t *ic)
12014128Shx147065 {
12024128Shx147065 	wpi_amrr_t *amrr;
12034128Shx147065 
12044128Shx147065 	amrr = kmem_zalloc(sizeof (wpi_amrr_t), KM_SLEEP);
12054128Shx147065 	if (amrr != NULL)
12064128Shx147065 		wpi_amrr_init(amrr);
12074128Shx147065 	return (&amrr->in);
12084128Shx147065 }
12094128Shx147065 
12104128Shx147065 static void
12114128Shx147065 wpi_node_free(ieee80211_node_t *in)
12124128Shx147065 {
12134128Shx147065 	ieee80211com_t *ic = in->in_ic;
12144128Shx147065 
12154128Shx147065 	ic->ic_node_cleanup(in);
12165296Szf162725 	if (in->in_wpa_ie != NULL)
12175296Szf162725 		ieee80211_free(in->in_wpa_ie);
12184128Shx147065 	kmem_free(in, sizeof (wpi_amrr_t));
12194128Shx147065 }
12204128Shx147065 
12214128Shx147065 /*ARGSUSED*/
12224128Shx147065 static int
12234128Shx147065 wpi_newstate(ieee80211com_t *ic, enum ieee80211_state nstate, int arg)
12244128Shx147065 {
12254128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)ic;
12264128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
12275453Shx147065 	enum ieee80211_state ostate;
12284128Shx147065 	int i, err = WPI_SUCCESS;
12294128Shx147065 
12304128Shx147065 	mutex_enter(&sc->sc_glock);
1231*7865SPengcheng.Chen@Sun.COM 	ostate = ic->ic_state;
12324128Shx147065 	switch (nstate) {
12334128Shx147065 	case IEEE80211_S_SCAN:
12345453Shx147065 		switch (ostate) {
12355453Shx147065 		case IEEE80211_S_INIT:
1236*7865SPengcheng.Chen@Sun.COM 		{
1237*7865SPengcheng.Chen@Sun.COM 			wpi_node_t node;
1238*7865SPengcheng.Chen@Sun.COM 
1239*7865SPengcheng.Chen@Sun.COM 			sc->sc_flags |= WPI_F_SCANNING;
1240*7865SPengcheng.Chen@Sun.COM 			sc->sc_scan_next = 0;
1241*7865SPengcheng.Chen@Sun.COM 
12425453Shx147065 			/* make the link LED blink while we're scanning */
12435453Shx147065 			wpi_set_led(sc, WPI_LED_LINK, 20, 2);
12445453Shx147065 
1245*7865SPengcheng.Chen@Sun.COM 			/*
1246*7865SPengcheng.Chen@Sun.COM 			 * clear association to receive beacons from all
1247*7865SPengcheng.Chen@Sun.COM 			 * BSS'es
1248*7865SPengcheng.Chen@Sun.COM 			 */
1249*7865SPengcheng.Chen@Sun.COM 			sc->sc_config.state = 0;
1250*7865SPengcheng.Chen@Sun.COM 			sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS);
1251*7865SPengcheng.Chen@Sun.COM 
1252*7865SPengcheng.Chen@Sun.COM 			WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x "
1253*7865SPengcheng.Chen@Sun.COM 			    "filter %x\n",
1254*7865SPengcheng.Chen@Sun.COM 			    sc->sc_config.chan, sc->sc_config.flags,
1255*7865SPengcheng.Chen@Sun.COM 			    sc->sc_config.filter));
1256*7865SPengcheng.Chen@Sun.COM 
1257*7865SPengcheng.Chen@Sun.COM 			err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
1258*7865SPengcheng.Chen@Sun.COM 			    sizeof (wpi_config_t), 1);
1259*7865SPengcheng.Chen@Sun.COM 			if (err != WPI_SUCCESS) {
1260*7865SPengcheng.Chen@Sun.COM 				cmn_err(CE_WARN,
1261*7865SPengcheng.Chen@Sun.COM 				    "could not clear association\n");
1262*7865SPengcheng.Chen@Sun.COM 				sc->sc_flags &= ~WPI_F_SCANNING;
1263*7865SPengcheng.Chen@Sun.COM 				mutex_exit(&sc->sc_glock);
1264*7865SPengcheng.Chen@Sun.COM 				return (err);
1265*7865SPengcheng.Chen@Sun.COM 			}
1266*7865SPengcheng.Chen@Sun.COM 
1267*7865SPengcheng.Chen@Sun.COM 			/* add broadcast node to send probe request */
1268*7865SPengcheng.Chen@Sun.COM 			(void) memset(&node, 0, sizeof (node));
1269*7865SPengcheng.Chen@Sun.COM 			(void) memset(&node.bssid, 0xff, IEEE80211_ADDR_LEN);
1270*7865SPengcheng.Chen@Sun.COM 			node.id = WPI_ID_BROADCAST;
1271*7865SPengcheng.Chen@Sun.COM 
1272*7865SPengcheng.Chen@Sun.COM 			err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node,
1273*7865SPengcheng.Chen@Sun.COM 			    sizeof (node), 1);
1274*7865SPengcheng.Chen@Sun.COM 			if (err != WPI_SUCCESS) {
1275*7865SPengcheng.Chen@Sun.COM 				cmn_err(CE_WARN,
1276*7865SPengcheng.Chen@Sun.COM 				    "could not add broadcast node\n");
1277*7865SPengcheng.Chen@Sun.COM 				sc->sc_flags &= ~WPI_F_SCANNING;
12785453Shx147065 				mutex_exit(&sc->sc_glock);
12795453Shx147065 				return (err);
12805453Shx147065 			}
12815453Shx147065 			break;
12824128Shx147065 		}
1283*7865SPengcheng.Chen@Sun.COM 		case IEEE80211_S_SCAN:
1284*7865SPengcheng.Chen@Sun.COM 			mutex_exit(&sc->sc_glock);
1285*7865SPengcheng.Chen@Sun.COM 			/* step to next channel before actual FW scan */
1286*7865SPengcheng.Chen@Sun.COM 			err = sc->sc_newstate(ic, nstate, arg);
1287*7865SPengcheng.Chen@Sun.COM 			mutex_enter(&sc->sc_glock);
1288*7865SPengcheng.Chen@Sun.COM 			if ((err != 0) || ((err = wpi_scan(sc)) != 0)) {
1289*7865SPengcheng.Chen@Sun.COM 				cmn_err(CE_WARN,
1290*7865SPengcheng.Chen@Sun.COM 				    "could not initiate scan\n");
1291*7865SPengcheng.Chen@Sun.COM 				sc->sc_flags &= ~WPI_F_SCANNING;
1292*7865SPengcheng.Chen@Sun.COM 				ieee80211_cancel_scan(ic);
1293*7865SPengcheng.Chen@Sun.COM 			}
1294*7865SPengcheng.Chen@Sun.COM 			mutex_exit(&sc->sc_glock);
1295*7865SPengcheng.Chen@Sun.COM 			return (err);
1296*7865SPengcheng.Chen@Sun.COM 		default:
1297*7865SPengcheng.Chen@Sun.COM 			break;
1298*7865SPengcheng.Chen@Sun.COM 		}
12994128Shx147065 		sc->sc_clk = 0;
1300*7865SPengcheng.Chen@Sun.COM 		break;
13014128Shx147065 
13024128Shx147065 	case IEEE80211_S_AUTH:
1303*7865SPengcheng.Chen@Sun.COM 		if (ostate == IEEE80211_S_SCAN) {
1304*7865SPengcheng.Chen@Sun.COM 			sc->sc_flags &= ~WPI_F_SCANNING;
1305*7865SPengcheng.Chen@Sun.COM 		}
1306*7865SPengcheng.Chen@Sun.COM 
13074128Shx147065 		/* reset state to handle reassociations correctly */
13084128Shx147065 		sc->sc_config.state = 0;
13094128Shx147065 		sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS);
13104128Shx147065 
13114128Shx147065 		if ((err = wpi_auth(sc)) != 0) {
13124128Shx147065 			WPI_DBG((WPI_DEBUG_80211,
13134128Shx147065 			    "could not send authentication request\n"));
13144128Shx147065 			mutex_exit(&sc->sc_glock);
13154128Shx147065 			return (err);
13164128Shx147065 		}
13174128Shx147065 		break;
13184128Shx147065 
13194128Shx147065 	case IEEE80211_S_RUN:
1320*7865SPengcheng.Chen@Sun.COM 		if (ostate == IEEE80211_S_SCAN) {
1321*7865SPengcheng.Chen@Sun.COM 			sc->sc_flags &= ~WPI_F_SCANNING;
1322*7865SPengcheng.Chen@Sun.COM 		}
1323*7865SPengcheng.Chen@Sun.COM 
13244128Shx147065 		if (ic->ic_opmode == IEEE80211_M_MONITOR) {
13254128Shx147065 			/* link LED blinks while monitoring */
13264128Shx147065 			wpi_set_led(sc, WPI_LED_LINK, 5, 5);
13274128Shx147065 			break;
13284128Shx147065 		}
13294128Shx147065 
13304128Shx147065 		if (ic->ic_opmode != IEEE80211_M_STA) {
13314128Shx147065 			(void) wpi_auth(sc);
13324128Shx147065 			/* need setup beacon here */
13334128Shx147065 		}
13344128Shx147065 		WPI_DBG((WPI_DEBUG_80211, "wpi: associated."));
13354128Shx147065 
13364128Shx147065 		/* update adapter's configuration */
13374128Shx147065 		sc->sc_config.state = LE_16(WPI_CONFIG_ASSOCIATED);
13384128Shx147065 		/* short preamble/slot time are negotiated when associating */
13394128Shx147065 		sc->sc_config.flags &= ~LE_32(WPI_CONFIG_SHPREAMBLE |
13404128Shx147065 		    WPI_CONFIG_SHSLOT);
13414128Shx147065 		if (ic->ic_flags & IEEE80211_F_SHSLOT)
13424128Shx147065 			sc->sc_config.flags |= LE_32(WPI_CONFIG_SHSLOT);
13434128Shx147065 		if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
13444128Shx147065 			sc->sc_config.flags |= LE_32(WPI_CONFIG_SHPREAMBLE);
13454128Shx147065 		sc->sc_config.filter |= LE_32(WPI_FILTER_BSS);
13464128Shx147065 		if (ic->ic_opmode != IEEE80211_M_STA)
13474128Shx147065 			sc->sc_config.filter |= LE_32(WPI_FILTER_BEACON);
13484128Shx147065 
13494128Shx147065 		WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x\n",
13504128Shx147065 		    sc->sc_config.chan, sc->sc_config.flags));
13514128Shx147065 		err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
13524128Shx147065 		    sizeof (wpi_config_t), 1);
13534128Shx147065 		if (err != WPI_SUCCESS) {
13544128Shx147065 			WPI_DBG((WPI_DEBUG_80211,
13554128Shx147065 			    "could not update configuration\n"));
13564128Shx147065 			mutex_exit(&sc->sc_glock);
13574128Shx147065 			return (err);
13584128Shx147065 		}
13594128Shx147065 
13604128Shx147065 		/* start automatic rate control */
13614128Shx147065 		mutex_enter(&sc->sc_mt_lock);
13624128Shx147065 		if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
13634128Shx147065 			sc->sc_flags |= WPI_F_RATE_AUTO_CTL;
13644128Shx147065 			/* set rate to some reasonable initial value */
13654499Shx147065 			i = in->in_rates.ir_nrates - 1;
13664499Shx147065 			while (i > 0 && IEEE80211_RATE(i) > 72)
13674499Shx147065 				i--;
13684128Shx147065 			in->in_txrate = i;
13694128Shx147065 		} else {
13704128Shx147065 			sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL;
13714128Shx147065 		}
13724128Shx147065 		mutex_exit(&sc->sc_mt_lock);
13734128Shx147065 
13744128Shx147065 		/* link LED always on while associated */
13754128Shx147065 		wpi_set_led(sc, WPI_LED_LINK, 0, 1);
13764128Shx147065 		break;
13774128Shx147065 
13784128Shx147065 	case IEEE80211_S_INIT:
1379*7865SPengcheng.Chen@Sun.COM 		sc->sc_flags &= ~WPI_F_SCANNING;
1380*7865SPengcheng.Chen@Sun.COM 		break;
1381*7865SPengcheng.Chen@Sun.COM 
13824128Shx147065 	case IEEE80211_S_ASSOC:
1383*7865SPengcheng.Chen@Sun.COM 		sc->sc_flags &= ~WPI_F_SCANNING;
13844128Shx147065 		break;
13854128Shx147065 	}
13864128Shx147065 
13874128Shx147065 	mutex_exit(&sc->sc_glock);
13884128Shx147065 	return (sc->sc_newstate(ic, nstate, arg));
13894128Shx147065 }
13904128Shx147065 
13915296Szf162725 /*ARGSUSED*/
13925296Szf162725 static int wpi_key_set(ieee80211com_t *ic, const struct ieee80211_key *k,
13935296Szf162725     const uint8_t mac[IEEE80211_ADDR_LEN])
13945296Szf162725 {
13955296Szf162725 	wpi_sc_t *sc = (wpi_sc_t *)ic;
13965296Szf162725 	wpi_node_t node;
13975296Szf162725 	int err;
13985296Szf162725 
13995296Szf162725 	switch (k->wk_cipher->ic_cipher) {
14005296Szf162725 	case IEEE80211_CIPHER_WEP:
14015296Szf162725 	case IEEE80211_CIPHER_TKIP:
14025296Szf162725 		return (1); /* sofeware do it. */
14035296Szf162725 	case IEEE80211_CIPHER_AES_CCM:
14045296Szf162725 		break;
14055296Szf162725 	default:
14065296Szf162725 		return (0);
14075296Szf162725 	}
14085296Szf162725 	sc->sc_config.filter &= ~(WPI_FILTER_NODECRYPTUNI |
14095296Szf162725 	    WPI_FILTER_NODECRYPTMUL);
14105296Szf162725 
14115296Szf162725 	mutex_enter(&sc->sc_glock);
14125296Szf162725 
14135296Szf162725 	/* update ap/multicast node */
14145296Szf162725 	(void) memset(&node, 0, sizeof (node));
14155296Szf162725 	if (IEEE80211_IS_MULTICAST(mac)) {
14165296Szf162725 		(void) memset(node.bssid, 0xff, 6);
14175296Szf162725 		node.id = WPI_ID_BROADCAST;
14185296Szf162725 	} else {
14195296Szf162725 		IEEE80211_ADDR_COPY(node.bssid, ic->ic_bss->in_bssid);
14205296Szf162725 		node.id = WPI_ID_BSS;
14215296Szf162725 	}
14225296Szf162725 	if (k->wk_flags & IEEE80211_KEY_XMIT) {
14235296Szf162725 		node.key_flags = 0;
14245296Szf162725 		node.keyp = k->wk_keyix;
14255296Szf162725 	} else {
14265296Szf162725 		node.key_flags = (1 << 14);
14275296Szf162725 		node.keyp = k->wk_keyix + 4;
14285296Szf162725 	}
14295296Szf162725 	(void) memcpy(node.key, k->wk_key, k->wk_keylen);
14305296Szf162725 	node.key_flags |= (2 | (1 << 3) | (k->wk_keyix << 8));
14315296Szf162725 	node.sta_mask = 1;
14325296Szf162725 	node.control = 1;
14335296Szf162725 	err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1);
14345296Szf162725 	if (err != WPI_SUCCESS) {
14355296Szf162725 		cmn_err(CE_WARN, "wpi_key_set():"
14365296Szf162725 		    "failed to update ap node\n");
14375296Szf162725 		mutex_exit(&sc->sc_glock);
14385296Szf162725 		return (0);
14395296Szf162725 	}
14405296Szf162725 	mutex_exit(&sc->sc_glock);
14415296Szf162725 	return (1);
14425296Szf162725 }
14435296Szf162725 
14444128Shx147065 /*
14454128Shx147065  * Grab exclusive access to NIC memory.
14464128Shx147065  */
14474128Shx147065 static void
14484128Shx147065 wpi_mem_lock(wpi_sc_t *sc)
14494128Shx147065 {
14504128Shx147065 	uint32_t tmp;
14514128Shx147065 	int ntries;
14524128Shx147065 
14534128Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
14544128Shx147065 	WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC);
14554128Shx147065 
14564128Shx147065 	/* spin until we actually get the lock */
14574128Shx147065 	for (ntries = 0; ntries < 1000; ntries++) {
14584128Shx147065 		if ((WPI_READ(sc, WPI_GPIO_CTL) &
14594128Shx147065 		    (WPI_GPIO_CLOCK | WPI_GPIO_SLEEP)) == WPI_GPIO_CLOCK)
14604128Shx147065 			break;
14614128Shx147065 		DELAY(10);
14624128Shx147065 	}
14634128Shx147065 	if (ntries == 1000)
14644128Shx147065 		WPI_DBG((WPI_DEBUG_PIO, "could not lock memory\n"));
14654128Shx147065 }
14664128Shx147065 
14674128Shx147065 /*
14684128Shx147065  * Release lock on NIC memory.
14694128Shx147065  */
14704128Shx147065 static void
14714128Shx147065 wpi_mem_unlock(wpi_sc_t *sc)
14724128Shx147065 {
14734128Shx147065 	uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL);
14744128Shx147065 	WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC);
14754128Shx147065 }
14764128Shx147065 
14774128Shx147065 static uint32_t
14784128Shx147065 wpi_mem_read(wpi_sc_t *sc, uint16_t addr)
14794128Shx147065 {
14804128Shx147065 	WPI_WRITE(sc, WPI_READ_MEM_ADDR, WPI_MEM_4 | addr);
14814128Shx147065 	return (WPI_READ(sc, WPI_READ_MEM_DATA));
14824128Shx147065 }
14834128Shx147065 
14844128Shx147065 static void
14854128Shx147065 wpi_mem_write(wpi_sc_t *sc, uint16_t addr, uint32_t data)
14864128Shx147065 {
14874128Shx147065 	WPI_WRITE(sc, WPI_WRITE_MEM_ADDR, WPI_MEM_4 | addr);
14884128Shx147065 	WPI_WRITE(sc, WPI_WRITE_MEM_DATA, data);
14894128Shx147065 }
14904128Shx147065 
14914128Shx147065 static void
14924128Shx147065 wpi_mem_write_region_4(wpi_sc_t *sc, uint16_t addr,
14934128Shx147065     const uint32_t *data, int wlen)
14944128Shx147065 {
14954128Shx147065 	for (; wlen > 0; wlen--, data++, addr += 4)
14964128Shx147065 		wpi_mem_write(sc, addr, *data);
14974128Shx147065 }
14984128Shx147065 
14994128Shx147065 /*
15004128Shx147065  * Read 16 bits from the EEPROM.  We access EEPROM through the MAC instead of
15014128Shx147065  * using the traditional bit-bang method.
15024128Shx147065  */
15034128Shx147065 static uint16_t
15044128Shx147065 wpi_read_prom_word(wpi_sc_t *sc, uint32_t addr)
15054128Shx147065 {
15064128Shx147065 	uint32_t val;
15074128Shx147065 	int ntries;
15084128Shx147065 
15094128Shx147065 	WPI_WRITE(sc, WPI_EEPROM_CTL, addr << 2);
15104128Shx147065 
15114128Shx147065 	wpi_mem_lock(sc);
15124128Shx147065 	for (ntries = 0; ntries < 10; ntries++) {
15134128Shx147065 		if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) & WPI_EEPROM_READY)
15144128Shx147065 			break;
15154128Shx147065 		DELAY(10);
15164128Shx147065 	}
15174128Shx147065 	wpi_mem_unlock(sc);
15184128Shx147065 
15194128Shx147065 	if (ntries == 10) {
15204128Shx147065 		WPI_DBG((WPI_DEBUG_PIO, "could not read EEPROM\n"));
15214128Shx147065 		return (0xdead);
15224128Shx147065 	}
15234128Shx147065 	return (val >> 16);
15244128Shx147065 }
15254128Shx147065 
15264128Shx147065 /*
15274128Shx147065  * The firmware boot code is small and is intended to be copied directly into
15284128Shx147065  * the NIC internal memory.
15294128Shx147065  */
15304128Shx147065 static int
15314128Shx147065 wpi_load_microcode(wpi_sc_t *sc)
15324128Shx147065 {
15334128Shx147065 	const char *ucode;
15344128Shx147065 	int size;
15354128Shx147065 
15364128Shx147065 	ucode = sc->sc_boot;
15374128Shx147065 	size = LE_32(sc->sc_hdr->bootsz);
15384128Shx147065 	/* check that microcode size is a multiple of 4 */
15394128Shx147065 	if (size & 3)
15404128Shx147065 		return (EINVAL);
15414128Shx147065 
15424128Shx147065 	size /= sizeof (uint32_t);
15434128Shx147065 
15444128Shx147065 	wpi_mem_lock(sc);
15454128Shx147065 
15464128Shx147065 	/* copy microcode image into NIC memory */
15474128Shx147065 	wpi_mem_write_region_4(sc, WPI_MEM_UCODE_BASE, (const uint32_t *)ucode,
15484128Shx147065 	    size);
15494128Shx147065 
15504128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_SRC, 0);
15514128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_DST, WPI_FW_TEXT);
15524128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_SIZE, size);
15534128Shx147065 
15544128Shx147065 	/* run microcode */
15554128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_RUN);
15564128Shx147065 
15574128Shx147065 	wpi_mem_unlock(sc);
15584128Shx147065 
15594128Shx147065 	return (WPI_SUCCESS);
15604128Shx147065 }
15614128Shx147065 
15624128Shx147065 /*
15634128Shx147065  * The firmware text and data segments are transferred to the NIC using DMA.
15644128Shx147065  * The driver just copies the firmware into DMA-safe memory and tells the NIC
15654128Shx147065  * where to find it.  Once the NIC has copied the firmware into its internal
15664128Shx147065  * memory, we can free our local copy in the driver.
15674128Shx147065  */
15684128Shx147065 static int
15694128Shx147065 wpi_load_firmware(wpi_sc_t *sc, uint32_t target)
15704128Shx147065 {
15714128Shx147065 	const char *fw;
15724128Shx147065 	int size;
15734128Shx147065 	wpi_dma_t *dma_p;
15744128Shx147065 	ddi_dma_cookie_t *cookie;
15754128Shx147065 	wpi_tx_desc_t desc;
15764128Shx147065 	int i, ntries, err = WPI_SUCCESS;
15774128Shx147065 
15784128Shx147065 	/* only text and data here */
15794128Shx147065 	if (target == WPI_FW_TEXT) {
15804128Shx147065 		fw = sc->sc_text;
15814128Shx147065 		size = LE_32(sc->sc_hdr->textsz);
15824128Shx147065 		dma_p = &sc->sc_dma_fw_text;
15834128Shx147065 		cookie = sc->sc_fw_text_cookie;
15844128Shx147065 	} else {
15854128Shx147065 		fw = sc->sc_data;
15864128Shx147065 		size = LE_32(sc->sc_hdr->datasz);
15874128Shx147065 		dma_p = &sc->sc_dma_fw_data;
15884128Shx147065 		cookie = sc->sc_fw_data_cookie;
15894128Shx147065 	}
15904128Shx147065 
15914128Shx147065 	/* copy firmware image to DMA-safe memory */
15924128Shx147065 	(void) memcpy(dma_p->mem_va, fw, size);
15934128Shx147065 
15944128Shx147065 	/* make sure the adapter will get up-to-date values */
15954128Shx147065 	(void) ddi_dma_sync(dma_p->dma_hdl, 0, size, DDI_DMA_SYNC_FORDEV);
15964128Shx147065 
15974128Shx147065 	(void) memset(&desc, 0, sizeof (desc));
15984128Shx147065 	desc.flags = LE_32(WPI_PAD32(size) << 28 | dma_p->ncookies << 24);
15994128Shx147065 	for (i = 0; i < dma_p->ncookies; i++) {
16004128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "cookie%d addr:%x size:%x\n",
16014128Shx147065 		    i, cookie[i].dmac_address, cookie[i].dmac_size));
16024128Shx147065 		desc.segs[i].addr = cookie[i].dmac_address;
16034128Shx147065 		desc.segs[i].len = (uint32_t)cookie[i].dmac_size;
16044128Shx147065 	}
16054128Shx147065 
16064128Shx147065 	wpi_mem_lock(sc);
16074128Shx147065 
16084128Shx147065 	/* tell adapter where to copy image in its internal memory */
16094128Shx147065 	WPI_WRITE(sc, WPI_FW_TARGET, target);
16104128Shx147065 
16114128Shx147065 	WPI_WRITE(sc, WPI_TX_CONFIG(6), 0);
16124128Shx147065 
16134128Shx147065 	/* copy firmware descriptor into NIC memory */
16144128Shx147065 	WPI_WRITE_REGION_4(sc, WPI_TX_DESC(6), (uint32_t *)&desc,
16154128Shx147065 	    sizeof desc / sizeof (uint32_t));
16164128Shx147065 
16174128Shx147065 	WPI_WRITE(sc, WPI_TX_CREDIT(6), 0xfffff);
16184128Shx147065 	WPI_WRITE(sc, WPI_TX_STATE(6), 0x4001);
16194128Shx147065 	WPI_WRITE(sc, WPI_TX_CONFIG(6), 0x80000001);
16204128Shx147065 
16214128Shx147065 	/* wait while the adapter is busy copying the firmware */
16224128Shx147065 	for (ntries = 0; ntries < 100; ntries++) {
16234128Shx147065 		if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(6))
16244128Shx147065 			break;
16254128Shx147065 		DELAY(1000);
16264128Shx147065 	}
16274128Shx147065 	if (ntries == 100) {
16284128Shx147065 		WPI_DBG((WPI_DEBUG_FW, "timeout transferring firmware\n"));
16294128Shx147065 		err = ETIMEDOUT;
16304128Shx147065 	}
16314128Shx147065 
16324128Shx147065 	WPI_WRITE(sc, WPI_TX_CREDIT(6), 0);
16334128Shx147065 
16344128Shx147065 	wpi_mem_unlock(sc);
16354128Shx147065 
16364128Shx147065 	return (err);
16374128Shx147065 }
16384128Shx147065 
16394128Shx147065 /*ARGSUSED*/
16404128Shx147065 static void
16414128Shx147065 wpi_rx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data)
16424128Shx147065 {
16434128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
16444128Shx147065 	wpi_rx_ring_t *ring = &sc->sc_rxq;
16454128Shx147065 	wpi_rx_stat_t *stat;
16464128Shx147065 	wpi_rx_head_t *head;
16474128Shx147065 	wpi_rx_tail_t *tail;
16484128Shx147065 	ieee80211_node_t *in;
16494128Shx147065 	struct ieee80211_frame *wh;
16504128Shx147065 	mblk_t *mp;
16514128Shx147065 	uint16_t len;
16524128Shx147065 
16534128Shx147065 	stat = (wpi_rx_stat_t *)(desc + 1);
16544128Shx147065 
16554128Shx147065 	if (stat->len > WPI_STAT_MAXLEN) {
16564128Shx147065 		WPI_DBG((WPI_DEBUG_RX, "invalid rx statistic header\n"));
16574128Shx147065 		return;
16584128Shx147065 	}
16594128Shx147065 
16604128Shx147065 	head = (wpi_rx_head_t *)((caddr_t)(stat + 1) + stat->len);
16614128Shx147065 	tail = (wpi_rx_tail_t *)((caddr_t)(head + 1) + LE_16(head->len));
16624128Shx147065 
16634128Shx147065 	len = LE_16(head->len);
16644128Shx147065 
16654128Shx147065 	WPI_DBG((WPI_DEBUG_RX, "rx intr: idx=%d len=%d stat len=%d rssi=%d "
16664128Shx147065 	    "rate=%x chan=%d tstamp=%llu", ring->cur, LE_32(desc->len),
16674128Shx147065 	    len, (int8_t)stat->rssi, head->rate, head->chan,
16684128Shx147065 	    LE_64(tail->tstamp)));
16694128Shx147065 
16704128Shx147065 	if ((len < 20) || (len > sc->sc_dmabuf_sz)) {
16714128Shx147065 		sc->sc_rx_err++;
16724128Shx147065 		return;
16734128Shx147065 	}
16744128Shx147065 
16754128Shx147065 	/*
16764128Shx147065 	 * Discard Rx frames with bad CRC early
16774128Shx147065 	 */
16784128Shx147065 	if ((LE_32(tail->flags) & WPI_RX_NOERROR) != WPI_RX_NOERROR) {
16794128Shx147065 		WPI_DBG((WPI_DEBUG_RX, "rx tail flags error %x\n",
16804128Shx147065 		    LE_32(tail->flags)));
16814128Shx147065 		sc->sc_rx_err++;
16824128Shx147065 		return;
16834128Shx147065 	}
16844128Shx147065 
16854128Shx147065 	/* update Rx descriptor */
16864128Shx147065 	/* ring->desc[ring->cur] = LE_32(data->dma_data.cookie.dmac_address); */
16874128Shx147065 
16884128Shx147065 #ifdef WPI_BPF
16894128Shx147065 #ifndef WPI_CURRENT
16904128Shx147065 	if (sc->sc_drvbpf != NULL) {
16914128Shx147065 #else
16924128Shx147065 	if (bpf_peers_present(sc->sc_drvbpf)) {
16934128Shx147065 #endif
16944128Shx147065 		struct wpi_rx_radiotap_header *tap = &sc->sc_rxtap;
16954128Shx147065 
16964128Shx147065 		tap->wr_flags = 0;
16974128Shx147065 		tap->wr_rate = head->rate;
16984128Shx147065 		tap->wr_chan_freq =
16994128Shx147065 		    LE_16(ic->ic_channels[head->chan].ic_freq);
17004128Shx147065 		tap->wr_chan_flags =
17014128Shx147065 		    LE_16(ic->ic_channels[head->chan].ic_flags);
17024128Shx147065 		tap->wr_dbm_antsignal = (int8_t)(stat->rssi - WPI_RSSI_OFFSET);
17034128Shx147065 		tap->wr_dbm_antnoise = (int8_t)LE_16(stat->noise);
17044128Shx147065 		tap->wr_tsft = tail->tstamp;
17054128Shx147065 		tap->wr_antenna = (LE_16(head->flags) >> 4) & 0xf;
17064128Shx147065 		switch (head->rate) {
17074128Shx147065 		/* CCK rates */
17084128Shx147065 		case  10: tap->wr_rate =   2; break;
17094128Shx147065 		case  20: tap->wr_rate =   4; break;
17104128Shx147065 		case  55: tap->wr_rate =  11; break;
17114128Shx147065 		case 110: tap->wr_rate =  22; break;
17124128Shx147065 		/* OFDM rates */
17134128Shx147065 		case 0xd: tap->wr_rate =  12; break;
17144128Shx147065 		case 0xf: tap->wr_rate =  18; break;
17154128Shx147065 		case 0x5: tap->wr_rate =  24; break;
17164128Shx147065 		case 0x7: tap->wr_rate =  36; break;
17174128Shx147065 		case 0x9: tap->wr_rate =  48; break;
17184128Shx147065 		case 0xb: tap->wr_rate =  72; break;
17194128Shx147065 		case 0x1: tap->wr_rate =  96; break;
17204128Shx147065 		case 0x3: tap->wr_rate = 108; break;
17214128Shx147065 		/* unknown rate: should not happen */
17224128Shx147065 		default:  tap->wr_rate =   0;
17234128Shx147065 		}
17244128Shx147065 		if (LE_16(head->flags) & 0x4)
17254128Shx147065 			tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
17264128Shx147065 
17274128Shx147065 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
17284128Shx147065 	}
17294128Shx147065 #endif
17304128Shx147065 	/* grab a reference to the source node */
17314128Shx147065 	wh = (struct ieee80211_frame *)(head + 1);
17324128Shx147065 
17334128Shx147065 #ifdef DEBUG
17344128Shx147065 	if (wpi_dbg_flags & WPI_DEBUG_RX)
17354128Shx147065 		ieee80211_dump_pkt((uint8_t *)wh, len, 0, 0);
17364128Shx147065 #endif
17374128Shx147065 
17384128Shx147065 	in = ieee80211_find_rxnode(ic, wh);
17394128Shx147065 	mp = allocb(len, BPRI_MED);
17404128Shx147065 	if (mp) {
17414128Shx147065 		(void) memcpy(mp->b_wptr, wh, len);
17424128Shx147065 		mp->b_wptr += len;
17434128Shx147065 
17444128Shx147065 		/* send the frame to the 802.11 layer */
17454128Shx147065 		(void) ieee80211_input(ic, mp, in, stat->rssi, 0);
17464128Shx147065 	} else {
17474128Shx147065 		sc->sc_rx_nobuf++;
17484128Shx147065 		WPI_DBG((WPI_DEBUG_RX,
17494128Shx147065 		    "wpi_rx_intr(): alloc rx buf failed\n"));
17504128Shx147065 	}
17514128Shx147065 	/* release node reference */
17524128Shx147065 	ieee80211_free_node(in);
17534128Shx147065 }
17544128Shx147065 
17554128Shx147065 /*ARGSUSED*/
17564128Shx147065 static void
17574128Shx147065 wpi_tx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data)
17584128Shx147065 {
17594128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
17604128Shx147065 	wpi_tx_ring_t *ring = &sc->sc_txq[desc->qid & 0x3];
17614128Shx147065 	/* wpi_tx_data_t *txdata = &ring->data[desc->idx]; */
17624128Shx147065 	wpi_tx_stat_t *stat = (wpi_tx_stat_t *)(desc + 1);
17634128Shx147065 	wpi_amrr_t *amrr = (wpi_amrr_t *)ic->ic_bss;
17644128Shx147065 
17654128Shx147065 	WPI_DBG((WPI_DEBUG_TX, "tx done: qid=%d idx=%d retries=%d nkill=%d "
17664128Shx147065 	    "rate=%x duration=%d status=%x\n",
17674128Shx147065 	    desc->qid, desc->idx, stat->ntries, stat->nkill, stat->rate,
17684128Shx147065 	    LE_32(stat->duration), LE_32(stat->status)));
17694128Shx147065 
17704128Shx147065 	amrr->txcnt++;
17714128Shx147065 	WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d cnt\n", amrr->txcnt));
17724128Shx147065 	if (stat->ntries > 0) {
17734128Shx147065 		amrr->retrycnt++;
17744128Shx147065 		sc->sc_tx_retries++;
17754128Shx147065 		WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d retries\n",
17764128Shx147065 		    amrr->retrycnt));
17774128Shx147065 	}
17784128Shx147065 
17794128Shx147065 	sc->sc_tx_timer = 0;
17804128Shx147065 
17814128Shx147065 	mutex_enter(&sc->sc_tx_lock);
17824128Shx147065 	ring->queued--;
17834128Shx147065 	if (ring->queued < 0)
17844128Shx147065 		ring->queued = 0;
17854128Shx147065 	if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count << 3))) {
17864128Shx147065 		sc->sc_need_reschedule = 0;
17874128Shx147065 		mutex_exit(&sc->sc_tx_lock);
17884128Shx147065 		mac_tx_update(ic->ic_mach);
17894128Shx147065 		mutex_enter(&sc->sc_tx_lock);
17904128Shx147065 	}
17914128Shx147065 	mutex_exit(&sc->sc_tx_lock);
17924128Shx147065 }
17934128Shx147065 
17944128Shx147065 static void
17954128Shx147065 wpi_cmd_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc)
17964128Shx147065 {
17974128Shx147065 	if ((desc->qid & 7) != 4) {
17984128Shx147065 		return;	/* not a command ack */
17994128Shx147065 	}
18004128Shx147065 	mutex_enter(&sc->sc_glock);
18014128Shx147065 	sc->sc_flags |= WPI_F_CMD_DONE;
18024128Shx147065 	cv_signal(&sc->sc_cmd_cv);
18034128Shx147065 	mutex_exit(&sc->sc_glock);
18044128Shx147065 }
18054128Shx147065 
18064128Shx147065 static uint_t
18074128Shx147065 wpi_notif_softintr(caddr_t arg)
18084128Shx147065 {
18094128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
18104128Shx147065 	wpi_rx_desc_t *desc;
18114128Shx147065 	wpi_rx_data_t *data;
18124128Shx147065 	uint32_t hw;
18134128Shx147065 
18144128Shx147065 	mutex_enter(&sc->sc_glock);
18154128Shx147065 	if (sc->sc_notif_softint_pending != 1) {
18164128Shx147065 		mutex_exit(&sc->sc_glock);
18174128Shx147065 		return (DDI_INTR_UNCLAIMED);
18184128Shx147065 	}
18194128Shx147065 	mutex_exit(&sc->sc_glock);
18204128Shx147065 
18214128Shx147065 	hw = LE_32(sc->sc_shared->next);
18224128Shx147065 
18234128Shx147065 	while (sc->sc_rxq.cur != hw) {
18244128Shx147065 		data = &sc->sc_rxq.data[sc->sc_rxq.cur];
18254128Shx147065 		desc = (wpi_rx_desc_t *)data->dma_data.mem_va;
18264128Shx147065 
18274128Shx147065 		WPI_DBG((WPI_DEBUG_INTR, "rx notification hw = %d cur = %d "
18284128Shx147065 		    "qid=%x idx=%d flags=%x type=%d len=%d\n",
18294128Shx147065 		    hw, sc->sc_rxq.cur, desc->qid, desc->idx, desc->flags,
18304128Shx147065 		    desc->type, LE_32(desc->len)));
18314128Shx147065 
18324128Shx147065 		if (!(desc->qid & 0x80))	/* reply to a command */
18334128Shx147065 			wpi_cmd_intr(sc, desc);
18344128Shx147065 
18354128Shx147065 		switch (desc->type) {
18364128Shx147065 		case WPI_RX_DONE:
18374128Shx147065 			/* a 802.11 frame was received */
18384128Shx147065 			wpi_rx_intr(sc, desc, data);
18394128Shx147065 			break;
18404128Shx147065 
18414128Shx147065 		case WPI_TX_DONE:
18424128Shx147065 			/* a 802.11 frame has been transmitted */
18434128Shx147065 			wpi_tx_intr(sc, desc, data);
18444128Shx147065 			break;
18454128Shx147065 
18464128Shx147065 		case WPI_UC_READY:
18474128Shx147065 		{
18484128Shx147065 			wpi_ucode_info_t *uc =
18494128Shx147065 			    (wpi_ucode_info_t *)(desc + 1);
18504128Shx147065 
18514128Shx147065 			/* the microcontroller is ready */
18524128Shx147065 			WPI_DBG((WPI_DEBUG_FW,
18534128Shx147065 			    "microcode alive notification version %x "
18544128Shx147065 			    "alive %x\n", LE_32(uc->version),
18554128Shx147065 			    LE_32(uc->valid)));
18564128Shx147065 
18574128Shx147065 			if (LE_32(uc->valid) != 1) {
18584128Shx147065 				WPI_DBG((WPI_DEBUG_FW,
18594128Shx147065 				    "microcontroller initialization failed\n"));
18604128Shx147065 			}
18614128Shx147065 			break;
18624128Shx147065 		}
18634128Shx147065 		case WPI_STATE_CHANGED:
18644128Shx147065 		{
18654128Shx147065 			uint32_t *status = (uint32_t *)(desc + 1);
18664128Shx147065 
18674128Shx147065 			/* enabled/disabled notification */
18684128Shx147065 			WPI_DBG((WPI_DEBUG_RADIO, "state changed to %x\n",
18694128Shx147065 			    LE_32(*status)));
18704128Shx147065 
18714128Shx147065 			if (LE_32(*status) & 1) {
18726062Shx147065 				/*
18736062Shx147065 				 * the radio button has to be pushed(OFF). It
18746062Shx147065 				 * is considered as a hw error, the
18756062Shx147065 				 * wpi_thread() tries to recover it after the
18766062Shx147065 				 * button is pushed again(ON)
18776062Shx147065 				 */
18784128Shx147065 				cmn_err(CE_NOTE,
18794128Shx147065 				    "wpi: Radio transmitter is off\n");
18806062Shx147065 				sc->sc_ostate = sc->sc_ic.ic_state;
18816062Shx147065 				ieee80211_new_state(&sc->sc_ic,
18826062Shx147065 				    IEEE80211_S_INIT, -1);
18836062Shx147065 				sc->sc_flags |=
18846062Shx147065 				    (WPI_F_HW_ERR_RECOVER | WPI_F_RADIO_OFF);
18854128Shx147065 			}
18864128Shx147065 			break;
18874128Shx147065 		}
18884128Shx147065 		case WPI_START_SCAN:
18894128Shx147065 		{
18904128Shx147065 			wpi_start_scan_t *scan =
18914128Shx147065 			    (wpi_start_scan_t *)(desc + 1);
18924128Shx147065 
18934128Shx147065 			WPI_DBG((WPI_DEBUG_SCAN,
18944128Shx147065 			    "scanning channel %d status %x\n",
18954128Shx147065 			    scan->chan, LE_32(scan->status)));
18964128Shx147065 
18974128Shx147065 			break;
18984128Shx147065 		}
18994128Shx147065 		case WPI_STOP_SCAN:
1900*7865SPengcheng.Chen@Sun.COM 		{
1901*7865SPengcheng.Chen@Sun.COM 			wpi_stop_scan_t *scan =
1902*7865SPengcheng.Chen@Sun.COM 			    (wpi_stop_scan_t *)(desc + 1);
1903*7865SPengcheng.Chen@Sun.COM 
1904*7865SPengcheng.Chen@Sun.COM 			WPI_DBG((WPI_DEBUG_SCAN,
1905*7865SPengcheng.Chen@Sun.COM 			    "completed channel %d (burst of %d) status %02x\n",
1906*7865SPengcheng.Chen@Sun.COM 			    scan->chan, scan->nchan, scan->status));
1907*7865SPengcheng.Chen@Sun.COM 
1908*7865SPengcheng.Chen@Sun.COM 			sc->sc_scan_pending = 0;
1909*7865SPengcheng.Chen@Sun.COM 			sc->sc_scan_next++;
1910*7865SPengcheng.Chen@Sun.COM 			break;
1911*7865SPengcheng.Chen@Sun.COM 		}
1912*7865SPengcheng.Chen@Sun.COM 		default:
19134128Shx147065 			break;
19144128Shx147065 		}
19154128Shx147065 
19164128Shx147065 		sc->sc_rxq.cur = (sc->sc_rxq.cur + 1) % WPI_RX_RING_COUNT;
19174128Shx147065 	}
19184128Shx147065 
19194128Shx147065 	/* tell the firmware what we have processed */
19204128Shx147065 	hw = (hw == 0) ? WPI_RX_RING_COUNT - 1 : hw - 1;
19214128Shx147065 	WPI_WRITE(sc, WPI_RX_WIDX, hw & (~7));
19224128Shx147065 	mutex_enter(&sc->sc_glock);
19234128Shx147065 	sc->sc_notif_softint_pending = 0;
19244128Shx147065 	mutex_exit(&sc->sc_glock);
19254128Shx147065 
19264128Shx147065 	return (DDI_INTR_CLAIMED);
19274128Shx147065 }
19284128Shx147065 
19294128Shx147065 static uint_t
19304128Shx147065 wpi_intr(caddr_t arg)
19314128Shx147065 {
19324128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
19335453Shx147065 	uint32_t r, rfh;
19344128Shx147065 
19354128Shx147065 	mutex_enter(&sc->sc_glock);
19366062Shx147065 	if (sc->sc_flags & WPI_F_SUSPEND) {
19376062Shx147065 		mutex_exit(&sc->sc_glock);
19386062Shx147065 		return (DDI_INTR_UNCLAIMED);
19396062Shx147065 	}
19406062Shx147065 
19414128Shx147065 	r = WPI_READ(sc, WPI_INTR);
19424128Shx147065 	if (r == 0 || r == 0xffffffff) {
19434128Shx147065 		mutex_exit(&sc->sc_glock);
19444128Shx147065 		return (DDI_INTR_UNCLAIMED);
19454128Shx147065 	}
19464128Shx147065 
19474128Shx147065 	WPI_DBG((WPI_DEBUG_INTR, "interrupt reg %x\n", r));
19484128Shx147065 
19495453Shx147065 	rfh = WPI_READ(sc, WPI_INTR_STATUS);
19504128Shx147065 	/* disable interrupts */
19514128Shx147065 	WPI_WRITE(sc, WPI_MASK, 0);
19524128Shx147065 	/* ack interrupts */
19534128Shx147065 	WPI_WRITE(sc, WPI_INTR, r);
19545453Shx147065 	WPI_WRITE(sc, WPI_INTR_STATUS, rfh);
19554128Shx147065 
19564128Shx147065 	if (sc->sc_notif_softint_id == NULL) {
19574128Shx147065 		mutex_exit(&sc->sc_glock);
19584128Shx147065 		return (DDI_INTR_CLAIMED);
19594128Shx147065 	}
19604128Shx147065 
19614128Shx147065 	if (r & (WPI_SW_ERROR | WPI_HW_ERROR)) {
19624128Shx147065 		WPI_DBG((WPI_DEBUG_FW, "fatal firmware error\n"));
19634128Shx147065 		mutex_exit(&sc->sc_glock);
19644128Shx147065 		wpi_stop(sc);
1965*7865SPengcheng.Chen@Sun.COM 		if (!(sc->sc_flags & WPI_F_HW_ERR_RECOVER)) {
1966*7865SPengcheng.Chen@Sun.COM 			sc->sc_ostate = sc->sc_ic.ic_state;
1967*7865SPengcheng.Chen@Sun.COM 		}
19684128Shx147065 		ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
19694128Shx147065 		sc->sc_flags |= WPI_F_HW_ERR_RECOVER;
19704128Shx147065 		return (DDI_INTR_CLAIMED);
19714128Shx147065 	}
19724128Shx147065 
19735453Shx147065 	if ((r & (WPI_RX_INTR | WPI_RX_SWINT)) ||
19745453Shx147065 	    (rfh & 0x40070000)) {
19754128Shx147065 		sc->sc_notif_softint_pending = 1;
19764128Shx147065 		ddi_trigger_softintr(sc->sc_notif_softint_id);
19774128Shx147065 	}
19784128Shx147065 
19794128Shx147065 	if (r & WPI_ALIVE_INTR)	{ /* firmware initialized */
19804128Shx147065 		sc->sc_flags |= WPI_F_FW_INIT;
19814128Shx147065 		cv_signal(&sc->sc_fw_cv);
19824128Shx147065 	}
19834128Shx147065 
19844128Shx147065 	/* re-enable interrupts */
19854128Shx147065 	WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK);
19864128Shx147065 	mutex_exit(&sc->sc_glock);
19874128Shx147065 
19884128Shx147065 	return (DDI_INTR_CLAIMED);
19894128Shx147065 }
19904128Shx147065 
19914128Shx147065 static uint8_t
19924128Shx147065 wpi_plcp_signal(int rate)
19934128Shx147065 {
19944128Shx147065 	switch (rate) {
19954128Shx147065 	/* CCK rates (returned values are device-dependent) */
19964128Shx147065 	case 2:		return (10);
19974128Shx147065 	case 4:		return (20);
19984128Shx147065 	case 11:	return (55);
19994128Shx147065 	case 22:	return (110);
20004128Shx147065 
20014128Shx147065 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
20024128Shx147065 	/* R1-R4 (ral/ural is R4-R1) */
20034128Shx147065 	case 12:	return (0xd);
20044128Shx147065 	case 18:	return (0xf);
20054128Shx147065 	case 24:	return (0x5);
20064128Shx147065 	case 36:	return (0x7);
20074128Shx147065 	case 48:	return (0x9);
20084128Shx147065 	case 72:	return (0xb);
20094128Shx147065 	case 96:	return (0x1);
20104128Shx147065 	case 108:	return (0x3);
20114128Shx147065 
20124128Shx147065 	/* unsupported rates (should not get there) */
20134128Shx147065 	default:	return (0);
20144128Shx147065 	}
20154128Shx147065 }
20164128Shx147065 
20174128Shx147065 static mblk_t *
20184128Shx147065 wpi_m_tx(void *arg, mblk_t *mp)
20194128Shx147065 {
20204128Shx147065 	wpi_sc_t	*sc = (wpi_sc_t *)arg;
20214128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
20224128Shx147065 	mblk_t			*next;
20234128Shx147065 
20246062Shx147065 	if (sc->sc_flags & WPI_F_SUSPEND) {
20256062Shx147065 		freemsgchain(mp);
20266062Shx147065 		return (NULL);
20276062Shx147065 	}
20286062Shx147065 
20294128Shx147065 	if (ic->ic_state != IEEE80211_S_RUN) {
20304128Shx147065 		freemsgchain(mp);
20314128Shx147065 		return (NULL);
20324128Shx147065 	}
20334128Shx147065 
20344128Shx147065 	while (mp != NULL) {
20354128Shx147065 		next = mp->b_next;
20364128Shx147065 		mp->b_next = NULL;
20374128Shx147065 		if (wpi_send(ic, mp, IEEE80211_FC0_TYPE_DATA) != 0) {
20384128Shx147065 			mp->b_next = next;
20394128Shx147065 			break;
20404128Shx147065 		}
20414128Shx147065 		mp = next;
20424128Shx147065 	}
20434128Shx147065 	return (mp);
20444128Shx147065 }
20454128Shx147065 
20464128Shx147065 /* ARGSUSED */
20474128Shx147065 static int
20484128Shx147065 wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type)
20494128Shx147065 {
20504128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)ic;
20514128Shx147065 	wpi_tx_ring_t *ring;
20524128Shx147065 	wpi_tx_desc_t *desc;
20534128Shx147065 	wpi_tx_data_t *data;
20544128Shx147065 	wpi_tx_cmd_t *cmd;
20554128Shx147065 	wpi_cmd_data_t *tx;
20564128Shx147065 	ieee80211_node_t *in;
20574128Shx147065 	struct ieee80211_frame *wh;
20584128Shx147065 	struct ieee80211_key *k;
20594128Shx147065 	mblk_t *m, *m0;
20604128Shx147065 	int rate, hdrlen, len, mblen, off, err = WPI_SUCCESS;
20614128Shx147065 
20624128Shx147065 	ring = ((type & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) ?
20634128Shx147065 	    (&sc->sc_txq[0]) : (&sc->sc_txq[1]);
20644128Shx147065 	data = &ring->data[ring->cur];
20654128Shx147065 	desc = data->desc;
20664128Shx147065 	cmd = data->cmd;
20674128Shx147065 	bzero(desc, sizeof (*desc));
20684128Shx147065 	bzero(cmd, sizeof (*cmd));
20694128Shx147065 
20704128Shx147065 	mutex_enter(&sc->sc_tx_lock);
20716062Shx147065 	if (sc->sc_flags & WPI_F_SUSPEND) {
20726062Shx147065 		mutex_exit(&sc->sc_tx_lock);
20736062Shx147065 		if ((type & IEEE80211_FC0_TYPE_MASK) !=
20746062Shx147065 		    IEEE80211_FC0_TYPE_DATA) {
20756062Shx147065 			freemsg(mp);
20766062Shx147065 		}
20776629Szf162725 		err = ENXIO;
20786062Shx147065 		goto exit;
20796062Shx147065 	}
20806062Shx147065 
20814128Shx147065 	if (ring->queued > ring->count - 64) {
20824128Shx147065 		WPI_DBG((WPI_DEBUG_TX, "wpi_send(): no txbuf\n"));
20834128Shx147065 		sc->sc_need_reschedule = 1;
20844128Shx147065 		mutex_exit(&sc->sc_tx_lock);
20854128Shx147065 		if ((type & IEEE80211_FC0_TYPE_MASK) !=
20864128Shx147065 		    IEEE80211_FC0_TYPE_DATA) {
20874128Shx147065 			freemsg(mp);
20884128Shx147065 		}
20894128Shx147065 		sc->sc_tx_nobuf++;
20906629Szf162725 		err = ENOMEM;
20914128Shx147065 		goto exit;
20924128Shx147065 	}
20934128Shx147065 	mutex_exit(&sc->sc_tx_lock);
20944128Shx147065 
20954128Shx147065 	hdrlen = sizeof (struct ieee80211_frame);
20964128Shx147065 
20974128Shx147065 	m = allocb(msgdsize(mp) + 32, BPRI_MED);
20984128Shx147065 	if (m == NULL) { /* can not alloc buf, drop this package */
20994128Shx147065 		cmn_err(CE_WARN,
21004128Shx147065 		    "wpi_send(): failed to allocate msgbuf\n");
21014128Shx147065 		freemsg(mp);
21024128Shx147065 		err = WPI_SUCCESS;
21034128Shx147065 		goto exit;
21044128Shx147065 	}
21054128Shx147065 	for (off = 0, m0 = mp; m0 != NULL; m0 = m0->b_cont) {
21064128Shx147065 		mblen = MBLKL(m0);
21074128Shx147065 		(void) memcpy(m->b_rptr + off, m0->b_rptr, mblen);
21084128Shx147065 		off += mblen;
21094128Shx147065 	}
21104128Shx147065 	m->b_wptr += off;
21114128Shx147065 	freemsg(mp);
21124128Shx147065 
21134128Shx147065 	wh = (struct ieee80211_frame *)m->b_rptr;
21144128Shx147065 
21154128Shx147065 	in = ieee80211_find_txnode(ic, wh->i_addr1);
21164128Shx147065 	if (in == NULL) {
21174128Shx147065 		cmn_err(CE_WARN, "wpi_send(): failed to find tx node\n");
21184128Shx147065 		freemsg(m);
21194128Shx147065 		sc->sc_tx_err++;
21204128Shx147065 		err = WPI_SUCCESS;
21214128Shx147065 		goto exit;
21224128Shx147065 	}
21235296Szf162725 
21245296Szf162725 	(void) ieee80211_encap(ic, m, in);
21255296Szf162725 
21265296Szf162725 	cmd->code = WPI_CMD_TX_DATA;
21275296Szf162725 	cmd->flags = 0;
21285296Szf162725 	cmd->qid = ring->qid;
21295296Szf162725 	cmd->idx = ring->cur;
21305296Szf162725 
21315296Szf162725 	tx = (wpi_cmd_data_t *)cmd->data;
21325296Szf162725 	tx->flags = 0;
21335296Szf162725 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
21345296Szf162725 		tx->flags |= LE_32(WPI_TX_NEED_ACK);
21355296Szf162725 	} else {
21365296Szf162725 		tx->flags &= ~(LE_32(WPI_TX_NEED_ACK));
21375296Szf162725 	}
21385296Szf162725 
21394128Shx147065 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
21404128Shx147065 		k = ieee80211_crypto_encap(ic, m);
21414128Shx147065 		if (k == NULL) {
21424128Shx147065 			freemsg(m);
21434128Shx147065 			sc->sc_tx_err++;
21444128Shx147065 			err = WPI_SUCCESS;
21454128Shx147065 			goto exit;
21464128Shx147065 		}
21474128Shx147065 
21485296Szf162725 		if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) {
21495296Szf162725 			tx->security = 2; /* for CCMP */
21505296Szf162725 			tx->flags |= LE_32(WPI_TX_NEED_ACK);
21515296Szf162725 			(void) memcpy(&tx->key, k->wk_key, k->wk_keylen);
21525296Szf162725 		}
21535296Szf162725 
21544128Shx147065 		/* packet header may have moved, reset our local pointer */
21554128Shx147065 		wh = (struct ieee80211_frame *)m->b_rptr;
21564128Shx147065 	}
21574128Shx147065 
21584128Shx147065 	len = msgdsize(m);
21594128Shx147065 
21604128Shx147065 #ifdef DEBUG
21614128Shx147065 	if (wpi_dbg_flags & WPI_DEBUG_TX)
21624128Shx147065 		ieee80211_dump_pkt((uint8_t *)wh, hdrlen, 0, 0);
21634128Shx147065 #endif
21644128Shx147065 
21654128Shx147065 	/* pickup a rate */
21664128Shx147065 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
21674128Shx147065 	    IEEE80211_FC0_TYPE_MGT) {
21684128Shx147065 		/* mgmt frames are sent at the lowest available bit-rate */
21694499Shx147065 		rate = 2;
21704128Shx147065 	} else {
21714128Shx147065 		if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
21724128Shx147065 			rate = ic->ic_fixed_rate;
21734128Shx147065 		} else
21744128Shx147065 			rate = in->in_rates.ir_rates[in->in_txrate];
21754128Shx147065 	}
21764128Shx147065 	rate &= IEEE80211_RATE_VAL;
21774128Shx147065 	WPI_DBG((WPI_DEBUG_RATECTL, "tx rate[%d of %d] = %x",
21784128Shx147065 	    in->in_txrate, in->in_rates.ir_nrates, rate));
21794128Shx147065 #ifdef WPI_BPF
21804128Shx147065 #ifndef WPI_CURRENT
21814128Shx147065 	if (sc->sc_drvbpf != NULL) {
21824128Shx147065 #else
21834128Shx147065 	if (bpf_peers_present(sc->sc_drvbpf)) {
21844128Shx147065 #endif
21854128Shx147065 		struct wpi_tx_radiotap_header *tap = &sc->sc_txtap;
21864128Shx147065 
21874128Shx147065 		tap->wt_flags = 0;
21884128Shx147065 		tap->wt_chan_freq = LE_16(ic->ic_curchan->ic_freq);
21894128Shx147065 		tap->wt_chan_flags = LE_16(ic->ic_curchan->ic_flags);
21904128Shx147065 		tap->wt_rate = rate;
21914128Shx147065 		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
21924128Shx147065 			tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
21934128Shx147065 
21944128Shx147065 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
21954128Shx147065 	}
21964128Shx147065 #endif
21974128Shx147065 
21984128Shx147065 	tx->flags |= (LE_32(WPI_TX_AUTO_SEQ));
21994128Shx147065 	tx->flags |= LE_32(WPI_TX_BT_DISABLE | WPI_TX_CALIBRATION);
22004128Shx147065 
22014128Shx147065 	/* retrieve destination node's id */
22024128Shx147065 	tx->id = IEEE80211_IS_MULTICAST(wh->i_addr1) ? WPI_ID_BROADCAST :
22034128Shx147065 	    WPI_ID_BSS;
22044128Shx147065 
22054128Shx147065 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
22064128Shx147065 	    IEEE80211_FC0_TYPE_MGT) {
22074128Shx147065 		/* tell h/w to set timestamp in probe responses */
22084128Shx147065 		if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
22094128Shx147065 		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
22104128Shx147065 			tx->flags |= LE_32(WPI_TX_INSERT_TSTAMP);
22114128Shx147065 
22124128Shx147065 		if (((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
22134128Shx147065 		    IEEE80211_FC0_SUBTYPE_ASSOC_REQ) ||
22144128Shx147065 		    ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
22154128Shx147065 		    IEEE80211_FC0_SUBTYPE_REASSOC_REQ))
22164128Shx147065 			tx->timeout = 3;
22174128Shx147065 		else
22184128Shx147065 			tx->timeout = 2;
22194128Shx147065 	} else
22204128Shx147065 		tx->timeout = 0;
22214128Shx147065 
22224128Shx147065 	tx->rate = wpi_plcp_signal(rate);
22234128Shx147065 
22244128Shx147065 	/* be very persistant at sending frames out */
22254128Shx147065 	tx->rts_ntries = 7;
22264128Shx147065 	tx->data_ntries = 15;
22274128Shx147065 
22284128Shx147065 	tx->cck_mask  = 0x0f;
22294128Shx147065 	tx->ofdm_mask = 0xff;
22304128Shx147065 	tx->lifetime  = LE_32(0xffffffff);
22314128Shx147065 
22324128Shx147065 	tx->len = LE_16(len);
22334128Shx147065 
22344128Shx147065 	/* save and trim IEEE802.11 header */
22354128Shx147065 	(void) memcpy(tx + 1, m->b_rptr, hdrlen);
22364128Shx147065 	m->b_rptr += hdrlen;
22374128Shx147065 	(void) memcpy(data->dma_data.mem_va, m->b_rptr, len - hdrlen);
22384128Shx147065 
22394128Shx147065 	WPI_DBG((WPI_DEBUG_TX, "sending data: qid=%d idx=%d len=%d", ring->qid,
22404128Shx147065 	    ring->cur, len));
22414128Shx147065 
22424128Shx147065 	/* first scatter/gather segment is used by the tx data command */
22434128Shx147065 	desc->flags = LE_32(WPI_PAD32(len) << 28 | (2) << 24);
22444128Shx147065 	desc->segs[0].addr = LE_32(data->paddr_cmd);
22454128Shx147065 	desc->segs[0].len  = LE_32(
22464128Shx147065 	    roundup(4 + sizeof (wpi_cmd_data_t) + hdrlen, 4));
22474128Shx147065 	desc->segs[1].addr = LE_32(data->dma_data.cookie.dmac_address);
22484128Shx147065 	desc->segs[1].len  = LE_32(len - hdrlen);
22494128Shx147065 
22504128Shx147065 	WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
22514128Shx147065 	WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
22524128Shx147065 
22534128Shx147065 	mutex_enter(&sc->sc_tx_lock);
22544128Shx147065 	ring->queued++;
22554128Shx147065 	mutex_exit(&sc->sc_tx_lock);
22564128Shx147065 
22574128Shx147065 	/* kick ring */
22584128Shx147065 	ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT;
22594128Shx147065 	WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
22604128Shx147065 	freemsg(m);
22614128Shx147065 	/* release node reference */
22624128Shx147065 	ieee80211_free_node(in);
22634128Shx147065 
22644128Shx147065 	ic->ic_stats.is_tx_bytes += len;
22654128Shx147065 	ic->ic_stats.is_tx_frags++;
22664128Shx147065 
22674128Shx147065 	if (sc->sc_tx_timer == 0)
22684128Shx147065 		sc->sc_tx_timer = 5;
22694128Shx147065 exit:
22704128Shx147065 	return (err);
22714128Shx147065 }
22724128Shx147065 
22734128Shx147065 static void
22744128Shx147065 wpi_m_ioctl(void* arg, queue_t *wq, mblk_t *mp)
22754128Shx147065 {
22764128Shx147065 	wpi_sc_t	*sc  = (wpi_sc_t *)arg;
22774128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
22784128Shx147065 	int		err;
22794128Shx147065 
22804128Shx147065 	err = ieee80211_ioctl(ic, wq, mp);
22814128Shx147065 	if (err == ENETRESET) {
22826199Shx147065 		/*
22836199Shx147065 		 * This is special for the hidden AP connection.
22846199Shx147065 		 * In any case, we should make sure only one 'scan'
22856199Shx147065 		 * in the driver for a 'connect' CLI command. So
22866199Shx147065 		 * when connecting to a hidden AP, the scan is just
22876199Shx147065 		 * sent out to the air when we know the desired
22886199Shx147065 		 * essid of the AP we want to connect.
22896199Shx147065 		 */
22906199Shx147065 		if (ic->ic_des_esslen) {
2291*7865SPengcheng.Chen@Sun.COM 			if (sc->sc_flags & WPI_F_RUNNING) {
2292*7865SPengcheng.Chen@Sun.COM 				wpi_m_stop(sc);
2293*7865SPengcheng.Chen@Sun.COM 				(void) wpi_m_start(sc);
2294*7865SPengcheng.Chen@Sun.COM 				(void) ieee80211_new_state(ic,
2295*7865SPengcheng.Chen@Sun.COM 				    IEEE80211_S_SCAN, -1);
2296*7865SPengcheng.Chen@Sun.COM 			}
22976199Shx147065 		}
22984128Shx147065 	}
22994128Shx147065 }
23004128Shx147065 
23017663SSowmini.Varadhan@Sun.COM /*
23027663SSowmini.Varadhan@Sun.COM  * Callback functions for get/set properties
23037663SSowmini.Varadhan@Sun.COM  */
23047663SSowmini.Varadhan@Sun.COM static int
23057663SSowmini.Varadhan@Sun.COM wpi_m_getprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_name,
23067663SSowmini.Varadhan@Sun.COM     uint_t pr_flags, uint_t wldp_length, void *wldp_buf)
23077663SSowmini.Varadhan@Sun.COM {
23087663SSowmini.Varadhan@Sun.COM 	int		err = 0;
23097663SSowmini.Varadhan@Sun.COM 	wpi_sc_t	*sc = (wpi_sc_t *)arg;
23107663SSowmini.Varadhan@Sun.COM 
23117663SSowmini.Varadhan@Sun.COM 	err = ieee80211_getprop(&sc->sc_ic, pr_name, wldp_pr_name,
23127663SSowmini.Varadhan@Sun.COM 	    pr_flags, wldp_length, wldp_buf);
23137663SSowmini.Varadhan@Sun.COM 
23147663SSowmini.Varadhan@Sun.COM 	return (err);
23157663SSowmini.Varadhan@Sun.COM }
23167663SSowmini.Varadhan@Sun.COM static int
23177663SSowmini.Varadhan@Sun.COM wpi_m_setprop(void *arg, const char *pr_name, mac_prop_id_t wldp_pr_name,
23187663SSowmini.Varadhan@Sun.COM     uint_t wldp_length, const void *wldp_buf)
23197663SSowmini.Varadhan@Sun.COM {
23207663SSowmini.Varadhan@Sun.COM 	int		err;
23217663SSowmini.Varadhan@Sun.COM 	wpi_sc_t	*sc = (wpi_sc_t *)arg;
23227663SSowmini.Varadhan@Sun.COM 	ieee80211com_t  *ic = &sc->sc_ic;
23237663SSowmini.Varadhan@Sun.COM 
23247663SSowmini.Varadhan@Sun.COM 	err = ieee80211_setprop(ic, pr_name, wldp_pr_name,
23257663SSowmini.Varadhan@Sun.COM 	    wldp_length, wldp_buf);
23267663SSowmini.Varadhan@Sun.COM 
23277663SSowmini.Varadhan@Sun.COM 	if (err == ENETRESET) {
23287663SSowmini.Varadhan@Sun.COM 		if (ic->ic_des_esslen) {
2329*7865SPengcheng.Chen@Sun.COM 			if (sc->sc_flags & WPI_F_RUNNING) {
2330*7865SPengcheng.Chen@Sun.COM 				wpi_m_stop(sc);
2331*7865SPengcheng.Chen@Sun.COM 				(void) wpi_m_start(sc);
2332*7865SPengcheng.Chen@Sun.COM 				(void) ieee80211_new_state(ic,
2333*7865SPengcheng.Chen@Sun.COM 				    IEEE80211_S_SCAN, -1);
2334*7865SPengcheng.Chen@Sun.COM 			}
23357663SSowmini.Varadhan@Sun.COM 		}
23367663SSowmini.Varadhan@Sun.COM 
23377663SSowmini.Varadhan@Sun.COM 		err = 0;
23387663SSowmini.Varadhan@Sun.COM 	}
23397663SSowmini.Varadhan@Sun.COM 
23407663SSowmini.Varadhan@Sun.COM 	return (err);
23417663SSowmini.Varadhan@Sun.COM }
23427663SSowmini.Varadhan@Sun.COM 
23434128Shx147065 /*ARGSUSED*/
23444128Shx147065 static int
23454128Shx147065 wpi_m_stat(void *arg, uint_t stat, uint64_t *val)
23464128Shx147065 {
23474128Shx147065 	wpi_sc_t	*sc  = (wpi_sc_t *)arg;
23484128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
2349*7865SPengcheng.Chen@Sun.COM 	ieee80211_node_t *in;
23504128Shx147065 
23514128Shx147065 	mutex_enter(&sc->sc_glock);
23524128Shx147065 	switch (stat) {
23534128Shx147065 	case MAC_STAT_IFSPEED:
2354*7865SPengcheng.Chen@Sun.COM 		in = ic->ic_bss;
23554128Shx147065 		*val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ?
2356*7865SPengcheng.Chen@Sun.COM 		    IEEE80211_RATE(in->in_txrate) :
2357*7865SPengcheng.Chen@Sun.COM 		    ic->ic_fixed_rate) / 2 * 1000000;
23584128Shx147065 		break;
23594128Shx147065 	case MAC_STAT_NOXMTBUF:
23604128Shx147065 		*val = sc->sc_tx_nobuf;
23614128Shx147065 		break;
23624128Shx147065 	case MAC_STAT_NORCVBUF:
23634128Shx147065 		*val = sc->sc_rx_nobuf;
23644128Shx147065 		break;
23654128Shx147065 	case MAC_STAT_IERRORS:
23664128Shx147065 		*val = sc->sc_rx_err;
23674128Shx147065 		break;
23684128Shx147065 	case MAC_STAT_RBYTES:
23694128Shx147065 		*val = ic->ic_stats.is_rx_bytes;
23704128Shx147065 		break;
23714128Shx147065 	case MAC_STAT_IPACKETS:
23724128Shx147065 		*val = ic->ic_stats.is_rx_frags;
23734128Shx147065 		break;
23744128Shx147065 	case MAC_STAT_OBYTES:
23754128Shx147065 		*val = ic->ic_stats.is_tx_bytes;
23764128Shx147065 		break;
23774128Shx147065 	case MAC_STAT_OPACKETS:
23784128Shx147065 		*val = ic->ic_stats.is_tx_frags;
23794128Shx147065 		break;
23804128Shx147065 	case MAC_STAT_OERRORS:
23814128Shx147065 	case WIFI_STAT_TX_FAILED:
23824128Shx147065 		*val = sc->sc_tx_err;
23834128Shx147065 		break;
23844128Shx147065 	case WIFI_STAT_TX_RETRANS:
23854128Shx147065 		*val = sc->sc_tx_retries;
23864128Shx147065 		break;
23874128Shx147065 	case WIFI_STAT_FCS_ERRORS:
23884128Shx147065 	case WIFI_STAT_WEP_ERRORS:
23894128Shx147065 	case WIFI_STAT_TX_FRAGS:
23904128Shx147065 	case WIFI_STAT_MCAST_TX:
23914128Shx147065 	case WIFI_STAT_RTS_SUCCESS:
23924128Shx147065 	case WIFI_STAT_RTS_FAILURE:
23934128Shx147065 	case WIFI_STAT_ACK_FAILURE:
23944128Shx147065 	case WIFI_STAT_RX_FRAGS:
23954128Shx147065 	case WIFI_STAT_MCAST_RX:
23964128Shx147065 	case WIFI_STAT_RX_DUPS:
23974128Shx147065 		mutex_exit(&sc->sc_glock);
23984128Shx147065 		return (ieee80211_stat(ic, stat, val));
23994128Shx147065 	default:
24004128Shx147065 		mutex_exit(&sc->sc_glock);
24014128Shx147065 		return (ENOTSUP);
24024128Shx147065 	}
24034128Shx147065 	mutex_exit(&sc->sc_glock);
24044128Shx147065 
24054128Shx147065 	return (WPI_SUCCESS);
24064128Shx147065 
24074128Shx147065 }
24084128Shx147065 
24094128Shx147065 static int
24104128Shx147065 wpi_m_start(void *arg)
24114128Shx147065 {
24124128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
24134128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
24144128Shx147065 	int err;
24154128Shx147065 
24164128Shx147065 	err = wpi_init(sc);
24174128Shx147065 	if (err != WPI_SUCCESS) {
24184128Shx147065 		wpi_stop(sc);
24194128Shx147065 		DELAY(1000000);
24204128Shx147065 		err = wpi_init(sc);
24214128Shx147065 	}
24226062Shx147065 
24236062Shx147065 	if (err) {
24246062Shx147065 		/*
24256062Shx147065 		 * The hw init err(eg. RF is OFF). Return Success to make
24266062Shx147065 		 * the 'plumb' succeed. The wpi_thread() tries to re-init
24276062Shx147065 		 * background.
24286062Shx147065 		 */
24296062Shx147065 		mutex_enter(&sc->sc_glock);
24306062Shx147065 		sc->sc_flags |= WPI_F_HW_ERR_RECOVER;
24316062Shx147065 		mutex_exit(&sc->sc_glock);
24326062Shx147065 		return (WPI_SUCCESS);
24336062Shx147065 	}
24344128Shx147065 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
24356062Shx147065 	mutex_enter(&sc->sc_glock);
24366062Shx147065 	sc->sc_flags |= WPI_F_RUNNING;
24376062Shx147065 	mutex_exit(&sc->sc_glock);
24386062Shx147065 
24396062Shx147065 	return (WPI_SUCCESS);
24404128Shx147065 }
24414128Shx147065 
24424128Shx147065 static void
24434128Shx147065 wpi_m_stop(void *arg)
24444128Shx147065 {
24454128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
24464128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
24474128Shx147065 
24484128Shx147065 	wpi_stop(sc);
24494128Shx147065 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
24504128Shx147065 	mutex_enter(&sc->sc_mt_lock);
24514128Shx147065 	sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER;
24524128Shx147065 	sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL;
24534128Shx147065 	mutex_exit(&sc->sc_mt_lock);
24546062Shx147065 	mutex_enter(&sc->sc_glock);
24556062Shx147065 	sc->sc_flags &= ~WPI_F_RUNNING;
24566062Shx147065 	mutex_exit(&sc->sc_glock);
24574128Shx147065 }
24584128Shx147065 
24594128Shx147065 /*ARGSUSED*/
24604128Shx147065 static int
24614128Shx147065 wpi_m_unicst(void *arg, const uint8_t *macaddr)
24624128Shx147065 {
24634128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
24644128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
24654128Shx147065 	int err;
24664128Shx147065 
24674128Shx147065 	if (!IEEE80211_ADDR_EQ(ic->ic_macaddr, macaddr)) {
24684128Shx147065 		IEEE80211_ADDR_COPY(ic->ic_macaddr, macaddr);
24694128Shx147065 		mutex_enter(&sc->sc_glock);
24704128Shx147065 		err = wpi_config(sc);
24714128Shx147065 		mutex_exit(&sc->sc_glock);
24724128Shx147065 		if (err != WPI_SUCCESS) {
24734128Shx147065 			cmn_err(CE_WARN,
24744128Shx147065 			    "wpi_m_unicst(): "
24754128Shx147065 			    "failed to configure device\n");
24764128Shx147065 			goto fail;
24774128Shx147065 		}
24784128Shx147065 	}
24794128Shx147065 	return (WPI_SUCCESS);
24804128Shx147065 fail:
24814128Shx147065 	return (err);
24824128Shx147065 }
24834128Shx147065 
24844128Shx147065 /*ARGSUSED*/
24854128Shx147065 static int
24864128Shx147065 wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m)
24874128Shx147065 {
24884128Shx147065 	return (WPI_SUCCESS);
24894128Shx147065 }
24904128Shx147065 
24914128Shx147065 /*ARGSUSED*/
24924128Shx147065 static int
24934128Shx147065 wpi_m_promisc(void *arg, boolean_t on)
24944128Shx147065 {
24954128Shx147065 	return (WPI_SUCCESS);
24964128Shx147065 }
24974128Shx147065 
24984128Shx147065 static void
24994128Shx147065 wpi_thread(wpi_sc_t *sc)
25004128Shx147065 {
25014128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
25024128Shx147065 	clock_t clk;
25034128Shx147065 	int times = 0, err, n = 0, timeout = 0;
25046062Shx147065 	uint32_t tmp;
25054128Shx147065 
25064128Shx147065 	mutex_enter(&sc->sc_mt_lock);
25074128Shx147065 	while (sc->sc_mf_thread_switch) {
25086062Shx147065 		tmp = WPI_READ(sc, WPI_GPIO_CTL);
25096062Shx147065 		if (tmp & WPI_GPIO_HW_RF_KILL) {
25106062Shx147065 			sc->sc_flags &= ~WPI_F_RADIO_OFF;
25116062Shx147065 		} else {
25126062Shx147065 			sc->sc_flags |= WPI_F_RADIO_OFF;
25136062Shx147065 		}
25146062Shx147065 		/*
25156062Shx147065 		 * If in SUSPEND or the RF is OFF, do nothing
25166062Shx147065 		 */
25176062Shx147065 		if ((sc->sc_flags & WPI_F_SUSPEND) ||
25186062Shx147065 		    (sc->sc_flags & WPI_F_RADIO_OFF)) {
25196062Shx147065 			mutex_exit(&sc->sc_mt_lock);
25206062Shx147065 			delay(drv_usectohz(100000));
25216062Shx147065 			mutex_enter(&sc->sc_mt_lock);
25226062Shx147065 			continue;
25236062Shx147065 		}
25246062Shx147065 
25254128Shx147065 		/*
25264128Shx147065 		 * recovery fatal error
25274128Shx147065 		 */
25284128Shx147065 		if (ic->ic_mach &&
25294128Shx147065 		    (sc->sc_flags & WPI_F_HW_ERR_RECOVER)) {
25304128Shx147065 
25314128Shx147065 			WPI_DBG((WPI_DEBUG_FW,
25324128Shx147065 			    "wpi_thread(): "
25334128Shx147065 			    "try to recover fatal hw error: %d\n", times++));
25344128Shx147065 
25354128Shx147065 			wpi_stop(sc);
2536*7865SPengcheng.Chen@Sun.COM 			mutex_exit(&sc->sc_mt_lock);
2537*7865SPengcheng.Chen@Sun.COM 
25384128Shx147065 			ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
25394128Shx147065 			delay(drv_usectohz(2000000));
2540*7865SPengcheng.Chen@Sun.COM 
25414128Shx147065 			mutex_enter(&sc->sc_mt_lock);
25424128Shx147065 			err = wpi_init(sc);
25434128Shx147065 			if (err != WPI_SUCCESS) {
25444128Shx147065 				n++;
25454128Shx147065 				if (n < 3)
25464128Shx147065 					continue;
25474128Shx147065 			}
25484128Shx147065 			n = 0;
25496062Shx147065 			if (!err)
25506062Shx147065 				sc->sc_flags |= WPI_F_RUNNING;
25514128Shx147065 			sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER;
25524128Shx147065 			mutex_exit(&sc->sc_mt_lock);
25534128Shx147065 			delay(drv_usectohz(2000000));
25544128Shx147065 			if (sc->sc_ostate != IEEE80211_S_INIT)
25555453Shx147065 				ieee80211_new_state(ic, IEEE80211_S_SCAN, 0);
25564128Shx147065 			mutex_enter(&sc->sc_mt_lock);
25574128Shx147065 		}
25584128Shx147065 
25594128Shx147065 		/*
2560*7865SPengcheng.Chen@Sun.COM 		 * scan next channel
2561*7865SPengcheng.Chen@Sun.COM 		 */
2562*7865SPengcheng.Chen@Sun.COM 		if (ic->ic_mach &&
2563*7865SPengcheng.Chen@Sun.COM 		    (sc->sc_flags & WPI_F_SCANNING) && sc->sc_scan_next) {
2564*7865SPengcheng.Chen@Sun.COM 
2565*7865SPengcheng.Chen@Sun.COM 			WPI_DBG((WPI_DEBUG_SCAN,
2566*7865SPengcheng.Chen@Sun.COM 			    "wpi_thread(): "
2567*7865SPengcheng.Chen@Sun.COM 			    "wait for probe response\n"));
2568*7865SPengcheng.Chen@Sun.COM 
2569*7865SPengcheng.Chen@Sun.COM 			sc->sc_scan_next--;
2570*7865SPengcheng.Chen@Sun.COM 			mutex_exit(&sc->sc_mt_lock);
2571*7865SPengcheng.Chen@Sun.COM 			delay(drv_usectohz(200000));
2572*7865SPengcheng.Chen@Sun.COM 			ieee80211_next_scan(ic);
2573*7865SPengcheng.Chen@Sun.COM 			mutex_enter(&sc->sc_mt_lock);
2574*7865SPengcheng.Chen@Sun.COM 		}
2575*7865SPengcheng.Chen@Sun.COM 
2576*7865SPengcheng.Chen@Sun.COM 		/*
25774128Shx147065 		 * rate ctl
25784128Shx147065 		 */
25794128Shx147065 		if (ic->ic_mach &&
25804128Shx147065 		    (sc->sc_flags & WPI_F_RATE_AUTO_CTL)) {
25814128Shx147065 			clk = ddi_get_lbolt();
25824128Shx147065 			if (clk > sc->sc_clk + drv_usectohz(500000)) {
25834128Shx147065 				wpi_amrr_timeout(sc);
25844128Shx147065 			}
25854128Shx147065 		}
25864128Shx147065 		mutex_exit(&sc->sc_mt_lock);
25874128Shx147065 		delay(drv_usectohz(100000));
25884128Shx147065 		mutex_enter(&sc->sc_mt_lock);
25894128Shx147065 		if (sc->sc_tx_timer) {
25904128Shx147065 			timeout++;
25914128Shx147065 			if (timeout == 10) {
25924128Shx147065 				sc->sc_tx_timer--;
25934128Shx147065 				if (sc->sc_tx_timer == 0) {
25944128Shx147065 					sc->sc_flags |= WPI_F_HW_ERR_RECOVER;
25954128Shx147065 					sc->sc_ostate = IEEE80211_S_RUN;
2596*7865SPengcheng.Chen@Sun.COM 					WPI_DBG((WPI_DEBUG_FW,
2597*7865SPengcheng.Chen@Sun.COM 					    "wpi_thread(): send fail\n"));
25984128Shx147065 				}
25994128Shx147065 				timeout = 0;
26004128Shx147065 			}
26014128Shx147065 		}
26024128Shx147065 	}
26034128Shx147065 	sc->sc_mf_thread = NULL;
26044128Shx147065 	cv_signal(&sc->sc_mt_cv);
26054128Shx147065 	mutex_exit(&sc->sc_mt_lock);
26064128Shx147065 }
26074128Shx147065 
26084128Shx147065 /*
26094128Shx147065  * Extract various information from EEPROM.
26104128Shx147065  */
26114128Shx147065 static void
26124128Shx147065 wpi_read_eeprom(wpi_sc_t *sc)
26134128Shx147065 {
26144128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
26154128Shx147065 	uint16_t val;
26164128Shx147065 	int i;
26174128Shx147065 
26184128Shx147065 	/* read MAC address */
26194128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 0);
26204128Shx147065 	ic->ic_macaddr[0] = val & 0xff;
26214128Shx147065 	ic->ic_macaddr[1] = val >> 8;
26224128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 1);
26234128Shx147065 	ic->ic_macaddr[2] = val & 0xff;
26244128Shx147065 	ic->ic_macaddr[3] = val >> 8;
26254128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 2);
26264128Shx147065 	ic->ic_macaddr[4] = val & 0xff;
26274128Shx147065 	ic->ic_macaddr[5] = val >> 8;
26284128Shx147065 
26294128Shx147065 	WPI_DBG((WPI_DEBUG_EEPROM,
26304128Shx147065 	    "mac:%2x:%2x:%2x:%2x:%2x:%2x\n",
26314128Shx147065 	    ic->ic_macaddr[0], ic->ic_macaddr[1],
26324128Shx147065 	    ic->ic_macaddr[2], ic->ic_macaddr[3],
26334128Shx147065 	    ic->ic_macaddr[4], ic->ic_macaddr[5]));
26344128Shx147065 	/* read power settings for 2.4GHz channels */
26354128Shx147065 	for (i = 0; i < 14; i++) {
26364128Shx147065 		sc->sc_pwr1[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR1 + i);
26374128Shx147065 		sc->sc_pwr2[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR2 + i);
26384128Shx147065 		WPI_DBG((WPI_DEBUG_EEPROM,
26394128Shx147065 		    "channel %d pwr1 0x%04x pwr2 0x%04x\n", i + 1,
26404128Shx147065 		    sc->sc_pwr1[i], sc->sc_pwr2[i]));
26414128Shx147065 	}
26424128Shx147065 }
26434128Shx147065 
26444128Shx147065 /*
26454128Shx147065  * Send a command to the firmware.
26464128Shx147065  */
26474128Shx147065 static int
26484128Shx147065 wpi_cmd(wpi_sc_t *sc, int code, const void *buf, int size, int async)
26494128Shx147065 {
26504128Shx147065 	wpi_tx_ring_t *ring = &sc->sc_cmdq;
26514128Shx147065 	wpi_tx_desc_t *desc;
26524128Shx147065 	wpi_tx_cmd_t *cmd;
26534128Shx147065 
26544128Shx147065 	ASSERT(size <= sizeof (cmd->data));
26554128Shx147065 	ASSERT(mutex_owned(&sc->sc_glock));
26564128Shx147065 
26574128Shx147065 	WPI_DBG((WPI_DEBUG_CMD, "wpi_cmd() # code[%d]", code));
26584128Shx147065 	desc = ring->data[ring->cur].desc;
26594128Shx147065 	cmd = ring->data[ring->cur].cmd;
26604128Shx147065 
26614128Shx147065 	cmd->code = (uint8_t)code;
26624128Shx147065 	cmd->flags = 0;
26634128Shx147065 	cmd->qid = ring->qid;
26644128Shx147065 	cmd->idx = ring->cur;
26654128Shx147065 	(void) memcpy(cmd->data, buf, size);
26664128Shx147065 
26674128Shx147065 	desc->flags = LE_32(WPI_PAD32(size) << 28 | 1 << 24);
26684128Shx147065 	desc->segs[0].addr = ring->data[ring->cur].paddr_cmd;
26694128Shx147065 	desc->segs[0].len  = 4 + size;
26704128Shx147065 
26714128Shx147065 	/* kick cmd ring */
26724128Shx147065 	ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT;
26734128Shx147065 	WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
26744128Shx147065 
26754128Shx147065 	if (async)
26764128Shx147065 		return (WPI_SUCCESS);
26774128Shx147065 	else {
26784128Shx147065 		clock_t clk;
26794128Shx147065 		sc->sc_flags &= ~WPI_F_CMD_DONE;
26804128Shx147065 		clk = ddi_get_lbolt() + drv_usectohz(2000000);
26814128Shx147065 		while (!(sc->sc_flags & WPI_F_CMD_DONE)) {
26824128Shx147065 			if (cv_timedwait(&sc->sc_cmd_cv, &sc->sc_glock, clk)
26834128Shx147065 			    < 0)
26844128Shx147065 				break;
26854128Shx147065 		}
26864128Shx147065 		if (sc->sc_flags & WPI_F_CMD_DONE)
26874128Shx147065 			return (WPI_SUCCESS);
26884128Shx147065 		else
26894128Shx147065 			return (WPI_FAIL);
26904128Shx147065 	}
26914128Shx147065 }
26924128Shx147065 
26934128Shx147065 /*
26944128Shx147065  * Configure h/w multi-rate retries.
26954128Shx147065  */
26964128Shx147065 static int
26974128Shx147065 wpi_mrr_setup(wpi_sc_t *sc)
26984128Shx147065 {
26994128Shx147065 	wpi_mrr_setup_t mrr;
27004128Shx147065 	int i, err;
27014128Shx147065 
27024128Shx147065 	/* CCK rates (not used with 802.11a) */
27034128Shx147065 	for (i = WPI_CCK1; i <= WPI_CCK11; i++) {
27044128Shx147065 		mrr.rates[i].flags = 0;
27054128Shx147065 		mrr.rates[i].signal = wpi_ridx_to_signal[i];
27064128Shx147065 		/* fallback to the immediate lower CCK rate (if any) */
27074128Shx147065 		mrr.rates[i].next = (i == WPI_CCK1) ? WPI_CCK1 : i - 1;
27084128Shx147065 		/* try one time at this rate before falling back to "next" */
27094128Shx147065 		mrr.rates[i].ntries = 1;
27104128Shx147065 	}
27114128Shx147065 
27124128Shx147065 	/* OFDM rates (not used with 802.11b) */
27134128Shx147065 	for (i = WPI_OFDM6; i <= WPI_OFDM54; i++) {
27144128Shx147065 		mrr.rates[i].flags = 0;
27154128Shx147065 		mrr.rates[i].signal = wpi_ridx_to_signal[i];
27164128Shx147065 		/* fallback to the immediate lower OFDM rate (if any) */
27174128Shx147065 		mrr.rates[i].next = (i == WPI_OFDM6) ? WPI_OFDM6 : i - 1;
27184128Shx147065 		/* try one time at this rate before falling back to "next" */
27194128Shx147065 		mrr.rates[i].ntries = 1;
27204128Shx147065 	}
27214128Shx147065 
27224128Shx147065 	/* setup MRR for control frames */
27234128Shx147065 	mrr.which = LE_32(WPI_MRR_CTL);
27244128Shx147065 	err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1);
27254128Shx147065 	if (err != WPI_SUCCESS) {
27264128Shx147065 		WPI_DBG((WPI_DEBUG_MRR,
27274128Shx147065 		    "could not setup MRR for control frames\n"));
27284128Shx147065 		return (err);
27294128Shx147065 	}
27304128Shx147065 
27314128Shx147065 	/* setup MRR for data frames */
27324128Shx147065 	mrr.which = LE_32(WPI_MRR_DATA);
27334128Shx147065 	err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1);
27344128Shx147065 	if (err != WPI_SUCCESS) {
27354128Shx147065 		WPI_DBG((WPI_DEBUG_MRR,
27364128Shx147065 		    "could not setup MRR for data frames\n"));
27374128Shx147065 		return (err);
27384128Shx147065 	}
27394128Shx147065 
27404128Shx147065 	return (WPI_SUCCESS);
27414128Shx147065 }
27424128Shx147065 
27434128Shx147065 static void
27444128Shx147065 wpi_set_led(wpi_sc_t *sc, uint8_t which, uint8_t off, uint8_t on)
27454128Shx147065 {
27464128Shx147065 	wpi_cmd_led_t led;
27474128Shx147065 
27484128Shx147065 	led.which = which;
27494128Shx147065 	led.unit = LE_32(100000);	/* on/off in unit of 100ms */
27504128Shx147065 	led.off = off;
27514128Shx147065 	led.on = on;
27524128Shx147065 
27534128Shx147065 	(void) wpi_cmd(sc, WPI_CMD_SET_LED, &led, sizeof (led), 1);
27544128Shx147065 }
27554128Shx147065 
27564128Shx147065 static int
27574128Shx147065 wpi_auth(wpi_sc_t *sc)
27584128Shx147065 {
27594128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
27604128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
27614128Shx147065 	wpi_node_t node;
27624128Shx147065 	int err;
27634128Shx147065 
27644128Shx147065 	/* update adapter's configuration */
27654128Shx147065 	IEEE80211_ADDR_COPY(sc->sc_config.bssid, in->in_bssid);
27664128Shx147065 	sc->sc_config.chan = ieee80211_chan2ieee(ic, in->in_chan);
27674128Shx147065 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
27684128Shx147065 		sc->sc_config.cck_mask  = 0x03;
27694128Shx147065 		sc->sc_config.ofdm_mask = 0;
27704128Shx147065 	} else if ((in->in_chan != IEEE80211_CHAN_ANYC) &&
27714128Shx147065 	    (IEEE80211_IS_CHAN_5GHZ(in->in_chan))) {
27724128Shx147065 		sc->sc_config.cck_mask  = 0;
27734128Shx147065 		sc->sc_config.ofdm_mask = 0x15;
27744128Shx147065 	} else {	/* assume 802.11b/g */
27754128Shx147065 		sc->sc_config.cck_mask  = 0x0f;
27765453Shx147065 		sc->sc_config.ofdm_mask = 0xff;
27774128Shx147065 	}
27784128Shx147065 
27794128Shx147065 	WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x cck %x ofdm %x"
27804128Shx147065 	    " bssid:%02x:%02x:%02x:%02x:%02x:%2x\n",
27814128Shx147065 	    sc->sc_config.chan, sc->sc_config.flags,
27824128Shx147065 	    sc->sc_config.cck_mask, sc->sc_config.ofdm_mask,
27834128Shx147065 	    sc->sc_config.bssid[0], sc->sc_config.bssid[1],
27844128Shx147065 	    sc->sc_config.bssid[2], sc->sc_config.bssid[3],
27854128Shx147065 	    sc->sc_config.bssid[4], sc->sc_config.bssid[5]));
27864128Shx147065 	err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
27874128Shx147065 	    sizeof (wpi_config_t), 1);
27884128Shx147065 	if (err != WPI_SUCCESS) {
27894128Shx147065 		cmn_err(CE_WARN, "wpi_auth(): failed to configurate chan%d\n",
27904128Shx147065 		    sc->sc_config.chan);
27914128Shx147065 		return (err);
27924128Shx147065 	}
27934128Shx147065 
27944128Shx147065 	/* add default node */
27954128Shx147065 	(void) memset(&node, 0, sizeof (node));
27964128Shx147065 	IEEE80211_ADDR_COPY(node.bssid, in->in_bssid);
27974128Shx147065 	node.id = WPI_ID_BSS;
27984128Shx147065 	node.rate = wpi_plcp_signal(2);
27994128Shx147065 	err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1);
28004128Shx147065 	if (err != WPI_SUCCESS) {
28014128Shx147065 		cmn_err(CE_WARN, "wpi_auth(): failed to add BSS node\n");
28024128Shx147065 		return (err);
28034128Shx147065 	}
28044128Shx147065 
28054128Shx147065 	err = wpi_mrr_setup(sc);
28064128Shx147065 	if (err != WPI_SUCCESS) {
28074128Shx147065 		cmn_err(CE_WARN, "wpi_auth(): failed to setup MRR\n");
28084128Shx147065 		return (err);
28094128Shx147065 	}
28104128Shx147065 
28114128Shx147065 	return (WPI_SUCCESS);
28124128Shx147065 }
28134128Shx147065 
28144128Shx147065 /*
28154128Shx147065  * Send a scan request to the firmware.
28164128Shx147065  */
28174128Shx147065 static int
28184128Shx147065 wpi_scan(wpi_sc_t *sc)
28194128Shx147065 {
28204128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
28214128Shx147065 	wpi_tx_ring_t *ring = &sc->sc_cmdq;
28224128Shx147065 	wpi_tx_desc_t *desc;
28234128Shx147065 	wpi_tx_data_t *data;
28244128Shx147065 	wpi_tx_cmd_t *cmd;
28254128Shx147065 	wpi_scan_hdr_t *hdr;
28264128Shx147065 	wpi_scan_chan_t *chan;
28274128Shx147065 	struct ieee80211_frame *wh;
28284128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
2829*7865SPengcheng.Chen@Sun.COM 	uint8_t essid[IEEE80211_NWID_LEN+1];
28304128Shx147065 	struct ieee80211_rateset *rs;
28314128Shx147065 	enum ieee80211_phymode mode;
28324128Shx147065 	uint8_t *frm;
28334128Shx147065 	int i, pktlen, nrates;
28344128Shx147065 
2835*7865SPengcheng.Chen@Sun.COM 	/* previous scan not completed */
2836*7865SPengcheng.Chen@Sun.COM 	if (sc->sc_scan_pending) {
2837*7865SPengcheng.Chen@Sun.COM 		WPI_DBG((WPI_DEBUG_SCAN, "previous scan not completed\n"));
2838*7865SPengcheng.Chen@Sun.COM 		return (WPI_SUCCESS);
2839*7865SPengcheng.Chen@Sun.COM 	}
2840*7865SPengcheng.Chen@Sun.COM 
28414128Shx147065 	data = &ring->data[ring->cur];
28424128Shx147065 	desc = data->desc;
28434128Shx147065 	cmd = (wpi_tx_cmd_t *)data->dma_data.mem_va;
28444128Shx147065 
28454128Shx147065 	cmd->code = WPI_CMD_SCAN;
28464128Shx147065 	cmd->flags = 0;
28474128Shx147065 	cmd->qid = ring->qid;
28484128Shx147065 	cmd->idx = ring->cur;
28494128Shx147065 
28504128Shx147065 	hdr = (wpi_scan_hdr_t *)cmd->data;
28514128Shx147065 	(void) memset(hdr, 0, sizeof (wpi_scan_hdr_t));
28524128Shx147065 	hdr->first = 1;
2853*7865SPengcheng.Chen@Sun.COM 	hdr->nchan = 1;
28544128Shx147065 	hdr->len = hdr->nchan * sizeof (wpi_scan_chan_t);
2855*7865SPengcheng.Chen@Sun.COM 	hdr->quiet = LE_16(50);
28564128Shx147065 	hdr->threshold = LE_16(1);
28574128Shx147065 	hdr->filter = LE_32(5);
28584128Shx147065 	hdr->rate = wpi_plcp_signal(2);
28594128Shx147065 	hdr->id = WPI_ID_BROADCAST;
28604128Shx147065 	hdr->mask = LE_32(0xffffffff);
28614128Shx147065 	hdr->esslen = ic->ic_des_esslen;
2862*7865SPengcheng.Chen@Sun.COM 
2863*7865SPengcheng.Chen@Sun.COM 	if (ic->ic_des_esslen) {
2864*7865SPengcheng.Chen@Sun.COM 		bcopy(ic->ic_des_essid, essid, ic->ic_des_esslen);
2865*7865SPengcheng.Chen@Sun.COM 		essid[ic->ic_des_esslen] = '\0';
2866*7865SPengcheng.Chen@Sun.COM 		WPI_DBG((WPI_DEBUG_SCAN, "directed scan %s\n", essid));
2867*7865SPengcheng.Chen@Sun.COM 
28684128Shx147065 		bcopy(ic->ic_des_essid, hdr->essid, ic->ic_des_esslen);
2869*7865SPengcheng.Chen@Sun.COM 	} else {
28704128Shx147065 		bzero(hdr->essid, sizeof (hdr->essid));
2871*7865SPengcheng.Chen@Sun.COM 	}
2872*7865SPengcheng.Chen@Sun.COM 
28734128Shx147065 	/*
28744128Shx147065 	 * Build a probe request frame.  Most of the following code is a
28754128Shx147065 	 * copy & paste of what is done in net80211.  Unfortunately, the
28764128Shx147065 	 * functions to add IEs are static and thus can't be reused here.
28774128Shx147065 	 */
28784128Shx147065 	wh = (struct ieee80211_frame *)(hdr + 1);
28794128Shx147065 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
28804128Shx147065 	    IEEE80211_FC0_SUBTYPE_PROBE_REQ;
28814128Shx147065 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
28824128Shx147065 	(void) memset(wh->i_addr1, 0xff, 6);
28834128Shx147065 	IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr);
28844128Shx147065 	(void) memset(wh->i_addr3, 0xff, 6);
28854128Shx147065 	*(uint16_t *)&wh->i_dur[0] = 0;	/* filled by h/w */
28864128Shx147065 	*(uint16_t *)&wh->i_seq[0] = 0;	/* filled by h/w */
28874128Shx147065 
28884128Shx147065 	frm = (uint8_t *)(wh + 1);
28894128Shx147065 
28904128Shx147065 	/* add essid IE */
2891*7865SPengcheng.Chen@Sun.COM 	if (in->in_esslen) {
2892*7865SPengcheng.Chen@Sun.COM 		bcopy(in->in_essid, essid, in->in_esslen);
2893*7865SPengcheng.Chen@Sun.COM 		essid[in->in_esslen] = '\0';
2894*7865SPengcheng.Chen@Sun.COM 		WPI_DBG((WPI_DEBUG_SCAN, "probe with ESSID %s\n",
2895*7865SPengcheng.Chen@Sun.COM 		    essid));
2896*7865SPengcheng.Chen@Sun.COM 	}
28974128Shx147065 	*frm++ = IEEE80211_ELEMID_SSID;
28984128Shx147065 	*frm++ = in->in_esslen;
28994128Shx147065 	(void) memcpy(frm, in->in_essid, in->in_esslen);
29004128Shx147065 	frm += in->in_esslen;
29014128Shx147065 
29024128Shx147065 	mode = ieee80211_chan2mode(ic, ic->ic_curchan);
29034128Shx147065 	rs = &ic->ic_sup_rates[mode];
29044128Shx147065 
29054128Shx147065 	/* add supported rates IE */
29064128Shx147065 	*frm++ = IEEE80211_ELEMID_RATES;
29074128Shx147065 	nrates = rs->ir_nrates;
29084128Shx147065 	if (nrates > IEEE80211_RATE_SIZE)
29094128Shx147065 		nrates = IEEE80211_RATE_SIZE;
29104128Shx147065 	*frm++ = (uint8_t)nrates;
29114128Shx147065 	(void) memcpy(frm, rs->ir_rates, nrates);
29124128Shx147065 	frm += nrates;
29134128Shx147065 
29144128Shx147065 	/* add supported xrates IE */
29154128Shx147065 	if (rs->ir_nrates > IEEE80211_RATE_SIZE) {
29164128Shx147065 		nrates = rs->ir_nrates - IEEE80211_RATE_SIZE;
29174128Shx147065 		*frm++ = IEEE80211_ELEMID_XRATES;
29184128Shx147065 		*frm++ = (uint8_t)nrates;
29194128Shx147065 		(void) memcpy(frm, rs->ir_rates + IEEE80211_RATE_SIZE, nrates);
29204128Shx147065 		frm += nrates;
29214128Shx147065 	}
29224128Shx147065 
29234128Shx147065 	/* add optionnal IE (usually an RSN IE) */
29244128Shx147065 	if (ic->ic_opt_ie != NULL) {
29254128Shx147065 		(void) memcpy(frm, ic->ic_opt_ie, ic->ic_opt_ie_len);
29264128Shx147065 		frm += ic->ic_opt_ie_len;
29274128Shx147065 	}
29284128Shx147065 
29294128Shx147065 	/* setup length of probe request */
29306990Sgd78059 	hdr->pbrlen = LE_16((uintptr_t)frm - (uintptr_t)wh);
29314128Shx147065 
29324128Shx147065 	/* align on a 4-byte boundary */
29334128Shx147065 	chan = (wpi_scan_chan_t *)frm;
29344128Shx147065 	for (i = 1; i <= hdr->nchan; i++, chan++) {
2935*7865SPengcheng.Chen@Sun.COM 		if (ic->ic_des_esslen) {
2936*7865SPengcheng.Chen@Sun.COM 			chan->flags = 0x3;
2937*7865SPengcheng.Chen@Sun.COM 		} else {
2938*7865SPengcheng.Chen@Sun.COM 			chan->flags = 0x1;
2939*7865SPengcheng.Chen@Sun.COM 		}
2940*7865SPengcheng.Chen@Sun.COM 		chan->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
29414128Shx147065 		chan->magic = LE_16(0x62ab);
2942*7865SPengcheng.Chen@Sun.COM 		chan->active = LE_16(50);
29434128Shx147065 		chan->passive = LE_16(120);
29444128Shx147065 
29454128Shx147065 		frm += sizeof (wpi_scan_chan_t);
29464128Shx147065 	}
29474128Shx147065 
29486990Sgd78059 	pktlen = (uintptr_t)frm - (uintptr_t)cmd;
29494128Shx147065 
29504128Shx147065 	desc->flags = LE_32(WPI_PAD32(pktlen) << 28 | 1 << 24);
29514128Shx147065 	desc->segs[0].addr = LE_32(data->dma_data.cookie.dmac_address);
29524128Shx147065 	desc->segs[0].len  = LE_32(pktlen);
29534128Shx147065 
29544128Shx147065 	WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
29554128Shx147065 	WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
29564128Shx147065 
29574128Shx147065 	/* kick cmd ring */
29584128Shx147065 	ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT;
29594128Shx147065 	WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
29604128Shx147065 
2961*7865SPengcheng.Chen@Sun.COM 	sc->sc_scan_pending = 1;
2962*7865SPengcheng.Chen@Sun.COM 
29634128Shx147065 	return (WPI_SUCCESS);	/* will be notified async. of failure/success */
29644128Shx147065 }
29654128Shx147065 
29664128Shx147065 static int
29674128Shx147065 wpi_config(wpi_sc_t *sc)
29684128Shx147065 {
29694128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
29704128Shx147065 	wpi_txpower_t txpower;
29714128Shx147065 	wpi_power_t power;
29724128Shx147065 #ifdef WPI_BLUE_COEXISTENCE
29734128Shx147065 	wpi_bluetooth_t bluetooth;
29744128Shx147065 #endif
29754128Shx147065 	wpi_node_t node;
29764128Shx147065 	int err;
29774128Shx147065 
29784128Shx147065 	/* Intel's binary only daemon is a joke.. */
29794128Shx147065 
29804128Shx147065 	/* set Tx power for 2.4GHz channels (values read from EEPROM) */
29814128Shx147065 	(void) memset(&txpower, 0, sizeof (txpower));
29824128Shx147065 	(void) memcpy(txpower.pwr1, sc->sc_pwr1, 14 * sizeof (uint16_t));
29834128Shx147065 	(void) memcpy(txpower.pwr2, sc->sc_pwr2, 14 * sizeof (uint16_t));
29844128Shx147065 	err = wpi_cmd(sc, WPI_CMD_TXPOWER, &txpower, sizeof (txpower), 0);
29854128Shx147065 	if (err != WPI_SUCCESS) {
29864128Shx147065 		cmn_err(CE_WARN, "wpi_config(): failed to set txpower\n");
29874128Shx147065 		return (err);
29884128Shx147065 	}
29894128Shx147065 
29904128Shx147065 	/* set power mode */
29914128Shx147065 	(void) memset(&power, 0, sizeof (power));
29924128Shx147065 	power.flags = LE_32(0x8);
29934128Shx147065 	err = wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &power, sizeof (power), 0);
29944128Shx147065 	if (err != WPI_SUCCESS) {
29954128Shx147065 		cmn_err(CE_WARN, "wpi_config(): failed to set power mode\n");
29964128Shx147065 		return (err);
29974128Shx147065 	}
29984128Shx147065 #ifdef WPI_BLUE_COEXISTENCE
29994128Shx147065 	/* configure bluetooth coexistence */
30004128Shx147065 	(void) memset(&bluetooth, 0, sizeof (bluetooth));
30014128Shx147065 	bluetooth.flags = 3;
30024128Shx147065 	bluetooth.lead = 0xaa;
30034128Shx147065 	bluetooth.kill = 1;
30044128Shx147065 	err = wpi_cmd(sc, WPI_CMD_BLUETOOTH, &bluetooth,
30054128Shx147065 	    sizeof (bluetooth), 0);
30064128Shx147065 	if (err != WPI_SUCCESS) {
30074128Shx147065 		cmn_err(CE_WARN,
30084128Shx147065 		    "wpi_config(): "
30094128Shx147065 		    "failed to configurate bluetooth coexistence\n");
30104128Shx147065 		return (err);
30114128Shx147065 	}
30124128Shx147065 #endif
30134128Shx147065 	/* configure adapter */
30144128Shx147065 	(void) memset(&sc->sc_config, 0, sizeof (wpi_config_t));
30154128Shx147065 	IEEE80211_ADDR_COPY(sc->sc_config.myaddr, ic->ic_macaddr);
30164128Shx147065 	sc->sc_config.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
30174128Shx147065 	sc->sc_config.flags = LE_32(WPI_CONFIG_TSF | WPI_CONFIG_AUTO |
30184128Shx147065 	    WPI_CONFIG_24GHZ);
30194128Shx147065 	sc->sc_config.filter = 0;
30204128Shx147065 	switch (ic->ic_opmode) {
30214128Shx147065 	case IEEE80211_M_STA:
30224128Shx147065 		sc->sc_config.mode = WPI_MODE_STA;
30235453Shx147065 		sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST);
30244128Shx147065 		break;
30254128Shx147065 	case IEEE80211_M_IBSS:
30264128Shx147065 	case IEEE80211_M_AHDEMO:
30274128Shx147065 		sc->sc_config.mode = WPI_MODE_IBSS;
30284128Shx147065 		break;
30294128Shx147065 	case IEEE80211_M_HOSTAP:
30304128Shx147065 		sc->sc_config.mode = WPI_MODE_HOSTAP;
30314128Shx147065 		break;
30324128Shx147065 	case IEEE80211_M_MONITOR:
30334128Shx147065 		sc->sc_config.mode = WPI_MODE_MONITOR;
30344128Shx147065 		sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST |
30354128Shx147065 		    WPI_FILTER_CTL | WPI_FILTER_PROMISC);
30364128Shx147065 		break;
30374128Shx147065 	}
30384128Shx147065 	sc->sc_config.cck_mask  = 0x0f;	/* not yet negotiated */
30394128Shx147065 	sc->sc_config.ofdm_mask = 0xff;	/* not yet negotiated */
30404128Shx147065 	err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
30414128Shx147065 	    sizeof (wpi_config_t), 0);
30424128Shx147065 	if (err != WPI_SUCCESS) {
30434128Shx147065 		cmn_err(CE_WARN, "wpi_config(): "
30444128Shx147065 		    "failed to set configure command\n");
30454128Shx147065 		return (err);
30464128Shx147065 	}
30474128Shx147065 
30484128Shx147065 	/* add broadcast node */
30494128Shx147065 	(void) memset(&node, 0, sizeof (node));
30504128Shx147065 	(void) memset(node.bssid, 0xff, 6);
30514128Shx147065 	node.id = WPI_ID_BROADCAST;
30524128Shx147065 	node.rate = wpi_plcp_signal(2);
30534128Shx147065 	err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 0);
30544128Shx147065 	if (err != WPI_SUCCESS) {
30554128Shx147065 		cmn_err(CE_WARN, "wpi_config(): "
30564128Shx147065 		    "failed to add broadcast node\n");
30574128Shx147065 		return (err);
30584128Shx147065 	}
30594128Shx147065 
30604128Shx147065 	return (WPI_SUCCESS);
30614128Shx147065 }
30624128Shx147065 
30634128Shx147065 static void
30644128Shx147065 wpi_stop_master(wpi_sc_t *sc)
30654128Shx147065 {
30664128Shx147065 	uint32_t tmp;
30674128Shx147065 	int ntries;
30684128Shx147065 
30694128Shx147065 	tmp = WPI_READ(sc, WPI_RESET);
30704128Shx147065 	WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER);
30714128Shx147065 
30724128Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
30734128Shx147065 	if ((tmp & WPI_GPIO_PWR_STATUS) == WPI_GPIO_PWR_SLEEP)
30744128Shx147065 		return;	/* already asleep */
30754128Shx147065 
30764128Shx147065 	for (ntries = 0; ntries < 2000; ntries++) {
30774128Shx147065 		if (WPI_READ(sc, WPI_RESET) & WPI_MASTER_DISABLED)
30784128Shx147065 			break;
30794128Shx147065 		DELAY(1000);
30804128Shx147065 	}
30814128Shx147065 	if (ntries == 2000)
30824128Shx147065 		WPI_DBG((WPI_DEBUG_HW, "timeout waiting for master\n"));
30834128Shx147065 }
30844128Shx147065 
30854128Shx147065 static int
30864128Shx147065 wpi_power_up(wpi_sc_t *sc)
30874128Shx147065 {
30884128Shx147065 	uint32_t tmp;
30894128Shx147065 	int ntries;
30904128Shx147065 
30914128Shx147065 	wpi_mem_lock(sc);
30924128Shx147065 	tmp = wpi_mem_read(sc, WPI_MEM_POWER);
30934128Shx147065 	wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000);
30944128Shx147065 	wpi_mem_unlock(sc);
30954128Shx147065 
30964128Shx147065 	for (ntries = 0; ntries < 5000; ntries++) {
30974128Shx147065 		if (WPI_READ(sc, WPI_GPIO_STATUS) & WPI_POWERED)
30984128Shx147065 			break;
30994128Shx147065 		DELAY(10);
31004128Shx147065 	}
31014128Shx147065 	if (ntries == 5000) {
31024128Shx147065 		cmn_err(CE_WARN,
31034128Shx147065 		    "wpi_power_up(): timeout waiting for NIC to power up\n");
31044128Shx147065 		return (ETIMEDOUT);
31054128Shx147065 	}
31064128Shx147065 	return (WPI_SUCCESS);
31074128Shx147065 }
31084128Shx147065 
31094128Shx147065 static int
31104128Shx147065 wpi_reset(wpi_sc_t *sc)
31114128Shx147065 {
31124128Shx147065 	uint32_t tmp;
31134128Shx147065 	int ntries;
31144128Shx147065 
31154128Shx147065 	/* clear any pending interrupts */
31164128Shx147065 	WPI_WRITE(sc, WPI_INTR, 0xffffffff);
31174128Shx147065 
31184128Shx147065 	tmp = WPI_READ(sc, WPI_PLL_CTL);
31194128Shx147065 	WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT);
31204128Shx147065 
31214128Shx147065 	tmp = WPI_READ(sc, WPI_CHICKEN);
31224128Shx147065 	WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS);
31234128Shx147065 
31244128Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
31254128Shx147065 	WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT);
31264128Shx147065 
31274128Shx147065 	/* wait for clock stabilization */
31284128Shx147065 	for (ntries = 0; ntries < 1000; ntries++) {
31294128Shx147065 		if (WPI_READ(sc, WPI_GPIO_CTL) & WPI_GPIO_CLOCK)
31304128Shx147065 			break;
31314128Shx147065 		DELAY(10);
31324128Shx147065 	}
31334128Shx147065 	if (ntries == 1000) {
31344128Shx147065 		cmn_err(CE_WARN,
31354128Shx147065 		    "wpi_reset(): timeout waiting for clock stabilization\n");
31364128Shx147065 		return (ETIMEDOUT);
31374128Shx147065 	}
31384128Shx147065 
31394128Shx147065 	/* initialize EEPROM */
31404128Shx147065 	tmp = WPI_READ(sc, WPI_EEPROM_STATUS);
31414128Shx147065 	if ((tmp & WPI_EEPROM_VERSION) == 0) {
31424128Shx147065 		cmn_err(CE_WARN, "wpi_reset(): EEPROM not found\n");
31434128Shx147065 		return (EIO);
31444128Shx147065 	}
31454128Shx147065 	WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED);
31464128Shx147065 
31474128Shx147065 	return (WPI_SUCCESS);
31484128Shx147065 }
31494128Shx147065 
31504128Shx147065 static void
31514128Shx147065 wpi_hw_config(wpi_sc_t *sc)
31524128Shx147065 {
31534128Shx147065 	uint16_t val;
31544128Shx147065 	uint32_t hw;
31554128Shx147065 
31564128Shx147065 	/* voodoo from the Linux "driver".. */
31574128Shx147065 	hw = WPI_READ(sc, WPI_HWCONFIG);
31584128Shx147065 
31594128Shx147065 	if ((sc->sc_rev & 0xc0) == 0x40)
31604128Shx147065 		hw |= WPI_HW_ALM_MB;
31614128Shx147065 	else if (!(sc->sc_rev & 0x80))
31624128Shx147065 		hw |= WPI_HW_ALM_MM;
31634128Shx147065 
31644128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_CAPABILITIES);
31654128Shx147065 	if ((val & 0xff) == 0x80)
31664128Shx147065 		hw |= WPI_HW_SKU_MRC;
31674128Shx147065 
31684128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_REVISION);
31694128Shx147065 	hw &= ~WPI_HW_REV_D;
31704128Shx147065 	if ((val & 0xf0) == 0xd0)
31714128Shx147065 		hw |= WPI_HW_REV_D;
31724128Shx147065 
31734128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_TYPE);
31744128Shx147065 	if ((val & 0xff) > 1)
31754128Shx147065 		hw |= WPI_HW_TYPE_B;
31764128Shx147065 
31774128Shx147065 	WPI_DBG((WPI_DEBUG_HW, "setting h/w config %x\n", hw));
31784128Shx147065 	WPI_WRITE(sc, WPI_HWCONFIG, hw);
31794128Shx147065 }
31804128Shx147065 
31814128Shx147065 static int
31824128Shx147065 wpi_init(wpi_sc_t *sc)
31834128Shx147065 {
31844128Shx147065 	uint32_t tmp;
31854128Shx147065 	int qid, ntries, err;
31864128Shx147065 	clock_t clk;
31874128Shx147065 
31884128Shx147065 	mutex_enter(&sc->sc_glock);
31894128Shx147065 	sc->sc_flags &= ~WPI_F_FW_INIT;
31904128Shx147065 
31914128Shx147065 	(void) wpi_reset(sc);
31924128Shx147065 
31934128Shx147065 	wpi_mem_lock(sc);
31944128Shx147065 	wpi_mem_write(sc, WPI_MEM_CLOCK1, 0xa00);
31954128Shx147065 	DELAY(20);
31964128Shx147065 	tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV);
31974128Shx147065 	wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800);
31984128Shx147065 	wpi_mem_unlock(sc);
31994128Shx147065 
32004128Shx147065 	(void) wpi_power_up(sc);
32014128Shx147065 	wpi_hw_config(sc);
32024128Shx147065 
32036062Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
32046062Shx147065 	if (!(tmp & WPI_GPIO_HW_RF_KILL)) {
32056062Shx147065 		cmn_err(CE_WARN, "wpi_init(): Radio transmitter is off\n");
32066062Shx147065 		goto fail1;
32076062Shx147065 	}
32086062Shx147065 
32094128Shx147065 	/* init Rx ring */
32104128Shx147065 	wpi_mem_lock(sc);
32114128Shx147065 	WPI_WRITE(sc, WPI_RX_BASE, sc->sc_rxq.dma_desc.cookie.dmac_address);
32124128Shx147065 	WPI_WRITE(sc, WPI_RX_RIDX_PTR,
32134128Shx147065 	    (uint32_t)(sc->sc_dma_sh.cookie.dmac_address +
32144128Shx147065 	    offsetof(wpi_shared_t, next)));
32154128Shx147065 	WPI_WRITE(sc, WPI_RX_WIDX, (WPI_RX_RING_COUNT - 1) & (~7));
32164128Shx147065 	WPI_WRITE(sc, WPI_RX_CONFIG, 0xa9601010);
32174128Shx147065 	wpi_mem_unlock(sc);
32184128Shx147065 
32194128Shx147065 	/* init Tx rings */
32204128Shx147065 	wpi_mem_lock(sc);
32214128Shx147065 	wpi_mem_write(sc, WPI_MEM_MODE, 2);	/* bypass mode */
32224128Shx147065 	wpi_mem_write(sc, WPI_MEM_RA, 1);	/* enable RA0 */
32234128Shx147065 	wpi_mem_write(sc, WPI_MEM_TXCFG, 0x3f);	/* enable all 6 Tx rings */
32244128Shx147065 	wpi_mem_write(sc, WPI_MEM_BYPASS1, 0x10000);
32254128Shx147065 	wpi_mem_write(sc, WPI_MEM_BYPASS2, 0x30002);
32264128Shx147065 	wpi_mem_write(sc, WPI_MEM_MAGIC4, 4);
32274128Shx147065 	wpi_mem_write(sc, WPI_MEM_MAGIC5, 5);
32284128Shx147065 
32294128Shx147065 	WPI_WRITE(sc, WPI_TX_BASE_PTR, sc->sc_dma_sh.cookie.dmac_address);
32304128Shx147065 	WPI_WRITE(sc, WPI_MSG_CONFIG, 0xffff05a5);
32314128Shx147065 
32324128Shx147065 	for (qid = 0; qid < 6; qid++) {
32334128Shx147065 		WPI_WRITE(sc, WPI_TX_CTL(qid), 0);
32344128Shx147065 		WPI_WRITE(sc, WPI_TX_BASE(qid), 0);
32354128Shx147065 		WPI_WRITE(sc, WPI_TX_CONFIG(qid), 0x80200008);
32364128Shx147065 	}
32374128Shx147065 	wpi_mem_unlock(sc);
32384128Shx147065 
32394128Shx147065 	/* clear "radio off" and "disable command" bits (reversed logic) */
32404128Shx147065 	WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF);
32414128Shx147065 	WPI_WRITE(sc, WPI_UCODE_CLR, WPI_DISABLE_CMD);
32424128Shx147065 
32434128Shx147065 	/* clear any pending interrupts */
32444128Shx147065 	WPI_WRITE(sc, WPI_INTR, 0xffffffff);
32454128Shx147065 
32464128Shx147065 	/* enable interrupts */
32474128Shx147065 	WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK);
32484128Shx147065 
32494128Shx147065 	/* load firmware boot code into NIC */
32504128Shx147065 	err = wpi_load_microcode(sc);
32514128Shx147065 	if (err != WPI_SUCCESS) {
32524128Shx147065 		cmn_err(CE_WARN, "wpi_init(): failed to load microcode\n");
32534128Shx147065 		goto fail1;
32544128Shx147065 	}
32554128Shx147065 
32564128Shx147065 	/* load firmware .text segment into NIC */
32574128Shx147065 	err = wpi_load_firmware(sc, WPI_FW_TEXT);
32584128Shx147065 	if (err != WPI_SUCCESS) {
32594128Shx147065 		cmn_err(CE_WARN, "wpi_init(): "
32604128Shx147065 		    "failed to load firmware(text)\n");
32614128Shx147065 		goto fail1;
32624128Shx147065 	}
32634128Shx147065 
32644128Shx147065 	/* load firmware .data segment into NIC */
32654128Shx147065 	err = wpi_load_firmware(sc, WPI_FW_DATA);
32664128Shx147065 	if (err != WPI_SUCCESS) {
32674128Shx147065 		cmn_err(CE_WARN, "wpi_init(): "
32684128Shx147065 		    "failed to load firmware(data)\n");
32694128Shx147065 		goto fail1;
32704128Shx147065 	}
32714128Shx147065 
32724128Shx147065 	/* now press "execute" ;-) */
32734128Shx147065 	tmp = WPI_READ(sc, WPI_RESET);
32744128Shx147065 	tmp &= ~(WPI_MASTER_DISABLED | WPI_STOP_MASTER | WPI_NEVO_RESET);
32754128Shx147065 	WPI_WRITE(sc, WPI_RESET, tmp);
32764128Shx147065 
32774128Shx147065 	/* ..and wait at most one second for adapter to initialize */
32784128Shx147065 	clk = ddi_get_lbolt() + drv_usectohz(2000000);
32794128Shx147065 	while (!(sc->sc_flags & WPI_F_FW_INIT)) {
32804128Shx147065 		if (cv_timedwait(&sc->sc_fw_cv, &sc->sc_glock, clk) < 0)
32814128Shx147065 			break;
32824128Shx147065 	}
32834128Shx147065 	if (!(sc->sc_flags & WPI_F_FW_INIT)) {
32844128Shx147065 		cmn_err(CE_WARN,
32854128Shx147065 		    "wpi_init(): timeout waiting for firmware init\n");
32864128Shx147065 		goto fail1;
32874128Shx147065 	}
32884128Shx147065 
32894128Shx147065 	/* wait for thermal sensors to calibrate */
32904128Shx147065 	for (ntries = 0; ntries < 1000; ntries++) {
32914128Shx147065 		if (WPI_READ(sc, WPI_TEMPERATURE) != 0)
32924128Shx147065 			break;
32934128Shx147065 		DELAY(10);
32944128Shx147065 	}
32954128Shx147065 
32964128Shx147065 	if (ntries == 1000) {
32974128Shx147065 		WPI_DBG((WPI_DEBUG_HW,
32984128Shx147065 		    "wpi_init(): timeout waiting for thermal sensors "
32994128Shx147065 		    "calibration\n"));
33004128Shx147065 	}
33014128Shx147065 
33024128Shx147065 	WPI_DBG((WPI_DEBUG_HW, "temperature %d\n",
33034128Shx147065 	    (int)WPI_READ(sc, WPI_TEMPERATURE)));
33044128Shx147065 
33054128Shx147065 	err = wpi_config(sc);
33064128Shx147065 	if (err) {
33074128Shx147065 		cmn_err(CE_WARN, "wpi_init(): failed to configure device\n");
33084128Shx147065 		goto fail1;
33094128Shx147065 	}
33104128Shx147065 
33114128Shx147065 	mutex_exit(&sc->sc_glock);
33124128Shx147065 	return (WPI_SUCCESS);
33134128Shx147065 
33144128Shx147065 fail1:
33154128Shx147065 	err = WPI_FAIL;
33164128Shx147065 	mutex_exit(&sc->sc_glock);
33174128Shx147065 	return (err);
33184128Shx147065 }
33194128Shx147065 
33204128Shx147065 static void
33214128Shx147065 wpi_stop(wpi_sc_t *sc)
33224128Shx147065 {
33234128Shx147065 	uint32_t tmp;
33244128Shx147065 	int ac;
33254128Shx147065 
33264128Shx147065 
33274128Shx147065 	mutex_enter(&sc->sc_glock);
33284128Shx147065 	/* disable interrupts */
33294128Shx147065 	WPI_WRITE(sc, WPI_MASK, 0);
33304128Shx147065 	WPI_WRITE(sc, WPI_INTR, WPI_INTR_MASK);
33314128Shx147065 	WPI_WRITE(sc, WPI_INTR_STATUS, 0xff);
33324128Shx147065 	WPI_WRITE(sc, WPI_INTR_STATUS, 0x00070000);
33334128Shx147065 
33344128Shx147065 	wpi_mem_lock(sc);
33354128Shx147065 	wpi_mem_write(sc, WPI_MEM_MODE, 0);
33364128Shx147065 	wpi_mem_unlock(sc);
33374128Shx147065 
33384128Shx147065 	/* reset all Tx rings */
33394128Shx147065 	for (ac = 0; ac < 4; ac++)
33404128Shx147065 		wpi_reset_tx_ring(sc, &sc->sc_txq[ac]);
33414128Shx147065 	wpi_reset_tx_ring(sc, &sc->sc_cmdq);
33424128Shx147065 	wpi_reset_tx_ring(sc, &sc->sc_svcq);
33434128Shx147065 
33444128Shx147065 	/* reset Rx ring */
33454128Shx147065 	wpi_reset_rx_ring(sc);
33464128Shx147065 
33474128Shx147065 	wpi_mem_lock(sc);
33484128Shx147065 	wpi_mem_write(sc, WPI_MEM_CLOCK2, 0x200);
33494128Shx147065 	wpi_mem_unlock(sc);
33504128Shx147065 
33514128Shx147065 	DELAY(5);
33524128Shx147065 
33534128Shx147065 	wpi_stop_master(sc);
33544128Shx147065 
33554128Shx147065 	sc->sc_tx_timer = 0;
3356*7865SPengcheng.Chen@Sun.COM 	sc->sc_flags &= ~WPI_F_SCANNING;
3357*7865SPengcheng.Chen@Sun.COM 	sc->sc_scan_pending = 0;
3358*7865SPengcheng.Chen@Sun.COM 	sc->sc_scan_next = 0;
3359*7865SPengcheng.Chen@Sun.COM 
33604128Shx147065 	tmp = WPI_READ(sc, WPI_RESET);
33614128Shx147065 	WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET);
3362*7865SPengcheng.Chen@Sun.COM 
33634128Shx147065 	mutex_exit(&sc->sc_glock);
33644128Shx147065 }
33654128Shx147065 
33664128Shx147065 /*
33674128Shx147065  * Naive implementation of the Adaptive Multi Rate Retry algorithm:
33684128Shx147065  * "IEEE 802.11 Rate Adaptation: A Practical Approach"
33694128Shx147065  * Mathieu Lacage, Hossein Manshaei, Thierry Turletti
33704128Shx147065  * INRIA Sophia - Projet Planete
33714128Shx147065  * http://www-sop.inria.fr/rapports/sophia/RR-5208.html
33724128Shx147065  */
33734128Shx147065 #define	is_success(amrr)	\
33744128Shx147065 	((amrr)->retrycnt < (amrr)->txcnt / 10)
33754128Shx147065 #define	is_failure(amrr)	\
33764128Shx147065 	((amrr)->retrycnt > (amrr)->txcnt / 3)
33774128Shx147065 #define	is_enough(amrr)		\
33784128Shx147065 	((amrr)->txcnt > 100)
33794128Shx147065 #define	is_min_rate(in)		\
33804128Shx147065 	((in)->in_txrate == 0)
33814128Shx147065 #define	is_max_rate(in)		\
33824128Shx147065 	((in)->in_txrate == (in)->in_rates.ir_nrates - 1)
33834128Shx147065 #define	increase_rate(in)	\
33844128Shx147065 	((in)->in_txrate++)
33854128Shx147065 #define	decrease_rate(in)	\
33864128Shx147065 	((in)->in_txrate--)
33874128Shx147065 #define	reset_cnt(amrr)		\
33884128Shx147065 	{ (amrr)->txcnt = (amrr)->retrycnt = 0; }
33894128Shx147065 
33904128Shx147065 #define	WPI_AMRR_MIN_SUCCESS_THRESHOLD	 1
33914128Shx147065 #define	WPI_AMRR_MAX_SUCCESS_THRESHOLD	15
33924128Shx147065 
33934128Shx147065 static void
33944128Shx147065 wpi_amrr_init(wpi_amrr_t *amrr)
33954128Shx147065 {
33964128Shx147065 	amrr->success = 0;
33974128Shx147065 	amrr->recovery = 0;
33984128Shx147065 	amrr->txcnt = amrr->retrycnt = 0;
33994128Shx147065 	amrr->success_threshold = WPI_AMRR_MIN_SUCCESS_THRESHOLD;
34004128Shx147065 }
34014128Shx147065 
34024128Shx147065 static void
34034128Shx147065 wpi_amrr_timeout(wpi_sc_t *sc)
34044128Shx147065 {
34054128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
34064128Shx147065 
34074128Shx147065 	WPI_DBG((WPI_DEBUG_RATECTL, "wpi_amrr_timeout() enter\n"));
34084128Shx147065 	if (ic->ic_opmode == IEEE80211_M_STA)
34094128Shx147065 		wpi_amrr_ratectl(NULL, ic->ic_bss);
34104128Shx147065 	else
34114128Shx147065 		ieee80211_iterate_nodes(&ic->ic_sta, wpi_amrr_ratectl, NULL);
34124128Shx147065 	sc->sc_clk = ddi_get_lbolt();
34134128Shx147065 }
34144128Shx147065 
34154128Shx147065 /* ARGSUSED */
34164128Shx147065 static void
34174128Shx147065 wpi_amrr_ratectl(void *arg, ieee80211_node_t *in)
34184128Shx147065 {
34194128Shx147065 	wpi_amrr_t *amrr = (wpi_amrr_t *)in;
34204128Shx147065 	int need_change = 0;
34214128Shx147065 
34224128Shx147065 	if (is_success(amrr) && is_enough(amrr)) {
34234128Shx147065 		amrr->success++;
34244128Shx147065 		if (amrr->success >= amrr->success_threshold &&
34254128Shx147065 		    !is_max_rate(in)) {
34264128Shx147065 			amrr->recovery = 1;
34274128Shx147065 			amrr->success = 0;
34284128Shx147065 			increase_rate(in);
34294128Shx147065 			WPI_DBG((WPI_DEBUG_RATECTL,
34304128Shx147065 			    "AMRR increasing rate %d (txcnt=%d retrycnt=%d)\n",
34314128Shx147065 			    in->in_txrate, amrr->txcnt, amrr->retrycnt));
34324128Shx147065 			need_change = 1;
34334128Shx147065 		} else {
34344128Shx147065 			amrr->recovery = 0;
34354128Shx147065 		}
34364128Shx147065 	} else if (is_failure(amrr)) {
34374128Shx147065 		amrr->success = 0;
34384128Shx147065 		if (!is_min_rate(in)) {
34394128Shx147065 			if (amrr->recovery) {
34404128Shx147065 				amrr->success_threshold++;
34414128Shx147065 				if (amrr->success_threshold >
34424128Shx147065 				    WPI_AMRR_MAX_SUCCESS_THRESHOLD)
34434128Shx147065 					amrr->success_threshold =
34444128Shx147065 					    WPI_AMRR_MAX_SUCCESS_THRESHOLD;
34454128Shx147065 			} else {
34464128Shx147065 				amrr->success_threshold =
34474128Shx147065 				    WPI_AMRR_MIN_SUCCESS_THRESHOLD;
34484128Shx147065 			}
34494128Shx147065 			decrease_rate(in);
34504128Shx147065 			WPI_DBG((WPI_DEBUG_RATECTL,
34514128Shx147065 			    "AMRR decreasing rate %d (txcnt=%d retrycnt=%d)\n",
34524128Shx147065 			    in->in_txrate, amrr->txcnt, amrr->retrycnt));
34534128Shx147065 			need_change = 1;
34544128Shx147065 		}
34554128Shx147065 		amrr->recovery = 0;	/* paper is incorrect */
34564128Shx147065 	}
34574128Shx147065 
34584128Shx147065 	if (is_enough(amrr) || need_change)
34594128Shx147065 		reset_cnt(amrr);
34604128Shx147065 }
3461