xref: /onnv-gate/usr/src/uts/common/io/wpi/wpi.c (revision 6990:d24af98bb8ea)
14128Shx147065 /*
26062Shx147065  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
34128Shx147065  * Use is subject to license terms.
44128Shx147065  */
54128Shx147065 
64128Shx147065 /*
74128Shx147065  * Copyright (c) 2006
84128Shx147065  *	Damien Bergamini <damien.bergamini@free.fr>
94128Shx147065  *
104128Shx147065  * Permission to use, copy, modify, and distribute this software for any
114128Shx147065  * purpose with or without fee is hereby granted, provided that the above
124128Shx147065  * copyright notice and this permission notice appear in all copies.
134128Shx147065  *
144128Shx147065  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
154128Shx147065  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
164128Shx147065  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
174128Shx147065  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
184128Shx147065  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
194128Shx147065  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
204128Shx147065  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
214128Shx147065  */
224128Shx147065 
234128Shx147065 #pragma ident	"%Z%%M%	%I%	%E% SMI"
244128Shx147065 
254128Shx147065 /*
264128Shx147065  * Driver for Intel PRO/Wireless 3945ABG 802.11 network adapters.
274128Shx147065  */
284128Shx147065 
294128Shx147065 #include <sys/types.h>
304128Shx147065 #include <sys/byteorder.h>
314128Shx147065 #include <sys/conf.h>
324128Shx147065 #include <sys/cmn_err.h>
334128Shx147065 #include <sys/stat.h>
344128Shx147065 #include <sys/ddi.h>
354128Shx147065 #include <sys/sunddi.h>
364128Shx147065 #include <sys/strsubr.h>
374128Shx147065 #include <sys/ethernet.h>
384128Shx147065 #include <inet/common.h>
394128Shx147065 #include <inet/nd.h>
404128Shx147065 #include <inet/mi.h>
414128Shx147065 #include <sys/note.h>
424128Shx147065 #include <sys/stream.h>
434128Shx147065 #include <sys/strsun.h>
444128Shx147065 #include <sys/modctl.h>
454128Shx147065 #include <sys/devops.h>
464128Shx147065 #include <sys/dlpi.h>
474128Shx147065 #include <sys/mac.h>
484128Shx147065 #include <sys/mac_wifi.h>
494128Shx147065 #include <sys/net80211.h>
504128Shx147065 #include <sys/net80211_proto.h>
514128Shx147065 #include <sys/varargs.h>
524128Shx147065 #include <sys/policy.h>
534128Shx147065 #include <sys/pci.h>
544128Shx147065 
554128Shx147065 #include "wpireg.h"
564128Shx147065 #include "wpivar.h"
574128Shx147065 #include <inet/wifi_ioctl.h>
584128Shx147065 
594128Shx147065 #ifdef DEBUG
604128Shx147065 #define	WPI_DEBUG_80211		(1 << 0)
614128Shx147065 #define	WPI_DEBUG_CMD		(1 << 1)
624128Shx147065 #define	WPI_DEBUG_DMA		(1 << 2)
634128Shx147065 #define	WPI_DEBUG_EEPROM	(1 << 3)
644128Shx147065 #define	WPI_DEBUG_FW		(1 << 4)
654128Shx147065 #define	WPI_DEBUG_HW		(1 << 5)
664128Shx147065 #define	WPI_DEBUG_INTR		(1 << 6)
674128Shx147065 #define	WPI_DEBUG_MRR		(1 << 7)
684128Shx147065 #define	WPI_DEBUG_PIO		(1 << 8)
694128Shx147065 #define	WPI_DEBUG_RX		(1 << 9)
704128Shx147065 #define	WPI_DEBUG_SCAN		(1 << 10)
714128Shx147065 #define	WPI_DEBUG_TX		(1 << 11)
724128Shx147065 #define	WPI_DEBUG_RATECTL	(1 << 12)
734128Shx147065 #define	WPI_DEBUG_RADIO		(1 << 13)
746062Shx147065 #define	WPI_DEBUG_RESUME	(1 << 14)
754128Shx147065 uint32_t wpi_dbg_flags = 0;
764128Shx147065 #define	WPI_DBG(x) \
774128Shx147065 	wpi_dbg x
784128Shx147065 #else
794128Shx147065 #define	WPI_DBG(x)
804128Shx147065 #endif
814128Shx147065 
824128Shx147065 static void	*wpi_soft_state_p = NULL;
834128Shx147065 static uint8_t wpi_fw_bin [] = {
844128Shx147065 #include "fw-wpi/ipw3945.ucode.hex"
854128Shx147065 };
864128Shx147065 
874128Shx147065 /* DMA attributes for a shared page */
884128Shx147065 static ddi_dma_attr_t sh_dma_attr = {
894128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
904128Shx147065 	0,		/* lowest usable address */
914128Shx147065 	0xffffffffU,	/* highest usable address */
924128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
934128Shx147065 	0x1000,		/* alignment in bytes */
944128Shx147065 	0x1000,		/* burst sizes (any?) */
954128Shx147065 	1,		/* minimum transfer */
964128Shx147065 	0xffffffffU,	/* maximum transfer */
974128Shx147065 	0xffffffffU,	/* maximum segment length */
984128Shx147065 	1,		/* maximum number of segments */
994128Shx147065 	1,		/* granularity */
1004128Shx147065 	0,		/* flags (reserved) */
1014128Shx147065 };
1024128Shx147065 
1034128Shx147065 /* DMA attributes for a ring descriptor */
1044128Shx147065 static ddi_dma_attr_t ring_desc_dma_attr = {
1054128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1064128Shx147065 	0,		/* lowest usable address */
1074128Shx147065 	0xffffffffU,	/* highest usable address */
1084128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1094128Shx147065 	0x4000,		/* alignment in bytes */
1104128Shx147065 	0x100,		/* burst sizes (any?) */
1114128Shx147065 	1,		/* minimum transfer */
1124128Shx147065 	0xffffffffU,	/* maximum transfer */
1134128Shx147065 	0xffffffffU,	/* maximum segment length */
1144128Shx147065 	1,		/* maximum number of segments */
1154128Shx147065 	1,		/* granularity */
1164128Shx147065 	0,		/* flags (reserved) */
1174128Shx147065 };
1184128Shx147065 
1194128Shx147065 
1204128Shx147065 /* DMA attributes for a tx cmd */
1214128Shx147065 static ddi_dma_attr_t tx_cmd_dma_attr = {
1224128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1234128Shx147065 	0,		/* lowest usable address */
1244128Shx147065 	0xffffffffU,	/* highest usable address */
1254128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1264128Shx147065 	4,		/* alignment in bytes */
1274128Shx147065 	0x100,		/* burst sizes (any?) */
1284128Shx147065 	1,		/* minimum transfer */
1294128Shx147065 	0xffffffffU,	/* maximum transfer */
1304128Shx147065 	0xffffffffU,	/* maximum segment length */
1314128Shx147065 	1,		/* maximum number of segments */
1324128Shx147065 	1,		/* granularity */
1334128Shx147065 	0,		/* flags (reserved) */
1344128Shx147065 };
1354128Shx147065 
1364128Shx147065 /* DMA attributes for a rx buffer */
1374128Shx147065 static ddi_dma_attr_t rx_buffer_dma_attr = {
1384128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1394128Shx147065 	0,		/* lowest usable address */
1404128Shx147065 	0xffffffffU,	/* highest usable address */
1414128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1424128Shx147065 	1,		/* alignment in bytes */
1434128Shx147065 	0x100,		/* burst sizes (any?) */
1444128Shx147065 	1,		/* minimum transfer */
1454128Shx147065 	0xffffffffU,	/* maximum transfer */
1464128Shx147065 	0xffffffffU,	/* maximum segment length */
1474128Shx147065 	1,		/* maximum number of segments */
1484128Shx147065 	1,		/* granularity */
1494128Shx147065 	0,		/* flags (reserved) */
1504128Shx147065 };
1514128Shx147065 
1524128Shx147065 /*
1534128Shx147065  * DMA attributes for a tx buffer.
1544128Shx147065  * the maximum number of segments is 4 for the hardware.
1554128Shx147065  * now all the wifi drivers put the whole frame in a single
1564128Shx147065  * descriptor, so we define the maximum  number of segments 4,
1574128Shx147065  * just the same as the rx_buffer. we consider leverage the HW
1584128Shx147065  * ability in the future, that is why we don't define rx and tx
1594128Shx147065  * buffer_dma_attr as the same.
1604128Shx147065  */
1614128Shx147065 static ddi_dma_attr_t tx_buffer_dma_attr = {
1624128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1634128Shx147065 	0,		/* lowest usable address */
1644128Shx147065 	0xffffffffU,	/* highest usable address */
1654128Shx147065 	0xffffffffU,	/* maximum DMAable byte count */
1664128Shx147065 	1,		/* alignment in bytes */
1674128Shx147065 	0x100,		/* burst sizes (any?) */
1684128Shx147065 	1,		/* minimum transfer */
1694128Shx147065 	0xffffffffU,	/* maximum transfer */
1704128Shx147065 	0xffffffffU,	/* maximum segment length */
1714128Shx147065 	1,		/* maximum number of segments */
1724128Shx147065 	1,		/* granularity */
1734128Shx147065 	0,		/* flags (reserved) */
1744128Shx147065 };
1754128Shx147065 
1764128Shx147065 /* DMA attributes for a load firmware */
1774128Shx147065 static ddi_dma_attr_t fw_buffer_dma_attr = {
1784128Shx147065 	DMA_ATTR_V0,	/* version of this structure */
1794128Shx147065 	0,		/* lowest usable address */
1804128Shx147065 	0xffffffffU,	/* highest usable address */
1814128Shx147065 	0x7fffffff,	/* maximum DMAable byte count */
1824128Shx147065 	4,		/* alignment in bytes */
1834128Shx147065 	0x100,		/* burst sizes (any?) */
1844128Shx147065 	1,		/* minimum transfer */
1854128Shx147065 	0xffffffffU,	/* maximum transfer */
1864128Shx147065 	0xffffffffU,	/* maximum segment length */
1874128Shx147065 	4,		/* maximum number of segments */
1884128Shx147065 	1,		/* granularity */
1894128Shx147065 	0,		/* flags (reserved) */
1904128Shx147065 };
1914128Shx147065 
1924128Shx147065 /* regs access attributes */
1934128Shx147065 static ddi_device_acc_attr_t wpi_reg_accattr = {
1944128Shx147065 	DDI_DEVICE_ATTR_V0,
1954128Shx147065 	DDI_STRUCTURE_LE_ACC,
1964128Shx147065 	DDI_STRICTORDER_ACC,
1974128Shx147065 	DDI_DEFAULT_ACC
1984128Shx147065 };
1994128Shx147065 
2004128Shx147065 /* DMA access attributes */
2014128Shx147065 static ddi_device_acc_attr_t wpi_dma_accattr = {
2024128Shx147065 	DDI_DEVICE_ATTR_V0,
2034128Shx147065 	DDI_NEVERSWAP_ACC,
2044128Shx147065 	DDI_STRICTORDER_ACC,
2054128Shx147065 	DDI_DEFAULT_ACC
2064128Shx147065 };
2074128Shx147065 
2084128Shx147065 static int	wpi_ring_init(wpi_sc_t *);
2094128Shx147065 static void	wpi_ring_free(wpi_sc_t *);
2104128Shx147065 static int	wpi_alloc_shared(wpi_sc_t *);
2114128Shx147065 static void	wpi_free_shared(wpi_sc_t *);
2124128Shx147065 static int	wpi_alloc_fw_dma(wpi_sc_t *);
2134128Shx147065 static void	wpi_free_fw_dma(wpi_sc_t *);
2144128Shx147065 static int	wpi_alloc_rx_ring(wpi_sc_t *);
2154128Shx147065 static void	wpi_reset_rx_ring(wpi_sc_t *);
2164128Shx147065 static void	wpi_free_rx_ring(wpi_sc_t *);
2174128Shx147065 static int	wpi_alloc_tx_ring(wpi_sc_t *, wpi_tx_ring_t *, int, int);
2184128Shx147065 static void	wpi_reset_tx_ring(wpi_sc_t *, wpi_tx_ring_t *);
2194128Shx147065 static void	wpi_free_tx_ring(wpi_sc_t *, wpi_tx_ring_t *);
2204128Shx147065 
2214128Shx147065 static ieee80211_node_t *wpi_node_alloc(ieee80211com_t *);
2224128Shx147065 static void	wpi_node_free(ieee80211_node_t *);
2234128Shx147065 static int	wpi_newstate(ieee80211com_t *, enum ieee80211_state, int);
2245296Szf162725 static int	wpi_key_set(ieee80211com_t *, const struct ieee80211_key *,
2255296Szf162725     const uint8_t mac[IEEE80211_ADDR_LEN]);
2264128Shx147065 static void	wpi_mem_lock(wpi_sc_t *);
2274128Shx147065 static void	wpi_mem_unlock(wpi_sc_t *);
2284128Shx147065 static uint32_t	wpi_mem_read(wpi_sc_t *, uint16_t);
2294128Shx147065 static void	wpi_mem_write(wpi_sc_t *, uint16_t, uint32_t);
2304128Shx147065 static void	wpi_mem_write_region_4(wpi_sc_t *, uint16_t,
2314128Shx147065 		    const uint32_t *, int);
2324128Shx147065 static uint16_t	wpi_read_prom_word(wpi_sc_t *, uint32_t);
2334128Shx147065 static int	wpi_load_microcode(wpi_sc_t *);
2344128Shx147065 static int	wpi_load_firmware(wpi_sc_t *, uint32_t);
2354128Shx147065 static void	wpi_rx_intr(wpi_sc_t *, wpi_rx_desc_t *,
2364128Shx147065 		    wpi_rx_data_t *);
2374128Shx147065 static void	wpi_tx_intr(wpi_sc_t *, wpi_rx_desc_t *,
2384128Shx147065 		    wpi_rx_data_t *);
2394128Shx147065 static void	wpi_cmd_intr(wpi_sc_t *, wpi_rx_desc_t *);
2404128Shx147065 static uint_t	wpi_intr(caddr_t);
2414128Shx147065 static uint_t	wpi_notif_softintr(caddr_t);
2424128Shx147065 static uint8_t	wpi_plcp_signal(int);
2434128Shx147065 static void	wpi_read_eeprom(wpi_sc_t *);
2444128Shx147065 static int	wpi_cmd(wpi_sc_t *, int, const void *, int, int);
2454128Shx147065 static int	wpi_mrr_setup(wpi_sc_t *);
2464128Shx147065 static void	wpi_set_led(wpi_sc_t *, uint8_t, uint8_t, uint8_t);
2474128Shx147065 static int	wpi_auth(wpi_sc_t *);
2484128Shx147065 static int	wpi_scan(wpi_sc_t *);
2494128Shx147065 static int	wpi_config(wpi_sc_t *);
2504128Shx147065 static void	wpi_stop_master(wpi_sc_t *);
2514128Shx147065 static int	wpi_power_up(wpi_sc_t *);
2524128Shx147065 static int	wpi_reset(wpi_sc_t *);
2534128Shx147065 static void	wpi_hw_config(wpi_sc_t *);
2544128Shx147065 static int	wpi_init(wpi_sc_t *);
2554128Shx147065 static void	wpi_stop(wpi_sc_t *);
2564128Shx147065 static void	wpi_amrr_init(wpi_amrr_t *);
2574128Shx147065 static void	wpi_amrr_timeout(wpi_sc_t *);
2584128Shx147065 static void	wpi_amrr_ratectl(void *, ieee80211_node_t *);
2594128Shx147065 
2604128Shx147065 static int wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
2614128Shx147065 static int wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
2624128Shx147065 
2634128Shx147065 /*
2644128Shx147065  * GLD specific operations
2654128Shx147065  */
2664128Shx147065 static int	wpi_m_stat(void *arg, uint_t stat, uint64_t *val);
2674128Shx147065 static int	wpi_m_start(void *arg);
2684128Shx147065 static void	wpi_m_stop(void *arg);
2694128Shx147065 static int	wpi_m_unicst(void *arg, const uint8_t *macaddr);
2704128Shx147065 static int	wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m);
2714128Shx147065 static int	wpi_m_promisc(void *arg, boolean_t on);
2724128Shx147065 static mblk_t  *wpi_m_tx(void *arg, mblk_t *mp);
2734128Shx147065 static void	wpi_m_ioctl(void *arg, queue_t *wq, mblk_t *mp);
2744128Shx147065 
2754128Shx147065 static void	wpi_destroy_locks(wpi_sc_t *sc);
2764128Shx147065 static int	wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type);
2774128Shx147065 static void	wpi_thread(wpi_sc_t *sc);
2784128Shx147065 
2794128Shx147065 /*
2804128Shx147065  * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
2814128Shx147065  */
2824128Shx147065 static const struct ieee80211_rateset wpi_rateset_11b =
2834128Shx147065 	{ 4, { 2, 4, 11, 22 } };
2844128Shx147065 
2854128Shx147065 static const struct ieee80211_rateset wpi_rateset_11g =
2864128Shx147065 	{ 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
2874128Shx147065 
2884128Shx147065 static const uint8_t wpi_ridx_to_signal[] = {
2894128Shx147065 	/* OFDM: IEEE Std 802.11a-1999, pp. 14 Table 80 */
2904128Shx147065 	/* R1-R4 (ral/ural is R4-R1) */
2914128Shx147065 	0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3,
2924128Shx147065 	/* CCK: device-dependent */
2934128Shx147065 	10, 20, 55, 110
2944128Shx147065 };
2954128Shx147065 
2964128Shx147065 /*
2974128Shx147065  * For mfthread only
2984128Shx147065  */
2994128Shx147065 extern pri_t minclsyspri;
3004128Shx147065 
3014128Shx147065 /*
3024128Shx147065  * Module Loading Data & Entry Points
3034128Shx147065  */
3044128Shx147065 DDI_DEFINE_STREAM_OPS(wpi_devops, nulldev, nulldev, wpi_attach,
3054128Shx147065     wpi_detach, nodev, NULL, D_MP, NULL);
3064128Shx147065 
3074128Shx147065 static struct modldrv wpi_modldrv = {
3084128Shx147065 	&mod_driverops,
3094128Shx147065 	"Intel(R) PRO/Wireless 3945ABG driver",
3104128Shx147065 	&wpi_devops
3114128Shx147065 };
3124128Shx147065 
3134128Shx147065 static struct modlinkage wpi_modlinkage = {
3144128Shx147065 	MODREV_1,
3154128Shx147065 	&wpi_modldrv,
3164128Shx147065 	NULL
3174128Shx147065 };
3184128Shx147065 
3194128Shx147065 int
3204128Shx147065 _init(void)
3214128Shx147065 {
3224128Shx147065 	int	status;
3234128Shx147065 
3244128Shx147065 	status = ddi_soft_state_init(&wpi_soft_state_p,
3254128Shx147065 	    sizeof (wpi_sc_t), 1);
3264128Shx147065 	if (status != DDI_SUCCESS)
3274128Shx147065 		return (status);
3284128Shx147065 
3294128Shx147065 	mac_init_ops(&wpi_devops, "wpi");
3304128Shx147065 	status = mod_install(&wpi_modlinkage);
3314128Shx147065 	if (status != DDI_SUCCESS) {
3324128Shx147065 		mac_fini_ops(&wpi_devops);
3334128Shx147065 		ddi_soft_state_fini(&wpi_soft_state_p);
3344128Shx147065 	}
3354128Shx147065 
3364128Shx147065 	return (status);
3374128Shx147065 }
3384128Shx147065 
3394128Shx147065 int
3404128Shx147065 _fini(void)
3414128Shx147065 {
3424128Shx147065 	int status;
3434128Shx147065 
3444128Shx147065 	status = mod_remove(&wpi_modlinkage);
3454128Shx147065 	if (status == DDI_SUCCESS) {
3464128Shx147065 		mac_fini_ops(&wpi_devops);
3474128Shx147065 		ddi_soft_state_fini(&wpi_soft_state_p);
3484128Shx147065 	}
3494128Shx147065 
3504128Shx147065 	return (status);
3514128Shx147065 }
3524128Shx147065 
3534128Shx147065 int
3544128Shx147065 _info(struct modinfo *mip)
3554128Shx147065 {
3564128Shx147065 	return (mod_info(&wpi_modlinkage, mip));
3574128Shx147065 }
3584128Shx147065 
3594128Shx147065 /*
3604128Shx147065  * Mac Call Back entries
3614128Shx147065  */
3624128Shx147065 mac_callbacks_t	wpi_m_callbacks = {
3634128Shx147065 	MC_IOCTL,
3644128Shx147065 	wpi_m_stat,
3654128Shx147065 	wpi_m_start,
3664128Shx147065 	wpi_m_stop,
3674128Shx147065 	wpi_m_promisc,
3684128Shx147065 	wpi_m_multicst,
3694128Shx147065 	wpi_m_unicst,
3704128Shx147065 	wpi_m_tx,
3714128Shx147065 	NULL,
3724128Shx147065 	wpi_m_ioctl
3734128Shx147065 };
3744128Shx147065 
3754128Shx147065 #ifdef DEBUG
3764128Shx147065 void
3774128Shx147065 wpi_dbg(uint32_t flags, const char *fmt, ...)
3784128Shx147065 {
3794128Shx147065 	va_list	ap;
3804128Shx147065 
3814128Shx147065 	if (flags & wpi_dbg_flags) {
3824128Shx147065 		va_start(ap, fmt);
3834128Shx147065 		vcmn_err(CE_NOTE, fmt, ap);
3844128Shx147065 		va_end(ap);
3854128Shx147065 	}
3864128Shx147065 }
3874128Shx147065 #endif
3884128Shx147065 /*
3894128Shx147065  * device operations
3904128Shx147065  */
3914128Shx147065 int
3924128Shx147065 wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
3934128Shx147065 {
3944128Shx147065 	wpi_sc_t		*sc;
3954128Shx147065 	ddi_acc_handle_t	cfg_handle;
3964128Shx147065 	caddr_t			cfg_base;
3974128Shx147065 	ieee80211com_t	*ic;
3984128Shx147065 	int			instance, err, i;
3994128Shx147065 	char			strbuf[32];
4004128Shx147065 	wifi_data_t		wd = { 0 };
4014128Shx147065 	mac_register_t		*macp;
4024128Shx147065 
4036062Shx147065 	switch (cmd) {
4046062Shx147065 	case DDI_ATTACH:
4056062Shx147065 		break;
4066062Shx147065 	case DDI_RESUME:
4076062Shx147065 		sc = ddi_get_soft_state(wpi_soft_state_p,
4086062Shx147065 		    ddi_get_instance(dip));
4096062Shx147065 		ASSERT(sc != NULL);
4106062Shx147065 		mutex_enter(&sc->sc_glock);
4116062Shx147065 		sc->sc_flags &= ~WPI_F_SUSPEND;
4126062Shx147065 		mutex_exit(&sc->sc_glock);
4136062Shx147065 		if (sc->sc_flags & WPI_F_RUNNING) {
4146062Shx147065 			(void) wpi_init(sc);
4156062Shx147065 			ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
4166062Shx147065 		}
4176062Shx147065 		WPI_DBG((WPI_DEBUG_RESUME, "wpi: resume \n"));
4186062Shx147065 		return (DDI_SUCCESS);
4196062Shx147065 	default:
4204128Shx147065 		err = DDI_FAILURE;
4214128Shx147065 		goto attach_fail1;
4224128Shx147065 	}
4234128Shx147065 
4244128Shx147065 	instance = ddi_get_instance(dip);
4254128Shx147065 	err = ddi_soft_state_zalloc(wpi_soft_state_p, instance);
4264128Shx147065 	if (err != DDI_SUCCESS) {
4274128Shx147065 		cmn_err(CE_WARN,
4284128Shx147065 		    "wpi_attach(): failed to allocate soft state\n");
4294128Shx147065 		goto attach_fail1;
4304128Shx147065 	}
4314128Shx147065 	sc = ddi_get_soft_state(wpi_soft_state_p, instance);
4324128Shx147065 	sc->sc_dip = dip;
4334128Shx147065 
4344128Shx147065 	err = ddi_regs_map_setup(dip, 0, &cfg_base, 0, 0,
4354128Shx147065 	    &wpi_reg_accattr, &cfg_handle);
4364128Shx147065 	if (err != DDI_SUCCESS) {
4374128Shx147065 		cmn_err(CE_WARN,
4384128Shx147065 		    "wpi_attach(): failed to map config spaces regs\n");
4394128Shx147065 		goto attach_fail2;
4404128Shx147065 	}
4414128Shx147065 	sc->sc_rev = ddi_get8(cfg_handle,
4424128Shx147065 	    (uint8_t *)(cfg_base + PCI_CONF_REVID));
4434128Shx147065 	ddi_put8(cfg_handle, (uint8_t *)(cfg_base + 0x41), 0);
4444128Shx147065 	sc->sc_clsz = ddi_get16(cfg_handle,
4454128Shx147065 	    (uint16_t *)(cfg_base + PCI_CONF_CACHE_LINESZ));
4464128Shx147065 	ddi_regs_map_free(&cfg_handle);
4474128Shx147065 	if (!sc->sc_clsz)
4484128Shx147065 		sc->sc_clsz = 16;
4494128Shx147065 	sc->sc_clsz = (sc->sc_clsz << 2);
4504128Shx147065 	sc->sc_dmabuf_sz = roundup(0x1000 + sizeof (struct ieee80211_frame) +
4514128Shx147065 	    IEEE80211_MTU + IEEE80211_CRC_LEN +
4524128Shx147065 	    (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN +
4534128Shx147065 	    IEEE80211_WEP_CRCLEN), sc->sc_clsz);
4544128Shx147065 	/*
4554128Shx147065 	 * Map operating registers
4564128Shx147065 	 */
4574128Shx147065 	err = ddi_regs_map_setup(dip, 1, &sc->sc_base,
4584128Shx147065 	    0, 0, &wpi_reg_accattr, &sc->sc_handle);
4594128Shx147065 	if (err != DDI_SUCCESS) {
4604128Shx147065 		cmn_err(CE_WARN,
4614128Shx147065 		    "wpi_attach(): failed to map device regs\n");
4624128Shx147065 		goto attach_fail2;
4634128Shx147065 	}
4644128Shx147065 
4654128Shx147065 	/*
4664128Shx147065 	 * Allocate shared page.
4674128Shx147065 	 */
4684128Shx147065 	err = wpi_alloc_shared(sc);
4694128Shx147065 	if (err != DDI_SUCCESS) {
4704128Shx147065 		cmn_err(CE_WARN, "failed to allocate shared page\n");
4714128Shx147065 		goto attach_fail3;
4724128Shx147065 	}
4734128Shx147065 
4744128Shx147065 	/*
4754128Shx147065 	 * Get the hw conf, including MAC address, then init all rings.
4764128Shx147065 	 */
4774128Shx147065 	wpi_read_eeprom(sc);
4784128Shx147065 	err = wpi_ring_init(sc);
4794128Shx147065 	if (err != DDI_SUCCESS) {
4804128Shx147065 		cmn_err(CE_WARN, "wpi_attach(): "
4814128Shx147065 		    "failed to allocate and initialize ring\n");
4824128Shx147065 		goto attach_fail4;
4834128Shx147065 	}
4844128Shx147065 
4854128Shx147065 	sc->sc_hdr = (const wpi_firmware_hdr_t *)wpi_fw_bin;
4864128Shx147065 
4874128Shx147065 	/* firmware image layout: |HDR|<--TEXT-->|<--DATA-->|<--BOOT-->| */
4884128Shx147065 	sc->sc_text = (const char *)(sc->sc_hdr + 1);
4894128Shx147065 	sc->sc_data = sc->sc_text + LE_32(sc->sc_hdr->textsz);
4904128Shx147065 	sc->sc_boot = sc->sc_data + LE_32(sc->sc_hdr->datasz);
4914128Shx147065 	err = wpi_alloc_fw_dma(sc);
4924128Shx147065 	if (err != DDI_SUCCESS) {
4934128Shx147065 		cmn_err(CE_WARN, "wpi_attach(): "
4944128Shx147065 		    "failed to allocate firmware dma\n");
4954128Shx147065 		goto attach_fail5;
4964128Shx147065 	}
4974128Shx147065 
4984128Shx147065 	/*
4994128Shx147065 	 * Initialize mutexs and condvars
5004128Shx147065 	 */
5014128Shx147065 	err = ddi_get_iblock_cookie(dip, 0, &sc->sc_iblk);
5024128Shx147065 	if (err != DDI_SUCCESS) {
5034128Shx147065 		cmn_err(CE_WARN,
5044128Shx147065 		    "wpi_attach(): failed to do ddi_get_iblock_cookie()\n");
5054128Shx147065 		goto attach_fail6;
5064128Shx147065 	}
5074128Shx147065 	mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, sc->sc_iblk);
5084128Shx147065 	mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, sc->sc_iblk);
5094128Shx147065 	cv_init(&sc->sc_fw_cv, NULL, CV_DRIVER, NULL);
5104128Shx147065 	cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL);
5114128Shx147065 	cv_init(&sc->sc_tx_cv, "tx-ring", CV_DRIVER, NULL);
5124128Shx147065 	/*
5134128Shx147065 	 * initialize the mfthread
5144128Shx147065 	 */
5154128Shx147065 	mutex_init(&sc->sc_mt_lock, NULL, MUTEX_DRIVER,
5164128Shx147065 	    (void *) sc->sc_iblk);
5174128Shx147065 	cv_init(&sc->sc_mt_cv, NULL, CV_DRIVER, NULL);
5184128Shx147065 	sc->sc_mf_thread = NULL;
5194128Shx147065 	sc->sc_mf_thread_switch = 0;
5204128Shx147065 	/*
5214128Shx147065 	 * Initialize the wifi part, which will be used by
5224128Shx147065 	 * generic layer
5234128Shx147065 	 */
5244128Shx147065 	ic = &sc->sc_ic;
5254128Shx147065 	ic->ic_phytype  = IEEE80211_T_OFDM;
5264128Shx147065 	ic->ic_opmode   = IEEE80211_M_STA; /* default to BSS mode */
5274128Shx147065 	ic->ic_state    = IEEE80211_S_INIT;
5284128Shx147065 	ic->ic_maxrssi  = 70; /* experimental number */
5294128Shx147065 	ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
5304499Shx147065 	    IEEE80211_C_PMGT | IEEE80211_C_SHSLOT;
5314128Shx147065 
5325296Szf162725 	/*
5335296Szf162725 	 * use software WEP and TKIP, hardware CCMP;
5345296Szf162725 	 */
5355296Szf162725 	ic->ic_caps |= IEEE80211_C_AES_CCM;
5365296Szf162725 	ic->ic_caps |= IEEE80211_C_WPA; /* Support WPA/WPA2 */
5375296Szf162725 
5384128Shx147065 	/* set supported .11b and .11g rates */
5394128Shx147065 	ic->ic_sup_rates[IEEE80211_MODE_11B] = wpi_rateset_11b;
5404128Shx147065 	ic->ic_sup_rates[IEEE80211_MODE_11G] = wpi_rateset_11g;
5414128Shx147065 
5424128Shx147065 	/* set supported .11b and .11g channels (1 through 14) */
5434128Shx147065 	for (i = 1; i <= 14; i++) {
5444128Shx147065 		ic->ic_sup_channels[i].ich_freq =
5454128Shx147065 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
5464128Shx147065 		ic->ic_sup_channels[i].ich_flags =
5474128Shx147065 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
5484128Shx147065 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
5494128Shx147065 	}
5504128Shx147065 	ic->ic_ibss_chan = &ic->ic_sup_channels[0];
5514128Shx147065 	ic->ic_xmit = wpi_send;
5524128Shx147065 	/*
5534128Shx147065 	 * init Wifi layer
5544128Shx147065 	 */
5554128Shx147065 	ieee80211_attach(ic);
5564128Shx147065 
5575296Szf162725 	/* register WPA door */
5585296Szf162725 	ieee80211_register_door(ic, ddi_driver_name(dip),
5595296Szf162725 	    ddi_get_instance(dip));
5605296Szf162725 
5614128Shx147065 	/*
5624128Shx147065 	 * Override 80211 default routines
5634128Shx147065 	 */
5644128Shx147065 	sc->sc_newstate = ic->ic_newstate;
5654128Shx147065 	ic->ic_newstate = wpi_newstate;
5664128Shx147065 	ic->ic_node_alloc = wpi_node_alloc;
5674128Shx147065 	ic->ic_node_free = wpi_node_free;
5685296Szf162725 	ic->ic_crypto.cs_key_set = wpi_key_set;
5694128Shx147065 	ieee80211_media_init(ic);
5704128Shx147065 	/*
5714128Shx147065 	 * initialize default tx key
5724128Shx147065 	 */
5734128Shx147065 	ic->ic_def_txkey = 0;
5744128Shx147065 
5754128Shx147065 	err = ddi_add_softintr(dip, DDI_SOFTINT_LOW,
5764128Shx147065 	    &sc->sc_notif_softint_id, &sc->sc_iblk, NULL, wpi_notif_softintr,
5774128Shx147065 	    (caddr_t)sc);
5784128Shx147065 	if (err != DDI_SUCCESS) {
5794128Shx147065 		cmn_err(CE_WARN,
5804128Shx147065 		    "wpi_attach(): failed to do ddi_add_softintr()\n");
5814128Shx147065 		goto attach_fail7;
5824128Shx147065 	}
5834128Shx147065 
5844128Shx147065 	/*
5854128Shx147065 	 * Add the interrupt handler
5864128Shx147065 	 */
5874128Shx147065 	err = ddi_add_intr(dip, 0, &sc->sc_iblk, NULL,
5884128Shx147065 	    wpi_intr, (caddr_t)sc);
5894128Shx147065 	if (err != DDI_SUCCESS) {
5904128Shx147065 		cmn_err(CE_WARN,
5914128Shx147065 		    "wpi_attach(): failed to do ddi_add_intr()\n");
5924128Shx147065 		goto attach_fail8;
5934128Shx147065 	}
5944128Shx147065 
5954128Shx147065 	/*
5964128Shx147065 	 * Initialize pointer to device specific functions
5974128Shx147065 	 */
5984128Shx147065 	wd.wd_secalloc = WIFI_SEC_NONE;
5994128Shx147065 	wd.wd_opmode = ic->ic_opmode;
6004128Shx147065 	IEEE80211_ADDR_COPY(wd.wd_bssid, ic->ic_macaddr);
6014128Shx147065 
6024128Shx147065 	macp = mac_alloc(MAC_VERSION);
6034128Shx147065 	if (err != DDI_SUCCESS) {
6044128Shx147065 		cmn_err(CE_WARN,
6054128Shx147065 		    "wpi_attach(): failed to do mac_alloc()\n");
6064128Shx147065 		goto attach_fail9;
6074128Shx147065 	}
6084128Shx147065 
6094128Shx147065 	macp->m_type_ident	= MAC_PLUGIN_IDENT_WIFI;
6104128Shx147065 	macp->m_driver		= sc;
6114128Shx147065 	macp->m_dip		= dip;
6124128Shx147065 	macp->m_src_addr	= ic->ic_macaddr;
6134128Shx147065 	macp->m_callbacks	= &wpi_m_callbacks;
6144128Shx147065 	macp->m_min_sdu		= 0;
6154128Shx147065 	macp->m_max_sdu		= IEEE80211_MTU;
6164128Shx147065 	macp->m_pdata		= &wd;
6174128Shx147065 	macp->m_pdata_size	= sizeof (wd);
6184128Shx147065 
6194128Shx147065 	/*
6204128Shx147065 	 * Register the macp to mac
6214128Shx147065 	 */
6224128Shx147065 	err = mac_register(macp, &ic->ic_mach);
6234128Shx147065 	mac_free(macp);
6244128Shx147065 	if (err != DDI_SUCCESS) {
6254128Shx147065 		cmn_err(CE_WARN,
6264128Shx147065 		    "wpi_attach(): failed to do mac_register()\n");
6274128Shx147065 		goto attach_fail9;
6284128Shx147065 	}
6294128Shx147065 
6304128Shx147065 	/*
6314128Shx147065 	 * Create minor node of type DDI_NT_NET_WIFI
6324128Shx147065 	 */
6334128Shx147065 	(void) snprintf(strbuf, sizeof (strbuf), "wpi%d", instance);
6344128Shx147065 	err = ddi_create_minor_node(dip, strbuf, S_IFCHR,
6354128Shx147065 	    instance + 1, DDI_NT_NET_WIFI, 0);
6364128Shx147065 	if (err != DDI_SUCCESS)
6374128Shx147065 		cmn_err(CE_WARN,
6384128Shx147065 		    "wpi_attach(): failed to do ddi_create_minor_node()\n");
6394128Shx147065 
6404128Shx147065 	/*
6414128Shx147065 	 * Notify link is down now
6424128Shx147065 	 */
6434128Shx147065 	mac_link_update(ic->ic_mach, LINK_STATE_DOWN);
6444128Shx147065 
6454128Shx147065 	/*
6464128Shx147065 	 * create the mf thread to handle the link status,
6474128Shx147065 	 * recovery fatal error, etc.
6484128Shx147065 	 */
6494128Shx147065 
6504128Shx147065 	sc->sc_mf_thread_switch = 1;
6514128Shx147065 	if (sc->sc_mf_thread == NULL)
6524128Shx147065 		sc->sc_mf_thread = thread_create((caddr_t)NULL, 0,
6534128Shx147065 		    wpi_thread, sc, 0, &p0, TS_RUN, minclsyspri);
6544128Shx147065 
6554128Shx147065 	sc->sc_flags |= WPI_F_ATTACHED;
6564128Shx147065 
6574128Shx147065 	return (DDI_SUCCESS);
6584128Shx147065 attach_fail9:
6594128Shx147065 	ddi_remove_intr(dip, 0, sc->sc_iblk);
6604128Shx147065 attach_fail8:
6614128Shx147065 	ddi_remove_softintr(sc->sc_notif_softint_id);
6624128Shx147065 	sc->sc_notif_softint_id = NULL;
6634128Shx147065 attach_fail7:
6644128Shx147065 	ieee80211_detach(ic);
6654128Shx147065 	wpi_destroy_locks(sc);
6664128Shx147065 attach_fail6:
6674128Shx147065 	wpi_free_fw_dma(sc);
6684128Shx147065 attach_fail5:
6694128Shx147065 	wpi_ring_free(sc);
6704128Shx147065 attach_fail4:
6714128Shx147065 	wpi_free_shared(sc);
6724128Shx147065 attach_fail3:
6734128Shx147065 	ddi_regs_map_free(&sc->sc_handle);
6744128Shx147065 attach_fail2:
6754128Shx147065 	ddi_soft_state_free(wpi_soft_state_p, instance);
6764128Shx147065 attach_fail1:
6774128Shx147065 	return (err);
6784128Shx147065 }
6794128Shx147065 
6804128Shx147065 int
6814128Shx147065 wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
6824128Shx147065 {
6834128Shx147065 	wpi_sc_t	*sc;
6844128Shx147065 	int err;
6854128Shx147065 
6864128Shx147065 	sc = ddi_get_soft_state(wpi_soft_state_p, ddi_get_instance(dip));
6874128Shx147065 	ASSERT(sc != NULL);
6884128Shx147065 
6896062Shx147065 	switch (cmd) {
6906062Shx147065 	case DDI_DETACH:
6916062Shx147065 		break;
6926062Shx147065 	case DDI_SUSPEND:
6936062Shx147065 		if (sc->sc_flags & WPI_F_RUNNING) {
6946062Shx147065 			wpi_stop(sc);
6956062Shx147065 		}
6966062Shx147065 		mutex_enter(&sc->sc_glock);
6976062Shx147065 		sc->sc_flags |= WPI_F_SUSPEND;
6986062Shx147065 		mutex_exit(&sc->sc_glock);
6996062Shx147065 		WPI_DBG((WPI_DEBUG_RESUME, "wpi: suspend \n"));
7006062Shx147065 		return (DDI_SUCCESS);
7016062Shx147065 	default:
7024128Shx147065 		return (DDI_FAILURE);
7036062Shx147065 	}
7044128Shx147065 	if (!(sc->sc_flags & WPI_F_ATTACHED))
7054128Shx147065 		return (DDI_FAILURE);
7064128Shx147065 
7074128Shx147065 	/*
7084128Shx147065 	 * Destroy the mf_thread
7094128Shx147065 	 */
7104128Shx147065 	mutex_enter(&sc->sc_mt_lock);
7114128Shx147065 	sc->sc_mf_thread_switch = 0;
7124128Shx147065 	while (sc->sc_mf_thread != NULL) {
7134128Shx147065 		if (cv_wait_sig(&sc->sc_mt_cv, &sc->sc_mt_lock) == 0)
7144128Shx147065 			break;
7154128Shx147065 	}
7164128Shx147065 	mutex_exit(&sc->sc_mt_lock);
7174128Shx147065 
7184128Shx147065 	wpi_stop(sc);
7194128Shx147065 
7204128Shx147065 	/*
7214128Shx147065 	 * Unregiste from the MAC layer subsystem
7224128Shx147065 	 */
7234128Shx147065 	err = mac_unregister(sc->sc_ic.ic_mach);
7244128Shx147065 	if (err != DDI_SUCCESS)
7254128Shx147065 		return (err);
7264128Shx147065 
7274128Shx147065 	mutex_enter(&sc->sc_glock);
7284128Shx147065 	wpi_free_fw_dma(sc);
7294128Shx147065 	wpi_ring_free(sc);
7304128Shx147065 	wpi_free_shared(sc);
7314128Shx147065 	mutex_exit(&sc->sc_glock);
7324128Shx147065 
7334128Shx147065 	ddi_remove_intr(dip, 0, sc->sc_iblk);
7344128Shx147065 	ddi_remove_softintr(sc->sc_notif_softint_id);
7354128Shx147065 	sc->sc_notif_softint_id = NULL;
7364128Shx147065 
7374128Shx147065 	/*
7384128Shx147065 	 * detach ieee80211
7394128Shx147065 	 */
7404128Shx147065 	ieee80211_detach(&sc->sc_ic);
7414128Shx147065 
7424128Shx147065 	wpi_destroy_locks(sc);
7434128Shx147065 
7444128Shx147065 	ddi_regs_map_free(&sc->sc_handle);
7454128Shx147065 	ddi_remove_minor_node(dip, NULL);
7464128Shx147065 	ddi_soft_state_free(wpi_soft_state_p, ddi_get_instance(dip));
7474128Shx147065 
7484128Shx147065 	return (DDI_SUCCESS);
7494128Shx147065 }
7504128Shx147065 
7514128Shx147065 static void
7524128Shx147065 wpi_destroy_locks(wpi_sc_t *sc)
7534128Shx147065 {
7544128Shx147065 	cv_destroy(&sc->sc_mt_cv);
7554128Shx147065 	mutex_destroy(&sc->sc_mt_lock);
7564128Shx147065 	cv_destroy(&sc->sc_tx_cv);
7574128Shx147065 	cv_destroy(&sc->sc_cmd_cv);
7584128Shx147065 	cv_destroy(&sc->sc_fw_cv);
7594128Shx147065 	mutex_destroy(&sc->sc_tx_lock);
7604128Shx147065 	mutex_destroy(&sc->sc_glock);
7614128Shx147065 }
7624128Shx147065 
7634128Shx147065 /*
7644128Shx147065  * Allocate an area of memory and a DMA handle for accessing it
7654128Shx147065  */
7664128Shx147065 static int
7674128Shx147065 wpi_alloc_dma_mem(wpi_sc_t *sc, size_t memsize, ddi_dma_attr_t *dma_attr_p,
7684128Shx147065 	ddi_device_acc_attr_t *acc_attr_p, uint_t dma_flags, wpi_dma_t *dma_p)
7694128Shx147065 {
7704128Shx147065 	caddr_t vaddr;
7714128Shx147065 	int err;
7724128Shx147065 
7734128Shx147065 	/*
7744128Shx147065 	 * Allocate handle
7754128Shx147065 	 */
7764128Shx147065 	err = ddi_dma_alloc_handle(sc->sc_dip, dma_attr_p,
7774499Shx147065 	    DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl);
7784128Shx147065 	if (err != DDI_SUCCESS) {
7794128Shx147065 		dma_p->dma_hdl = NULL;
7804128Shx147065 		return (DDI_FAILURE);
7814128Shx147065 	}
7824128Shx147065 
7834128Shx147065 	/*
7844128Shx147065 	 * Allocate memory
7854128Shx147065 	 */
7864128Shx147065 	err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, acc_attr_p,
7874128Shx147065 	    dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING),
7884128Shx147065 	    DDI_DMA_SLEEP, NULL, &vaddr, &dma_p->alength, &dma_p->acc_hdl);
7894128Shx147065 	if (err != DDI_SUCCESS) {
7904128Shx147065 		ddi_dma_free_handle(&dma_p->dma_hdl);
7914128Shx147065 		dma_p->dma_hdl = NULL;
7924128Shx147065 		dma_p->acc_hdl = NULL;
7934128Shx147065 		return (DDI_FAILURE);
7944128Shx147065 	}
7954128Shx147065 
7964128Shx147065 	/*
7974128Shx147065 	 * Bind the two together
7984128Shx147065 	 */
7994128Shx147065 	dma_p->mem_va = vaddr;
8004128Shx147065 	err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL,
8014128Shx147065 	    vaddr, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL,
8024128Shx147065 	    &dma_p->cookie, &dma_p->ncookies);
8034128Shx147065 	if (err != DDI_DMA_MAPPED) {
8044128Shx147065 		ddi_dma_mem_free(&dma_p->acc_hdl);
8054128Shx147065 		ddi_dma_free_handle(&dma_p->dma_hdl);
8064128Shx147065 		dma_p->acc_hdl = NULL;
8074128Shx147065 		dma_p->dma_hdl = NULL;
8084128Shx147065 		return (DDI_FAILURE);
8094128Shx147065 	}
8104128Shx147065 
8114128Shx147065 	dma_p->nslots = ~0U;
8124128Shx147065 	dma_p->size = ~0U;
8134128Shx147065 	dma_p->token = ~0U;
8144128Shx147065 	dma_p->offset = 0;
8154128Shx147065 	return (DDI_SUCCESS);
8164128Shx147065 }
8174128Shx147065 
8184128Shx147065 /*
8194128Shx147065  * Free one allocated area of DMAable memory
8204128Shx147065  */
8214128Shx147065 static void
8224128Shx147065 wpi_free_dma_mem(wpi_dma_t *dma_p)
8234128Shx147065 {
8244128Shx147065 	if (dma_p->dma_hdl != NULL) {
8254128Shx147065 		if (dma_p->ncookies) {
8264128Shx147065 			(void) ddi_dma_unbind_handle(dma_p->dma_hdl);
8274128Shx147065 			dma_p->ncookies = 0;
8284128Shx147065 		}
8294128Shx147065 		ddi_dma_free_handle(&dma_p->dma_hdl);
8304128Shx147065 		dma_p->dma_hdl = NULL;
8314128Shx147065 	}
8324128Shx147065 
8334128Shx147065 	if (dma_p->acc_hdl != NULL) {
8344128Shx147065 		ddi_dma_mem_free(&dma_p->acc_hdl);
8354128Shx147065 		dma_p->acc_hdl = NULL;
8364128Shx147065 	}
8374128Shx147065 }
8384128Shx147065 
8394128Shx147065 /*
8404128Shx147065  * Allocate an area of dma memory for firmware load.
8414128Shx147065  * Idealy, this allocation should be a one time action, that is,
8424128Shx147065  * the memory will be freed after the firmware is uploaded to the
8434128Shx147065  * card. but since a recovery mechanism for the fatal firmware need
8444128Shx147065  * reload the firmware, and re-allocate dma at run time may be failed,
8454128Shx147065  * so we allocate it at attach and keep it in the whole lifecycle of
8464128Shx147065  * the driver.
8474128Shx147065  */
8484128Shx147065 static int
8494128Shx147065 wpi_alloc_fw_dma(wpi_sc_t *sc)
8504128Shx147065 {
8514128Shx147065 	int i, err = DDI_SUCCESS;
8524128Shx147065 	wpi_dma_t *dma_p;
8534128Shx147065 
8544128Shx147065 	err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->textsz),
8554128Shx147065 	    &fw_buffer_dma_attr, &wpi_dma_accattr,
8564128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
8574128Shx147065 	    &sc->sc_dma_fw_text);
8584128Shx147065 	dma_p = &sc->sc_dma_fw_text;
8594128Shx147065 	WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n",
8604128Shx147065 	    dma_p->ncookies, dma_p->cookie.dmac_address,
8614128Shx147065 	    dma_p->cookie.dmac_size));
8624128Shx147065 	if (err != DDI_SUCCESS) {
8634128Shx147065 		cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc"
8644128Shx147065 		    "text dma memory");
8654128Shx147065 		goto fail;
8664128Shx147065 	}
8674128Shx147065 	for (i = 0; i < dma_p->ncookies; i++) {
8684128Shx147065 		sc->sc_fw_text_cookie[i] = dma_p->cookie;
8694128Shx147065 		ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie);
8704128Shx147065 	}
8714128Shx147065 	err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz),
8724128Shx147065 	    &fw_buffer_dma_attr, &wpi_dma_accattr,
8734128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
8744128Shx147065 	    &sc->sc_dma_fw_data);
8754128Shx147065 	dma_p = &sc->sc_dma_fw_data;
8764128Shx147065 	WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n",
8774128Shx147065 	    dma_p->ncookies, dma_p->cookie.dmac_address,
8784128Shx147065 	    dma_p->cookie.dmac_size));
8794128Shx147065 	if (err != DDI_SUCCESS) {
8804128Shx147065 		cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc"
8814128Shx147065 		    "data dma memory");
8824128Shx147065 		goto fail;
8834128Shx147065 	}
8844128Shx147065 	for (i = 0; i < dma_p->ncookies; i++) {
8854128Shx147065 		sc->sc_fw_data_cookie[i] = dma_p->cookie;
8864128Shx147065 		ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie);
8874128Shx147065 	}
8884128Shx147065 fail:
8894128Shx147065 	return (err);
8904128Shx147065 }
8914128Shx147065 
8924128Shx147065 static void
8934128Shx147065 wpi_free_fw_dma(wpi_sc_t *sc)
8944128Shx147065 {
8954128Shx147065 	wpi_free_dma_mem(&sc->sc_dma_fw_text);
8964128Shx147065 	wpi_free_dma_mem(&sc->sc_dma_fw_data);
8974128Shx147065 }
8984128Shx147065 
8994128Shx147065 /*
9004128Shx147065  * Allocate a shared page between host and NIC.
9014128Shx147065  */
9024128Shx147065 static int
9034128Shx147065 wpi_alloc_shared(wpi_sc_t *sc)
9044128Shx147065 {
9054128Shx147065 	int err = DDI_SUCCESS;
9064128Shx147065 
9074128Shx147065 	/* must be aligned on a 4K-page boundary */
9084128Shx147065 	err = wpi_alloc_dma_mem(sc, sizeof (wpi_shared_t),
9094128Shx147065 	    &sh_dma_attr, &wpi_dma_accattr,
9104128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
9114128Shx147065 	    &sc->sc_dma_sh);
9124128Shx147065 	if (err != DDI_SUCCESS)
9134128Shx147065 		goto fail;
9144128Shx147065 	sc->sc_shared = (wpi_shared_t *)sc->sc_dma_sh.mem_va;
9154128Shx147065 	return (err);
9164128Shx147065 
9174128Shx147065 fail:
9184128Shx147065 	wpi_free_shared(sc);
9194128Shx147065 	return (err);
9204128Shx147065 }
9214128Shx147065 
9224128Shx147065 static void
9234128Shx147065 wpi_free_shared(wpi_sc_t *sc)
9244128Shx147065 {
9254128Shx147065 	wpi_free_dma_mem(&sc->sc_dma_sh);
9264128Shx147065 }
9274128Shx147065 
9284128Shx147065 static int
9294128Shx147065 wpi_alloc_rx_ring(wpi_sc_t *sc)
9304128Shx147065 {
9314128Shx147065 	wpi_rx_ring_t *ring;
9324128Shx147065 	wpi_rx_data_t *data;
9334128Shx147065 	int i, err = DDI_SUCCESS;
9344128Shx147065 
9354128Shx147065 	ring = &sc->sc_rxq;
9364128Shx147065 	ring->cur = 0;
9374128Shx147065 
9384128Shx147065 	err = wpi_alloc_dma_mem(sc, WPI_RX_RING_COUNT * sizeof (uint32_t),
9394128Shx147065 	    &ring_desc_dma_attr, &wpi_dma_accattr,
9404128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
9414128Shx147065 	    &ring->dma_desc);
9424128Shx147065 	if (err != DDI_SUCCESS) {
9434128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring desc failed\n"));
9444128Shx147065 		goto fail;
9454128Shx147065 	}
9464128Shx147065 	ring->desc = (uint32_t *)ring->dma_desc.mem_va;
9474128Shx147065 
9484128Shx147065 	/*
9494128Shx147065 	 * Allocate Rx buffers.
9504128Shx147065 	 */
9514128Shx147065 	for (i = 0; i < WPI_RX_RING_COUNT; i++) {
9524128Shx147065 		data = &ring->data[i];
9534128Shx147065 		err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz,
9544128Shx147065 		    &rx_buffer_dma_attr, &wpi_dma_accattr,
9554128Shx147065 		    DDI_DMA_READ | DDI_DMA_STREAMING,
9564128Shx147065 		    &data->dma_data);
9574128Shx147065 		if (err != DDI_SUCCESS) {
9584128Shx147065 			WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring buf[%d] "
9594128Shx147065 			    "failed\n", i));
9604128Shx147065 			goto fail;
9614128Shx147065 		}
9624128Shx147065 
9634128Shx147065 		ring->desc[i] = LE_32(data->dma_data.cookie.dmac_address);
9644128Shx147065 	}
9654128Shx147065 
9664128Shx147065 	WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
9674128Shx147065 
9684128Shx147065 	return (err);
9694128Shx147065 
9704128Shx147065 fail:
9714128Shx147065 	wpi_free_rx_ring(sc);
9724128Shx147065 	return (err);
9734128Shx147065 }
9744128Shx147065 
9754128Shx147065 static void
9764128Shx147065 wpi_reset_rx_ring(wpi_sc_t *sc)
9774128Shx147065 {
9784128Shx147065 	int ntries;
9794128Shx147065 
9804128Shx147065 	wpi_mem_lock(sc);
9814128Shx147065 
9824128Shx147065 	WPI_WRITE(sc, WPI_RX_CONFIG, 0);
9834128Shx147065 	for (ntries = 0; ntries < 2000; ntries++) {
9844128Shx147065 		if (WPI_READ(sc, WPI_RX_STATUS) & WPI_RX_IDLE)
9854128Shx147065 			break;
9864128Shx147065 		DELAY(1000);
9874128Shx147065 	}
9884128Shx147065 #ifdef DEBUG
9894128Shx147065 	if (ntries == 2000)
9904128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Rx ring\n"));
9914128Shx147065 #endif
9924128Shx147065 	wpi_mem_unlock(sc);
9934128Shx147065 
9944128Shx147065 	sc->sc_rxq.cur = 0;
9954128Shx147065 }
9964128Shx147065 
9974128Shx147065 static void
9984128Shx147065 wpi_free_rx_ring(wpi_sc_t *sc)
9994128Shx147065 {
10004128Shx147065 	int i;
10014128Shx147065 
10024128Shx147065 	for (i = 0; i < WPI_RX_RING_COUNT; i++) {
10034128Shx147065 		if (sc->sc_rxq.data[i].dma_data.dma_hdl)
10044128Shx147065 			WPI_DMA_SYNC(sc->sc_rxq.data[i].dma_data,
10054128Shx147065 			    DDI_DMA_SYNC_FORCPU);
10064128Shx147065 		wpi_free_dma_mem(&sc->sc_rxq.data[i].dma_data);
10074128Shx147065 	}
10084128Shx147065 
10094128Shx147065 	if (sc->sc_rxq.dma_desc.dma_hdl)
10104128Shx147065 		WPI_DMA_SYNC(sc->sc_rxq.dma_desc, DDI_DMA_SYNC_FORDEV);
10114128Shx147065 	wpi_free_dma_mem(&sc->sc_rxq.dma_desc);
10124128Shx147065 }
10134128Shx147065 
10144128Shx147065 static int
10154128Shx147065 wpi_alloc_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring, int count, int qid)
10164128Shx147065 {
10174128Shx147065 	wpi_tx_data_t *data;
10184128Shx147065 	wpi_tx_desc_t *desc_h;
10194128Shx147065 	uint32_t paddr_desc_h;
10204128Shx147065 	wpi_tx_cmd_t *cmd_h;
10214128Shx147065 	uint32_t paddr_cmd_h;
10224128Shx147065 	int i, err = DDI_SUCCESS;
10234128Shx147065 
10244128Shx147065 	ring->qid = qid;
10254128Shx147065 	ring->count = count;
10264128Shx147065 	ring->queued = 0;
10274128Shx147065 	ring->cur = 0;
10284128Shx147065 
10294128Shx147065 	err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_desc_t),
10304128Shx147065 	    &ring_desc_dma_attr, &wpi_dma_accattr,
10314128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
10324128Shx147065 	    &ring->dma_desc);
10334128Shx147065 	if (err != DDI_SUCCESS) {
10344128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring desc[%d] failed\n",
10354128Shx147065 		    qid));
10364128Shx147065 		goto fail;
10374128Shx147065 	}
10384128Shx147065 
10394128Shx147065 	/* update shared page with ring's base address */
10404128Shx147065 	sc->sc_shared->txbase[qid] = ring->dma_desc.cookie.dmac_address;
10414128Shx147065 
10424128Shx147065 	desc_h = (wpi_tx_desc_t *)ring->dma_desc.mem_va;
10434128Shx147065 	paddr_desc_h = ring->dma_desc.cookie.dmac_address;
10444128Shx147065 
10454128Shx147065 	err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_cmd_t),
10464128Shx147065 	    &tx_cmd_dma_attr, &wpi_dma_accattr,
10474128Shx147065 	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
10484128Shx147065 	    &ring->dma_cmd);
10494128Shx147065 	if (err != DDI_SUCCESS) {
10504128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring cmd[%d] failed\n",
10514128Shx147065 		    qid));
10524128Shx147065 		goto fail;
10534128Shx147065 	}
10544128Shx147065 
10554128Shx147065 	cmd_h = (wpi_tx_cmd_t *)ring->dma_cmd.mem_va;
10564128Shx147065 	paddr_cmd_h = ring->dma_cmd.cookie.dmac_address;
10574128Shx147065 
10584128Shx147065 	/*
10594128Shx147065 	 * Allocate Tx buffers.
10604128Shx147065 	 */
10614128Shx147065 	ring->data = kmem_zalloc(sizeof (wpi_tx_data_t) * count, KM_NOSLEEP);
10624128Shx147065 	if (ring->data == NULL) {
10634128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "could not allocate tx data slots\n"));
10644128Shx147065 		goto fail;
10654128Shx147065 	}
10664128Shx147065 
10674128Shx147065 	for (i = 0; i < count; i++) {
10684128Shx147065 		data = &ring->data[i];
10694128Shx147065 		err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz,
10704128Shx147065 		    &tx_buffer_dma_attr, &wpi_dma_accattr,
10714128Shx147065 		    DDI_DMA_WRITE | DDI_DMA_STREAMING,
10724128Shx147065 		    &data->dma_data);
10734128Shx147065 		if (err != DDI_SUCCESS) {
10744128Shx147065 			WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring buf[%d] "
10754128Shx147065 			    "failed\n", i));
10764128Shx147065 			goto fail;
10774128Shx147065 		}
10784128Shx147065 
10794128Shx147065 		data->desc = desc_h + i;
10804128Shx147065 		data->paddr_desc = paddr_desc_h +
1081*6990Sgd78059 		    ((uintptr_t)data->desc - (uintptr_t)desc_h);
10824128Shx147065 		data->cmd = cmd_h + i;
10834128Shx147065 		data->paddr_cmd = paddr_cmd_h +
1084*6990Sgd78059 		    ((uintptr_t)data->cmd - (uintptr_t)cmd_h);
10854128Shx147065 	}
10864128Shx147065 
10874128Shx147065 	return (err);
10884128Shx147065 
10894128Shx147065 fail:
10904128Shx147065 	if (ring->data)
10914128Shx147065 		kmem_free(ring->data, sizeof (wpi_tx_data_t) * count);
10924128Shx147065 	wpi_free_tx_ring(sc, ring);
10934128Shx147065 	return (err);
10944128Shx147065 }
10954128Shx147065 
10964128Shx147065 static void
10974128Shx147065 wpi_reset_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring)
10984128Shx147065 {
10994128Shx147065 	wpi_tx_data_t *data;
11004128Shx147065 	int i, ntries;
11014128Shx147065 
11024128Shx147065 	wpi_mem_lock(sc);
11034128Shx147065 
11044128Shx147065 	WPI_WRITE(sc, WPI_TX_CONFIG(ring->qid), 0);
11054128Shx147065 	for (ntries = 0; ntries < 100; ntries++) {
11064128Shx147065 		if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(ring->qid))
11074128Shx147065 			break;
11084128Shx147065 		DELAY(10);
11094128Shx147065 	}
11104128Shx147065 #ifdef DEBUG
11114128Shx147065 	if (ntries == 100 && wpi_dbg_flags > 0) {
11124128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Tx ring %d\n",
11134128Shx147065 		    ring->qid));
11144128Shx147065 	}
11154128Shx147065 #endif
11164128Shx147065 	wpi_mem_unlock(sc);
11174128Shx147065 
11184128Shx147065 	for (i = 0; i < ring->count; i++) {
11194128Shx147065 		data = &ring->data[i];
11204128Shx147065 		WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
11214128Shx147065 	}
11224128Shx147065 
11234128Shx147065 	ring->queued = 0;
11244128Shx147065 	ring->cur = 0;
11254128Shx147065 }
11264128Shx147065 
11274128Shx147065 /*ARGSUSED*/
11284128Shx147065 static void
11294128Shx147065 wpi_free_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring)
11304128Shx147065 {
11314128Shx147065 	int i;
11324128Shx147065 
11334128Shx147065 	if (ring->dma_desc.dma_hdl != NULL)
11344128Shx147065 		WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
11354128Shx147065 	wpi_free_dma_mem(&ring->dma_desc);
11364128Shx147065 
11374128Shx147065 	if (ring->dma_cmd.dma_hdl != NULL)
11384128Shx147065 		WPI_DMA_SYNC(ring->dma_cmd, DDI_DMA_SYNC_FORDEV);
11394128Shx147065 	wpi_free_dma_mem(&ring->dma_cmd);
11404128Shx147065 
11414128Shx147065 	if (ring->data != NULL) {
11424128Shx147065 		for (i = 0; i < ring->count; i++) {
11434128Shx147065 			if (ring->data[i].dma_data.dma_hdl)
11444128Shx147065 				WPI_DMA_SYNC(ring->data[i].dma_data,
11454128Shx147065 				    DDI_DMA_SYNC_FORDEV);
11464128Shx147065 			wpi_free_dma_mem(&ring->data[i].dma_data);
11474128Shx147065 		}
11484128Shx147065 		kmem_free(ring->data, ring->count * sizeof (wpi_tx_data_t));
11494128Shx147065 	}
11504128Shx147065 }
11514128Shx147065 
11524128Shx147065 static int
11534128Shx147065 wpi_ring_init(wpi_sc_t *sc)
11544128Shx147065 {
11554128Shx147065 	int i, err = DDI_SUCCESS;
11564128Shx147065 
11574128Shx147065 	for (i = 0; i < 4; i++) {
11584128Shx147065 		err = wpi_alloc_tx_ring(sc, &sc->sc_txq[i], WPI_TX_RING_COUNT,
11594128Shx147065 		    i);
11604128Shx147065 		if (err != DDI_SUCCESS)
11614128Shx147065 			goto fail;
11624128Shx147065 	}
11634128Shx147065 	err = wpi_alloc_tx_ring(sc, &sc->sc_cmdq, WPI_CMD_RING_COUNT, 4);
11644128Shx147065 	if (err != DDI_SUCCESS)
11654128Shx147065 		goto fail;
11664128Shx147065 	err = wpi_alloc_tx_ring(sc, &sc->sc_svcq, WPI_SVC_RING_COUNT, 5);
11674128Shx147065 	if (err != DDI_SUCCESS)
11684128Shx147065 		goto fail;
11694128Shx147065 	err = wpi_alloc_rx_ring(sc);
11704128Shx147065 	if (err != DDI_SUCCESS)
11714128Shx147065 		goto fail;
11724128Shx147065 	return (err);
11734128Shx147065 
11744128Shx147065 fail:
11754128Shx147065 	return (err);
11764128Shx147065 }
11774128Shx147065 
11784128Shx147065 static void
11794128Shx147065 wpi_ring_free(wpi_sc_t *sc)
11804128Shx147065 {
11814128Shx147065 	int i = 4;
11824128Shx147065 
11834128Shx147065 	wpi_free_rx_ring(sc);
11844128Shx147065 	wpi_free_tx_ring(sc, &sc->sc_svcq);
11854128Shx147065 	wpi_free_tx_ring(sc, &sc->sc_cmdq);
11864128Shx147065 	while (--i >= 0) {
11874128Shx147065 		wpi_free_tx_ring(sc, &sc->sc_txq[i]);
11884128Shx147065 	}
11894128Shx147065 }
11904128Shx147065 
11914128Shx147065 /* ARGSUSED */
11924128Shx147065 static ieee80211_node_t *
11934128Shx147065 wpi_node_alloc(ieee80211com_t *ic)
11944128Shx147065 {
11954128Shx147065 	wpi_amrr_t *amrr;
11964128Shx147065 
11974128Shx147065 	amrr = kmem_zalloc(sizeof (wpi_amrr_t), KM_SLEEP);
11984128Shx147065 	if (amrr != NULL)
11994128Shx147065 		wpi_amrr_init(amrr);
12004128Shx147065 	return (&amrr->in);
12014128Shx147065 }
12024128Shx147065 
12034128Shx147065 static void
12044128Shx147065 wpi_node_free(ieee80211_node_t *in)
12054128Shx147065 {
12064128Shx147065 	ieee80211com_t *ic = in->in_ic;
12074128Shx147065 
12084128Shx147065 	ic->ic_node_cleanup(in);
12095296Szf162725 	if (in->in_wpa_ie != NULL)
12105296Szf162725 		ieee80211_free(in->in_wpa_ie);
12114128Shx147065 	kmem_free(in, sizeof (wpi_amrr_t));
12124128Shx147065 }
12134128Shx147065 
12144128Shx147065 /*ARGSUSED*/
12154128Shx147065 static int
12164128Shx147065 wpi_newstate(ieee80211com_t *ic, enum ieee80211_state nstate, int arg)
12174128Shx147065 {
12184128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)ic;
12194128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
12205453Shx147065 	enum ieee80211_state ostate;
12214128Shx147065 	int i, err = WPI_SUCCESS;
12224128Shx147065 
12234128Shx147065 	mutex_enter(&sc->sc_glock);
12244128Shx147065 	switch (nstate) {
12254128Shx147065 	case IEEE80211_S_SCAN:
12265453Shx147065 		ostate = ic->ic_state;
12275453Shx147065 		switch (ostate) {
12285453Shx147065 		default:
12295453Shx147065 			break;
12305453Shx147065 		case IEEE80211_S_INIT:
12315453Shx147065 			/* make the link LED blink while we're scanning */
12325453Shx147065 			wpi_set_led(sc, WPI_LED_LINK, 20, 2);
12335453Shx147065 
12345453Shx147065 			ic->ic_flags |= IEEE80211_F_SCAN | IEEE80211_F_ASCAN;
12355453Shx147065 			if ((err = wpi_scan(sc)) != 0) {
12365453Shx147065 				WPI_DBG((WPI_DEBUG_80211,
12375453Shx147065 				    "could not initiate scan\n"));
12385453Shx147065 				ic->ic_flags &= ~(IEEE80211_F_SCAN |
12395453Shx147065 				    IEEE80211_F_ASCAN);
12405453Shx147065 				mutex_exit(&sc->sc_glock);
12415453Shx147065 				return (err);
12425453Shx147065 			}
12435453Shx147065 			break;
12444128Shx147065 		}
12454128Shx147065 		ic->ic_state = nstate;
12464128Shx147065 		sc->sc_clk = 0;
12474128Shx147065 
12484128Shx147065 		mutex_exit(&sc->sc_glock);
12494128Shx147065 		return (WPI_SUCCESS);
12504128Shx147065 
12514128Shx147065 	case IEEE80211_S_AUTH:
12524128Shx147065 		/* reset state to handle reassociations correctly */
12534128Shx147065 		sc->sc_config.state = 0;
12544128Shx147065 		sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS);
12554128Shx147065 
12564128Shx147065 		if ((err = wpi_auth(sc)) != 0) {
12574128Shx147065 			WPI_DBG((WPI_DEBUG_80211,
12584128Shx147065 			    "could not send authentication request\n"));
12594128Shx147065 			mutex_exit(&sc->sc_glock);
12604128Shx147065 			return (err);
12614128Shx147065 		}
12624128Shx147065 		break;
12634128Shx147065 
12644128Shx147065 	case IEEE80211_S_RUN:
12654128Shx147065 		if (ic->ic_opmode == IEEE80211_M_MONITOR) {
12664128Shx147065 			/* link LED blinks while monitoring */
12674128Shx147065 			wpi_set_led(sc, WPI_LED_LINK, 5, 5);
12684128Shx147065 			break;
12694128Shx147065 		}
12704128Shx147065 
12714128Shx147065 		if (ic->ic_opmode != IEEE80211_M_STA) {
12724128Shx147065 			(void) wpi_auth(sc);
12734128Shx147065 			/* need setup beacon here */
12744128Shx147065 		}
12754128Shx147065 		WPI_DBG((WPI_DEBUG_80211, "wpi: associated."));
12764128Shx147065 
12774128Shx147065 		/* update adapter's configuration */
12784128Shx147065 		sc->sc_config.state = LE_16(WPI_CONFIG_ASSOCIATED);
12794128Shx147065 		/* short preamble/slot time are negotiated when associating */
12804128Shx147065 		sc->sc_config.flags &= ~LE_32(WPI_CONFIG_SHPREAMBLE |
12814128Shx147065 		    WPI_CONFIG_SHSLOT);
12824128Shx147065 		if (ic->ic_flags & IEEE80211_F_SHSLOT)
12834128Shx147065 			sc->sc_config.flags |= LE_32(WPI_CONFIG_SHSLOT);
12844128Shx147065 		if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
12854128Shx147065 			sc->sc_config.flags |= LE_32(WPI_CONFIG_SHPREAMBLE);
12864128Shx147065 		sc->sc_config.filter |= LE_32(WPI_FILTER_BSS);
12874128Shx147065 		if (ic->ic_opmode != IEEE80211_M_STA)
12884128Shx147065 			sc->sc_config.filter |= LE_32(WPI_FILTER_BEACON);
12894128Shx147065 
12904128Shx147065 		WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x\n",
12914128Shx147065 		    sc->sc_config.chan, sc->sc_config.flags));
12924128Shx147065 		err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
12934128Shx147065 		    sizeof (wpi_config_t), 1);
12944128Shx147065 		if (err != WPI_SUCCESS) {
12954128Shx147065 			WPI_DBG((WPI_DEBUG_80211,
12964128Shx147065 			    "could not update configuration\n"));
12974128Shx147065 			mutex_exit(&sc->sc_glock);
12984128Shx147065 			return (err);
12994128Shx147065 		}
13004128Shx147065 
13014128Shx147065 		/* start automatic rate control */
13024128Shx147065 		mutex_enter(&sc->sc_mt_lock);
13034128Shx147065 		if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
13044128Shx147065 			sc->sc_flags |= WPI_F_RATE_AUTO_CTL;
13054128Shx147065 			/* set rate to some reasonable initial value */
13064499Shx147065 			i = in->in_rates.ir_nrates - 1;
13074499Shx147065 			while (i > 0 && IEEE80211_RATE(i) > 72)
13084499Shx147065 				i--;
13094128Shx147065 			in->in_txrate = i;
13104128Shx147065 		} else {
13114128Shx147065 			sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL;
13124128Shx147065 		}
13134128Shx147065 		mutex_exit(&sc->sc_mt_lock);
13144128Shx147065 
13154128Shx147065 		/* link LED always on while associated */
13164128Shx147065 		wpi_set_led(sc, WPI_LED_LINK, 0, 1);
13174128Shx147065 		break;
13184128Shx147065 
13194128Shx147065 	case IEEE80211_S_INIT:
13204128Shx147065 	case IEEE80211_S_ASSOC:
13214128Shx147065 		break;
13224128Shx147065 	}
13234128Shx147065 
13244128Shx147065 	mutex_exit(&sc->sc_glock);
13254128Shx147065 	return (sc->sc_newstate(ic, nstate, arg));
13264128Shx147065 }
13274128Shx147065 
13285296Szf162725 /*ARGSUSED*/
13295296Szf162725 static int wpi_key_set(ieee80211com_t *ic, const struct ieee80211_key *k,
13305296Szf162725     const uint8_t mac[IEEE80211_ADDR_LEN])
13315296Szf162725 {
13325296Szf162725 	wpi_sc_t *sc = (wpi_sc_t *)ic;
13335296Szf162725 	wpi_node_t node;
13345296Szf162725 	int err;
13355296Szf162725 
13365296Szf162725 	switch (k->wk_cipher->ic_cipher) {
13375296Szf162725 	case IEEE80211_CIPHER_WEP:
13385296Szf162725 	case IEEE80211_CIPHER_TKIP:
13395296Szf162725 		return (1); /* sofeware do it. */
13405296Szf162725 	case IEEE80211_CIPHER_AES_CCM:
13415296Szf162725 		break;
13425296Szf162725 	default:
13435296Szf162725 		return (0);
13445296Szf162725 	}
13455296Szf162725 	sc->sc_config.filter &= ~(WPI_FILTER_NODECRYPTUNI |
13465296Szf162725 	    WPI_FILTER_NODECRYPTMUL);
13475296Szf162725 
13485296Szf162725 	mutex_enter(&sc->sc_glock);
13495296Szf162725 
13505296Szf162725 	/* update ap/multicast node */
13515296Szf162725 	(void) memset(&node, 0, sizeof (node));
13525296Szf162725 	if (IEEE80211_IS_MULTICAST(mac)) {
13535296Szf162725 		(void) memset(node.bssid, 0xff, 6);
13545296Szf162725 		node.id = WPI_ID_BROADCAST;
13555296Szf162725 	} else {
13565296Szf162725 		IEEE80211_ADDR_COPY(node.bssid, ic->ic_bss->in_bssid);
13575296Szf162725 		node.id = WPI_ID_BSS;
13585296Szf162725 	}
13595296Szf162725 	if (k->wk_flags & IEEE80211_KEY_XMIT) {
13605296Szf162725 		node.key_flags = 0;
13615296Szf162725 		node.keyp = k->wk_keyix;
13625296Szf162725 	} else {
13635296Szf162725 		node.key_flags = (1 << 14);
13645296Szf162725 		node.keyp = k->wk_keyix + 4;
13655296Szf162725 	}
13665296Szf162725 	(void) memcpy(node.key, k->wk_key, k->wk_keylen);
13675296Szf162725 	node.key_flags |= (2 | (1 << 3) | (k->wk_keyix << 8));
13685296Szf162725 	node.sta_mask = 1;
13695296Szf162725 	node.control = 1;
13705296Szf162725 	err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1);
13715296Szf162725 	if (err != WPI_SUCCESS) {
13725296Szf162725 		cmn_err(CE_WARN, "wpi_key_set():"
13735296Szf162725 		    "failed to update ap node\n");
13745296Szf162725 		mutex_exit(&sc->sc_glock);
13755296Szf162725 		return (0);
13765296Szf162725 	}
13775296Szf162725 	mutex_exit(&sc->sc_glock);
13785296Szf162725 	return (1);
13795296Szf162725 }
13805296Szf162725 
13814128Shx147065 /*
13824128Shx147065  * Grab exclusive access to NIC memory.
13834128Shx147065  */
13844128Shx147065 static void
13854128Shx147065 wpi_mem_lock(wpi_sc_t *sc)
13864128Shx147065 {
13874128Shx147065 	uint32_t tmp;
13884128Shx147065 	int ntries;
13894128Shx147065 
13904128Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
13914128Shx147065 	WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC);
13924128Shx147065 
13934128Shx147065 	/* spin until we actually get the lock */
13944128Shx147065 	for (ntries = 0; ntries < 1000; ntries++) {
13954128Shx147065 		if ((WPI_READ(sc, WPI_GPIO_CTL) &
13964128Shx147065 		    (WPI_GPIO_CLOCK | WPI_GPIO_SLEEP)) == WPI_GPIO_CLOCK)
13974128Shx147065 			break;
13984128Shx147065 		DELAY(10);
13994128Shx147065 	}
14004128Shx147065 	if (ntries == 1000)
14014128Shx147065 		WPI_DBG((WPI_DEBUG_PIO, "could not lock memory\n"));
14024128Shx147065 }
14034128Shx147065 
14044128Shx147065 /*
14054128Shx147065  * Release lock on NIC memory.
14064128Shx147065  */
14074128Shx147065 static void
14084128Shx147065 wpi_mem_unlock(wpi_sc_t *sc)
14094128Shx147065 {
14104128Shx147065 	uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL);
14114128Shx147065 	WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC);
14124128Shx147065 }
14134128Shx147065 
14144128Shx147065 static uint32_t
14154128Shx147065 wpi_mem_read(wpi_sc_t *sc, uint16_t addr)
14164128Shx147065 {
14174128Shx147065 	WPI_WRITE(sc, WPI_READ_MEM_ADDR, WPI_MEM_4 | addr);
14184128Shx147065 	return (WPI_READ(sc, WPI_READ_MEM_DATA));
14194128Shx147065 }
14204128Shx147065 
14214128Shx147065 static void
14224128Shx147065 wpi_mem_write(wpi_sc_t *sc, uint16_t addr, uint32_t data)
14234128Shx147065 {
14244128Shx147065 	WPI_WRITE(sc, WPI_WRITE_MEM_ADDR, WPI_MEM_4 | addr);
14254128Shx147065 	WPI_WRITE(sc, WPI_WRITE_MEM_DATA, data);
14264128Shx147065 }
14274128Shx147065 
14284128Shx147065 static void
14294128Shx147065 wpi_mem_write_region_4(wpi_sc_t *sc, uint16_t addr,
14304128Shx147065     const uint32_t *data, int wlen)
14314128Shx147065 {
14324128Shx147065 	for (; wlen > 0; wlen--, data++, addr += 4)
14334128Shx147065 		wpi_mem_write(sc, addr, *data);
14344128Shx147065 }
14354128Shx147065 
14364128Shx147065 /*
14374128Shx147065  * Read 16 bits from the EEPROM.  We access EEPROM through the MAC instead of
14384128Shx147065  * using the traditional bit-bang method.
14394128Shx147065  */
14404128Shx147065 static uint16_t
14414128Shx147065 wpi_read_prom_word(wpi_sc_t *sc, uint32_t addr)
14424128Shx147065 {
14434128Shx147065 	uint32_t val;
14444128Shx147065 	int ntries;
14454128Shx147065 
14464128Shx147065 	WPI_WRITE(sc, WPI_EEPROM_CTL, addr << 2);
14474128Shx147065 
14484128Shx147065 	wpi_mem_lock(sc);
14494128Shx147065 	for (ntries = 0; ntries < 10; ntries++) {
14504128Shx147065 		if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) & WPI_EEPROM_READY)
14514128Shx147065 			break;
14524128Shx147065 		DELAY(10);
14534128Shx147065 	}
14544128Shx147065 	wpi_mem_unlock(sc);
14554128Shx147065 
14564128Shx147065 	if (ntries == 10) {
14574128Shx147065 		WPI_DBG((WPI_DEBUG_PIO, "could not read EEPROM\n"));
14584128Shx147065 		return (0xdead);
14594128Shx147065 	}
14604128Shx147065 	return (val >> 16);
14614128Shx147065 }
14624128Shx147065 
14634128Shx147065 /*
14644128Shx147065  * The firmware boot code is small and is intended to be copied directly into
14654128Shx147065  * the NIC internal memory.
14664128Shx147065  */
14674128Shx147065 static int
14684128Shx147065 wpi_load_microcode(wpi_sc_t *sc)
14694128Shx147065 {
14704128Shx147065 	const char *ucode;
14714128Shx147065 	int size;
14724128Shx147065 
14734128Shx147065 	ucode = sc->sc_boot;
14744128Shx147065 	size = LE_32(sc->sc_hdr->bootsz);
14754128Shx147065 	/* check that microcode size is a multiple of 4 */
14764128Shx147065 	if (size & 3)
14774128Shx147065 		return (EINVAL);
14784128Shx147065 
14794128Shx147065 	size /= sizeof (uint32_t);
14804128Shx147065 
14814128Shx147065 	wpi_mem_lock(sc);
14824128Shx147065 
14834128Shx147065 	/* copy microcode image into NIC memory */
14844128Shx147065 	wpi_mem_write_region_4(sc, WPI_MEM_UCODE_BASE, (const uint32_t *)ucode,
14854128Shx147065 	    size);
14864128Shx147065 
14874128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_SRC, 0);
14884128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_DST, WPI_FW_TEXT);
14894128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_SIZE, size);
14904128Shx147065 
14914128Shx147065 	/* run microcode */
14924128Shx147065 	wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_RUN);
14934128Shx147065 
14944128Shx147065 	wpi_mem_unlock(sc);
14954128Shx147065 
14964128Shx147065 	return (WPI_SUCCESS);
14974128Shx147065 }
14984128Shx147065 
14994128Shx147065 /*
15004128Shx147065  * The firmware text and data segments are transferred to the NIC using DMA.
15014128Shx147065  * The driver just copies the firmware into DMA-safe memory and tells the NIC
15024128Shx147065  * where to find it.  Once the NIC has copied the firmware into its internal
15034128Shx147065  * memory, we can free our local copy in the driver.
15044128Shx147065  */
15054128Shx147065 static int
15064128Shx147065 wpi_load_firmware(wpi_sc_t *sc, uint32_t target)
15074128Shx147065 {
15084128Shx147065 	const char *fw;
15094128Shx147065 	int size;
15104128Shx147065 	wpi_dma_t *dma_p;
15114128Shx147065 	ddi_dma_cookie_t *cookie;
15124128Shx147065 	wpi_tx_desc_t desc;
15134128Shx147065 	int i, ntries, err = WPI_SUCCESS;
15144128Shx147065 
15154128Shx147065 	/* only text and data here */
15164128Shx147065 	if (target == WPI_FW_TEXT) {
15174128Shx147065 		fw = sc->sc_text;
15184128Shx147065 		size = LE_32(sc->sc_hdr->textsz);
15194128Shx147065 		dma_p = &sc->sc_dma_fw_text;
15204128Shx147065 		cookie = sc->sc_fw_text_cookie;
15214128Shx147065 	} else {
15224128Shx147065 		fw = sc->sc_data;
15234128Shx147065 		size = LE_32(sc->sc_hdr->datasz);
15244128Shx147065 		dma_p = &sc->sc_dma_fw_data;
15254128Shx147065 		cookie = sc->sc_fw_data_cookie;
15264128Shx147065 	}
15274128Shx147065 
15284128Shx147065 	/* copy firmware image to DMA-safe memory */
15294128Shx147065 	(void) memcpy(dma_p->mem_va, fw, size);
15304128Shx147065 
15314128Shx147065 	/* make sure the adapter will get up-to-date values */
15324128Shx147065 	(void) ddi_dma_sync(dma_p->dma_hdl, 0, size, DDI_DMA_SYNC_FORDEV);
15334128Shx147065 
15344128Shx147065 	(void) memset(&desc, 0, sizeof (desc));
15354128Shx147065 	desc.flags = LE_32(WPI_PAD32(size) << 28 | dma_p->ncookies << 24);
15364128Shx147065 	for (i = 0; i < dma_p->ncookies; i++) {
15374128Shx147065 		WPI_DBG((WPI_DEBUG_DMA, "cookie%d addr:%x size:%x\n",
15384128Shx147065 		    i, cookie[i].dmac_address, cookie[i].dmac_size));
15394128Shx147065 		desc.segs[i].addr = cookie[i].dmac_address;
15404128Shx147065 		desc.segs[i].len = (uint32_t)cookie[i].dmac_size;
15414128Shx147065 	}
15424128Shx147065 
15434128Shx147065 	wpi_mem_lock(sc);
15444128Shx147065 
15454128Shx147065 	/* tell adapter where to copy image in its internal memory */
15464128Shx147065 	WPI_WRITE(sc, WPI_FW_TARGET, target);
15474128Shx147065 
15484128Shx147065 	WPI_WRITE(sc, WPI_TX_CONFIG(6), 0);
15494128Shx147065 
15504128Shx147065 	/* copy firmware descriptor into NIC memory */
15514128Shx147065 	WPI_WRITE_REGION_4(sc, WPI_TX_DESC(6), (uint32_t *)&desc,
15524128Shx147065 	    sizeof desc / sizeof (uint32_t));
15534128Shx147065 
15544128Shx147065 	WPI_WRITE(sc, WPI_TX_CREDIT(6), 0xfffff);
15554128Shx147065 	WPI_WRITE(sc, WPI_TX_STATE(6), 0x4001);
15564128Shx147065 	WPI_WRITE(sc, WPI_TX_CONFIG(6), 0x80000001);
15574128Shx147065 
15584128Shx147065 	/* wait while the adapter is busy copying the firmware */
15594128Shx147065 	for (ntries = 0; ntries < 100; ntries++) {
15604128Shx147065 		if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(6))
15614128Shx147065 			break;
15624128Shx147065 		DELAY(1000);
15634128Shx147065 	}
15644128Shx147065 	if (ntries == 100) {
15654128Shx147065 		WPI_DBG((WPI_DEBUG_FW, "timeout transferring firmware\n"));
15664128Shx147065 		err = ETIMEDOUT;
15674128Shx147065 	}
15684128Shx147065 
15694128Shx147065 	WPI_WRITE(sc, WPI_TX_CREDIT(6), 0);
15704128Shx147065 
15714128Shx147065 	wpi_mem_unlock(sc);
15724128Shx147065 
15734128Shx147065 	return (err);
15744128Shx147065 }
15754128Shx147065 
15764128Shx147065 /*ARGSUSED*/
15774128Shx147065 static void
15784128Shx147065 wpi_rx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data)
15794128Shx147065 {
15804128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
15814128Shx147065 	wpi_rx_ring_t *ring = &sc->sc_rxq;
15824128Shx147065 	wpi_rx_stat_t *stat;
15834128Shx147065 	wpi_rx_head_t *head;
15844128Shx147065 	wpi_rx_tail_t *tail;
15854128Shx147065 	ieee80211_node_t *in;
15864128Shx147065 	struct ieee80211_frame *wh;
15874128Shx147065 	mblk_t *mp;
15884128Shx147065 	uint16_t len;
15894128Shx147065 
15904128Shx147065 	stat = (wpi_rx_stat_t *)(desc + 1);
15914128Shx147065 
15924128Shx147065 	if (stat->len > WPI_STAT_MAXLEN) {
15934128Shx147065 		WPI_DBG((WPI_DEBUG_RX, "invalid rx statistic header\n"));
15944128Shx147065 		return;
15954128Shx147065 	}
15964128Shx147065 
15974128Shx147065 	head = (wpi_rx_head_t *)((caddr_t)(stat + 1) + stat->len);
15984128Shx147065 	tail = (wpi_rx_tail_t *)((caddr_t)(head + 1) + LE_16(head->len));
15994128Shx147065 
16004128Shx147065 	len = LE_16(head->len);
16014128Shx147065 
16024128Shx147065 	WPI_DBG((WPI_DEBUG_RX, "rx intr: idx=%d len=%d stat len=%d rssi=%d "
16034128Shx147065 	    "rate=%x chan=%d tstamp=%llu", ring->cur, LE_32(desc->len),
16044128Shx147065 	    len, (int8_t)stat->rssi, head->rate, head->chan,
16054128Shx147065 	    LE_64(tail->tstamp)));
16064128Shx147065 
16074128Shx147065 	if ((len < 20) || (len > sc->sc_dmabuf_sz)) {
16084128Shx147065 		sc->sc_rx_err++;
16094128Shx147065 		return;
16104128Shx147065 	}
16114128Shx147065 
16124128Shx147065 	/*
16134128Shx147065 	 * Discard Rx frames with bad CRC early
16144128Shx147065 	 */
16154128Shx147065 	if ((LE_32(tail->flags) & WPI_RX_NOERROR) != WPI_RX_NOERROR) {
16164128Shx147065 		WPI_DBG((WPI_DEBUG_RX, "rx tail flags error %x\n",
16174128Shx147065 		    LE_32(tail->flags)));
16184128Shx147065 		sc->sc_rx_err++;
16194128Shx147065 		return;
16204128Shx147065 	}
16214128Shx147065 
16224128Shx147065 	/* update Rx descriptor */
16234128Shx147065 	/* ring->desc[ring->cur] = LE_32(data->dma_data.cookie.dmac_address); */
16244128Shx147065 
16254128Shx147065 #ifdef WPI_BPF
16264128Shx147065 #ifndef WPI_CURRENT
16274128Shx147065 	if (sc->sc_drvbpf != NULL) {
16284128Shx147065 #else
16294128Shx147065 	if (bpf_peers_present(sc->sc_drvbpf)) {
16304128Shx147065 #endif
16314128Shx147065 		struct wpi_rx_radiotap_header *tap = &sc->sc_rxtap;
16324128Shx147065 
16334128Shx147065 		tap->wr_flags = 0;
16344128Shx147065 		tap->wr_rate = head->rate;
16354128Shx147065 		tap->wr_chan_freq =
16364128Shx147065 		    LE_16(ic->ic_channels[head->chan].ic_freq);
16374128Shx147065 		tap->wr_chan_flags =
16384128Shx147065 		    LE_16(ic->ic_channels[head->chan].ic_flags);
16394128Shx147065 		tap->wr_dbm_antsignal = (int8_t)(stat->rssi - WPI_RSSI_OFFSET);
16404128Shx147065 		tap->wr_dbm_antnoise = (int8_t)LE_16(stat->noise);
16414128Shx147065 		tap->wr_tsft = tail->tstamp;
16424128Shx147065 		tap->wr_antenna = (LE_16(head->flags) >> 4) & 0xf;
16434128Shx147065 		switch (head->rate) {
16444128Shx147065 		/* CCK rates */
16454128Shx147065 		case  10: tap->wr_rate =   2; break;
16464128Shx147065 		case  20: tap->wr_rate =   4; break;
16474128Shx147065 		case  55: tap->wr_rate =  11; break;
16484128Shx147065 		case 110: tap->wr_rate =  22; break;
16494128Shx147065 		/* OFDM rates */
16504128Shx147065 		case 0xd: tap->wr_rate =  12; break;
16514128Shx147065 		case 0xf: tap->wr_rate =  18; break;
16524128Shx147065 		case 0x5: tap->wr_rate =  24; break;
16534128Shx147065 		case 0x7: tap->wr_rate =  36; break;
16544128Shx147065 		case 0x9: tap->wr_rate =  48; break;
16554128Shx147065 		case 0xb: tap->wr_rate =  72; break;
16564128Shx147065 		case 0x1: tap->wr_rate =  96; break;
16574128Shx147065 		case 0x3: tap->wr_rate = 108; break;
16584128Shx147065 		/* unknown rate: should not happen */
16594128Shx147065 		default:  tap->wr_rate =   0;
16604128Shx147065 		}
16614128Shx147065 		if (LE_16(head->flags) & 0x4)
16624128Shx147065 			tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
16634128Shx147065 
16644128Shx147065 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
16654128Shx147065 	}
16664128Shx147065 #endif
16674128Shx147065 	/* grab a reference to the source node */
16684128Shx147065 	wh = (struct ieee80211_frame *)(head + 1);
16694128Shx147065 
16704128Shx147065 #ifdef DEBUG
16714128Shx147065 	if (wpi_dbg_flags & WPI_DEBUG_RX)
16724128Shx147065 		ieee80211_dump_pkt((uint8_t *)wh, len, 0, 0);
16734128Shx147065 #endif
16744128Shx147065 
16754128Shx147065 	in = ieee80211_find_rxnode(ic, wh);
16764128Shx147065 	mp = allocb(len, BPRI_MED);
16774128Shx147065 	if (mp) {
16784128Shx147065 		(void) memcpy(mp->b_wptr, wh, len);
16794128Shx147065 		mp->b_wptr += len;
16804128Shx147065 
16814128Shx147065 		/* send the frame to the 802.11 layer */
16824128Shx147065 		(void) ieee80211_input(ic, mp, in, stat->rssi, 0);
16834128Shx147065 	} else {
16844128Shx147065 		sc->sc_rx_nobuf++;
16854128Shx147065 		WPI_DBG((WPI_DEBUG_RX,
16864128Shx147065 		    "wpi_rx_intr(): alloc rx buf failed\n"));
16874128Shx147065 	}
16884128Shx147065 	/* release node reference */
16894128Shx147065 	ieee80211_free_node(in);
16904128Shx147065 }
16914128Shx147065 
16924128Shx147065 /*ARGSUSED*/
16934128Shx147065 static void
16944128Shx147065 wpi_tx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data)
16954128Shx147065 {
16964128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
16974128Shx147065 	wpi_tx_ring_t *ring = &sc->sc_txq[desc->qid & 0x3];
16984128Shx147065 	/* wpi_tx_data_t *txdata = &ring->data[desc->idx]; */
16994128Shx147065 	wpi_tx_stat_t *stat = (wpi_tx_stat_t *)(desc + 1);
17004128Shx147065 	wpi_amrr_t *amrr = (wpi_amrr_t *)ic->ic_bss;
17014128Shx147065 
17024128Shx147065 	WPI_DBG((WPI_DEBUG_TX, "tx done: qid=%d idx=%d retries=%d nkill=%d "
17034128Shx147065 	    "rate=%x duration=%d status=%x\n",
17044128Shx147065 	    desc->qid, desc->idx, stat->ntries, stat->nkill, stat->rate,
17054128Shx147065 	    LE_32(stat->duration), LE_32(stat->status)));
17064128Shx147065 
17074128Shx147065 	amrr->txcnt++;
17084128Shx147065 	WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d cnt\n", amrr->txcnt));
17094128Shx147065 	if (stat->ntries > 0) {
17104128Shx147065 		amrr->retrycnt++;
17114128Shx147065 		sc->sc_tx_retries++;
17124128Shx147065 		WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d retries\n",
17134128Shx147065 		    amrr->retrycnt));
17144128Shx147065 	}
17154128Shx147065 
17164128Shx147065 	sc->sc_tx_timer = 0;
17174128Shx147065 
17184128Shx147065 	mutex_enter(&sc->sc_tx_lock);
17194128Shx147065 	ring->queued--;
17204128Shx147065 	if (ring->queued < 0)
17214128Shx147065 		ring->queued = 0;
17224128Shx147065 	if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count << 3))) {
17234128Shx147065 		sc->sc_need_reschedule = 0;
17244128Shx147065 		mutex_exit(&sc->sc_tx_lock);
17254128Shx147065 		mac_tx_update(ic->ic_mach);
17264128Shx147065 		mutex_enter(&sc->sc_tx_lock);
17274128Shx147065 	}
17284128Shx147065 	mutex_exit(&sc->sc_tx_lock);
17294128Shx147065 }
17304128Shx147065 
17314128Shx147065 static void
17324128Shx147065 wpi_cmd_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc)
17334128Shx147065 {
17344128Shx147065 	if ((desc->qid & 7) != 4) {
17354128Shx147065 		return;	/* not a command ack */
17364128Shx147065 	}
17374128Shx147065 	mutex_enter(&sc->sc_glock);
17384128Shx147065 	sc->sc_flags |= WPI_F_CMD_DONE;
17394128Shx147065 	cv_signal(&sc->sc_cmd_cv);
17404128Shx147065 	mutex_exit(&sc->sc_glock);
17414128Shx147065 }
17424128Shx147065 
17434128Shx147065 static uint_t
17444128Shx147065 wpi_notif_softintr(caddr_t arg)
17454128Shx147065 {
17464128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
17474128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
17484128Shx147065 	wpi_rx_desc_t *desc;
17494128Shx147065 	wpi_rx_data_t *data;
17504128Shx147065 	uint32_t hw;
17514128Shx147065 
17524128Shx147065 	mutex_enter(&sc->sc_glock);
17534128Shx147065 	if (sc->sc_notif_softint_pending != 1) {
17544128Shx147065 		mutex_exit(&sc->sc_glock);
17554128Shx147065 		return (DDI_INTR_UNCLAIMED);
17564128Shx147065 	}
17574128Shx147065 	mutex_exit(&sc->sc_glock);
17584128Shx147065 
17594128Shx147065 	hw = LE_32(sc->sc_shared->next);
17604128Shx147065 
17614128Shx147065 	while (sc->sc_rxq.cur != hw) {
17624128Shx147065 		data = &sc->sc_rxq.data[sc->sc_rxq.cur];
17634128Shx147065 		desc = (wpi_rx_desc_t *)data->dma_data.mem_va;
17644128Shx147065 
17654128Shx147065 		WPI_DBG((WPI_DEBUG_INTR, "rx notification hw = %d cur = %d "
17664128Shx147065 		    "qid=%x idx=%d flags=%x type=%d len=%d\n",
17674128Shx147065 		    hw, sc->sc_rxq.cur, desc->qid, desc->idx, desc->flags,
17684128Shx147065 		    desc->type, LE_32(desc->len)));
17694128Shx147065 
17704128Shx147065 		if (!(desc->qid & 0x80))	/* reply to a command */
17714128Shx147065 			wpi_cmd_intr(sc, desc);
17724128Shx147065 
17734128Shx147065 		switch (desc->type) {
17744128Shx147065 		case WPI_RX_DONE:
17754128Shx147065 			/* a 802.11 frame was received */
17764128Shx147065 			wpi_rx_intr(sc, desc, data);
17774128Shx147065 			break;
17784128Shx147065 
17794128Shx147065 		case WPI_TX_DONE:
17804128Shx147065 			/* a 802.11 frame has been transmitted */
17814128Shx147065 			wpi_tx_intr(sc, desc, data);
17824128Shx147065 			break;
17834128Shx147065 
17844128Shx147065 		case WPI_UC_READY:
17854128Shx147065 		{
17864128Shx147065 			wpi_ucode_info_t *uc =
17874128Shx147065 			    (wpi_ucode_info_t *)(desc + 1);
17884128Shx147065 
17894128Shx147065 			/* the microcontroller is ready */
17904128Shx147065 			WPI_DBG((WPI_DEBUG_FW,
17914128Shx147065 			    "microcode alive notification version %x "
17924128Shx147065 			    "alive %x\n", LE_32(uc->version),
17934128Shx147065 			    LE_32(uc->valid)));
17944128Shx147065 
17954128Shx147065 			if (LE_32(uc->valid) != 1) {
17964128Shx147065 				WPI_DBG((WPI_DEBUG_FW,
17974128Shx147065 				    "microcontroller initialization failed\n"));
17984128Shx147065 			}
17994128Shx147065 			break;
18004128Shx147065 		}
18014128Shx147065 		case WPI_STATE_CHANGED:
18024128Shx147065 		{
18034128Shx147065 			uint32_t *status = (uint32_t *)(desc + 1);
18044128Shx147065 
18054128Shx147065 			/* enabled/disabled notification */
18064128Shx147065 			WPI_DBG((WPI_DEBUG_RADIO, "state changed to %x\n",
18074128Shx147065 			    LE_32(*status)));
18084128Shx147065 
18094128Shx147065 			if (LE_32(*status) & 1) {
18106062Shx147065 				/*
18116062Shx147065 				 * the radio button has to be pushed(OFF). It
18126062Shx147065 				 * is considered as a hw error, the
18136062Shx147065 				 * wpi_thread() tries to recover it after the
18146062Shx147065 				 * button is pushed again(ON)
18156062Shx147065 				 */
18164128Shx147065 				cmn_err(CE_NOTE,
18174128Shx147065 				    "wpi: Radio transmitter is off\n");
18186062Shx147065 				sc->sc_ostate = sc->sc_ic.ic_state;
18196062Shx147065 				ieee80211_new_state(&sc->sc_ic,
18206062Shx147065 				    IEEE80211_S_INIT, -1);
18216062Shx147065 				sc->sc_flags |=
18226062Shx147065 				    (WPI_F_HW_ERR_RECOVER | WPI_F_RADIO_OFF);
18234128Shx147065 			}
18244128Shx147065 			break;
18254128Shx147065 		}
18264128Shx147065 		case WPI_START_SCAN:
18274128Shx147065 		{
18284128Shx147065 			wpi_start_scan_t *scan =
18294128Shx147065 			    (wpi_start_scan_t *)(desc + 1);
18304128Shx147065 
18314128Shx147065 			WPI_DBG((WPI_DEBUG_SCAN,
18324128Shx147065 			    "scanning channel %d status %x\n",
18334128Shx147065 			    scan->chan, LE_32(scan->status)));
18344128Shx147065 
18354128Shx147065 			/* fix current channel */
18364128Shx147065 			ic->ic_curchan = &ic->ic_sup_channels[scan->chan];
18374128Shx147065 			break;
18384128Shx147065 		}
18394128Shx147065 		case WPI_STOP_SCAN:
18404128Shx147065 			WPI_DBG((WPI_DEBUG_SCAN, "scan finished\n"));
18414128Shx147065 			ieee80211_end_scan(ic);
18424128Shx147065 			break;
18434128Shx147065 		}
18444128Shx147065 
18454128Shx147065 		sc->sc_rxq.cur = (sc->sc_rxq.cur + 1) % WPI_RX_RING_COUNT;
18464128Shx147065 	}
18474128Shx147065 
18484128Shx147065 	/* tell the firmware what we have processed */
18494128Shx147065 	hw = (hw == 0) ? WPI_RX_RING_COUNT - 1 : hw - 1;
18504128Shx147065 	WPI_WRITE(sc, WPI_RX_WIDX, hw & (~7));
18514128Shx147065 	mutex_enter(&sc->sc_glock);
18524128Shx147065 	sc->sc_notif_softint_pending = 0;
18534128Shx147065 	mutex_exit(&sc->sc_glock);
18544128Shx147065 
18554128Shx147065 	return (DDI_INTR_CLAIMED);
18564128Shx147065 }
18574128Shx147065 
18584128Shx147065 static uint_t
18594128Shx147065 wpi_intr(caddr_t arg)
18604128Shx147065 {
18614128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
18625453Shx147065 	uint32_t r, rfh;
18634128Shx147065 
18644128Shx147065 	mutex_enter(&sc->sc_glock);
18656062Shx147065 	if (sc->sc_flags & WPI_F_SUSPEND) {
18666062Shx147065 		mutex_exit(&sc->sc_glock);
18676062Shx147065 		return (DDI_INTR_UNCLAIMED);
18686062Shx147065 	}
18696062Shx147065 
18704128Shx147065 	r = WPI_READ(sc, WPI_INTR);
18714128Shx147065 	if (r == 0 || r == 0xffffffff) {
18724128Shx147065 		mutex_exit(&sc->sc_glock);
18734128Shx147065 		return (DDI_INTR_UNCLAIMED);
18744128Shx147065 	}
18754128Shx147065 
18764128Shx147065 	WPI_DBG((WPI_DEBUG_INTR, "interrupt reg %x\n", r));
18774128Shx147065 
18785453Shx147065 	rfh = WPI_READ(sc, WPI_INTR_STATUS);
18794128Shx147065 	/* disable interrupts */
18804128Shx147065 	WPI_WRITE(sc, WPI_MASK, 0);
18814128Shx147065 	/* ack interrupts */
18824128Shx147065 	WPI_WRITE(sc, WPI_INTR, r);
18835453Shx147065 	WPI_WRITE(sc, WPI_INTR_STATUS, rfh);
18844128Shx147065 
18854128Shx147065 	if (sc->sc_notif_softint_id == NULL) {
18864128Shx147065 		mutex_exit(&sc->sc_glock);
18874128Shx147065 		return (DDI_INTR_CLAIMED);
18884128Shx147065 	}
18894128Shx147065 
18904128Shx147065 	if (r & (WPI_SW_ERROR | WPI_HW_ERROR)) {
18914128Shx147065 		WPI_DBG((WPI_DEBUG_FW, "fatal firmware error\n"));
18924128Shx147065 		mutex_exit(&sc->sc_glock);
18934128Shx147065 		wpi_stop(sc);
18944128Shx147065 		sc->sc_ostate = sc->sc_ic.ic_state;
18954128Shx147065 		ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
18964128Shx147065 		sc->sc_flags |= WPI_F_HW_ERR_RECOVER;
18974128Shx147065 		return (DDI_INTR_CLAIMED);
18984128Shx147065 	}
18994128Shx147065 
19005453Shx147065 	if ((r & (WPI_RX_INTR | WPI_RX_SWINT)) ||
19015453Shx147065 	    (rfh & 0x40070000)) {
19024128Shx147065 		sc->sc_notif_softint_pending = 1;
19034128Shx147065 		ddi_trigger_softintr(sc->sc_notif_softint_id);
19044128Shx147065 	}
19054128Shx147065 
19064128Shx147065 	if (r & WPI_ALIVE_INTR)	{ /* firmware initialized */
19074128Shx147065 		sc->sc_flags |= WPI_F_FW_INIT;
19084128Shx147065 		cv_signal(&sc->sc_fw_cv);
19094128Shx147065 	}
19104128Shx147065 
19114128Shx147065 	/* re-enable interrupts */
19124128Shx147065 	WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK);
19134128Shx147065 	mutex_exit(&sc->sc_glock);
19144128Shx147065 
19154128Shx147065 	return (DDI_INTR_CLAIMED);
19164128Shx147065 }
19174128Shx147065 
19184128Shx147065 static uint8_t
19194128Shx147065 wpi_plcp_signal(int rate)
19204128Shx147065 {
19214128Shx147065 	switch (rate) {
19224128Shx147065 	/* CCK rates (returned values are device-dependent) */
19234128Shx147065 	case 2:		return (10);
19244128Shx147065 	case 4:		return (20);
19254128Shx147065 	case 11:	return (55);
19264128Shx147065 	case 22:	return (110);
19274128Shx147065 
19284128Shx147065 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
19294128Shx147065 	/* R1-R4 (ral/ural is R4-R1) */
19304128Shx147065 	case 12:	return (0xd);
19314128Shx147065 	case 18:	return (0xf);
19324128Shx147065 	case 24:	return (0x5);
19334128Shx147065 	case 36:	return (0x7);
19344128Shx147065 	case 48:	return (0x9);
19354128Shx147065 	case 72:	return (0xb);
19364128Shx147065 	case 96:	return (0x1);
19374128Shx147065 	case 108:	return (0x3);
19384128Shx147065 
19394128Shx147065 	/* unsupported rates (should not get there) */
19404128Shx147065 	default:	return (0);
19414128Shx147065 	}
19424128Shx147065 }
19434128Shx147065 
19444128Shx147065 static mblk_t *
19454128Shx147065 wpi_m_tx(void *arg, mblk_t *mp)
19464128Shx147065 {
19474128Shx147065 	wpi_sc_t	*sc = (wpi_sc_t *)arg;
19484128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
19494128Shx147065 	mblk_t			*next;
19504128Shx147065 
19516062Shx147065 	if (sc->sc_flags & WPI_F_SUSPEND) {
19526062Shx147065 		freemsgchain(mp);
19536062Shx147065 		return (NULL);
19546062Shx147065 	}
19556062Shx147065 
19564128Shx147065 	if (ic->ic_state != IEEE80211_S_RUN) {
19574128Shx147065 		freemsgchain(mp);
19584128Shx147065 		return (NULL);
19594128Shx147065 	}
19604128Shx147065 
19614128Shx147065 	while (mp != NULL) {
19624128Shx147065 		next = mp->b_next;
19634128Shx147065 		mp->b_next = NULL;
19644128Shx147065 		if (wpi_send(ic, mp, IEEE80211_FC0_TYPE_DATA) != 0) {
19654128Shx147065 			mp->b_next = next;
19664128Shx147065 			break;
19674128Shx147065 		}
19684128Shx147065 		mp = next;
19694128Shx147065 	}
19704128Shx147065 	return (mp);
19714128Shx147065 }
19724128Shx147065 
19734128Shx147065 /* ARGSUSED */
19744128Shx147065 static int
19754128Shx147065 wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type)
19764128Shx147065 {
19774128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)ic;
19784128Shx147065 	wpi_tx_ring_t *ring;
19794128Shx147065 	wpi_tx_desc_t *desc;
19804128Shx147065 	wpi_tx_data_t *data;
19814128Shx147065 	wpi_tx_cmd_t *cmd;
19824128Shx147065 	wpi_cmd_data_t *tx;
19834128Shx147065 	ieee80211_node_t *in;
19844128Shx147065 	struct ieee80211_frame *wh;
19854128Shx147065 	struct ieee80211_key *k;
19864128Shx147065 	mblk_t *m, *m0;
19874128Shx147065 	int rate, hdrlen, len, mblen, off, err = WPI_SUCCESS;
19884128Shx147065 
19894128Shx147065 	ring = ((type & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) ?
19904128Shx147065 	    (&sc->sc_txq[0]) : (&sc->sc_txq[1]);
19914128Shx147065 	data = &ring->data[ring->cur];
19924128Shx147065 	desc = data->desc;
19934128Shx147065 	cmd = data->cmd;
19944128Shx147065 	bzero(desc, sizeof (*desc));
19954128Shx147065 	bzero(cmd, sizeof (*cmd));
19964128Shx147065 
19974128Shx147065 	mutex_enter(&sc->sc_tx_lock);
19986062Shx147065 	if (sc->sc_flags & WPI_F_SUSPEND) {
19996062Shx147065 		mutex_exit(&sc->sc_tx_lock);
20006062Shx147065 		if ((type & IEEE80211_FC0_TYPE_MASK) !=
20016062Shx147065 		    IEEE80211_FC0_TYPE_DATA) {
20026062Shx147065 			freemsg(mp);
20036062Shx147065 		}
20046629Szf162725 		err = ENXIO;
20056062Shx147065 		goto exit;
20066062Shx147065 	}
20076062Shx147065 
20084128Shx147065 	if (ring->queued > ring->count - 64) {
20094128Shx147065 		WPI_DBG((WPI_DEBUG_TX, "wpi_send(): no txbuf\n"));
20104128Shx147065 		sc->sc_need_reschedule = 1;
20114128Shx147065 		mutex_exit(&sc->sc_tx_lock);
20124128Shx147065 		if ((type & IEEE80211_FC0_TYPE_MASK) !=
20134128Shx147065 		    IEEE80211_FC0_TYPE_DATA) {
20144128Shx147065 			freemsg(mp);
20154128Shx147065 		}
20164128Shx147065 		sc->sc_tx_nobuf++;
20176629Szf162725 		err = ENOMEM;
20184128Shx147065 		goto exit;
20194128Shx147065 	}
20204128Shx147065 	mutex_exit(&sc->sc_tx_lock);
20214128Shx147065 
20224128Shx147065 	hdrlen = sizeof (struct ieee80211_frame);
20234128Shx147065 
20244128Shx147065 	m = allocb(msgdsize(mp) + 32, BPRI_MED);
20254128Shx147065 	if (m == NULL) { /* can not alloc buf, drop this package */
20264128Shx147065 		cmn_err(CE_WARN,
20274128Shx147065 		    "wpi_send(): failed to allocate msgbuf\n");
20284128Shx147065 		freemsg(mp);
20294128Shx147065 		err = WPI_SUCCESS;
20304128Shx147065 		goto exit;
20314128Shx147065 	}
20324128Shx147065 	for (off = 0, m0 = mp; m0 != NULL; m0 = m0->b_cont) {
20334128Shx147065 		mblen = MBLKL(m0);
20344128Shx147065 		(void) memcpy(m->b_rptr + off, m0->b_rptr, mblen);
20354128Shx147065 		off += mblen;
20364128Shx147065 	}
20374128Shx147065 	m->b_wptr += off;
20384128Shx147065 	freemsg(mp);
20394128Shx147065 
20404128Shx147065 	wh = (struct ieee80211_frame *)m->b_rptr;
20414128Shx147065 
20424128Shx147065 	in = ieee80211_find_txnode(ic, wh->i_addr1);
20434128Shx147065 	if (in == NULL) {
20444128Shx147065 		cmn_err(CE_WARN, "wpi_send(): failed to find tx node\n");
20454128Shx147065 		freemsg(m);
20464128Shx147065 		sc->sc_tx_err++;
20474128Shx147065 		err = WPI_SUCCESS;
20484128Shx147065 		goto exit;
20494128Shx147065 	}
20505296Szf162725 
20515296Szf162725 	(void) ieee80211_encap(ic, m, in);
20525296Szf162725 
20535296Szf162725 	cmd->code = WPI_CMD_TX_DATA;
20545296Szf162725 	cmd->flags = 0;
20555296Szf162725 	cmd->qid = ring->qid;
20565296Szf162725 	cmd->idx = ring->cur;
20575296Szf162725 
20585296Szf162725 	tx = (wpi_cmd_data_t *)cmd->data;
20595296Szf162725 	tx->flags = 0;
20605296Szf162725 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
20615296Szf162725 		tx->flags |= LE_32(WPI_TX_NEED_ACK);
20625296Szf162725 	} else {
20635296Szf162725 		tx->flags &= ~(LE_32(WPI_TX_NEED_ACK));
20645296Szf162725 	}
20655296Szf162725 
20664128Shx147065 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
20674128Shx147065 		k = ieee80211_crypto_encap(ic, m);
20684128Shx147065 		if (k == NULL) {
20694128Shx147065 			freemsg(m);
20704128Shx147065 			sc->sc_tx_err++;
20714128Shx147065 			err = WPI_SUCCESS;
20724128Shx147065 			goto exit;
20734128Shx147065 		}
20744128Shx147065 
20755296Szf162725 		if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) {
20765296Szf162725 			tx->security = 2; /* for CCMP */
20775296Szf162725 			tx->flags |= LE_32(WPI_TX_NEED_ACK);
20785296Szf162725 			(void) memcpy(&tx->key, k->wk_key, k->wk_keylen);
20795296Szf162725 		}
20805296Szf162725 
20814128Shx147065 		/* packet header may have moved, reset our local pointer */
20824128Shx147065 		wh = (struct ieee80211_frame *)m->b_rptr;
20834128Shx147065 	}
20844128Shx147065 
20854128Shx147065 	len = msgdsize(m);
20864128Shx147065 
20874128Shx147065 #ifdef DEBUG
20884128Shx147065 	if (wpi_dbg_flags & WPI_DEBUG_TX)
20894128Shx147065 		ieee80211_dump_pkt((uint8_t *)wh, hdrlen, 0, 0);
20904128Shx147065 #endif
20914128Shx147065 
20924128Shx147065 	/* pickup a rate */
20934128Shx147065 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
20944128Shx147065 	    IEEE80211_FC0_TYPE_MGT) {
20954128Shx147065 		/* mgmt frames are sent at the lowest available bit-rate */
20964499Shx147065 		rate = 2;
20974128Shx147065 	} else {
20984128Shx147065 		if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
20994128Shx147065 			rate = ic->ic_fixed_rate;
21004128Shx147065 		} else
21014128Shx147065 			rate = in->in_rates.ir_rates[in->in_txrate];
21024128Shx147065 	}
21034128Shx147065 	rate &= IEEE80211_RATE_VAL;
21044128Shx147065 	WPI_DBG((WPI_DEBUG_RATECTL, "tx rate[%d of %d] = %x",
21054128Shx147065 	    in->in_txrate, in->in_rates.ir_nrates, rate));
21064128Shx147065 #ifdef WPI_BPF
21074128Shx147065 #ifndef WPI_CURRENT
21084128Shx147065 	if (sc->sc_drvbpf != NULL) {
21094128Shx147065 #else
21104128Shx147065 	if (bpf_peers_present(sc->sc_drvbpf)) {
21114128Shx147065 #endif
21124128Shx147065 		struct wpi_tx_radiotap_header *tap = &sc->sc_txtap;
21134128Shx147065 
21144128Shx147065 		tap->wt_flags = 0;
21154128Shx147065 		tap->wt_chan_freq = LE_16(ic->ic_curchan->ic_freq);
21164128Shx147065 		tap->wt_chan_flags = LE_16(ic->ic_curchan->ic_flags);
21174128Shx147065 		tap->wt_rate = rate;
21184128Shx147065 		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
21194128Shx147065 			tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
21204128Shx147065 
21214128Shx147065 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
21224128Shx147065 	}
21234128Shx147065 #endif
21244128Shx147065 
21254128Shx147065 	tx->flags |= (LE_32(WPI_TX_AUTO_SEQ));
21264128Shx147065 	tx->flags |= LE_32(WPI_TX_BT_DISABLE | WPI_TX_CALIBRATION);
21274128Shx147065 
21284128Shx147065 	/* retrieve destination node's id */
21294128Shx147065 	tx->id = IEEE80211_IS_MULTICAST(wh->i_addr1) ? WPI_ID_BROADCAST :
21304128Shx147065 	    WPI_ID_BSS;
21314128Shx147065 
21324128Shx147065 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
21334128Shx147065 	    IEEE80211_FC0_TYPE_MGT) {
21344128Shx147065 		/* tell h/w to set timestamp in probe responses */
21354128Shx147065 		if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
21364128Shx147065 		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
21374128Shx147065 			tx->flags |= LE_32(WPI_TX_INSERT_TSTAMP);
21384128Shx147065 
21394128Shx147065 		if (((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
21404128Shx147065 		    IEEE80211_FC0_SUBTYPE_ASSOC_REQ) ||
21414128Shx147065 		    ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
21424128Shx147065 		    IEEE80211_FC0_SUBTYPE_REASSOC_REQ))
21434128Shx147065 			tx->timeout = 3;
21444128Shx147065 		else
21454128Shx147065 			tx->timeout = 2;
21464128Shx147065 	} else
21474128Shx147065 		tx->timeout = 0;
21484128Shx147065 
21494128Shx147065 	tx->rate = wpi_plcp_signal(rate);
21504128Shx147065 
21514128Shx147065 	/* be very persistant at sending frames out */
21524128Shx147065 	tx->rts_ntries = 7;
21534128Shx147065 	tx->data_ntries = 15;
21544128Shx147065 
21554128Shx147065 	tx->cck_mask  = 0x0f;
21564128Shx147065 	tx->ofdm_mask = 0xff;
21574128Shx147065 	tx->lifetime  = LE_32(0xffffffff);
21584128Shx147065 
21594128Shx147065 	tx->len = LE_16(len);
21604128Shx147065 
21614128Shx147065 	/* save and trim IEEE802.11 header */
21624128Shx147065 	(void) memcpy(tx + 1, m->b_rptr, hdrlen);
21634128Shx147065 	m->b_rptr += hdrlen;
21644128Shx147065 	(void) memcpy(data->dma_data.mem_va, m->b_rptr, len - hdrlen);
21654128Shx147065 
21664128Shx147065 	WPI_DBG((WPI_DEBUG_TX, "sending data: qid=%d idx=%d len=%d", ring->qid,
21674128Shx147065 	    ring->cur, len));
21684128Shx147065 
21694128Shx147065 	/* first scatter/gather segment is used by the tx data command */
21704128Shx147065 	desc->flags = LE_32(WPI_PAD32(len) << 28 | (2) << 24);
21714128Shx147065 	desc->segs[0].addr = LE_32(data->paddr_cmd);
21724128Shx147065 	desc->segs[0].len  = LE_32(
21734128Shx147065 	    roundup(4 + sizeof (wpi_cmd_data_t) + hdrlen, 4));
21744128Shx147065 	desc->segs[1].addr = LE_32(data->dma_data.cookie.dmac_address);
21754128Shx147065 	desc->segs[1].len  = LE_32(len - hdrlen);
21764128Shx147065 
21774128Shx147065 	WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
21784128Shx147065 	WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
21794128Shx147065 
21804128Shx147065 	mutex_enter(&sc->sc_tx_lock);
21814128Shx147065 	ring->queued++;
21824128Shx147065 	mutex_exit(&sc->sc_tx_lock);
21834128Shx147065 
21844128Shx147065 	/* kick ring */
21854128Shx147065 	ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT;
21864128Shx147065 	WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
21874128Shx147065 	freemsg(m);
21884128Shx147065 	/* release node reference */
21894128Shx147065 	ieee80211_free_node(in);
21904128Shx147065 
21914128Shx147065 	ic->ic_stats.is_tx_bytes += len;
21924128Shx147065 	ic->ic_stats.is_tx_frags++;
21934128Shx147065 
21944128Shx147065 	if (sc->sc_tx_timer == 0)
21954128Shx147065 		sc->sc_tx_timer = 5;
21964128Shx147065 exit:
21974128Shx147065 	return (err);
21984128Shx147065 }
21994128Shx147065 
22004128Shx147065 static void
22014128Shx147065 wpi_m_ioctl(void* arg, queue_t *wq, mblk_t *mp)
22024128Shx147065 {
22034128Shx147065 	wpi_sc_t	*sc  = (wpi_sc_t *)arg;
22044128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
22054128Shx147065 	int		err;
22064128Shx147065 
22074128Shx147065 	err = ieee80211_ioctl(ic, wq, mp);
22084128Shx147065 	if (err == ENETRESET) {
22096199Shx147065 		/*
22106199Shx147065 		 * This is special for the hidden AP connection.
22116199Shx147065 		 * In any case, we should make sure only one 'scan'
22126199Shx147065 		 * in the driver for a 'connect' CLI command. So
22136199Shx147065 		 * when connecting to a hidden AP, the scan is just
22146199Shx147065 		 * sent out to the air when we know the desired
22156199Shx147065 		 * essid of the AP we want to connect.
22166199Shx147065 		 */
22176199Shx147065 		if (ic->ic_des_esslen) {
22186199Shx147065 			(void) ieee80211_new_state(ic,
22196199Shx147065 			    IEEE80211_S_SCAN, -1);
22206199Shx147065 		}
22214128Shx147065 	}
22224128Shx147065 }
22234128Shx147065 
22244128Shx147065 /*ARGSUSED*/
22254128Shx147065 static int
22264128Shx147065 wpi_m_stat(void *arg, uint_t stat, uint64_t *val)
22274128Shx147065 {
22284128Shx147065 	wpi_sc_t	*sc  = (wpi_sc_t *)arg;
22294128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
22304128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
22314128Shx147065 	struct ieee80211_rateset *rs = &in->in_rates;
22324128Shx147065 
22334128Shx147065 	mutex_enter(&sc->sc_glock);
22344128Shx147065 	switch (stat) {
22354128Shx147065 	case MAC_STAT_IFSPEED:
22364128Shx147065 		*val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ?
22374128Shx147065 		    (rs->ir_rates[in->in_txrate] & IEEE80211_RATE_VAL)
22386890Sql147931 		    : ic->ic_fixed_rate) / 2 * 1000000;
22394128Shx147065 		break;
22404128Shx147065 	case MAC_STAT_NOXMTBUF:
22414128Shx147065 		*val = sc->sc_tx_nobuf;
22424128Shx147065 		break;
22434128Shx147065 	case MAC_STAT_NORCVBUF:
22444128Shx147065 		*val = sc->sc_rx_nobuf;
22454128Shx147065 		break;
22464128Shx147065 	case MAC_STAT_IERRORS:
22474128Shx147065 		*val = sc->sc_rx_err;
22484128Shx147065 		break;
22494128Shx147065 	case MAC_STAT_RBYTES:
22504128Shx147065 		*val = ic->ic_stats.is_rx_bytes;
22514128Shx147065 		break;
22524128Shx147065 	case MAC_STAT_IPACKETS:
22534128Shx147065 		*val = ic->ic_stats.is_rx_frags;
22544128Shx147065 		break;
22554128Shx147065 	case MAC_STAT_OBYTES:
22564128Shx147065 		*val = ic->ic_stats.is_tx_bytes;
22574128Shx147065 		break;
22584128Shx147065 	case MAC_STAT_OPACKETS:
22594128Shx147065 		*val = ic->ic_stats.is_tx_frags;
22604128Shx147065 		break;
22614128Shx147065 	case MAC_STAT_OERRORS:
22624128Shx147065 	case WIFI_STAT_TX_FAILED:
22634128Shx147065 		*val = sc->sc_tx_err;
22644128Shx147065 		break;
22654128Shx147065 	case WIFI_STAT_TX_RETRANS:
22664128Shx147065 		*val = sc->sc_tx_retries;
22674128Shx147065 		break;
22684128Shx147065 	case WIFI_STAT_FCS_ERRORS:
22694128Shx147065 	case WIFI_STAT_WEP_ERRORS:
22704128Shx147065 	case WIFI_STAT_TX_FRAGS:
22714128Shx147065 	case WIFI_STAT_MCAST_TX:
22724128Shx147065 	case WIFI_STAT_RTS_SUCCESS:
22734128Shx147065 	case WIFI_STAT_RTS_FAILURE:
22744128Shx147065 	case WIFI_STAT_ACK_FAILURE:
22754128Shx147065 	case WIFI_STAT_RX_FRAGS:
22764128Shx147065 	case WIFI_STAT_MCAST_RX:
22774128Shx147065 	case WIFI_STAT_RX_DUPS:
22784128Shx147065 		mutex_exit(&sc->sc_glock);
22794128Shx147065 		return (ieee80211_stat(ic, stat, val));
22804128Shx147065 	default:
22814128Shx147065 		mutex_exit(&sc->sc_glock);
22824128Shx147065 		return (ENOTSUP);
22834128Shx147065 	}
22844128Shx147065 	mutex_exit(&sc->sc_glock);
22854128Shx147065 
22864128Shx147065 	return (WPI_SUCCESS);
22874128Shx147065 
22884128Shx147065 }
22894128Shx147065 
22904128Shx147065 static int
22914128Shx147065 wpi_m_start(void *arg)
22924128Shx147065 {
22934128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
22944128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
22954128Shx147065 	int err;
22964128Shx147065 
22974128Shx147065 	err = wpi_init(sc);
22984128Shx147065 	if (err != WPI_SUCCESS) {
22994128Shx147065 		wpi_stop(sc);
23004128Shx147065 		DELAY(1000000);
23014128Shx147065 		err = wpi_init(sc);
23024128Shx147065 	}
23036062Shx147065 
23046062Shx147065 	if (err) {
23056062Shx147065 		/*
23066062Shx147065 		 * The hw init err(eg. RF is OFF). Return Success to make
23076062Shx147065 		 * the 'plumb' succeed. The wpi_thread() tries to re-init
23086062Shx147065 		 * background.
23096062Shx147065 		 */
23106062Shx147065 		mutex_enter(&sc->sc_glock);
23116062Shx147065 		sc->sc_flags |= WPI_F_HW_ERR_RECOVER;
23126062Shx147065 		mutex_exit(&sc->sc_glock);
23136062Shx147065 		return (WPI_SUCCESS);
23146062Shx147065 	}
23154128Shx147065 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
23166062Shx147065 	mutex_enter(&sc->sc_glock);
23176062Shx147065 	sc->sc_flags |= WPI_F_RUNNING;
23186062Shx147065 	mutex_exit(&sc->sc_glock);
23196062Shx147065 
23206062Shx147065 	return (WPI_SUCCESS);
23214128Shx147065 }
23224128Shx147065 
23234128Shx147065 static void
23244128Shx147065 wpi_m_stop(void *arg)
23254128Shx147065 {
23264128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
23274128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
23284128Shx147065 
23294128Shx147065 	wpi_stop(sc);
23304128Shx147065 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
23314128Shx147065 	mutex_enter(&sc->sc_mt_lock);
23324128Shx147065 	sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER;
23334128Shx147065 	sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL;
23344128Shx147065 	mutex_exit(&sc->sc_mt_lock);
23356062Shx147065 	mutex_enter(&sc->sc_glock);
23366062Shx147065 	sc->sc_flags &= ~WPI_F_RUNNING;
23376062Shx147065 	mutex_exit(&sc->sc_glock);
23384128Shx147065 }
23394128Shx147065 
23404128Shx147065 /*ARGSUSED*/
23414128Shx147065 static int
23424128Shx147065 wpi_m_unicst(void *arg, const uint8_t *macaddr)
23434128Shx147065 {
23444128Shx147065 	wpi_sc_t *sc = (wpi_sc_t *)arg;
23454128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
23464128Shx147065 	int err;
23474128Shx147065 
23484128Shx147065 	if (!IEEE80211_ADDR_EQ(ic->ic_macaddr, macaddr)) {
23494128Shx147065 		IEEE80211_ADDR_COPY(ic->ic_macaddr, macaddr);
23504128Shx147065 		mutex_enter(&sc->sc_glock);
23514128Shx147065 		err = wpi_config(sc);
23524128Shx147065 		mutex_exit(&sc->sc_glock);
23534128Shx147065 		if (err != WPI_SUCCESS) {
23544128Shx147065 			cmn_err(CE_WARN,
23554128Shx147065 			    "wpi_m_unicst(): "
23564128Shx147065 			    "failed to configure device\n");
23574128Shx147065 			goto fail;
23584128Shx147065 		}
23594128Shx147065 	}
23604128Shx147065 	return (WPI_SUCCESS);
23614128Shx147065 fail:
23624128Shx147065 	return (err);
23634128Shx147065 }
23644128Shx147065 
23654128Shx147065 /*ARGSUSED*/
23664128Shx147065 static int
23674128Shx147065 wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m)
23684128Shx147065 {
23694128Shx147065 	return (WPI_SUCCESS);
23704128Shx147065 }
23714128Shx147065 
23724128Shx147065 /*ARGSUSED*/
23734128Shx147065 static int
23744128Shx147065 wpi_m_promisc(void *arg, boolean_t on)
23754128Shx147065 {
23764128Shx147065 	return (WPI_SUCCESS);
23774128Shx147065 }
23784128Shx147065 
23794128Shx147065 static void
23804128Shx147065 wpi_thread(wpi_sc_t *sc)
23814128Shx147065 {
23824128Shx147065 	ieee80211com_t	*ic = &sc->sc_ic;
23834128Shx147065 	clock_t clk;
23844128Shx147065 	int times = 0, err, n = 0, timeout = 0;
23856062Shx147065 	uint32_t tmp;
23864128Shx147065 
23874128Shx147065 	mutex_enter(&sc->sc_mt_lock);
23884128Shx147065 	while (sc->sc_mf_thread_switch) {
23896062Shx147065 		tmp = WPI_READ(sc, WPI_GPIO_CTL);
23906062Shx147065 		if (tmp & WPI_GPIO_HW_RF_KILL) {
23916062Shx147065 			sc->sc_flags &= ~WPI_F_RADIO_OFF;
23926062Shx147065 		} else {
23936062Shx147065 			sc->sc_flags |= WPI_F_RADIO_OFF;
23946062Shx147065 		}
23956062Shx147065 		/*
23966062Shx147065 		 * If in SUSPEND or the RF is OFF, do nothing
23976062Shx147065 		 */
23986062Shx147065 		if ((sc->sc_flags & WPI_F_SUSPEND) ||
23996062Shx147065 		    (sc->sc_flags & WPI_F_RADIO_OFF)) {
24006062Shx147065 			mutex_exit(&sc->sc_mt_lock);
24016062Shx147065 			delay(drv_usectohz(100000));
24026062Shx147065 			mutex_enter(&sc->sc_mt_lock);
24036062Shx147065 			continue;
24046062Shx147065 		}
24056062Shx147065 
24064128Shx147065 		/*
24074128Shx147065 		 * recovery fatal error
24084128Shx147065 		 */
24094128Shx147065 		if (ic->ic_mach &&
24104128Shx147065 		    (sc->sc_flags & WPI_F_HW_ERR_RECOVER)) {
24114128Shx147065 
24124128Shx147065 			WPI_DBG((WPI_DEBUG_FW,
24134128Shx147065 			    "wpi_thread(): "
24144128Shx147065 			    "try to recover fatal hw error: %d\n", times++));
24154128Shx147065 
24164128Shx147065 			wpi_stop(sc);
24174128Shx147065 			ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
24184128Shx147065 
24194128Shx147065 			mutex_exit(&sc->sc_mt_lock);
24204128Shx147065 			delay(drv_usectohz(2000000));
24214128Shx147065 			mutex_enter(&sc->sc_mt_lock);
24224128Shx147065 			err = wpi_init(sc);
24234128Shx147065 			if (err != WPI_SUCCESS) {
24244128Shx147065 				n++;
24254128Shx147065 				if (n < 3)
24264128Shx147065 					continue;
24274128Shx147065 			}
24284128Shx147065 			n = 0;
24296062Shx147065 			if (!err)
24306062Shx147065 				sc->sc_flags |= WPI_F_RUNNING;
24314128Shx147065 			sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER;
24324128Shx147065 			mutex_exit(&sc->sc_mt_lock);
24334128Shx147065 			delay(drv_usectohz(2000000));
24344128Shx147065 			if (sc->sc_ostate != IEEE80211_S_INIT)
24355453Shx147065 				ieee80211_new_state(ic, IEEE80211_S_SCAN, 0);
24364128Shx147065 			mutex_enter(&sc->sc_mt_lock);
24374128Shx147065 		}
24384128Shx147065 
24394128Shx147065 		/*
24404128Shx147065 		 * rate ctl
24414128Shx147065 		 */
24424128Shx147065 		if (ic->ic_mach &&
24434128Shx147065 		    (sc->sc_flags & WPI_F_RATE_AUTO_CTL)) {
24444128Shx147065 			clk = ddi_get_lbolt();
24454128Shx147065 			if (clk > sc->sc_clk + drv_usectohz(500000)) {
24464128Shx147065 				wpi_amrr_timeout(sc);
24474128Shx147065 			}
24484128Shx147065 		}
24494128Shx147065 		mutex_exit(&sc->sc_mt_lock);
24504128Shx147065 		delay(drv_usectohz(100000));
24514128Shx147065 		mutex_enter(&sc->sc_mt_lock);
24524128Shx147065 		if (sc->sc_tx_timer) {
24534128Shx147065 			timeout++;
24544128Shx147065 			if (timeout == 10) {
24554128Shx147065 				sc->sc_tx_timer--;
24564128Shx147065 				if (sc->sc_tx_timer == 0) {
24574128Shx147065 					sc->sc_flags |= WPI_F_HW_ERR_RECOVER;
24584128Shx147065 					sc->sc_ostate = IEEE80211_S_RUN;
24594128Shx147065 				}
24604128Shx147065 				timeout = 0;
24614128Shx147065 			}
24624128Shx147065 		}
24634128Shx147065 	}
24644128Shx147065 	sc->sc_mf_thread = NULL;
24654128Shx147065 	cv_signal(&sc->sc_mt_cv);
24664128Shx147065 	mutex_exit(&sc->sc_mt_lock);
24674128Shx147065 }
24684128Shx147065 
24694128Shx147065 /*
24704128Shx147065  * Extract various information from EEPROM.
24714128Shx147065  */
24724128Shx147065 static void
24734128Shx147065 wpi_read_eeprom(wpi_sc_t *sc)
24744128Shx147065 {
24754128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
24764128Shx147065 	uint16_t val;
24774128Shx147065 	int i;
24784128Shx147065 
24794128Shx147065 	/* read MAC address */
24804128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 0);
24814128Shx147065 	ic->ic_macaddr[0] = val & 0xff;
24824128Shx147065 	ic->ic_macaddr[1] = val >> 8;
24834128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 1);
24844128Shx147065 	ic->ic_macaddr[2] = val & 0xff;
24854128Shx147065 	ic->ic_macaddr[3] = val >> 8;
24864128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 2);
24874128Shx147065 	ic->ic_macaddr[4] = val & 0xff;
24884128Shx147065 	ic->ic_macaddr[5] = val >> 8;
24894128Shx147065 
24904128Shx147065 	WPI_DBG((WPI_DEBUG_EEPROM,
24914128Shx147065 	    "mac:%2x:%2x:%2x:%2x:%2x:%2x\n",
24924128Shx147065 	    ic->ic_macaddr[0], ic->ic_macaddr[1],
24934128Shx147065 	    ic->ic_macaddr[2], ic->ic_macaddr[3],
24944128Shx147065 	    ic->ic_macaddr[4], ic->ic_macaddr[5]));
24954128Shx147065 	/* read power settings for 2.4GHz channels */
24964128Shx147065 	for (i = 0; i < 14; i++) {
24974128Shx147065 		sc->sc_pwr1[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR1 + i);
24984128Shx147065 		sc->sc_pwr2[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR2 + i);
24994128Shx147065 		WPI_DBG((WPI_DEBUG_EEPROM,
25004128Shx147065 		    "channel %d pwr1 0x%04x pwr2 0x%04x\n", i + 1,
25014128Shx147065 		    sc->sc_pwr1[i], sc->sc_pwr2[i]));
25024128Shx147065 	}
25034128Shx147065 }
25044128Shx147065 
25054128Shx147065 /*
25064128Shx147065  * Send a command to the firmware.
25074128Shx147065  */
25084128Shx147065 static int
25094128Shx147065 wpi_cmd(wpi_sc_t *sc, int code, const void *buf, int size, int async)
25104128Shx147065 {
25114128Shx147065 	wpi_tx_ring_t *ring = &sc->sc_cmdq;
25124128Shx147065 	wpi_tx_desc_t *desc;
25134128Shx147065 	wpi_tx_cmd_t *cmd;
25144128Shx147065 
25154128Shx147065 	ASSERT(size <= sizeof (cmd->data));
25164128Shx147065 	ASSERT(mutex_owned(&sc->sc_glock));
25174128Shx147065 
25184128Shx147065 	WPI_DBG((WPI_DEBUG_CMD, "wpi_cmd() # code[%d]", code));
25194128Shx147065 	desc = ring->data[ring->cur].desc;
25204128Shx147065 	cmd = ring->data[ring->cur].cmd;
25214128Shx147065 
25224128Shx147065 	cmd->code = (uint8_t)code;
25234128Shx147065 	cmd->flags = 0;
25244128Shx147065 	cmd->qid = ring->qid;
25254128Shx147065 	cmd->idx = ring->cur;
25264128Shx147065 	(void) memcpy(cmd->data, buf, size);
25274128Shx147065 
25284128Shx147065 	desc->flags = LE_32(WPI_PAD32(size) << 28 | 1 << 24);
25294128Shx147065 	desc->segs[0].addr = ring->data[ring->cur].paddr_cmd;
25304128Shx147065 	desc->segs[0].len  = 4 + size;
25314128Shx147065 
25324128Shx147065 	/* kick cmd ring */
25334128Shx147065 	ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT;
25344128Shx147065 	WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
25354128Shx147065 
25364128Shx147065 	if (async)
25374128Shx147065 		return (WPI_SUCCESS);
25384128Shx147065 	else {
25394128Shx147065 		clock_t clk;
25404128Shx147065 		sc->sc_flags &= ~WPI_F_CMD_DONE;
25414128Shx147065 		clk = ddi_get_lbolt() + drv_usectohz(2000000);
25424128Shx147065 		while (!(sc->sc_flags & WPI_F_CMD_DONE)) {
25434128Shx147065 			if (cv_timedwait(&sc->sc_cmd_cv, &sc->sc_glock, clk)
25444128Shx147065 			    < 0)
25454128Shx147065 				break;
25464128Shx147065 		}
25474128Shx147065 		if (sc->sc_flags & WPI_F_CMD_DONE)
25484128Shx147065 			return (WPI_SUCCESS);
25494128Shx147065 		else
25504128Shx147065 			return (WPI_FAIL);
25514128Shx147065 	}
25524128Shx147065 }
25534128Shx147065 
25544128Shx147065 /*
25554128Shx147065  * Configure h/w multi-rate retries.
25564128Shx147065  */
25574128Shx147065 static int
25584128Shx147065 wpi_mrr_setup(wpi_sc_t *sc)
25594128Shx147065 {
25604128Shx147065 	wpi_mrr_setup_t mrr;
25614128Shx147065 	int i, err;
25624128Shx147065 
25634128Shx147065 	/* CCK rates (not used with 802.11a) */
25644128Shx147065 	for (i = WPI_CCK1; i <= WPI_CCK11; i++) {
25654128Shx147065 		mrr.rates[i].flags = 0;
25664128Shx147065 		mrr.rates[i].signal = wpi_ridx_to_signal[i];
25674128Shx147065 		/* fallback to the immediate lower CCK rate (if any) */
25684128Shx147065 		mrr.rates[i].next = (i == WPI_CCK1) ? WPI_CCK1 : i - 1;
25694128Shx147065 		/* try one time at this rate before falling back to "next" */
25704128Shx147065 		mrr.rates[i].ntries = 1;
25714128Shx147065 	}
25724128Shx147065 
25734128Shx147065 	/* OFDM rates (not used with 802.11b) */
25744128Shx147065 	for (i = WPI_OFDM6; i <= WPI_OFDM54; i++) {
25754128Shx147065 		mrr.rates[i].flags = 0;
25764128Shx147065 		mrr.rates[i].signal = wpi_ridx_to_signal[i];
25774128Shx147065 		/* fallback to the immediate lower OFDM rate (if any) */
25784128Shx147065 		mrr.rates[i].next = (i == WPI_OFDM6) ? WPI_OFDM6 : i - 1;
25794128Shx147065 		/* try one time at this rate before falling back to "next" */
25804128Shx147065 		mrr.rates[i].ntries = 1;
25814128Shx147065 	}
25824128Shx147065 
25834128Shx147065 	/* setup MRR for control frames */
25844128Shx147065 	mrr.which = LE_32(WPI_MRR_CTL);
25854128Shx147065 	err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1);
25864128Shx147065 	if (err != WPI_SUCCESS) {
25874128Shx147065 		WPI_DBG((WPI_DEBUG_MRR,
25884128Shx147065 		    "could not setup MRR for control frames\n"));
25894128Shx147065 		return (err);
25904128Shx147065 	}
25914128Shx147065 
25924128Shx147065 	/* setup MRR for data frames */
25934128Shx147065 	mrr.which = LE_32(WPI_MRR_DATA);
25944128Shx147065 	err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1);
25954128Shx147065 	if (err != WPI_SUCCESS) {
25964128Shx147065 		WPI_DBG((WPI_DEBUG_MRR,
25974128Shx147065 		    "could not setup MRR for data frames\n"));
25984128Shx147065 		return (err);
25994128Shx147065 	}
26004128Shx147065 
26014128Shx147065 	return (WPI_SUCCESS);
26024128Shx147065 }
26034128Shx147065 
26044128Shx147065 static void
26054128Shx147065 wpi_set_led(wpi_sc_t *sc, uint8_t which, uint8_t off, uint8_t on)
26064128Shx147065 {
26074128Shx147065 	wpi_cmd_led_t led;
26084128Shx147065 
26094128Shx147065 	led.which = which;
26104128Shx147065 	led.unit = LE_32(100000);	/* on/off in unit of 100ms */
26114128Shx147065 	led.off = off;
26124128Shx147065 	led.on = on;
26134128Shx147065 
26144128Shx147065 	(void) wpi_cmd(sc, WPI_CMD_SET_LED, &led, sizeof (led), 1);
26154128Shx147065 }
26164128Shx147065 
26174128Shx147065 static int
26184128Shx147065 wpi_auth(wpi_sc_t *sc)
26194128Shx147065 {
26204128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
26214128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
26224128Shx147065 	wpi_node_t node;
26234128Shx147065 	int err;
26244128Shx147065 
26254128Shx147065 	/* update adapter's configuration */
26264128Shx147065 	IEEE80211_ADDR_COPY(sc->sc_config.bssid, in->in_bssid);
26274128Shx147065 	sc->sc_config.chan = ieee80211_chan2ieee(ic, in->in_chan);
26284128Shx147065 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
26294128Shx147065 		sc->sc_config.cck_mask  = 0x03;
26304128Shx147065 		sc->sc_config.ofdm_mask = 0;
26314128Shx147065 	} else if ((in->in_chan != IEEE80211_CHAN_ANYC) &&
26324128Shx147065 	    (IEEE80211_IS_CHAN_5GHZ(in->in_chan))) {
26334128Shx147065 		sc->sc_config.cck_mask  = 0;
26344128Shx147065 		sc->sc_config.ofdm_mask = 0x15;
26354128Shx147065 	} else {	/* assume 802.11b/g */
26364128Shx147065 		sc->sc_config.cck_mask  = 0x0f;
26375453Shx147065 		sc->sc_config.ofdm_mask = 0xff;
26384128Shx147065 	}
26394128Shx147065 
26404128Shx147065 	WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x cck %x ofdm %x"
26414128Shx147065 	    " bssid:%02x:%02x:%02x:%02x:%02x:%2x\n",
26424128Shx147065 	    sc->sc_config.chan, sc->sc_config.flags,
26434128Shx147065 	    sc->sc_config.cck_mask, sc->sc_config.ofdm_mask,
26444128Shx147065 	    sc->sc_config.bssid[0], sc->sc_config.bssid[1],
26454128Shx147065 	    sc->sc_config.bssid[2], sc->sc_config.bssid[3],
26464128Shx147065 	    sc->sc_config.bssid[4], sc->sc_config.bssid[5]));
26474128Shx147065 	err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
26484128Shx147065 	    sizeof (wpi_config_t), 1);
26494128Shx147065 	if (err != WPI_SUCCESS) {
26504128Shx147065 		cmn_err(CE_WARN, "wpi_auth(): failed to configurate chan%d\n",
26514128Shx147065 		    sc->sc_config.chan);
26524128Shx147065 		return (err);
26534128Shx147065 	}
26544128Shx147065 
26554128Shx147065 	/* add default node */
26564128Shx147065 	(void) memset(&node, 0, sizeof (node));
26574128Shx147065 	IEEE80211_ADDR_COPY(node.bssid, in->in_bssid);
26584128Shx147065 	node.id = WPI_ID_BSS;
26594128Shx147065 	node.rate = wpi_plcp_signal(2);
26604128Shx147065 	err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1);
26614128Shx147065 	if (err != WPI_SUCCESS) {
26624128Shx147065 		cmn_err(CE_WARN, "wpi_auth(): failed to add BSS node\n");
26634128Shx147065 		return (err);
26644128Shx147065 	}
26654128Shx147065 
26664128Shx147065 	err = wpi_mrr_setup(sc);
26674128Shx147065 	if (err != WPI_SUCCESS) {
26684128Shx147065 		cmn_err(CE_WARN, "wpi_auth(): failed to setup MRR\n");
26694128Shx147065 		return (err);
26704128Shx147065 	}
26714128Shx147065 
26724128Shx147065 	return (WPI_SUCCESS);
26734128Shx147065 }
26744128Shx147065 
26754128Shx147065 /*
26764128Shx147065  * Send a scan request to the firmware.
26774128Shx147065  */
26784128Shx147065 static int
26794128Shx147065 wpi_scan(wpi_sc_t *sc)
26804128Shx147065 {
26814128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
26824128Shx147065 	wpi_tx_ring_t *ring = &sc->sc_cmdq;
26834128Shx147065 	wpi_tx_desc_t *desc;
26844128Shx147065 	wpi_tx_data_t *data;
26854128Shx147065 	wpi_tx_cmd_t *cmd;
26864128Shx147065 	wpi_scan_hdr_t *hdr;
26874128Shx147065 	wpi_scan_chan_t *chan;
26884128Shx147065 	struct ieee80211_frame *wh;
26894128Shx147065 	ieee80211_node_t *in = ic->ic_bss;
26904128Shx147065 	struct ieee80211_rateset *rs;
26914128Shx147065 	enum ieee80211_phymode mode;
26924128Shx147065 	uint8_t *frm;
26934128Shx147065 	int i, pktlen, nrates;
26944128Shx147065 
26954128Shx147065 	data = &ring->data[ring->cur];
26964128Shx147065 	desc = data->desc;
26974128Shx147065 	cmd = (wpi_tx_cmd_t *)data->dma_data.mem_va;
26984128Shx147065 
26994128Shx147065 	cmd->code = WPI_CMD_SCAN;
27004128Shx147065 	cmd->flags = 0;
27014128Shx147065 	cmd->qid = ring->qid;
27024128Shx147065 	cmd->idx = ring->cur;
27034128Shx147065 
27044128Shx147065 	hdr = (wpi_scan_hdr_t *)cmd->data;
27054128Shx147065 	(void) memset(hdr, 0, sizeof (wpi_scan_hdr_t));
27064128Shx147065 	hdr->first = 1;
27074128Shx147065 	hdr->nchan = 14;
27084128Shx147065 	hdr->len = hdr->nchan * sizeof (wpi_scan_chan_t);
27094128Shx147065 	hdr->quiet = LE_16(5);
27104128Shx147065 	hdr->threshold = LE_16(1);
27114128Shx147065 	hdr->filter = LE_32(5);
27124128Shx147065 	hdr->rate = wpi_plcp_signal(2);
27134128Shx147065 	hdr->id = WPI_ID_BROADCAST;
27144128Shx147065 	hdr->mask = LE_32(0xffffffff);
27154128Shx147065 	hdr->esslen = ic->ic_des_esslen;
27164128Shx147065 	if (ic->ic_des_esslen)
27174128Shx147065 		bcopy(ic->ic_des_essid, hdr->essid, ic->ic_des_esslen);
27184128Shx147065 	else
27194128Shx147065 		bzero(hdr->essid, sizeof (hdr->essid));
27204128Shx147065 	/*
27214128Shx147065 	 * Build a probe request frame.  Most of the following code is a
27224128Shx147065 	 * copy & paste of what is done in net80211.  Unfortunately, the
27234128Shx147065 	 * functions to add IEs are static and thus can't be reused here.
27244128Shx147065 	 */
27254128Shx147065 	wh = (struct ieee80211_frame *)(hdr + 1);
27264128Shx147065 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
27274128Shx147065 	    IEEE80211_FC0_SUBTYPE_PROBE_REQ;
27284128Shx147065 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
27294128Shx147065 	(void) memset(wh->i_addr1, 0xff, 6);
27304128Shx147065 	IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr);
27314128Shx147065 	(void) memset(wh->i_addr3, 0xff, 6);
27324128Shx147065 	*(uint16_t *)&wh->i_dur[0] = 0;	/* filled by h/w */
27334128Shx147065 	*(uint16_t *)&wh->i_seq[0] = 0;	/* filled by h/w */
27344128Shx147065 
27354128Shx147065 	frm = (uint8_t *)(wh + 1);
27364128Shx147065 
27374128Shx147065 	/* add essid IE */
27384128Shx147065 	*frm++ = IEEE80211_ELEMID_SSID;
27394128Shx147065 	*frm++ = in->in_esslen;
27404128Shx147065 	(void) memcpy(frm, in->in_essid, in->in_esslen);
27414128Shx147065 	frm += in->in_esslen;
27424128Shx147065 
27434128Shx147065 	mode = ieee80211_chan2mode(ic, ic->ic_curchan);
27444128Shx147065 	rs = &ic->ic_sup_rates[mode];
27454128Shx147065 
27464128Shx147065 	/* add supported rates IE */
27474128Shx147065 	*frm++ = IEEE80211_ELEMID_RATES;
27484128Shx147065 	nrates = rs->ir_nrates;
27494128Shx147065 	if (nrates > IEEE80211_RATE_SIZE)
27504128Shx147065 		nrates = IEEE80211_RATE_SIZE;
27514128Shx147065 	*frm++ = (uint8_t)nrates;
27524128Shx147065 	(void) memcpy(frm, rs->ir_rates, nrates);
27534128Shx147065 	frm += nrates;
27544128Shx147065 
27554128Shx147065 	/* add supported xrates IE */
27564128Shx147065 	if (rs->ir_nrates > IEEE80211_RATE_SIZE) {
27574128Shx147065 		nrates = rs->ir_nrates - IEEE80211_RATE_SIZE;
27584128Shx147065 		*frm++ = IEEE80211_ELEMID_XRATES;
27594128Shx147065 		*frm++ = (uint8_t)nrates;
27604128Shx147065 		(void) memcpy(frm, rs->ir_rates + IEEE80211_RATE_SIZE, nrates);
27614128Shx147065 		frm += nrates;
27624128Shx147065 	}
27634128Shx147065 
27644128Shx147065 	/* add optionnal IE (usually an RSN IE) */
27654128Shx147065 	if (ic->ic_opt_ie != NULL) {
27664128Shx147065 		(void) memcpy(frm, ic->ic_opt_ie, ic->ic_opt_ie_len);
27674128Shx147065 		frm += ic->ic_opt_ie_len;
27684128Shx147065 	}
27694128Shx147065 
27704128Shx147065 	/* setup length of probe request */
2771*6990Sgd78059 	hdr->pbrlen = LE_16((uintptr_t)frm - (uintptr_t)wh);
27724128Shx147065 
27734128Shx147065 	/* align on a 4-byte boundary */
27744128Shx147065 	chan = (wpi_scan_chan_t *)frm;
27754128Shx147065 	for (i = 1; i <= hdr->nchan; i++, chan++) {
27764128Shx147065 		chan->flags = 3;
27774128Shx147065 		chan->chan = (uint8_t)i;
27784128Shx147065 		chan->magic = LE_16(0x62ab);
27794128Shx147065 		chan->active = LE_16(20);
27804128Shx147065 		chan->passive = LE_16(120);
27814128Shx147065 
27824128Shx147065 		frm += sizeof (wpi_scan_chan_t);
27834128Shx147065 	}
27844128Shx147065 
2785*6990Sgd78059 	pktlen = (uintptr_t)frm - (uintptr_t)cmd;
27864128Shx147065 
27874128Shx147065 	desc->flags = LE_32(WPI_PAD32(pktlen) << 28 | 1 << 24);
27884128Shx147065 	desc->segs[0].addr = LE_32(data->dma_data.cookie.dmac_address);
27894128Shx147065 	desc->segs[0].len  = LE_32(pktlen);
27904128Shx147065 
27914128Shx147065 	WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV);
27924128Shx147065 	WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV);
27934128Shx147065 
27944128Shx147065 	/* kick cmd ring */
27954128Shx147065 	ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT;
27964128Shx147065 	WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
27974128Shx147065 
27984128Shx147065 	return (WPI_SUCCESS);	/* will be notified async. of failure/success */
27994128Shx147065 }
28004128Shx147065 
28014128Shx147065 static int
28024128Shx147065 wpi_config(wpi_sc_t *sc)
28034128Shx147065 {
28044128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
28054128Shx147065 	wpi_txpower_t txpower;
28064128Shx147065 	wpi_power_t power;
28074128Shx147065 #ifdef WPI_BLUE_COEXISTENCE
28084128Shx147065 	wpi_bluetooth_t bluetooth;
28094128Shx147065 #endif
28104128Shx147065 	wpi_node_t node;
28114128Shx147065 	int err;
28124128Shx147065 
28134128Shx147065 	/* Intel's binary only daemon is a joke.. */
28144128Shx147065 
28154128Shx147065 	/* set Tx power for 2.4GHz channels (values read from EEPROM) */
28164128Shx147065 	(void) memset(&txpower, 0, sizeof (txpower));
28174128Shx147065 	(void) memcpy(txpower.pwr1, sc->sc_pwr1, 14 * sizeof (uint16_t));
28184128Shx147065 	(void) memcpy(txpower.pwr2, sc->sc_pwr2, 14 * sizeof (uint16_t));
28194128Shx147065 	err = wpi_cmd(sc, WPI_CMD_TXPOWER, &txpower, sizeof (txpower), 0);
28204128Shx147065 	if (err != WPI_SUCCESS) {
28214128Shx147065 		cmn_err(CE_WARN, "wpi_config(): failed to set txpower\n");
28224128Shx147065 		return (err);
28234128Shx147065 	}
28244128Shx147065 
28254128Shx147065 	/* set power mode */
28264128Shx147065 	(void) memset(&power, 0, sizeof (power));
28274128Shx147065 	power.flags = LE_32(0x8);
28284128Shx147065 	err = wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &power, sizeof (power), 0);
28294128Shx147065 	if (err != WPI_SUCCESS) {
28304128Shx147065 		cmn_err(CE_WARN, "wpi_config(): failed to set power mode\n");
28314128Shx147065 		return (err);
28324128Shx147065 	}
28334128Shx147065 #ifdef WPI_BLUE_COEXISTENCE
28344128Shx147065 	/* configure bluetooth coexistence */
28354128Shx147065 	(void) memset(&bluetooth, 0, sizeof (bluetooth));
28364128Shx147065 	bluetooth.flags = 3;
28374128Shx147065 	bluetooth.lead = 0xaa;
28384128Shx147065 	bluetooth.kill = 1;
28394128Shx147065 	err = wpi_cmd(sc, WPI_CMD_BLUETOOTH, &bluetooth,
28404128Shx147065 	    sizeof (bluetooth), 0);
28414128Shx147065 	if (err != WPI_SUCCESS) {
28424128Shx147065 		cmn_err(CE_WARN,
28434128Shx147065 		    "wpi_config(): "
28444128Shx147065 		    "failed to configurate bluetooth coexistence\n");
28454128Shx147065 		return (err);
28464128Shx147065 	}
28474128Shx147065 #endif
28484128Shx147065 	/* configure adapter */
28494128Shx147065 	(void) memset(&sc->sc_config, 0, sizeof (wpi_config_t));
28504128Shx147065 	IEEE80211_ADDR_COPY(sc->sc_config.myaddr, ic->ic_macaddr);
28514128Shx147065 	sc->sc_config.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
28524128Shx147065 	sc->sc_config.flags = LE_32(WPI_CONFIG_TSF | WPI_CONFIG_AUTO |
28534128Shx147065 	    WPI_CONFIG_24GHZ);
28544128Shx147065 	sc->sc_config.filter = 0;
28554128Shx147065 	switch (ic->ic_opmode) {
28564128Shx147065 	case IEEE80211_M_STA:
28574128Shx147065 		sc->sc_config.mode = WPI_MODE_STA;
28585453Shx147065 		sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST);
28594128Shx147065 		break;
28604128Shx147065 	case IEEE80211_M_IBSS:
28614128Shx147065 	case IEEE80211_M_AHDEMO:
28624128Shx147065 		sc->sc_config.mode = WPI_MODE_IBSS;
28634128Shx147065 		break;
28644128Shx147065 	case IEEE80211_M_HOSTAP:
28654128Shx147065 		sc->sc_config.mode = WPI_MODE_HOSTAP;
28664128Shx147065 		break;
28674128Shx147065 	case IEEE80211_M_MONITOR:
28684128Shx147065 		sc->sc_config.mode = WPI_MODE_MONITOR;
28694128Shx147065 		sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST |
28704128Shx147065 		    WPI_FILTER_CTL | WPI_FILTER_PROMISC);
28714128Shx147065 		break;
28724128Shx147065 	}
28734128Shx147065 	sc->sc_config.cck_mask  = 0x0f;	/* not yet negotiated */
28744128Shx147065 	sc->sc_config.ofdm_mask = 0xff;	/* not yet negotiated */
28754128Shx147065 	err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config,
28764128Shx147065 	    sizeof (wpi_config_t), 0);
28774128Shx147065 	if (err != WPI_SUCCESS) {
28784128Shx147065 		cmn_err(CE_WARN, "wpi_config(): "
28794128Shx147065 		    "failed to set configure command\n");
28804128Shx147065 		return (err);
28814128Shx147065 	}
28824128Shx147065 
28834128Shx147065 	/* add broadcast node */
28844128Shx147065 	(void) memset(&node, 0, sizeof (node));
28854128Shx147065 	(void) memset(node.bssid, 0xff, 6);
28864128Shx147065 	node.id = WPI_ID_BROADCAST;
28874128Shx147065 	node.rate = wpi_plcp_signal(2);
28884128Shx147065 	err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 0);
28894128Shx147065 	if (err != WPI_SUCCESS) {
28904128Shx147065 		cmn_err(CE_WARN, "wpi_config(): "
28914128Shx147065 		    "failed to add broadcast node\n");
28924128Shx147065 		return (err);
28934128Shx147065 	}
28944128Shx147065 
28954128Shx147065 	return (WPI_SUCCESS);
28964128Shx147065 }
28974128Shx147065 
28984128Shx147065 static void
28994128Shx147065 wpi_stop_master(wpi_sc_t *sc)
29004128Shx147065 {
29014128Shx147065 	uint32_t tmp;
29024128Shx147065 	int ntries;
29034128Shx147065 
29044128Shx147065 	tmp = WPI_READ(sc, WPI_RESET);
29054128Shx147065 	WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER);
29064128Shx147065 
29074128Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
29084128Shx147065 	if ((tmp & WPI_GPIO_PWR_STATUS) == WPI_GPIO_PWR_SLEEP)
29094128Shx147065 		return;	/* already asleep */
29104128Shx147065 
29114128Shx147065 	for (ntries = 0; ntries < 2000; ntries++) {
29124128Shx147065 		if (WPI_READ(sc, WPI_RESET) & WPI_MASTER_DISABLED)
29134128Shx147065 			break;
29144128Shx147065 		DELAY(1000);
29154128Shx147065 	}
29164128Shx147065 	if (ntries == 2000)
29174128Shx147065 		WPI_DBG((WPI_DEBUG_HW, "timeout waiting for master\n"));
29184128Shx147065 }
29194128Shx147065 
29204128Shx147065 static int
29214128Shx147065 wpi_power_up(wpi_sc_t *sc)
29224128Shx147065 {
29234128Shx147065 	uint32_t tmp;
29244128Shx147065 	int ntries;
29254128Shx147065 
29264128Shx147065 	wpi_mem_lock(sc);
29274128Shx147065 	tmp = wpi_mem_read(sc, WPI_MEM_POWER);
29284128Shx147065 	wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000);
29294128Shx147065 	wpi_mem_unlock(sc);
29304128Shx147065 
29314128Shx147065 	for (ntries = 0; ntries < 5000; ntries++) {
29324128Shx147065 		if (WPI_READ(sc, WPI_GPIO_STATUS) & WPI_POWERED)
29334128Shx147065 			break;
29344128Shx147065 		DELAY(10);
29354128Shx147065 	}
29364128Shx147065 	if (ntries == 5000) {
29374128Shx147065 		cmn_err(CE_WARN,
29384128Shx147065 		    "wpi_power_up(): timeout waiting for NIC to power up\n");
29394128Shx147065 		return (ETIMEDOUT);
29404128Shx147065 	}
29414128Shx147065 	return (WPI_SUCCESS);
29424128Shx147065 }
29434128Shx147065 
29444128Shx147065 static int
29454128Shx147065 wpi_reset(wpi_sc_t *sc)
29464128Shx147065 {
29474128Shx147065 	uint32_t tmp;
29484128Shx147065 	int ntries;
29494128Shx147065 
29504128Shx147065 	/* clear any pending interrupts */
29514128Shx147065 	WPI_WRITE(sc, WPI_INTR, 0xffffffff);
29524128Shx147065 
29534128Shx147065 	tmp = WPI_READ(sc, WPI_PLL_CTL);
29544128Shx147065 	WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT);
29554128Shx147065 
29564128Shx147065 	tmp = WPI_READ(sc, WPI_CHICKEN);
29574128Shx147065 	WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS);
29584128Shx147065 
29594128Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
29604128Shx147065 	WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT);
29614128Shx147065 
29624128Shx147065 	/* wait for clock stabilization */
29634128Shx147065 	for (ntries = 0; ntries < 1000; ntries++) {
29644128Shx147065 		if (WPI_READ(sc, WPI_GPIO_CTL) & WPI_GPIO_CLOCK)
29654128Shx147065 			break;
29664128Shx147065 		DELAY(10);
29674128Shx147065 	}
29684128Shx147065 	if (ntries == 1000) {
29694128Shx147065 		cmn_err(CE_WARN,
29704128Shx147065 		    "wpi_reset(): timeout waiting for clock stabilization\n");
29714128Shx147065 		return (ETIMEDOUT);
29724128Shx147065 	}
29734128Shx147065 
29744128Shx147065 	/* initialize EEPROM */
29754128Shx147065 	tmp = WPI_READ(sc, WPI_EEPROM_STATUS);
29764128Shx147065 	if ((tmp & WPI_EEPROM_VERSION) == 0) {
29774128Shx147065 		cmn_err(CE_WARN, "wpi_reset(): EEPROM not found\n");
29784128Shx147065 		return (EIO);
29794128Shx147065 	}
29804128Shx147065 	WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED);
29814128Shx147065 
29824128Shx147065 	return (WPI_SUCCESS);
29834128Shx147065 }
29844128Shx147065 
29854128Shx147065 static void
29864128Shx147065 wpi_hw_config(wpi_sc_t *sc)
29874128Shx147065 {
29884128Shx147065 	uint16_t val;
29894128Shx147065 	uint32_t hw;
29904128Shx147065 
29914128Shx147065 	/* voodoo from the Linux "driver".. */
29924128Shx147065 	hw = WPI_READ(sc, WPI_HWCONFIG);
29934128Shx147065 
29944128Shx147065 	if ((sc->sc_rev & 0xc0) == 0x40)
29954128Shx147065 		hw |= WPI_HW_ALM_MB;
29964128Shx147065 	else if (!(sc->sc_rev & 0x80))
29974128Shx147065 		hw |= WPI_HW_ALM_MM;
29984128Shx147065 
29994128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_CAPABILITIES);
30004128Shx147065 	if ((val & 0xff) == 0x80)
30014128Shx147065 		hw |= WPI_HW_SKU_MRC;
30024128Shx147065 
30034128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_REVISION);
30044128Shx147065 	hw &= ~WPI_HW_REV_D;
30054128Shx147065 	if ((val & 0xf0) == 0xd0)
30064128Shx147065 		hw |= WPI_HW_REV_D;
30074128Shx147065 
30084128Shx147065 	val = wpi_read_prom_word(sc, WPI_EEPROM_TYPE);
30094128Shx147065 	if ((val & 0xff) > 1)
30104128Shx147065 		hw |= WPI_HW_TYPE_B;
30114128Shx147065 
30124128Shx147065 	WPI_DBG((WPI_DEBUG_HW, "setting h/w config %x\n", hw));
30134128Shx147065 	WPI_WRITE(sc, WPI_HWCONFIG, hw);
30144128Shx147065 }
30154128Shx147065 
30164128Shx147065 static int
30174128Shx147065 wpi_init(wpi_sc_t *sc)
30184128Shx147065 {
30194128Shx147065 	uint32_t tmp;
30204128Shx147065 	int qid, ntries, err;
30214128Shx147065 	clock_t clk;
30224128Shx147065 
30234128Shx147065 	mutex_enter(&sc->sc_glock);
30244128Shx147065 	sc->sc_flags &= ~WPI_F_FW_INIT;
30254128Shx147065 
30264128Shx147065 	(void) wpi_reset(sc);
30274128Shx147065 
30284128Shx147065 	wpi_mem_lock(sc);
30294128Shx147065 	wpi_mem_write(sc, WPI_MEM_CLOCK1, 0xa00);
30304128Shx147065 	DELAY(20);
30314128Shx147065 	tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV);
30324128Shx147065 	wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800);
30334128Shx147065 	wpi_mem_unlock(sc);
30344128Shx147065 
30354128Shx147065 	(void) wpi_power_up(sc);
30364128Shx147065 	wpi_hw_config(sc);
30374128Shx147065 
30386062Shx147065 	tmp = WPI_READ(sc, WPI_GPIO_CTL);
30396062Shx147065 	if (!(tmp & WPI_GPIO_HW_RF_KILL)) {
30406062Shx147065 		cmn_err(CE_WARN, "wpi_init(): Radio transmitter is off\n");
30416062Shx147065 		goto fail1;
30426062Shx147065 	}
30436062Shx147065 
30444128Shx147065 	/* init Rx ring */
30454128Shx147065 	wpi_mem_lock(sc);
30464128Shx147065 	WPI_WRITE(sc, WPI_RX_BASE, sc->sc_rxq.dma_desc.cookie.dmac_address);
30474128Shx147065 	WPI_WRITE(sc, WPI_RX_RIDX_PTR,
30484128Shx147065 	    (uint32_t)(sc->sc_dma_sh.cookie.dmac_address +
30494128Shx147065 	    offsetof(wpi_shared_t, next)));
30504128Shx147065 	WPI_WRITE(sc, WPI_RX_WIDX, (WPI_RX_RING_COUNT - 1) & (~7));
30514128Shx147065 	WPI_WRITE(sc, WPI_RX_CONFIG, 0xa9601010);
30524128Shx147065 	wpi_mem_unlock(sc);
30534128Shx147065 
30544128Shx147065 	/* init Tx rings */
30554128Shx147065 	wpi_mem_lock(sc);
30564128Shx147065 	wpi_mem_write(sc, WPI_MEM_MODE, 2);	/* bypass mode */
30574128Shx147065 	wpi_mem_write(sc, WPI_MEM_RA, 1);	/* enable RA0 */
30584128Shx147065 	wpi_mem_write(sc, WPI_MEM_TXCFG, 0x3f);	/* enable all 6 Tx rings */
30594128Shx147065 	wpi_mem_write(sc, WPI_MEM_BYPASS1, 0x10000);
30604128Shx147065 	wpi_mem_write(sc, WPI_MEM_BYPASS2, 0x30002);
30614128Shx147065 	wpi_mem_write(sc, WPI_MEM_MAGIC4, 4);
30624128Shx147065 	wpi_mem_write(sc, WPI_MEM_MAGIC5, 5);
30634128Shx147065 
30644128Shx147065 	WPI_WRITE(sc, WPI_TX_BASE_PTR, sc->sc_dma_sh.cookie.dmac_address);
30654128Shx147065 	WPI_WRITE(sc, WPI_MSG_CONFIG, 0xffff05a5);
30664128Shx147065 
30674128Shx147065 	for (qid = 0; qid < 6; qid++) {
30684128Shx147065 		WPI_WRITE(sc, WPI_TX_CTL(qid), 0);
30694128Shx147065 		WPI_WRITE(sc, WPI_TX_BASE(qid), 0);
30704128Shx147065 		WPI_WRITE(sc, WPI_TX_CONFIG(qid), 0x80200008);
30714128Shx147065 	}
30724128Shx147065 	wpi_mem_unlock(sc);
30734128Shx147065 
30744128Shx147065 	/* clear "radio off" and "disable command" bits (reversed logic) */
30754128Shx147065 	WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF);
30764128Shx147065 	WPI_WRITE(sc, WPI_UCODE_CLR, WPI_DISABLE_CMD);
30774128Shx147065 
30784128Shx147065 	/* clear any pending interrupts */
30794128Shx147065 	WPI_WRITE(sc, WPI_INTR, 0xffffffff);
30804128Shx147065 
30814128Shx147065 	/* enable interrupts */
30824128Shx147065 	WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK);
30834128Shx147065 
30844128Shx147065 	/* load firmware boot code into NIC */
30854128Shx147065 	err = wpi_load_microcode(sc);
30864128Shx147065 	if (err != WPI_SUCCESS) {
30874128Shx147065 		cmn_err(CE_WARN, "wpi_init(): failed to load microcode\n");
30884128Shx147065 		goto fail1;
30894128Shx147065 	}
30904128Shx147065 
30914128Shx147065 	/* load firmware .text segment into NIC */
30924128Shx147065 	err = wpi_load_firmware(sc, WPI_FW_TEXT);
30934128Shx147065 	if (err != WPI_SUCCESS) {
30944128Shx147065 		cmn_err(CE_WARN, "wpi_init(): "
30954128Shx147065 		    "failed to load firmware(text)\n");
30964128Shx147065 		goto fail1;
30974128Shx147065 	}
30984128Shx147065 
30994128Shx147065 	/* load firmware .data segment into NIC */
31004128Shx147065 	err = wpi_load_firmware(sc, WPI_FW_DATA);
31014128Shx147065 	if (err != WPI_SUCCESS) {
31024128Shx147065 		cmn_err(CE_WARN, "wpi_init(): "
31034128Shx147065 		    "failed to load firmware(data)\n");
31044128Shx147065 		goto fail1;
31054128Shx147065 	}
31064128Shx147065 
31074128Shx147065 	/* now press "execute" ;-) */
31084128Shx147065 	tmp = WPI_READ(sc, WPI_RESET);
31094128Shx147065 	tmp &= ~(WPI_MASTER_DISABLED | WPI_STOP_MASTER | WPI_NEVO_RESET);
31104128Shx147065 	WPI_WRITE(sc, WPI_RESET, tmp);
31114128Shx147065 
31124128Shx147065 	/* ..and wait at most one second for adapter to initialize */
31134128Shx147065 	clk = ddi_get_lbolt() + drv_usectohz(2000000);
31144128Shx147065 	while (!(sc->sc_flags & WPI_F_FW_INIT)) {
31154128Shx147065 		if (cv_timedwait(&sc->sc_fw_cv, &sc->sc_glock, clk) < 0)
31164128Shx147065 			break;
31174128Shx147065 	}
31184128Shx147065 	if (!(sc->sc_flags & WPI_F_FW_INIT)) {
31194128Shx147065 		cmn_err(CE_WARN,
31204128Shx147065 		    "wpi_init(): timeout waiting for firmware init\n");
31214128Shx147065 		goto fail1;
31224128Shx147065 	}
31234128Shx147065 
31244128Shx147065 	/* wait for thermal sensors to calibrate */
31254128Shx147065 	for (ntries = 0; ntries < 1000; ntries++) {
31264128Shx147065 		if (WPI_READ(sc, WPI_TEMPERATURE) != 0)
31274128Shx147065 			break;
31284128Shx147065 		DELAY(10);
31294128Shx147065 	}
31304128Shx147065 
31314128Shx147065 	if (ntries == 1000) {
31324128Shx147065 		WPI_DBG((WPI_DEBUG_HW,
31334128Shx147065 		    "wpi_init(): timeout waiting for thermal sensors "
31344128Shx147065 		    "calibration\n"));
31354128Shx147065 	}
31364128Shx147065 
31374128Shx147065 	WPI_DBG((WPI_DEBUG_HW, "temperature %d\n",
31384128Shx147065 	    (int)WPI_READ(sc, WPI_TEMPERATURE)));
31394128Shx147065 
31404128Shx147065 	err = wpi_config(sc);
31414128Shx147065 	if (err) {
31424128Shx147065 		cmn_err(CE_WARN, "wpi_init(): failed to configure device\n");
31434128Shx147065 		goto fail1;
31444128Shx147065 	}
31454128Shx147065 
31464128Shx147065 	mutex_exit(&sc->sc_glock);
31474128Shx147065 	return (WPI_SUCCESS);
31484128Shx147065 
31494128Shx147065 fail1:
31504128Shx147065 	err = WPI_FAIL;
31514128Shx147065 	mutex_exit(&sc->sc_glock);
31524128Shx147065 	return (err);
31534128Shx147065 }
31544128Shx147065 
31554128Shx147065 static void
31564128Shx147065 wpi_stop(wpi_sc_t *sc)
31574128Shx147065 {
31584128Shx147065 	uint32_t tmp;
31594128Shx147065 	int ac;
31604128Shx147065 
31614128Shx147065 
31624128Shx147065 	mutex_enter(&sc->sc_glock);
31634128Shx147065 	/* disable interrupts */
31644128Shx147065 	WPI_WRITE(sc, WPI_MASK, 0);
31654128Shx147065 	WPI_WRITE(sc, WPI_INTR, WPI_INTR_MASK);
31664128Shx147065 	WPI_WRITE(sc, WPI_INTR_STATUS, 0xff);
31674128Shx147065 	WPI_WRITE(sc, WPI_INTR_STATUS, 0x00070000);
31684128Shx147065 
31694128Shx147065 	wpi_mem_lock(sc);
31704128Shx147065 	wpi_mem_write(sc, WPI_MEM_MODE, 0);
31714128Shx147065 	wpi_mem_unlock(sc);
31724128Shx147065 
31734128Shx147065 	/* reset all Tx rings */
31744128Shx147065 	for (ac = 0; ac < 4; ac++)
31754128Shx147065 		wpi_reset_tx_ring(sc, &sc->sc_txq[ac]);
31764128Shx147065 	wpi_reset_tx_ring(sc, &sc->sc_cmdq);
31774128Shx147065 	wpi_reset_tx_ring(sc, &sc->sc_svcq);
31784128Shx147065 
31794128Shx147065 	/* reset Rx ring */
31804128Shx147065 	wpi_reset_rx_ring(sc);
31814128Shx147065 
31824128Shx147065 	wpi_mem_lock(sc);
31834128Shx147065 	wpi_mem_write(sc, WPI_MEM_CLOCK2, 0x200);
31844128Shx147065 	wpi_mem_unlock(sc);
31854128Shx147065 
31864128Shx147065 	DELAY(5);
31874128Shx147065 
31884128Shx147065 	wpi_stop_master(sc);
31894128Shx147065 
31904128Shx147065 	sc->sc_tx_timer = 0;
31914128Shx147065 	tmp = WPI_READ(sc, WPI_RESET);
31924128Shx147065 	WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET);
31934128Shx147065 	mutex_exit(&sc->sc_glock);
31944128Shx147065 }
31954128Shx147065 
31964128Shx147065 /*
31974128Shx147065  * Naive implementation of the Adaptive Multi Rate Retry algorithm:
31984128Shx147065  * "IEEE 802.11 Rate Adaptation: A Practical Approach"
31994128Shx147065  * Mathieu Lacage, Hossein Manshaei, Thierry Turletti
32004128Shx147065  * INRIA Sophia - Projet Planete
32014128Shx147065  * http://www-sop.inria.fr/rapports/sophia/RR-5208.html
32024128Shx147065  */
32034128Shx147065 #define	is_success(amrr)	\
32044128Shx147065 	((amrr)->retrycnt < (amrr)->txcnt / 10)
32054128Shx147065 #define	is_failure(amrr)	\
32064128Shx147065 	((amrr)->retrycnt > (amrr)->txcnt / 3)
32074128Shx147065 #define	is_enough(amrr)		\
32084128Shx147065 	((amrr)->txcnt > 100)
32094128Shx147065 #define	is_min_rate(in)		\
32104128Shx147065 	((in)->in_txrate == 0)
32114128Shx147065 #define	is_max_rate(in)		\
32124128Shx147065 	((in)->in_txrate == (in)->in_rates.ir_nrates - 1)
32134128Shx147065 #define	increase_rate(in)	\
32144128Shx147065 	((in)->in_txrate++)
32154128Shx147065 #define	decrease_rate(in)	\
32164128Shx147065 	((in)->in_txrate--)
32174128Shx147065 #define	reset_cnt(amrr)		\
32184128Shx147065 	{ (amrr)->txcnt = (amrr)->retrycnt = 0; }
32194128Shx147065 
32204128Shx147065 #define	WPI_AMRR_MIN_SUCCESS_THRESHOLD	 1
32214128Shx147065 #define	WPI_AMRR_MAX_SUCCESS_THRESHOLD	15
32224128Shx147065 
32234128Shx147065 static void
32244128Shx147065 wpi_amrr_init(wpi_amrr_t *amrr)
32254128Shx147065 {
32264128Shx147065 	amrr->success = 0;
32274128Shx147065 	amrr->recovery = 0;
32284128Shx147065 	amrr->txcnt = amrr->retrycnt = 0;
32294128Shx147065 	amrr->success_threshold = WPI_AMRR_MIN_SUCCESS_THRESHOLD;
32304128Shx147065 }
32314128Shx147065 
32324128Shx147065 static void
32334128Shx147065 wpi_amrr_timeout(wpi_sc_t *sc)
32344128Shx147065 {
32354128Shx147065 	ieee80211com_t *ic = &sc->sc_ic;
32364128Shx147065 
32374128Shx147065 	WPI_DBG((WPI_DEBUG_RATECTL, "wpi_amrr_timeout() enter\n"));
32384128Shx147065 	if (ic->ic_opmode == IEEE80211_M_STA)
32394128Shx147065 		wpi_amrr_ratectl(NULL, ic->ic_bss);
32404128Shx147065 	else
32414128Shx147065 		ieee80211_iterate_nodes(&ic->ic_sta, wpi_amrr_ratectl, NULL);
32424128Shx147065 	sc->sc_clk = ddi_get_lbolt();
32434128Shx147065 }
32444128Shx147065 
32454128Shx147065 /* ARGSUSED */
32464128Shx147065 static void
32474128Shx147065 wpi_amrr_ratectl(void *arg, ieee80211_node_t *in)
32484128Shx147065 {
32494128Shx147065 	wpi_amrr_t *amrr = (wpi_amrr_t *)in;
32504128Shx147065 	int need_change = 0;
32514128Shx147065 
32524128Shx147065 	if (is_success(amrr) && is_enough(amrr)) {
32534128Shx147065 		amrr->success++;
32544128Shx147065 		if (amrr->success >= amrr->success_threshold &&
32554128Shx147065 		    !is_max_rate(in)) {
32564128Shx147065 			amrr->recovery = 1;
32574128Shx147065 			amrr->success = 0;
32584128Shx147065 			increase_rate(in);
32594128Shx147065 			WPI_DBG((WPI_DEBUG_RATECTL,
32604128Shx147065 			    "AMRR increasing rate %d (txcnt=%d retrycnt=%d)\n",
32614128Shx147065 			    in->in_txrate, amrr->txcnt, amrr->retrycnt));
32624128Shx147065 			need_change = 1;
32634128Shx147065 		} else {
32644128Shx147065 			amrr->recovery = 0;
32654128Shx147065 		}
32664128Shx147065 	} else if (is_failure(amrr)) {
32674128Shx147065 		amrr->success = 0;
32684128Shx147065 		if (!is_min_rate(in)) {
32694128Shx147065 			if (amrr->recovery) {
32704128Shx147065 				amrr->success_threshold++;
32714128Shx147065 				if (amrr->success_threshold >
32724128Shx147065 				    WPI_AMRR_MAX_SUCCESS_THRESHOLD)
32734128Shx147065 					amrr->success_threshold =
32744128Shx147065 					    WPI_AMRR_MAX_SUCCESS_THRESHOLD;
32754128Shx147065 			} else {
32764128Shx147065 				amrr->success_threshold =
32774128Shx147065 				    WPI_AMRR_MIN_SUCCESS_THRESHOLD;
32784128Shx147065 			}
32794128Shx147065 			decrease_rate(in);
32804128Shx147065 			WPI_DBG((WPI_DEBUG_RATECTL,
32814128Shx147065 			    "AMRR decreasing rate %d (txcnt=%d retrycnt=%d)\n",
32824128Shx147065 			    in->in_txrate, amrr->txcnt, amrr->retrycnt));
32834128Shx147065 			need_change = 1;
32844128Shx147065 		}
32854128Shx147065 		amrr->recovery = 0;	/* paper is incorrect */
32864128Shx147065 	}
32874128Shx147065 
32884128Shx147065 	if (is_enough(amrr) || need_change)
32894128Shx147065 		reset_cnt(amrr);
32904128Shx147065 }
3291