1*3138Sfrits# 2*3138Sfrits# CDDL HEADER START 3*3138Sfrits# 4*3138Sfrits# The contents of this file are subject to the terms of the 5*3138Sfrits# Common Development and Distribution License (the "License"). 6*3138Sfrits# You may not use this file except in compliance with the License. 7*3138Sfrits# 8*3138Sfrits# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*3138Sfrits# or http://www.opensolaris.org/os/licensing. 10*3138Sfrits# See the License for the specific language governing permissions 11*3138Sfrits# and limitations under the License. 12*3138Sfrits# 13*3138Sfrits# When distributing Covered Code, include this CDDL HEADER in each 14*3138Sfrits# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*3138Sfrits# If applicable, add the following below this CDDL HEADER, with the 16*3138Sfrits# fields enclosed by brackets "[]" replaced with your own identifying 17*3138Sfrits# information: Portions Copyright [yyyy] [name of copyright owner] 18*3138Sfrits# 19*3138Sfrits# CDDL HEADER END 20*3138Sfrits# 21*3138Sfrits# 22*3138Sfrits# Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23*3138Sfrits# Use is subject to license terms. 24*3138Sfrits# 25*3138Sfrits 26*3138Sfrits#ident "%Z%%M% %I% %E% SMI" 27*3138Sfrits 28*3138Sfritsone hci1394_state_s 29*3138Sfrits 30*3138Sfrits### HAL interface entry points 31*3138Sfritsroot hci1394_s1394if_shutdown 32*3138Sfritsroot hci1394_s1394if_phy 33*3138Sfritsroot hci1394_s1394if_read 34*3138Sfritsroot hci1394_s1394if_read_response 35*3138Sfritsroot hci1394_s1394if_write 36*3138Sfritsroot hci1394_s1394if_write_response 37*3138Sfritsroot hci1394_s1394if_response_complete 38*3138Sfritsroot hci1394_s1394if_lock 39*3138Sfritsroot hci1394_s1394if_lock_response 40*3138Sfritsroot hci1394_alloc_isoch_dma 41*3138Sfritsroot hci1394_free_isoch_dma 42*3138Sfritsroot hci1394_start_isoch_dma 43*3138Sfritsroot hci1394_stop_isoch_dma 44*3138Sfritsroot hci1394_update_isoch_dma 45*3138Sfritsroot hci1394_s1394if_update_config_rom 46*3138Sfritsroot hci1394_s1394if_reset_bus 47*3138Sfritsroot hci1394_s1394if_short_bus_reset 48*3138Sfritsroot hci1394_s1394if_set_contender_bit 49*3138Sfritsroot hci1394_s1394if_set_root_holdoff_bit 50*3138Sfritsroot hci1394_s1394if_set_gap_count 51*3138Sfritsroot hci1394_s1394if_csr_read 52*3138Sfritsroot hci1394_s1394if_csr_write 53*3138Sfritsroot hci1394_s1394if_csr_cswap32 54*3138Sfritsroot hci1394_s1394if_phy_filter_set 55*3138Sfritsroot hci1394_s1394if_phy_filter_clr 56*3138Sfritsroot hci1394_s1394if_power_state_change 57*3138Sfrits 58*3138Sfrits### timeout callbacks 59*3138Sfritsroot hci1394_async_pending_timeout 60*3138Sfrits 61*3138Sfrits### currently unused functions 62*3138Sfritsroot hci1394_isoch_resume 63*3138Sfritsroot hci1394_ixl_set_start 64*3138Sfritsroot hci1394_ohci_arreq_stop 65*3138Sfritsroot hci1394_ohci_arresp_stop 66*3138Sfritsroot hci1394_ohci_link_disable 67*3138Sfritsroot hci1394_ohci_phy_clr 68*3138Sfrits 69*3138Sfritsadd h1394_lock_request/recv_lock_req targets s1394_send_response 70*3138Sfritsadd h1394_read_request/recv_read_req targets s1394_send_response 71*3138Sfritsadd h1394_write_request/recv_write_req targets s1394_send_response 72*3138Sfrits 73*3138Sfritsadd s1394_hal_s::halinfo.hal_events.response_complete targets \ 74*3138Sfrits hci1394_s1394if_response_complete 75*3138Sfritsadd s1394_hal_s::halinfo.hal_events.set_contender_bit targets \ 76*3138Sfrits hci1394_s1394if_set_contender_bit 77*3138Sfrits 78*3138Sfrits### hci1394 callbacks 79*3138Sfritsadd hci1394_ixl_dma_sync/callback targets warlock_dummy 80*3138Sfritsadd hci1394_iso_ctxt_s::isoch_dma_stopped targets warlock_dummy 81*3138Sfrits 82*3138Sfritsadd hci1394_tlist_s::tl_timer_info.tlt_callback targets \ 83*3138Sfrits hci1394_async_pending_timeout 84*3138Sfritsadd hci1394_q_s::q_info.qi_start targets hci1394_async_arreq_start \ 85*3138Sfrits hci1394_async_arresp_start hci1394_async_atreq_start \ 86*3138Sfrits hci1394_async_atresp_start 87*3138Sfritsadd hci1394_q_s::q_info.qi_wake targets hci1394_async_arreq_wake \ 88*3138Sfrits hci1394_async_arresp_wake hci1394_async_atreq_wake \ 89*3138Sfrits hci1394_async_atresp_wake 90*3138Sfrits 91*3138Sfrits# CMP/FCP 92*3138Sfritsadd s1394_cmp_notify_reg_change/cb target warlock_dummy 93*3138Sfritsadd s1394_fcp_recv_write_request/cb target warlock_dummy 94*3138Sfrits 95*3138Sfritsadd h1394_read_request/recv_read_req target s1394_cmp_ompr_recv_read_request 96*3138Sfritsadd h1394_lock_request/recv_lock_req target s1394_cmp_ompr_recv_lock_request 97*3138Sfritsadd h1394_read_request/recv_read_req target s1394_cmp_impr_recv_read_request 98*3138Sfritsadd h1394_lock_request/recv_lock_req target s1394_cmp_impr_recv_lock_request 99*3138Sfritsadd h1394_write_request/recv_write_req target s1394_fcp_resp_recv_write_request 100*3138Sfritsadd h1394_write_request/recv_write_req target s1394_fcp_cmd_recv_write_request 101*3138Sfrits 102*3138Sfritsadd bus_ops::bus_config targets warlock_dummy 103*3138Sfritsadd bus_ops::bus_unconfig targets warlock_dummy 104