xref: /onnv-gate/usr/src/uts/common/io/rwn/rt2860_var.h (revision 10108:3877a5e8c14d)
19172SFei.Feng@Sun.COM /*
29172SFei.Feng@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
39172SFei.Feng@Sun.COM  * Use is subject to license terms.
49172SFei.Feng@Sun.COM  */
59172SFei.Feng@Sun.COM 
69172SFei.Feng@Sun.COM /*
79172SFei.Feng@Sun.COM  * Copyright (c) 2007, 2008
89172SFei.Feng@Sun.COM  *	Damien Bergamini <damien.bergamini@free.fr>
99172SFei.Feng@Sun.COM  *
109172SFei.Feng@Sun.COM  * Permission to use, copy, modify, and distribute this software for any
119172SFei.Feng@Sun.COM  * purpose with or without fee is hereby granted, provided that the above
129172SFei.Feng@Sun.COM  * copyright notice and this permission notice appear in all copies.
139172SFei.Feng@Sun.COM  *
149172SFei.Feng@Sun.COM  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
159172SFei.Feng@Sun.COM  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
169172SFei.Feng@Sun.COM  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
179172SFei.Feng@Sun.COM  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
189172SFei.Feng@Sun.COM  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
199172SFei.Feng@Sun.COM  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
209172SFei.Feng@Sun.COM  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
219172SFei.Feng@Sun.COM  */
229172SFei.Feng@Sun.COM 
239172SFei.Feng@Sun.COM #ifndef	_RT2860_VAR_H
249172SFei.Feng@Sun.COM #define	_RT2860_VAR_H
259172SFei.Feng@Sun.COM 
269172SFei.Feng@Sun.COM #include <sys/queue.h>
279172SFei.Feng@Sun.COM 
289172SFei.Feng@Sun.COM #ifdef __cplusplus
299172SFei.Feng@Sun.COM extern "C" {
309172SFei.Feng@Sun.COM #endif
319172SFei.Feng@Sun.COM 
329172SFei.Feng@Sun.COM /*
339172SFei.Feng@Sun.COM  * EDCA Access Categories.
349172SFei.Feng@Sun.COM  */
359172SFei.Feng@Sun.COM enum ieee80211_edca_ac {
369172SFei.Feng@Sun.COM 	EDCA_AC_BK  = 1,	/* Background */
379172SFei.Feng@Sun.COM 	EDCA_AC_BE  = 0,	/* Best Effort */
389172SFei.Feng@Sun.COM 	EDCA_AC_VI  = 2,	/* Video */
399172SFei.Feng@Sun.COM 	EDCA_AC_VO  = 3		/* Voice */
409172SFei.Feng@Sun.COM };
419172SFei.Feng@Sun.COM #define	EDCA_NUM_AC	4
429172SFei.Feng@Sun.COM 
439172SFei.Feng@Sun.COM #define	RT2860_SUCCESS		0
449172SFei.Feng@Sun.COM 
459172SFei.Feng@Sun.COM #define	RT2860_TX_RING_COUNT	64
469172SFei.Feng@Sun.COM #define	RT2860_RX_RING_COUNT	128
479172SFei.Feng@Sun.COM #define	RT2860_TX_POOL_COUNT	(RT2860_TX_RING_COUNT * 2)
489172SFei.Feng@Sun.COM 
499172SFei.Feng@Sun.COM #define	RT2860_MAX_SCATTER	((RT2860_TX_RING_COUNT * 2) - 1)
509172SFei.Feng@Sun.COM 
51*10108SFei.Feng@Sun.COM #define	RT2860_RSSI_OFFSET	92
52*10108SFei.Feng@Sun.COM 
539172SFei.Feng@Sun.COM /* HW supports up to 255 STAs */
549172SFei.Feng@Sun.COM #define	RT2860_WCID_MAX		254
559172SFei.Feng@Sun.COM #define	RT2860_AID2WCID(aid)	((aid) & 0xff)
569172SFei.Feng@Sun.COM 
579172SFei.Feng@Sun.COM struct dma_area {
589172SFei.Feng@Sun.COM 	ddi_acc_handle_t	acc_hdl;	/* handle for memory */
599172SFei.Feng@Sun.COM 	caddr_t			mem_va;		/* CPU VA of memory */
609172SFei.Feng@Sun.COM 	uint32_t		nslots;		/* number of slots */
619172SFei.Feng@Sun.COM 	uint32_t		size;		/* size per slot */
629172SFei.Feng@Sun.COM 	size_t			alength;	/* allocated size */
639172SFei.Feng@Sun.COM 
649172SFei.Feng@Sun.COM 	ddi_dma_handle_t	dma_hdl;	/* DMA handle */
659172SFei.Feng@Sun.COM 	offset_t		offset;		/* relative to handle */
669172SFei.Feng@Sun.COM 	ddi_dma_cookie_t	cookie;		/* associated cookie */
679172SFei.Feng@Sun.COM 	uint32_t		ncookies;	/* must be 1 */
689172SFei.Feng@Sun.COM 	uint32_t		token;		/* arbitrary identifier */
699172SFei.Feng@Sun.COM };
709172SFei.Feng@Sun.COM 
719172SFei.Feng@Sun.COM struct rt2860_txd;
729172SFei.Feng@Sun.COM 
739172SFei.Feng@Sun.COM struct rt2860_tx_data {
749172SFei.Feng@Sun.COM 	struct dma_area			txbuf_dma;
759172SFei.Feng@Sun.COM 	struct rt2860_txwi		*txwi;
769172SFei.Feng@Sun.COM 	uint32_t			paddr;
779172SFei.Feng@Sun.COM 	struct ieee80211_node		*ni;
789172SFei.Feng@Sun.COM 	SLIST_ENTRY(rt2860_tx_data)	next;
799172SFei.Feng@Sun.COM };
809172SFei.Feng@Sun.COM 
819172SFei.Feng@Sun.COM struct rt2860_tx_ring {
829172SFei.Feng@Sun.COM 	struct dma_area		txdesc_dma;
839172SFei.Feng@Sun.COM 	struct rt2860_txd	*txd;
849172SFei.Feng@Sun.COM 	uint32_t		paddr;
859172SFei.Feng@Sun.COM 	struct rt2860_tx_data	*data[RT2860_TX_RING_COUNT];
869172SFei.Feng@Sun.COM 	int			cur;
879172SFei.Feng@Sun.COM 	int			next;
889172SFei.Feng@Sun.COM 	int			queued;
899172SFei.Feng@Sun.COM };
909172SFei.Feng@Sun.COM 
919172SFei.Feng@Sun.COM struct rt2860_rx_data {
929172SFei.Feng@Sun.COM 	struct dma_area		rxbuf_dma;
939172SFei.Feng@Sun.COM };
949172SFei.Feng@Sun.COM 
959172SFei.Feng@Sun.COM struct rt2860_rx_ring {
969172SFei.Feng@Sun.COM 	struct dma_area		rxdesc_dma;
979172SFei.Feng@Sun.COM 	struct rt2860_rxd	*rxd;
989172SFei.Feng@Sun.COM 	uint32_t		paddr;
999172SFei.Feng@Sun.COM 	unsigned int		cur;	/* must be unsigned */
1009172SFei.Feng@Sun.COM 	struct rt2860_rx_data	data[RT2860_RX_RING_COUNT];
1019172SFei.Feng@Sun.COM };
1029172SFei.Feng@Sun.COM 
1039172SFei.Feng@Sun.COM struct rt2860_amrr {
1049172SFei.Feng@Sun.COM 	uint_t	amrr_min_success_threshold;
1059172SFei.Feng@Sun.COM 	uint_t	amrr_max_success_threshold;
1069172SFei.Feng@Sun.COM };
1079172SFei.Feng@Sun.COM 
1089172SFei.Feng@Sun.COM struct rt2860_amrr_node {
1099172SFei.Feng@Sun.COM 	int	amn_success;
1109172SFei.Feng@Sun.COM 	int	amn_recovery;
1119172SFei.Feng@Sun.COM 	int	amn_success_threshold;
1129172SFei.Feng@Sun.COM 	int	amn_txcnt;
1139172SFei.Feng@Sun.COM 	int	amn_retrycnt;
1149172SFei.Feng@Sun.COM };
1159172SFei.Feng@Sun.COM 
1169172SFei.Feng@Sun.COM #define	RT2860_DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl,\
1179172SFei.Feng@Sun.COM 	(area).offset, (area).alength, (flag)))
1189172SFei.Feng@Sun.COM #define	RT2860_IS_RUNNING(_sc)		(((_sc)->sc_flags & RT2860_F_RUNNING))
1199172SFei.Feng@Sun.COM #define	RT2860_IS_INITED(_sc)		((_sc)->sc_flags & RT2860_F_RUNNING)
1209172SFei.Feng@Sun.COM #define	RT2860_IS_SUSPEND(_sc)		((_sc)->sc_flags & RT2860_F_SUSPEND)
1219172SFei.Feng@Sun.COM #define	RT2860_GLOCK(_sc)		mutex_enter(&(_sc)->sc_genlock)
1229172SFei.Feng@Sun.COM #define	RT2860_GUNLOCK(_sc)		mutex_exit(&(_sc)->sc_genlock)
1239172SFei.Feng@Sun.COM 
1249172SFei.Feng@Sun.COM 
1259172SFei.Feng@Sun.COM struct rt2860_softc {
1269172SFei.Feng@Sun.COM 	struct ieee80211com	sc_ic;
1279172SFei.Feng@Sun.COM 	dev_info_t		*sc_dev;
1289172SFei.Feng@Sun.COM 
1299172SFei.Feng@Sun.COM 	/* ddi reg handler */
1309172SFei.Feng@Sun.COM 	ddi_acc_handle_t	sc_cfg_handle;
1319172SFei.Feng@Sun.COM 	caddr_t			sc_cfg_base;
1329172SFei.Feng@Sun.COM 	/* ddi i/o handler */
1339172SFei.Feng@Sun.COM 	ddi_acc_handle_t	sc_io_handle;
1349172SFei.Feng@Sun.COM 	caddr_t			sc_io_base;
1359172SFei.Feng@Sun.COM 	/* interrupt */
1369172SFei.Feng@Sun.COM 	ddi_iblock_cookie_t	sc_iblock;
1379172SFei.Feng@Sun.COM 	kmutex_t		sc_genlock;
1389172SFei.Feng@Sun.COM 	kmutex_t		sc_txlock;
1399172SFei.Feng@Sun.COM 	kmutex_t		sc_rxlock;
1409172SFei.Feng@Sun.COM 	timeout_id_t		sc_scan_id;
1419172SFei.Feng@Sun.COM 	timeout_id_t		sc_rssadapt_id;
1429172SFei.Feng@Sun.COM 	timeout_id_t		sc_state_id;
1439172SFei.Feng@Sun.COM 	struct rt2860_amrr	amrr;
1449172SFei.Feng@Sun.COM 	enum ieee80211_state	sc_ostate;
1459172SFei.Feng@Sun.COM 
1469172SFei.Feng@Sun.COM #define	RT2860_ENABLED		(1 << 0)
1479172SFei.Feng@Sun.COM #define	RT2860_FWLOADED		(1 << 1)
1489172SFei.Feng@Sun.COM #define	RT2860_UPD_BEACON	(1 << 2)
1499172SFei.Feng@Sun.COM #define	RT2860_ADVANCED_PS	(1 << 3)
1509172SFei.Feng@Sun.COM #define	RT2860_F_RUNNING	(1 << 4)
1519172SFei.Feng@Sun.COM #define	RT2860_F_SUSPEND	(1 << 5)
1529172SFei.Feng@Sun.COM #define	RT2860_F_QUIESCE	(1 << 6)
1539172SFei.Feng@Sun.COM 
1549172SFei.Feng@Sun.COM 	uint32_t			sc_ic_flags;
1559172SFei.Feng@Sun.COM 	uint32_t			sc_dmabuf_size;
1569172SFei.Feng@Sun.COM 	struct rt2860_tx_ring		txq[6];
1579172SFei.Feng@Sun.COM 	struct rt2860_rx_ring		rxq;
1589172SFei.Feng@Sun.COM 
1599172SFei.Feng@Sun.COM 	struct dma_area			txpool_dma;
1609172SFei.Feng@Sun.COM 	struct rt2860_txwi		*txwi;
1619172SFei.Feng@Sun.COM 	struct rt2860_tx_data		data[RT2860_TX_POOL_COUNT];
1629172SFei.Feng@Sun.COM 	SLIST_HEAD(, rt2860_tx_data)	data_pool;
1639172SFei.Feng@Sun.COM 
1649172SFei.Feng@Sun.COM 	int			sc_tx_timer;
1659172SFei.Feng@Sun.COM 	int			mgtqid;
1669172SFei.Feng@Sun.COM 	int			sifs;
1679172SFei.Feng@Sun.COM 
1689172SFei.Feng@Sun.COM 	/* firmware related info */
1699172SFei.Feng@Sun.COM 	uint32_t		mac_rev;
1709172SFei.Feng@Sun.COM 	uint8_t			rf_rev;
1719172SFei.Feng@Sun.COM 	uint8_t			freq;
1729172SFei.Feng@Sun.COM 	uint8_t			ntxchains;
1739172SFei.Feng@Sun.COM 	uint8_t			nrxchains;
1749172SFei.Feng@Sun.COM 	uint8_t			pslevel;
1759172SFei.Feng@Sun.COM 	int8_t			txpow1[50];
1769172SFei.Feng@Sun.COM 	int8_t			txpow2[50];
1779172SFei.Feng@Sun.COM 	int8_t			rssi_2ghz[3];
1789172SFei.Feng@Sun.COM 	int8_t			rssi_5ghz[3];
1799172SFei.Feng@Sun.COM 	uint8_t			lna[4];
1809172SFei.Feng@Sun.COM 	uint8_t			calib_2ghz;
1819172SFei.Feng@Sun.COM 	uint8_t			calib_5ghz;
1829172SFei.Feng@Sun.COM 	uint8_t			tssi_2ghz[9];
1839172SFei.Feng@Sun.COM 	uint8_t			tssi_5ghz[9];
1849172SFei.Feng@Sun.COM 	uint8_t			step_2ghz;
1859172SFei.Feng@Sun.COM 	uint8_t			step_5ghz;
1869172SFei.Feng@Sun.COM 
1879172SFei.Feng@Sun.COM 	uint32_t		sc_need_sched;
1889172SFei.Feng@Sun.COM 	uint32_t		sc_flags;
1899172SFei.Feng@Sun.COM 	/* RT2860 RCR */
1909172SFei.Feng@Sun.COM 	uint32_t		sc_rcr;
1919172SFei.Feng@Sun.COM 
1929172SFei.Feng@Sun.COM 	uint16_t		sc_cachelsz;
1939172SFei.Feng@Sun.COM 	ddi_softintr_t		sc_softintr_hdl;
1949172SFei.Feng@Sun.COM 
1959172SFei.Feng@Sun.COM 	uint32_t		sc_rx_pend;
1969172SFei.Feng@Sun.COM 
1979172SFei.Feng@Sun.COM 	uint32_t		rf_regs[4];
1989172SFei.Feng@Sun.COM 	uint8_t			txpow[14];
1999172SFei.Feng@Sun.COM 
2009172SFei.Feng@Sun.COM 	struct {
2019172SFei.Feng@Sun.COM 		uint8_t	reg;
2029172SFei.Feng@Sun.COM 		uint8_t	val;
2039172SFei.Feng@Sun.COM 	}			bbp[8];
2049172SFei.Feng@Sun.COM 	uint8_t			leds;
2059172SFei.Feng@Sun.COM 	uint16_t		led[3];
2069172SFei.Feng@Sun.COM 	uint32_t		txpow20mhz[5];
2079172SFei.Feng@Sun.COM 	uint32_t		txpow40mhz_2ghz[5];
2089172SFei.Feng@Sun.COM 	uint32_t		txpow40mhz_5ghz[5];
2099172SFei.Feng@Sun.COM 
2109172SFei.Feng@Sun.COM 	struct rt2860_amrr_node	amn[RT2860_WCID_MAX + 1];
2119172SFei.Feng@Sun.COM 
2129172SFei.Feng@Sun.COM 	int			led_mode;
2139172SFei.Feng@Sun.COM 	int			hw_radio;
2149172SFei.Feng@Sun.COM 	int			rx_ant;
2159172SFei.Feng@Sun.COM 	int			tx_ant;
2169172SFei.Feng@Sun.COM 	int			nb_ant;
2179172SFei.Feng@Sun.COM 
2189172SFei.Feng@Sun.COM 	int			dwelltime;
2199172SFei.Feng@Sun.COM 
2209172SFei.Feng@Sun.COM 	/* kstats */
2219172SFei.Feng@Sun.COM 	uint32_t		sc_tx_nobuf;
2229172SFei.Feng@Sun.COM 	uint32_t		sc_rx_nobuf;
2239172SFei.Feng@Sun.COM 	uint32_t		sc_tx_err;
2249172SFei.Feng@Sun.COM 	uint32_t		sc_rx_err;
2259172SFei.Feng@Sun.COM 	uint32_t		sc_tx_retries;
2269172SFei.Feng@Sun.COM 
2279172SFei.Feng@Sun.COM 	int			(*sc_newstate)(struct ieee80211com *,
2289172SFei.Feng@Sun.COM 				    enum ieee80211_state, int);
2299172SFei.Feng@Sun.COM };
2309172SFei.Feng@Sun.COM 
2319172SFei.Feng@Sun.COM #ifdef __cplusplus
2329172SFei.Feng@Sun.COM }
2339172SFei.Feng@Sun.COM #endif
2349172SFei.Feng@Sun.COM 
2359172SFei.Feng@Sun.COM #endif /* _RT2860_VAR_H */
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