1*4609Szf162725 /* 2*4609Szf162725 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 3*4609Szf162725 * Use is subject to license terms. 4*4609Szf162725 */ 5*4609Szf162725 6*4609Szf162725 /* 7*4609Szf162725 * Copyright (c) 2005, 2006 8*4609Szf162725 * Damien Bergamini <damien.bergamini@free.fr> 9*4609Szf162725 * 10*4609Szf162725 * Permission to use, copy, modify, and distribute this software for any 11*4609Szf162725 * purpose with or without fee is hereby granted, provided that the above 12*4609Szf162725 * copyright notice and this permission notice appear in all copies. 13*4609Szf162725 * 14*4609Szf162725 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15*4609Szf162725 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16*4609Szf162725 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17*4609Szf162725 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18*4609Szf162725 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19*4609Szf162725 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20*4609Szf162725 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21*4609Szf162725 */ 22*4609Szf162725 #ifndef _RT2560_VAR_H 23*4609Szf162725 #define _RT2560_VAR_H 24*4609Szf162725 25*4609Szf162725 #pragma ident "%Z%%M% %I% %E% SMI" 26*4609Szf162725 27*4609Szf162725 #ifdef __cplusplus 28*4609Szf162725 extern "C" { 29*4609Szf162725 #endif 30*4609Szf162725 31*4609Szf162725 #define RAL_FLAG_RUNNING (1<<0) 32*4609Szf162725 33*4609Szf162725 #define RAL_RCR_PROMISC (1<<0) 34*4609Szf162725 #define RAL_RCR_MULTI (2<<0) 35*4609Szf162725 36*4609Szf162725 #ifndef DDI_NT_NET_WIFI 37*4609Szf162725 #define DDI_NT_NET_WIFI "ddi_network:wifi" 38*4609Szf162725 #endif 39*4609Szf162725 40*4609Szf162725 /* 41*4609Szf162725 * Bit flags in the ral_dbg_flags 42*4609Szf162725 */ 43*4609Szf162725 #define RAL_DBG_MSG 0x000001 44*4609Szf162725 #define RAL_DBG_HW 0x000002 45*4609Szf162725 #define RAL_DBG_DMA 0x000004 46*4609Szf162725 #define RAL_DBG_INTR 0x000008 47*4609Szf162725 #define RAL_DBG_TX 0x000010 48*4609Szf162725 #define RAL_DBG_RX 0x000020 49*4609Szf162725 #define RAL_DBG_CHAN 0x000040 50*4609Szf162725 #define RAL_DBG_IOCTL 0x000080 51*4609Szf162725 #define RAL_DBG_MGMT 0x000100 52*4609Szf162725 #define RAL_DBG_STAT 0x000200 53*4609Szf162725 #define RAL_DBG_GLD 0x000400 54*4609Szf162725 #define RAL_DBG_80211 0x000800 55*4609Szf162725 #define RAL_DBG_STATE 0x001000 56*4609Szf162725 #define RAL_DBG_RXPACKET 0x002000 57*4609Szf162725 #define RAL_DBG_TXPACKET 0x004000 58*4609Szf162725 #define RAL_DBG_ALL 0x007fff 59*4609Szf162725 60*4609Szf162725 #ifdef DEBUG 61*4609Szf162725 #define RAL_DEBUG \ 62*4609Szf162725 ral_debug 63*4609Szf162725 #else 64*4609Szf162725 #define RAL_DEBUG 65*4609Szf162725 #endif 66*4609Szf162725 67*4609Szf162725 #define RT2560_RX_RADIOTAP_PRESENT \ 68*4609Szf162725 ((1 << IEEE80211_RADIOTAP_TSFT) | \ 69*4609Szf162725 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 70*4609Szf162725 (1 << IEEE80211_RADIOTAP_RATE) | \ 71*4609Szf162725 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 72*4609Szf162725 (1 << IEEE80211_RADIOTAP_ANTENNA) | \ 73*4609Szf162725 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)) 74*4609Szf162725 75*4609Szf162725 #define RT2560_TX_RADIOTAP_PRESENT \ 76*4609Szf162725 ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 77*4609Szf162725 (1 << IEEE80211_RADIOTAP_RATE) | \ 78*4609Szf162725 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 79*4609Szf162725 (1 << IEEE80211_RADIOTAP_ANTENNA)) 80*4609Szf162725 81*4609Szf162725 struct dma_region { 82*4609Szf162725 ddi_dma_handle_t dr_hnd; 83*4609Szf162725 ddi_acc_handle_t dr_acc; 84*4609Szf162725 ddi_dma_cookie_t dr_cookie; 85*4609Szf162725 uint_t dr_ccnt; 86*4609Szf162725 uint32_t dr_pbase; 87*4609Szf162725 caddr_t dr_base; 88*4609Szf162725 size_t dr_size; 89*4609Szf162725 }; 90*4609Szf162725 91*4609Szf162725 struct rt2560_tx_data { 92*4609Szf162725 caddr_t buf; 93*4609Szf162725 struct ieee80211_node *ni; 94*4609Szf162725 struct ral_rssdesc id; 95*4609Szf162725 }; 96*4609Szf162725 97*4609Szf162725 /* 98*4609Szf162725 * physaddr = dr_desc.dr_pbase 99*4609Szf162725 * desc = dr_desc.dr_base, desc[i].physaddr = dr_txbuf[i].dr_pbase 100*4609Szf162725 * data[i]->buf = dr_txbuf[i].dr_bas 101*4609Szf162725 */ 102*4609Szf162725 struct rt2560_tx_ring { 103*4609Szf162725 uint32_t physaddr; 104*4609Szf162725 struct rt2560_tx_desc *desc; 105*4609Szf162725 struct rt2560_tx_data *data; 106*4609Szf162725 107*4609Szf162725 struct dma_region dr_desc; 108*4609Szf162725 struct dma_region *dr_txbuf; 109*4609Szf162725 110*4609Szf162725 int count; 111*4609Szf162725 int queued; 112*4609Szf162725 int cur; 113*4609Szf162725 int next; 114*4609Szf162725 int cur_encrypt; 115*4609Szf162725 int next_encrypt; 116*4609Szf162725 kmutex_t tx_lock; 117*4609Szf162725 }; 118*4609Szf162725 119*4609Szf162725 struct rt2560_rx_data { 120*4609Szf162725 caddr_t buf; 121*4609Szf162725 int drop; 122*4609Szf162725 }; 123*4609Szf162725 124*4609Szf162725 struct rt2560_rx_ring { 125*4609Szf162725 uint32_t physaddr; 126*4609Szf162725 struct rt2560_rx_desc *desc; 127*4609Szf162725 struct rt2560_rx_data *data; 128*4609Szf162725 129*4609Szf162725 struct dma_region dr_desc; 130*4609Szf162725 struct dma_region *dr_rxbuf; 131*4609Szf162725 132*4609Szf162725 int count; 133*4609Szf162725 int cur; 134*4609Szf162725 int next; 135*4609Szf162725 int cur_decrypt; 136*4609Szf162725 kmutex_t rx_lock; 137*4609Szf162725 }; 138*4609Szf162725 139*4609Szf162725 struct rt2560_node { 140*4609Szf162725 struct ieee80211_node ni; 141*4609Szf162725 struct ral_rssadapt rssadapt; 142*4609Szf162725 }; 143*4609Szf162725 144*4609Szf162725 struct rt2560_softc { 145*4609Szf162725 struct ieee80211com sc_ic; 146*4609Szf162725 dev_info_t *sc_dev; 147*4609Szf162725 148*4609Szf162725 /* ddi i/o handler */ 149*4609Szf162725 ddi_acc_handle_t sc_ioh; 150*4609Szf162725 caddr_t sc_rbase; 151*4609Szf162725 152*4609Szf162725 /* interrupt */ 153*4609Szf162725 ddi_iblock_cookie_t sc_iblock; 154*4609Szf162725 155*4609Szf162725 kmutex_t sc_genlock; 156*4609Szf162725 157*4609Szf162725 timeout_id_t sc_scan_id; 158*4609Szf162725 timeout_id_t sc_rssadapt_id; 159*4609Szf162725 160*4609Szf162725 enum ieee80211_state sc_ostate; 161*4609Szf162725 timeout_id_t sc_state_id; 162*4609Szf162725 163*4609Szf162725 int sc_tx_timer; 164*4609Szf162725 165*4609Szf162725 uint32_t asic_rev; 166*4609Szf162725 uint32_t eeprom_rev; 167*4609Szf162725 uint8_t rf_rev; 168*4609Szf162725 169*4609Szf162725 struct rt2560_tx_ring txq; 170*4609Szf162725 struct rt2560_tx_ring prioq; 171*4609Szf162725 struct rt2560_rx_ring rxq; 172*4609Szf162725 173*4609Szf162725 uint32_t sc_need_sched; 174*4609Szf162725 uint32_t sc_flags; 175*4609Szf162725 uint32_t sc_rcr; /* RAL RCR */ 176*4609Szf162725 177*4609Szf162725 uint16_t sc_cachelsz; 178*4609Szf162725 ddi_softintr_t sc_softint_id; 179*4609Szf162725 180*4609Szf162725 uint32_t sc_rx_pend; 181*4609Szf162725 182*4609Szf162725 uint32_t rf_regs[4]; 183*4609Szf162725 uint8_t txpow[14]; 184*4609Szf162725 185*4609Szf162725 struct { 186*4609Szf162725 uint8_t reg; 187*4609Szf162725 uint8_t val; 188*4609Szf162725 } bbp_prom[16]; 189*4609Szf162725 190*4609Szf162725 int led_mode; 191*4609Szf162725 int hw_radio; 192*4609Szf162725 int rx_ant; 193*4609Szf162725 int tx_ant; 194*4609Szf162725 int nb_ant; 195*4609Szf162725 196*4609Szf162725 int dwelltime; 197*4609Szf162725 198*4609Szf162725 /* kstats */ 199*4609Szf162725 uint32_t sc_tx_nobuf; 200*4609Szf162725 uint32_t sc_rx_nobuf; 201*4609Szf162725 uint32_t sc_tx_err; 202*4609Szf162725 uint32_t sc_rx_err; 203*4609Szf162725 uint32_t sc_tx_retries; 204*4609Szf162725 205*4609Szf162725 int (*sc_newstate)(struct ieee80211com *, 206*4609Szf162725 enum ieee80211_state, int); 207*4609Szf162725 }; 208*4609Szf162725 209*4609Szf162725 #define RAL_IS_RUNNING(_sc) ((_sc)->sc_flags & RAL_FLAG_RUNNING) 210*4609Szf162725 #define RAL_LOCK(sc) mutex_enter(&(sc)->sc_genlock) 211*4609Szf162725 #define RAL_UNLOCK(sc) mutex_exit(&(sc)->sc_genlock) 212*4609Szf162725 213*4609Szf162725 #define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5] 214*4609Szf162725 #define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" 215*4609Szf162725 216*4609Szf162725 #ifdef __cplusplus 217*4609Szf162725 } 218*4609Szf162725 #endif 219*4609Szf162725 220*4609Szf162725 #endif /* _RT2560_VAR_H */ 221