15578Smx205022 /* 25578Smx205022 * CDDL HEADER START 35578Smx205022 * 45578Smx205022 * The contents of this file are subject to the terms of the 55578Smx205022 * Common Development and Distribution License (the "License"). 65578Smx205022 * You may not use this file except in compliance with the License. 75578Smx205022 * 85578Smx205022 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 95578Smx205022 * or http://www.opensolaris.org/os/licensing. 105578Smx205022 * See the License for the specific language governing permissions 115578Smx205022 * and limitations under the License. 125578Smx205022 * 135578Smx205022 * When distributing Covered Code, include this CDDL HEADER in each 145578Smx205022 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 155578Smx205022 * If applicable, add the following below this CDDL HEADER, with the 165578Smx205022 * fields enclosed by brackets "[]" replaced with your own identifying 175578Smx205022 * information: Portions Copyright [yyyy] [name of copyright owner] 185578Smx205022 * 195578Smx205022 * CDDL HEADER END 205578Smx205022 */ 215578Smx205022 225574Smx205022 /* 239708SZhen.W@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 245574Smx205022 * Use is subject to license terms. 255574Smx205022 */ 265574Smx205022 275574Smx205022 #ifndef _SYS_NGE_H 285574Smx205022 #define _SYS_NGE_H 295574Smx205022 305574Smx205022 #ifdef __cplusplus 315574Smx205022 extern "C" { 325574Smx205022 #endif 335574Smx205022 345574Smx205022 355574Smx205022 #include <sys/types.h> 365574Smx205022 #include <sys/stream.h> 375574Smx205022 #include <sys/strsun.h> 385574Smx205022 #include <sys/strsubr.h> 395574Smx205022 #include <sys/stat.h> 405574Smx205022 #include <sys/pci.h> 415574Smx205022 #include <sys/note.h> 425574Smx205022 #include <sys/modctl.h> 435574Smx205022 #include <sys/kstat.h> 445574Smx205022 #include <sys/ethernet.h> 455574Smx205022 #include <sys/pattr.h> 465574Smx205022 #include <sys/errno.h> 475574Smx205022 #include <sys/dlpi.h> 485574Smx205022 #include <sys/devops.h> 495574Smx205022 #include <sys/debug.h> 505574Smx205022 #include <sys/conf.h> 515574Smx205022 #include <sys/callb.h> 525574Smx205022 535574Smx205022 #include <netinet/ip6.h> 545574Smx205022 555574Smx205022 #include <inet/common.h> 565574Smx205022 #include <inet/ip.h> 575574Smx205022 #include <netinet/udp.h> 585574Smx205022 #include <inet/mi.h> 595574Smx205022 #include <inet/nd.h> 605574Smx205022 615574Smx205022 #include <sys/ddi.h> 625574Smx205022 #include <sys/sunddi.h> 635574Smx205022 648275SEric Cheng #include <sys/mac_provider.h> 655574Smx205022 #include <sys/mac_ether.h> 665574Smx205022 675574Smx205022 /* 685574Smx205022 * Reconfiguring the network devices requires the net_config privilege 695574Smx205022 * in Solaris 10+. 705574Smx205022 */ 715574Smx205022 extern int secpolicy_net_config(const cred_t *, boolean_t); 725574Smx205022 735574Smx205022 #include <sys/netlb.h> 745574Smx205022 #include <sys/miiregs.h> 755574Smx205022 765574Smx205022 #include "nge_chip.h" 775574Smx205022 785574Smx205022 #define PIO_ADDR(ngep, offset) ((void *)((caddr_t)(ngep)->io_regs+(offset))) 795574Smx205022 /* 805574Smx205022 * Copy an ethernet address 815574Smx205022 */ 825574Smx205022 #define ethaddr_copy(src, dst) bcopy((src), (dst), ETHERADDRL) 835574Smx205022 #define ether_eq(a, b) (bcmp((caddr_t)(a), (caddr_t)(b), (ETHERADDRL)) == 0) 845574Smx205022 855574Smx205022 #define BIS(w, b) (((w) & (b)) ? B_TRUE : B_FALSE) 865574Smx205022 #define BIC(w, b) (((w) & (b)) ? B_FALSE : B_TRUE) 875574Smx205022 #define UPORDOWN(x) ((x) ? "up" : "down") 885574Smx205022 895574Smx205022 #define NGE_DRIVER_NAME "nge" 905574Smx205022 915574Smx205022 /* 925574Smx205022 * 'Progress' bit flags ... 935574Smx205022 */ 945574Smx205022 #define PROGRESS_CFG 0x0001 /* config space mapped */ 955574Smx205022 #define PROGRESS_REGS 0x0002 /* registers mapped */ 965574Smx205022 #define PROGRESS_BUFS 0x0004 /* registers mapped */ 975574Smx205022 #define PROGRESS_RESCHED 0x0008 /* resched softint registered */ 985574Smx205022 #define PROGRESS_FACTOTUM 0x0010 /* factotum softint registered */ 995574Smx205022 #define PROGRESS_SWINT 0x0020 /* s/w interrupt registered */ 1005574Smx205022 #define PROGRESS_INTR 0x0040 /* h/w interrupt registered */ 1015574Smx205022 /* and mutexen initialised */ 1025574Smx205022 #define PROGRESS_HWINT 0x0080 1035574Smx205022 #define PROGRESS_PHY 0x0100 /* PHY initialised */ 1045574Smx205022 #define PROGRESS_NDD 0x0200 /* NDD parameters set up */ 1055574Smx205022 #define PROGRESS_KSTATS 0x0400 /* kstats created */ 1065574Smx205022 #define PROGRESS_READY 0x0800 /* ready for work */ 1075574Smx205022 1085574Smx205022 #define NGE_HW_ERR 0x00 1095574Smx205022 #define NGE_HW_LINK 0x01 1105574Smx205022 #define NGE_HW_BM 0x02 1115574Smx205022 #define NGE_HW_RCHAN 0x03 1125574Smx205022 #define NGE_HW_TCHAN 0x04 1135574Smx205022 #define NGE_HW_ROM 0x05 1145574Smx205022 #define NGE_SW_PROBLEM_ID 0x06 1155574Smx205022 1165574Smx205022 1175574Smx205022 /* 1185574Smx205022 * NOTES: 1195574Smx205022 * 1205574Smx205022 * #defines: 1215574Smx205022 * 1225574Smx205022 * NGE_PCI_CONFIG_RNUMBER and NGE_PCI_OPREGS_RNUMBER are the 1235574Smx205022 * register-set numbers to use for the config space registers 1245574Smx205022 * and the operating registers respectively. On an OBP-based 1255574Smx205022 * machine, regset 0 refers to CONFIG space, and regset 1 will 1265574Smx205022 * be the operating registers in MEMORY space. If an expansion 1275574Smx205022 * ROM is fitted, it may appear as a further register set. 1285574Smx205022 * 1295574Smx205022 * NGE_DMA_MODE defines the mode (STREAMING/CONSISTENT) used 1305574Smx205022 * for the data buffers. The descriptors are always set up 1315574Smx205022 * in CONSISTENT mode. 1325574Smx205022 * 1335574Smx205022 * NGE_HEADROOM defines how much space we'll leave in allocated 1345574Smx205022 * mblks before the first valid data byte. This should be chosen 1355574Smx205022 * to be 2 modulo 4, so that once the ethernet header (14 bytes) 1365574Smx205022 * has been stripped off, the packet data will be 4-byte aligned. 1375574Smx205022 * The remaining space can be used by upstream modules to prepend 1385574Smx205022 * any headers required. 1395574Smx205022 */ 1405574Smx205022 1415574Smx205022 1425574Smx205022 #define NGE_PCI_OPREGS_RNUMBER 1 1435574Smx205022 #define NGE_DMA_MODE DDI_DMA_STREAMING 1445574Smx205022 #define NGE_HEADROOM 6 1455574Smx205022 #define ETHER_HEAD_LEN 14 1465574Smx205022 #ifndef VTAG_SIZE 1475574Smx205022 #define VTAG_SIZE 4 1485574Smx205022 #endif 1495574Smx205022 150*10615SZhen.W@Sun.COM #define NGE_CYCLIC_PERIOD (1000000000) 1515574Smx205022 1525574Smx205022 #define NGE_DEFAULT_MTU 1500 1535574Smx205022 #define NGE_DEFAULT_SDU 1518 1545574Smx205022 #define NGE_MTU_2500 2500 1555574Smx205022 #define NGE_MTU_4500 4500 1565574Smx205022 #define NGE_MAX_MTU 9000 1575574Smx205022 #define NGE_MAX_SDU 9018 1585574Smx205022 1595659Sjj146644 #define NGE_DESC_MIN 0x200 1605574Smx205022 1615574Smx205022 #define NGE_STD_BUFSZ 1792 1625574Smx205022 #define NGE_JB2500_BUFSZ (3*1024) 1635574Smx205022 #define NGE_JB4500_BUFSZ (5*1024) 1645574Smx205022 #define NGE_JB9000_BUFSZ (9*1024) 1655574Smx205022 1665574Smx205022 #define NGE_SEND_SLOTS_DESC_1024 1024 1675574Smx205022 #define NGE_SEND_SLOTS_DESC_3072 3072 1685574Smx205022 #define NGE_SEND_JB2500_SLOTS_DESC 3072 1695574Smx205022 #define NGE_SEND_JB4500_SLOTS_DESC 2048 1705574Smx205022 #define NGE_SEND_JB9000_SLOTS_DESC 1024 1715574Smx205022 #define NGE_SEND_LOWMEM_SLOTS_DESC 1024 1725574Smx205022 #define NGE_SEND_SLOTS_BUF 3072 1735574Smx205022 1745574Smx205022 #define NGE_RECV_SLOTS_DESC_1024 1024 1755574Smx205022 #define NGE_RECV_SLOTS_DESC_3072 3072 1765574Smx205022 #define NGE_RECV_JB2500_SLOTS_DESC 3072 1775574Smx205022 #define NGE_RECV_JB4500_SLOTS_DESC 2048 1785574Smx205022 #define NGE_RECV_JB9000_SLOTS_DESC 1024 1795574Smx205022 #define NGE_RECV_LOWMEM_SLOTS_DESC 1024 1805574Smx205022 #define NGE_RECV_SLOTS_BUF 6144 1815574Smx205022 1825574Smx205022 #define NGE_SPLIT_32 32 1835574Smx205022 #define NGE_SPLIT_96 96 1845574Smx205022 #define NGE_SPLIT_256 256 1855574Smx205022 1865574Smx205022 #define NGE_RX_COPY_SIZE 512 1875574Smx205022 #define NGE_TX_COPY_SIZE 512 1885574Smx205022 #define NGE_MAP_FRAGS 3 1895574Smx205022 #define NGE_MAX_COOKIES 3 1905574Smx205022 #define NGE_MAX_DMA_HDR (4*1024) 1915574Smx205022 1925659Sjj146644 /* Used by interrupt moderation */ 193*10615SZhen.W@Sun.COM #define NGE_TFINT_DEFAULT 32 194*10615SZhen.W@Sun.COM #define NGE_POLL_TUNE 80000 195*10615SZhen.W@Sun.COM #define NGE_POLL_ENTER 10000 196*10615SZhen.W@Sun.COM #define NGE_POLL_MAX 1280000 1975659Sjj146644 #define NGE_POLL_QUIET_TIME 100 1985659Sjj146644 #define NGE_POLL_BUSY_TIME 2 1995574Smx205022 2005574Smx205022 /* 2015574Smx205022 * NGE-specific ioctls ... 2025574Smx205022 */ 2035574Smx205022 #define NGE_IOC ((((('N' << 8) + 'G') << 8) + 'E') << 8) 2045574Smx205022 2055574Smx205022 /* 2065574Smx205022 * PHY register read/write ioctls, used by cable test software 2075574Smx205022 */ 2085574Smx205022 #define NGE_MII_READ (NGE_IOC|1) 2095574Smx205022 #define NGE_MII_WRITE (NGE_IOC|2) 2105574Smx205022 2115574Smx205022 /* 2125574Smx205022 * SEEPROM read/write ioctls, for use by SEEPROM upgrade utility 2135574Smx205022 * 2145574Smx205022 * Note: SEEPROMs can only be accessed as 32-bit words, so <see_addr> 2155574Smx205022 * must be a multiple of 4. Not all systems have a SEEPROM fitted! 2165574Smx205022 */ 2175574Smx205022 #define NGE_SEE_READ (NGE_IOC|3) 2185574Smx205022 #define NGE_SEE_WRITE (NGE_IOC|4) 2195574Smx205022 2205574Smx205022 2215574Smx205022 /* 2225574Smx205022 * These diagnostic IOCTLS are enabled only in DEBUG drivers 2235574Smx205022 */ 2245574Smx205022 #define NGE_DIAG (NGE_IOC|5) /* currently a no-op */ 2255574Smx205022 #define NGE_PEEK (NGE_IOC|6) 2265574Smx205022 #define NGE_POKE (NGE_IOC|7) 2275574Smx205022 #define NGE_PHY_RESET (NGE_IOC|8) 2285574Smx205022 #define NGE_SOFT_RESET (NGE_IOC|9) 2295574Smx205022 #define NGE_HARD_RESET (NGE_IOC|10) 2305574Smx205022 2315574Smx205022 2325574Smx205022 enum NGE_HW_OP { 2335574Smx205022 NGE_CLEAR = 0, 2345574Smx205022 NGE_SET 2355574Smx205022 }; 2365574Smx205022 2375574Smx205022 /* 2385574Smx205022 * Required state according to GLD 2395574Smx205022 */ 2405574Smx205022 enum nge_mac_state { 2415574Smx205022 NGE_MAC_UNKNOWN, 2425574Smx205022 NGE_MAC_RESET, 2435574Smx205022 NGE_MAC_STOPPED, 2445574Smx205022 NGE_MAC_STARTED, 2455574Smx205022 NGE_MAC_UNATTACH 2465574Smx205022 }; 2475574Smx205022 enum loop_type { 2485574Smx205022 NGE_LOOP_NONE = 0, 2495574Smx205022 NGE_LOOP_EXTERNAL_100, 2505574Smx205022 NGE_LOOP_EXTERNAL_10, 2515574Smx205022 NGE_LOOP_INTERNAL_PHY, 2525574Smx205022 }; 2535574Smx205022 2545574Smx205022 /* 2555574Smx205022 * (Internal) return values from send_msg subroutines 2565574Smx205022 */ 2575574Smx205022 enum send_status { 2585574Smx205022 SEND_COPY_FAIL = -1, /* => GLD_NORESOURCES */ 2595574Smx205022 SEND_MAP_FAIL, /* => GLD_NORESOURCES */ 2605574Smx205022 SEND_COPY_SUCESS, /* OK, msg queued */ 2615574Smx205022 SEND_MAP_SUCCESS /* OK, free msg */ 2625574Smx205022 }; 2635574Smx205022 2645574Smx205022 /* 2655574Smx205022 * (Internal) return values from ioctl subroutines 2665574Smx205022 */ 2675574Smx205022 enum ioc_reply { 2685574Smx205022 IOC_INVAL = -1, /* bad, NAK with EINVAL */ 2695574Smx205022 IOC_DONE, /* OK, reply sent */ 2705574Smx205022 IOC_ACK, /* OK, just send ACK */ 2715574Smx205022 IOC_REPLY, /* OK, just send reply */ 2725574Smx205022 IOC_RESTART_ACK, /* OK, restart & ACK */ 2735574Smx205022 IOC_RESTART_REPLY /* OK, restart & reply */ 2745574Smx205022 }; 2755574Smx205022 2765574Smx205022 enum nge_pp_type { 2775574Smx205022 NGE_PP_SPACE_CFG = 0, 2785574Smx205022 NGE_PP_SPACE_REG, 2795574Smx205022 NGE_PP_SPACE_NIC, 2805574Smx205022 NGE_PP_SPACE_MII, 2815574Smx205022 NGE_PP_SPACE_NGE, 2825574Smx205022 NGE_PP_SPACE_TXDESC, 2835574Smx205022 NGE_PP_SPACE_TXBUFF, 2845574Smx205022 NGE_PP_SPACE_RXDESC, 2855574Smx205022 NGE_PP_SPACE_RXBUFF, 2865574Smx205022 NGE_PP_SPACE_STATISTICS, 2875574Smx205022 NGE_PP_SPACE_SEEPROM, 2885574Smx205022 NGE_PP_SPACE_FLASH 2895574Smx205022 }; 2905574Smx205022 2915574Smx205022 /* 2925574Smx205022 * Flag to kstat type 2935574Smx205022 */ 2945574Smx205022 enum nge_kstat_type { 2955574Smx205022 NGE_KSTAT_RAW = 0, 2965574Smx205022 NGE_KSTAT_STATS, 2975574Smx205022 NGE_KSTAT_CHIPID, 2985574Smx205022 NGE_KSTAT_DEBUG, 2995574Smx205022 NGE_KSTAT_COUNT 3005574Smx205022 }; 3015574Smx205022 3025574Smx205022 3035574Smx205022 /* 3045574Smx205022 * Actual state of the nvidia's chip 3055574Smx205022 */ 3065574Smx205022 enum nge_chip_state { 3075574Smx205022 NGE_CHIP_FAULT = -2, /* fault, need reset */ 3085574Smx205022 NGE_CHIP_ERROR, /* error, want reset */ 3095574Smx205022 NGE_CHIP_INITIAL, /* Initial state only */ 3105574Smx205022 NGE_CHIP_RESET, /* reset, need init */ 3115574Smx205022 NGE_CHIP_STOPPED, /* Tx/Rx stopped */ 3125574Smx205022 NGE_CHIP_RUNNING /* with interrupts */ 3135574Smx205022 }; 3145574Smx205022 3155574Smx205022 enum nge_eeprom_size { 3165574Smx205022 EEPROM_1K = 0, 3175574Smx205022 EEPROM_2K, 3185574Smx205022 EEPROM_4K, 3195574Smx205022 EEPROM_8K, 3205574Smx205022 EEPROM_16K, 3215574Smx205022 EEPROM_32K, 3225574Smx205022 EEPROM_64K 3235574Smx205022 }; 3245574Smx205022 3255574Smx205022 enum nge_eeprom_access_wid { 3265574Smx205022 ACCESS_8BIT = 0, 3275574Smx205022 ACCESS_16BIT 3285574Smx205022 }; 3295574Smx205022 3305574Smx205022 /* 3315574Smx205022 * MDIO operation 3325574Smx205022 */ 3335574Smx205022 enum nge_mdio_operation { 3345574Smx205022 NGE_MDIO_READ = 0, 3355574Smx205022 NGE_MDIO_WRITE 3365574Smx205022 }; 3375574Smx205022 3385574Smx205022 /* 3395574Smx205022 * Speed selection 3405574Smx205022 */ 3415574Smx205022 enum nge_speed { 3425574Smx205022 UNKOWN_SPEED = 0, 3435574Smx205022 NGE_10M, 3445574Smx205022 NGE_100M, 3455574Smx205022 NGE_1000M 3465574Smx205022 }; 3475574Smx205022 3485574Smx205022 /* 3495574Smx205022 * Duplex selection 3505574Smx205022 */ 3515574Smx205022 enum nge_duplex { 3525574Smx205022 UNKOWN_DUPLEX = 0, 3535574Smx205022 NGE_HD, 3545574Smx205022 NGE_FD 3555574Smx205022 }; 3565574Smx205022 3575574Smx205022 typedef struct { 3585574Smx205022 ether_addr_t addr; /* in canonical form */ 3595574Smx205022 uint8_t spare; 3605574Smx205022 uint8_t set; /* nonzero => valid */ 3615574Smx205022 } nge_mac_addr_t; 3625574Smx205022 3635574Smx205022 struct nge; 3645574Smx205022 3655574Smx205022 3665574Smx205022 #define CHIP_FLAG_COPPER 0x40 3675574Smx205022 3685574Smx205022 /* 3695574Smx205022 * Collection of physical-layer functions to: 3705574Smx205022 * (re)initialise the physical layer 3715574Smx205022 * update it to match software settings 3725574Smx205022 * check for link status change 3735574Smx205022 */ 3745574Smx205022 typedef struct { 3756366Smx205022 boolean_t (*phys_restart)(struct nge *); 3765574Smx205022 void (*phys_update)(struct nge *); 3775574Smx205022 boolean_t (*phys_check)(struct nge *); 3785574Smx205022 } phys_ops_t; 3795574Smx205022 3805574Smx205022 struct nge_see_rw { 3815574Smx205022 uint32_t see_addr; /* Byte offset within SEEPROM */ 3825574Smx205022 uint32_t see_data; /* Data read/data to write */ 3835574Smx205022 }; 3845574Smx205022 3855574Smx205022 typedef struct { 3865574Smx205022 uint64_t pp_acc_size; /* in bytes: 1,2,4,8 */ 3875574Smx205022 uint64_t pp_acc_space; /* See #defines below */ 3885574Smx205022 uint64_t pp_acc_offset; 3895574Smx205022 uint64_t pp_acc_data; /* output for peek */ 3905574Smx205022 /* input for poke */ 3915574Smx205022 } nge_peekpoke_t; 3925574Smx205022 3935574Smx205022 typedef uintptr_t nge_regno_t; /* register # (offset) */ 3945574Smx205022 3955574Smx205022 typedef struct _mul_list { 3965574Smx205022 struct _mul_list *next; 3975574Smx205022 uint32_t ref_cnt; 3985574Smx205022 ether_addr_t mul_addr; 3995574Smx205022 }mul_item, *pmul_item; 4005574Smx205022 4015574Smx205022 /* 4025574Smx205022 * Describes one chunk of allocated DMA-able memory 4035574Smx205022 * 4045574Smx205022 * In some cases, this is a single chunk as allocated from the system; 4055574Smx205022 * but we also use this structure to represent slices carved off such 4065574Smx205022 * a chunk. Even when we don't really need all the information, we 4075574Smx205022 * use this structure as a convenient way of correlating the various 4085574Smx205022 * ways of looking at a piece of memory (kernel VA, IO space DVMA, 4095574Smx205022 * handle+offset, etc). 4105574Smx205022 */ 4115574Smx205022 typedef struct dma_area 4125574Smx205022 { 4135574Smx205022 4145574Smx205022 caddr_t private; /* pointer to nge */ 4155574Smx205022 frtn_t rx_recycle; /* recycle function */ 4165574Smx205022 mblk_t *mp; 4175574Smx205022 ddi_acc_handle_t acc_hdl; /* handle for memory */ 4185574Smx205022 void *mem_va; /* CPU VA of memory */ 4195574Smx205022 uint32_t nslots; /* number of slots */ 4205574Smx205022 uint32_t size; /* size per slot */ 4215574Smx205022 size_t alength; /* allocated size */ 4225574Smx205022 /* >= product of above */ 4235574Smx205022 ddi_dma_handle_t dma_hdl; /* DMA handle */ 4245574Smx205022 offset_t offset; /* relative to handle */ 4255574Smx205022 ddi_dma_cookie_t cookie; /* associated cookie */ 4265574Smx205022 uint32_t ncookies; 4275574Smx205022 uint32_t signature; /* buffer signature */ 4285574Smx205022 /* for deciding to free */ 4295574Smx205022 /* or to reuse buffers */ 4305574Smx205022 boolean_t rx_delivered; /* hold by upper layer */ 4315574Smx205022 struct dma_area *next; 4325574Smx205022 } dma_area_t; 4335574Smx205022 4345574Smx205022 #define HOST_OWN 0x00000000 4355574Smx205022 #define CONTROLER_OWN 0x00000001 4365574Smx205022 #define NGE_END_PACKET 0x00000002 4375574Smx205022 4385574Smx205022 4395574Smx205022 typedef struct nge_dmah_node 4405574Smx205022 { 4415574Smx205022 struct nge_dmah_node *next; 4425574Smx205022 ddi_dma_handle_t hndl; 4435574Smx205022 } nge_dmah_node_t; 4445574Smx205022 4455574Smx205022 typedef struct nge_dmah_list 4465574Smx205022 { 4475574Smx205022 nge_dmah_node_t *head; 4485574Smx205022 nge_dmah_node_t *tail; 4495574Smx205022 } nge_dmah_list_t; 4505574Smx205022 4515574Smx205022 /* 4525574Smx205022 * Software version of the Recv Descriptor 4535574Smx205022 * There's one of these for each recv buffer (up to 512 per ring) 4545574Smx205022 */ 4555574Smx205022 typedef struct sw_rx_sbd { 4565574Smx205022 4575574Smx205022 dma_area_t desc; /* (const) related h/w */ 4585574Smx205022 /* descriptor area */ 4595574Smx205022 dma_area_t *bufp; /* (const) related */ 4605574Smx205022 /* buffer area */ 4615574Smx205022 uint8_t flags; 4625574Smx205022 } sw_rx_sbd_t; 4635574Smx205022 4645574Smx205022 /* 4655574Smx205022 * Software version of the send Buffer Descriptor 4665574Smx205022 * There's one of these for each send buffer (up to 512 per ring) 4675574Smx205022 */ 4685574Smx205022 typedef struct sw_tx_sbd { 4695574Smx205022 4705574Smx205022 dma_area_t desc; /* (const) related h/w */ 4715574Smx205022 /* descriptor area */ 4725574Smx205022 dma_area_t pbuf; /* (const) related */ 4735574Smx205022 /* buffer area */ 4745574Smx205022 void (*tx_recycle)(struct sw_tx_sbd *); 4755574Smx205022 uint32_t flags; 4765574Smx205022 mblk_t *mp; /* related mblk, if any */ 4775574Smx205022 nge_dmah_list_t mp_hndl; 4785574Smx205022 uint32_t frags; 4795574Smx205022 uint32_t ncookies; /* dma cookie number */ 4805574Smx205022 4815574Smx205022 } sw_tx_sbd_t; 4825574Smx205022 4835574Smx205022 /* 4845574Smx205022 * Software Receive Buffer (Producer) Ring Control Block 4855574Smx205022 * There's one of these for each receiver producer ring (up to 3), 4865574Smx205022 * but each holds buffers of a different size. 4875574Smx205022 */ 4885574Smx205022 typedef struct buff_ring { 4895574Smx205022 4905574Smx205022 uint64_t nslots; /* descriptor area */ 4915574Smx205022 struct nge *ngep; /* (const) containing */ 4925574Smx205022 /* driver soft state */ 4935574Smx205022 /* initialise same */ 4945574Smx205022 uint64_t rx_hold; 4955574Smx205022 sw_rx_sbd_t *sw_rbds; /* software descriptors */ 4965574Smx205022 sw_rx_sbd_t *free_rbds; /* free ring */ 4975574Smx205022 dma_area_t *free_list; /* available buffer queue */ 4985574Smx205022 dma_area_t *recycle_list; /* recycling buffer queue */ 4995574Smx205022 kmutex_t recycle_lock[1]; 5005988Svb160487 uint32_t buf_sign; /* buffer ring signature */ 5015988Svb160487 /* for deciding to free */ 5025988Svb160487 /* or to reuse buffers */ 5035574Smx205022 boolean_t rx_bcopy; 5045574Smx205022 } buff_ring_t; 5055574Smx205022 5065574Smx205022 /* 5075574Smx205022 * Software Receive (Return) Ring Control Block 5085574Smx205022 * There's one of these for each receiver return ring (up to 16). 5095574Smx205022 */ 5105574Smx205022 typedef struct recv_ring { 5115574Smx205022 /* 5125574Smx205022 * The elements flagged (const) in the comments below are 5135574Smx205022 * set up once during initialiation and thereafter unchanged. 5145574Smx205022 */ 5155574Smx205022 dma_area_t desc; /* (const) related h/w */ 5165574Smx205022 /* descriptor area */ 5175574Smx205022 struct nge *ngep; /* (const) containing */ 5185574Smx205022 /* driver soft state */ 5195574Smx205022 uint16_t prod_index; /* (const) ptr to h/w */ 5205574Smx205022 /* "producer index" */ 5215574Smx205022 mac_resource_handle_t handle; 5225574Smx205022 } recv_ring_t; 5235574Smx205022 5245574Smx205022 5255574Smx205022 5265574Smx205022 /* 5275574Smx205022 * Software Send Ring Control Block 5285574Smx205022 * There's one of these for each of (up to) 1 send rings 5295574Smx205022 */ 5305574Smx205022 typedef struct send_ring { 5315574Smx205022 /* 5325574Smx205022 * The elements flagged (const) in the comments below are 5335574Smx205022 * set up once during initialiation and thereafter unchanged. 5345574Smx205022 */ 5355574Smx205022 dma_area_t desc; /* (const) related h/w */ 5365574Smx205022 /* descriptor area */ 5375574Smx205022 dma_area_t buf[NGE_SEND_SLOTS_BUF]; 5385574Smx205022 /* buffer area(s) */ 5395574Smx205022 struct nge *ngep; /* (const) containing */ 5405574Smx205022 /* driver soft state */ 5415574Smx205022 5427781SMin.Xu@Sun.COM uint32_t tx_hwmark; 5437781SMin.Xu@Sun.COM uint32_t tx_lwmark; 5445574Smx205022 5455574Smx205022 /* 5465574Smx205022 * The tx_lock must be held when updating 5475574Smx205022 * the s/w producer index 5485574Smx205022 * (tx_next) 5495574Smx205022 */ 5505574Smx205022 kmutex_t tx_lock[1]; /* serialize h/w update */ 5517781SMin.Xu@Sun.COM uint32_t tx_next; /* next slot to use */ 5527781SMin.Xu@Sun.COM uint32_t tx_flow; 5535574Smx205022 5545574Smx205022 /* 5555574Smx205022 * These counters/indexes are manipulated in the transmit 5565574Smx205022 * path using atomics rather than mutexes for speed 5575574Smx205022 */ 5587781SMin.Xu@Sun.COM uint32_t tx_free; /* # of slots available */ 5595574Smx205022 5605574Smx205022 /* 5615574Smx205022 * index (tc_next). 5625574Smx205022 */ 5635574Smx205022 kmutex_t tc_lock[1]; 5647781SMin.Xu@Sun.COM uint32_t tc_next; /* next slot to recycle */ 5655574Smx205022 /* ("consumer index") */ 5665574Smx205022 5675574Smx205022 sw_tx_sbd_t *sw_sbds; /* software descriptors */ 5685574Smx205022 5695574Smx205022 kmutex_t dmah_lock; 5705574Smx205022 nge_dmah_list_t dmah_free; 5715574Smx205022 nge_dmah_node_t dmahndl[NGE_MAX_DMA_HDR]; 5725574Smx205022 5735574Smx205022 } send_ring_t; 5745574Smx205022 5755574Smx205022 5765574Smx205022 typedef struct { 5775574Smx205022 uint32_t businfo; /* from private reg */ 5785574Smx205022 uint16_t command; /* saved during attach */ 5795574Smx205022 5805574Smx205022 uint16_t vendor; /* vendor-id */ 5815574Smx205022 uint16_t device; /* device-id */ 5825574Smx205022 uint16_t subven; /* subsystem-vendor-id */ 5835574Smx205022 uint16_t subdev; /* subsystem-id */ 5845574Smx205022 uint8_t class_code; 5855574Smx205022 uint8_t revision; /* revision-id */ 5865574Smx205022 uint8_t clsize; /* cache-line-size */ 5875574Smx205022 uint8_t latency; /* latency-timer */ 5885574Smx205022 uint8_t flags; 5895574Smx205022 5905574Smx205022 uint16_t phy_type; /* Fiber module type */ 5915574Smx205022 uint64_t hw_mac_addr; /* from chip register */ 5925574Smx205022 nge_mac_addr_t vendor_addr; /* transform of same */ 5935574Smx205022 } chip_info_t; 5945574Smx205022 5955574Smx205022 5965574Smx205022 typedef struct { 5975574Smx205022 offset_t index; 5985574Smx205022 char *name; 5995574Smx205022 } nge_ksindex_t; 6005574Smx205022 6015574Smx205022 typedef struct { 6025574Smx205022 uint64_t tso_err_mss; 6035574Smx205022 uint64_t tso_dis; 6045574Smx205022 uint64_t tso_err_nosum; 6055574Smx205022 uint64_t tso_err_hov; 6065574Smx205022 uint64_t tso_err_huf; 6075574Smx205022 uint64_t tso_err_l2; 6085574Smx205022 uint64_t tso_err_ip; 6095574Smx205022 uint64_t tso_err_l4; 6105574Smx205022 uint64_t tso_err_tcp; 6115574Smx205022 uint64_t hsum_err_ip; 6125574Smx205022 uint64_t hsum_err_l4; 6135574Smx205022 }fe_statistics_t; 6145574Smx205022 6155574Smx205022 /* 6165574Smx205022 * statistics parameters to tune the driver 6175574Smx205022 */ 6185574Smx205022 typedef struct { 6195574Smx205022 uint64_t intr_count; 6205574Smx205022 uint64_t intr_lval; 6215574Smx205022 uint64_t recv_realloc; 6225574Smx205022 uint64_t poll_time; 6235574Smx205022 uint64_t recy_free; 6245574Smx205022 uint64_t recv_count; 6255574Smx205022 uint64_t xmit_count; 6265574Smx205022 uint64_t obytes; 6275574Smx205022 uint64_t rbytes; 6285574Smx205022 uint64_t mp_alloc_err; 6295574Smx205022 uint64_t dma_alloc_err; 6305574Smx205022 uint64_t kmem_alloc_err; 6315574Smx205022 uint64_t load_context; 6325574Smx205022 uint64_t ip_hwsum_err; 6335574Smx205022 uint64_t tcp_hwsum_err; 6345574Smx205022 uint64_t rx_nobuffer; 6355574Smx205022 uint64_t rx_err; 6365574Smx205022 uint64_t tx_stop_err; 6375574Smx205022 uint64_t tx_stall; 6385574Smx205022 uint64_t tx_rsrv_fail; 6395574Smx205022 uint64_t tx_resched; 6405574Smx205022 fe_statistics_t fe_err; 6415574Smx205022 }nge_sw_statistics_t; 6425574Smx205022 6435574Smx205022 typedef struct { 6445574Smx205022 nge_hw_statistics_t hw_statistics; 6455574Smx205022 nge_sw_statistics_t sw_statistics; 6465574Smx205022 }nge_statistics_t; 6475574Smx205022 6485574Smx205022 struct nge_desc_attr { 6495574Smx205022 6505574Smx205022 size_t rxd_size; 6515574Smx205022 size_t txd_size; 6525574Smx205022 6535574Smx205022 ddi_dma_attr_t *dma_attr; 6545574Smx205022 ddi_dma_attr_t *tx_dma_attr; 6555574Smx205022 6565574Smx205022 void (*rxd_fill)(void *, const ddi_dma_cookie_t *, size_t); 6575574Smx205022 uint32_t (*rxd_check)(const void *, size_t *); 6585574Smx205022 6595574Smx205022 void (*txd_fill)(void *, const ddi_dma_cookie_t *, size_t, 660*10615SZhen.W@Sun.COM uint32_t, boolean_t, boolean_t); 6615574Smx205022 6629906SZhen.W@Sun.COM uint32_t (*txd_check)(const void *); 6635574Smx205022 }; 6645574Smx205022 6655574Smx205022 typedef struct nge_desc_attr nge_desc_attr_t; 6665574Smx205022 6675574Smx205022 /* 6685574Smx205022 * Structure used to hold the device-specific config parameters. 6695574Smx205022 * The setting of such parameters may not consistent with the 6705574Smx205022 * hardware feature of the device. It's used for software purpose. 6715574Smx205022 */ 6725574Smx205022 typedef struct nge_dev_spec_param { 6735574Smx205022 boolean_t msi; /* specifies msi support */ 6745574Smx205022 boolean_t msi_x; /* specifies msi_x support */ 6755574Smx205022 boolean_t vlan; /* specifies vlan support */ 6765848Sjj146644 boolean_t advanced_pm; /* advanced power management support */ 6778218SMin.Xu@Sun.COM boolean_t mac_addr_order; /* mac address order */ 6785574Smx205022 boolean_t tx_pause_frame; /* specifies tx pause frame support */ 6795574Smx205022 boolean_t rx_pause_frame; /* specifies rx pause frame support */ 6805574Smx205022 boolean_t jumbo; /* jumbo frame support */ 6815574Smx205022 boolean_t tx_rx_64byte; /* set the max tx/rx prd fetch size */ 6825574Smx205022 boolean_t rx_hw_checksum; /* specifies tx hw checksum feature */ 6835574Smx205022 uint32_t tx_hw_checksum; /* specifies rx hw checksum feature */ 6845574Smx205022 uint32_t desc_type; /* specifies descriptor type */ 6855574Smx205022 uint32_t rx_desc_num; /* specifies rx descriptor number */ 6865574Smx205022 uint32_t tx_desc_num; /* specifies tx descriptor number */ 6875574Smx205022 uint32_t nge_split; /* specifies the split number */ 6885574Smx205022 } nge_dev_spec_param_t; 6895574Smx205022 6905574Smx205022 typedef struct nge { 6915574Smx205022 /* 6925574Smx205022 * These fields are set by attach() and unchanged thereafter ... 6935574Smx205022 */ 6945574Smx205022 dev_info_t *devinfo; /* device instance */ 6955574Smx205022 mac_handle_t mh; /* mac module handle */ 6965574Smx205022 chip_info_t chipinfo; 6975574Smx205022 ddi_acc_handle_t cfg_handle; /* DDI I/O handle */ 6985574Smx205022 ddi_acc_handle_t io_handle; /* DDI I/O handle */ 6995574Smx205022 void *io_regs; /* mapped registers */ 7005574Smx205022 7015574Smx205022 ddi_periodic_t periodic_id; /* periodical callback */ 7025574Smx205022 uint32_t factotum_flag; 7035574Smx205022 ddi_softint_handle_t factotum_hdl; /* factotum callback */ 7045574Smx205022 ddi_softint_handle_t resched_hdl; /* reschedule callback */ 7055574Smx205022 uint_t soft_pri; 7065574Smx205022 7075574Smx205022 ddi_intr_handle_t *htable; /* for array of interrupts */ 7085574Smx205022 int intr_type; /* type of interrupt */ 7095574Smx205022 int intr_actual_cnt; /* alloc intrs count */ 7105574Smx205022 int intr_req_cnt; /* request intrs count */ 7115574Smx205022 uint_t intr_pri; /* interrupt priority */ 7125574Smx205022 int intr_cap; /* interrupt capabilities */ 7135574Smx205022 7145574Smx205022 uint32_t progress; /* attach tracking */ 7155574Smx205022 uint32_t debug; /* flag to debug function */ 7165574Smx205022 7175574Smx205022 char ifname[8]; /* "nge0" ... "nge999" */ 7185574Smx205022 7195574Smx205022 7205574Smx205022 enum nge_mac_state nge_mac_state; /* definitions above */ 7215574Smx205022 enum nge_chip_state nge_chip_state; /* definitions above */ 7225574Smx205022 boolean_t promisc; 7237155Smx205022 boolean_t record_promisc; 7245574Smx205022 boolean_t suspended; 7255574Smx205022 7265574Smx205022 int resched_needed; 7275574Smx205022 uint32_t default_mtu; 7285574Smx205022 uint32_t max_sdu; 7295574Smx205022 uint32_t buf_size; 7305574Smx205022 uint32_t rx_desc; 7315574Smx205022 uint32_t tx_desc; 7325574Smx205022 uint32_t rx_buf; 7335574Smx205022 uint32_t nge_split; 7345574Smx205022 uint32_t watchdog; 7355574Smx205022 uint32_t lowmem_mode; 7365574Smx205022 7375574Smx205022 7385574Smx205022 /* 7395574Smx205022 * Runtime read-write data starts here ... 7405574Smx205022 * 1 Receive Rings 7415574Smx205022 * 1 Send Rings 7425574Smx205022 * 7435574Smx205022 * Note: they're not necessarily all used. 7445574Smx205022 */ 7455574Smx205022 struct buff_ring buff[1]; 7465574Smx205022 struct recv_ring recv[1]; 7475574Smx205022 struct send_ring send[1]; 7485574Smx205022 7495574Smx205022 7505574Smx205022 kmutex_t genlock[1]; 7515574Smx205022 krwlock_t rwlock[1]; 7525574Smx205022 kmutex_t softlock[1]; 7535574Smx205022 uint32_t intr_masks; 7545574Smx205022 boolean_t poll; 7555574Smx205022 boolean_t ch_intr_mode; 7565659Sjj146644 boolean_t intr_moderation; 7575574Smx205022 uint32_t recv_count; 7585659Sjj146644 uint32_t quiet_time; 7595659Sjj146644 uint32_t busy_time; 760*10615SZhen.W@Sun.COM uint64_t tpkts_last; 761*10615SZhen.W@Sun.COM uint32_t tfint_threshold; 7625574Smx205022 uint32_t sw_intr_intv; 7635574Smx205022 nge_mac_addr_t cur_uni_addr; 7645574Smx205022 uint32_t rx_datahwm; 7655574Smx205022 uint32_t rx_prdlwm; 7665574Smx205022 uint32_t rx_prdhwm; 7675574Smx205022 uint32_t rx_def; 7685574Smx205022 uint32_t desc_mode; 7695574Smx205022 7705574Smx205022 mul_item *pcur_mulist; 7715574Smx205022 nge_mac_addr_t cur_mul_addr; 7725574Smx205022 nge_mac_addr_t cur_mul_mask; 7735574Smx205022 7745574Smx205022 nge_desc_attr_t desc_attr; 7755574Smx205022 7765574Smx205022 /* 7775574Smx205022 * Link state data (protected by genlock) 7785574Smx205022 */ 7795574Smx205022 int32_t link_state; /* See GLD #defines */ 7805574Smx205022 uint32_t stall_cknum; /* Stall check number */ 7815574Smx205022 7825574Smx205022 uint32_t phy_xmii_addr; 7835574Smx205022 uint32_t phy_id; 7845574Smx205022 uint32_t phy_mode; 7855574Smx205022 const phys_ops_t *physops; 7865574Smx205022 uint16_t phy_gen_status; 7875574Smx205022 7885574Smx205022 uint32_t param_loop_mode; 7895574Smx205022 7905574Smx205022 kstat_t *nge_kstats[NGE_KSTAT_COUNT]; 7915574Smx205022 nge_statistics_t statistics; 7925574Smx205022 7935574Smx205022 nge_dev_spec_param_t dev_spec_param; 7945574Smx205022 7956200Smx205022 uint32_t param_en_pause:1, 7966200Smx205022 param_en_asym_pause:1, 7976200Smx205022 param_en_1000hdx:1, 7986200Smx205022 param_en_1000fdx:1, 7996200Smx205022 param_en_100fdx:1, 8006200Smx205022 param_en_100hdx:1, 8016200Smx205022 param_en_10fdx:1, 8026200Smx205022 param_en_10hdx:1, 8036512Ssowmini param_adv_autoneg:1, 8046512Ssowmini param_adv_pause:1, 8056512Ssowmini param_adv_asym_pause:1, 8066512Ssowmini param_adv_1000fdx:1, 8076512Ssowmini param_adv_1000hdx:1, 8086512Ssowmini param_adv_100fdx:1, 8096512Ssowmini param_adv_100hdx:1, 8106512Ssowmini param_adv_10fdx:1, 8116512Ssowmini param_adv_10hdx:1, 8126512Ssowmini param_lp_autoneg:1, 8136512Ssowmini param_lp_pause:1, 8146512Ssowmini param_lp_asym_pause:1, 8156512Ssowmini param_lp_1000fdx:1, 8166512Ssowmini param_lp_1000hdx:1, 8176512Ssowmini param_lp_100fdx:1, 8186512Ssowmini param_lp_100hdx:1, 8196512Ssowmini param_lp_10fdx:1, 8206512Ssowmini param_lp_10hdx:1, 8216512Ssowmini param_link_up:1, 8226512Ssowmini param_link_autoneg:1, 8236512Ssowmini param_link_rx_pause:1, 8246512Ssowmini param_link_tx_pause:1, 8256512Ssowmini param_pad_to_32:2; 8266512Ssowmini uint64_t param_link_speed; 8276512Ssowmini link_duplex_t param_link_duplex; 8286512Ssowmini int param_txbcopy_threshold; 8296512Ssowmini int param_rxbcopy_threshold; 8306512Ssowmini int param_recv_max_packet; 8316512Ssowmini int param_poll_quiet_time; 8326512Ssowmini int param_poll_busy_time; 8336512Ssowmini int param_rx_intr_hwater; 8346512Ssowmini int param_rx_intr_lwater; 8355574Smx205022 } nge_t; 8365574Smx205022 8375574Smx205022 extern const nge_ksindex_t nge_statistics[]; 8385574Smx205022 8395574Smx205022 /* 8405574Smx205022 * Sync a DMA area described by a dma_area_t 8415574Smx205022 */ 8425574Smx205022 #define DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl, \ 8435574Smx205022 (area).offset, (area).alength, (flag))) 8445574Smx205022 8455574Smx205022 /* 8465574Smx205022 * Find the (kernel virtual) address of block of memory 8475574Smx205022 * described by a dma_area_t 8485574Smx205022 */ 8495574Smx205022 #define DMA_VPTR(area) ((area).mem_va) 8505574Smx205022 8515574Smx205022 /* 8525574Smx205022 * Zero a block of memory described by a dma_area_t 8535574Smx205022 */ 8545574Smx205022 #define DMA_ZERO(area) bzero(DMA_VPTR(area), (area).alength) 8555574Smx205022 8565574Smx205022 /* 8575574Smx205022 * Next/Prev value of a cyclic index 8585574Smx205022 */ 8595574Smx205022 #define NEXT(index, limit) ((index) + 1 < (limit) ? (index) + 1 : 0) 8605574Smx205022 #define PREV(index, limit) (0 == (index) ? (limit - 1) : (index) - 1) 8615574Smx205022 8625574Smx205022 #define NEXT_INDEX(ndx, num, lim)\ 8635574Smx205022 (((ndx) + (num) < (lim)) ? ((ndx) + (num)) : ((ndx) + (num) - (lim))) 8645574Smx205022 8655574Smx205022 8665574Smx205022 /* 8675574Smx205022 * Property lookups 8685574Smx205022 */ 8695574Smx205022 #define NGE_PROP_EXISTS(d, n) ddi_prop_exists(DDI_DEV_T_ANY, (d), \ 8705574Smx205022 DDI_PROP_DONTPASS, (n)) 8715574Smx205022 #define NGE_PROP_GET_INT(d, n) ddi_prop_get_int(DDI_DEV_T_ANY, (d), \ 8725574Smx205022 DDI_PROP_DONTPASS, (n), -1) 8735574Smx205022 8745574Smx205022 8755574Smx205022 /* 8765574Smx205022 * Debugging ... 8775574Smx205022 */ 8785574Smx205022 #ifdef DEBUG 8795574Smx205022 #define NGE_DEBUGGING 1 8805574Smx205022 #else 8815574Smx205022 #define NGE_DEBUGGING 0 8825574Smx205022 #endif /* DEBUG */ 8835574Smx205022 8845574Smx205022 /* 8855574Smx205022 * Bit flags in the 'debug' word ... 8865574Smx205022 */ 8875574Smx205022 #define NGE_DBG_STOP 0x00000001 /* early debug_enter() */ 8885574Smx205022 #define NGE_DBG_TRACE 0x00000002 /* general flow tracing */ 8895574Smx205022 8905574Smx205022 #define NGE_DBG_MII 0x00000010 /* low-level MII access */ 8915574Smx205022 #define NGE_DBG_CHIP 0x00000020 /* low(ish)-level code */ 8925574Smx205022 8935574Smx205022 #define NGE_DBG_RECV 0x00000100 /* receive-side code */ 8945574Smx205022 #define NGE_DBG_SEND 0x00000200 /* packet-send code */ 8955574Smx205022 8965574Smx205022 #define NGE_DBG_INIT 0x00100000 /* initialisation */ 8975574Smx205022 #define NGE_DBG_NEMO 0x00200000 /* MAC layer entry points */ 8985574Smx205022 #define NGE_DBG_STATS 0x00400000 /* statistics */ 8995574Smx205022 9005574Smx205022 #define NGE_DBG_BADIOC 0x01000000 /* unknown ioctls */ 9015574Smx205022 9025574Smx205022 #define NGE_DBG_NDD 0x10000000 /* NDD operations */ 9035574Smx205022 9045574Smx205022 9055574Smx205022 9065574Smx205022 /* 9075574Smx205022 * 'Do-if-debugging' macro. The parameter <command> should be one or more 9085574Smx205022 * C statements (but without the *final* semicolon), which will either be 9095574Smx205022 * compiled inline or completely ignored, depending on the NGE_DEBUGGING 9105574Smx205022 * compile-time flag. 9115574Smx205022 * 9125574Smx205022 * You should get a compile-time error (at least on a DEBUG build) if 9135574Smx205022 * your statement isn't actually a statement, rather than unexpected 9145574Smx205022 * run-time behaviour caused by unintended matching of if-then-elses etc. 9155574Smx205022 * 9165574Smx205022 * Note that the NGE_DDB() macro itself can only be used as a statement, 9175574Smx205022 * not an expression, and should always be followed by a semicolon. 9185574Smx205022 */ 9195574Smx205022 #if NGE_DEBUGGING 9205574Smx205022 #define NGE_DDB(command) do { \ 9215574Smx205022 { command; } \ 9225574Smx205022 _NOTE(CONSTANTCONDITION) \ 9235574Smx205022 } while (0) 9245574Smx205022 #else /* NGE_DEBUGGING */ 9255574Smx205022 #define NGE_DDB(command) 9265574Smx205022 /* 9275574Smx205022 * Old way of debugging. This is a poor way, as it leeaves empty 9285574Smx205022 * statements that cause lint to croak. 9295574Smx205022 * #define NGE_DDB(command) do { \ 9305574Smx205022 * { _NOTE(EMPTY); } \ 9315574Smx205022 * _NOTE(CONSTANTCONDITION) \ 9325574Smx205022 * } while (0) 9335574Smx205022 */ 9345574Smx205022 #endif /* NGE_DEBUGGING */ 9355574Smx205022 9365574Smx205022 /* 9375574Smx205022 * 'Internal' macros used to construct the TRACE/DEBUG macros below. 9385574Smx205022 * These provide the primitive conditional-call capability required. 9395574Smx205022 * Note: the parameter <args> is a parenthesised list of the actual 9405574Smx205022 * printf-style arguments to be passed to the debug function ... 9415574Smx205022 */ 9425574Smx205022 #define NGE_XDB(b, w, f, args) NGE_DDB(if ((b) & (w)) f args) 9435574Smx205022 #define NGE_GDB(b, args) NGE_XDB(b, nge_debug, (*nge_gdb()), args) 9445574Smx205022 #define NGE_LDB(b, args) NGE_XDB(b, ngep->debug, \ 9455574Smx205022 (*nge_db(ngep)), args) 9465574Smx205022 #define NGE_CDB(f, args) NGE_XDB(NGE_DBG, ngep->debug, f, args) 9475574Smx205022 9485574Smx205022 /* 9495574Smx205022 * Conditional-print macros. 9505574Smx205022 * 9515574Smx205022 * Define NGE_DBG to be the relevant member of the set of NGE_DBG_* values 9525574Smx205022 * above before using the NGE_GDEBUG() or NGE_DEBUG() macros. The 'G' 9535574Smx205022 * versions look at the Global debug flag word (nge_debug); the non-G 9545574Smx205022 * versions look in the per-instance data (ngep->debug) and so require a 9555574Smx205022 * variable called 'ngep' to be in scope (and initialised!) before use. 9565574Smx205022 * 9575574Smx205022 * You could redefine NGE_TRC too if you really need two different 9585574Smx205022 * flavours of debugging output in the same area of code, but I don't 9595574Smx205022 * really recommend it. 9605574Smx205022 * 9615574Smx205022 * Note: the parameter <args> is a parenthesised list of the actual 9625574Smx205022 * arguments to be passed to the debug function, usually a printf-style 9635574Smx205022 * format string and corresponding values to be formatted. 9645574Smx205022 */ 9655574Smx205022 9665574Smx205022 #define NGE_TRC NGE_DBG_TRACE 9675574Smx205022 9685574Smx205022 #define NGE_GTRACE(args) NGE_GDB(NGE_TRC, args) 9695574Smx205022 #define NGE_GDEBUG(args) NGE_GDB(NGE_DBG, args) 9705574Smx205022 #define NGE_TRACE(args) NGE_LDB(NGE_TRC, args) 9715574Smx205022 #define NGE_DEBUG(args) NGE_LDB(NGE_DBG, args) 9725574Smx205022 9735574Smx205022 /* 9745574Smx205022 * Debug-only action macros 9755574Smx205022 */ 9765574Smx205022 9775574Smx205022 9785574Smx205022 #define NGE_REPORT(args) NGE_DDB(nge_log args) 9795574Smx205022 9805574Smx205022 boolean_t nge_atomic_decrease(uint64_t *count_p, uint64_t n); 9815574Smx205022 void nge_atomic_increase(uint64_t *count_p, uint64_t n); 9825574Smx205022 9835574Smx205022 int nge_alloc_dma_mem(nge_t *ngep, size_t memsize, 9845574Smx205022 ddi_device_acc_attr_t *attr_p, uint_t dma_flags, dma_area_t *dma_p); 9855574Smx205022 void nge_free_dma_mem(dma_area_t *dma_p); 9865574Smx205022 int nge_restart(nge_t *ngep); 9875574Smx205022 void nge_wake_factotum(nge_t *ngep); 9885574Smx205022 9895574Smx205022 uint8_t nge_reg_get8(nge_t *ngep, nge_regno_t regno); 9905574Smx205022 void nge_reg_put8(nge_t *ngep, nge_regno_t regno, uint8_t data); 9915574Smx205022 uint16_t nge_reg_get16(nge_t *ngep, nge_regno_t regno); 9925574Smx205022 void nge_reg_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 9935574Smx205022 uint32_t nge_reg_get32(nge_t *ngep, nge_regno_t regno); 9945574Smx205022 void nge_reg_put32(nge_t *ngep, nge_regno_t regno, uint32_t data); 9955574Smx205022 uint_t nge_chip_factotum(caddr_t args1, caddr_t args2); 9965574Smx205022 void nge_chip_cfg_init(nge_t *ngep, chip_info_t *infop, boolean_t reset); 9975574Smx205022 void nge_init_dev_spec_param(nge_t *ngep); 9985574Smx205022 int nge_chip_stop(nge_t *ngep, boolean_t fault); 9995574Smx205022 void nge_restore_mac_addr(nge_t *ngep); 10005574Smx205022 int nge_chip_reset(nge_t *ngep); 10015574Smx205022 int nge_chip_start(nge_t *ngep); 10025574Smx205022 void nge_chip_sync(nge_t *ngep); 10035574Smx205022 10045574Smx205022 uint_t nge_chip_intr(caddr_t arg1, caddr_t arg2); 10055574Smx205022 enum ioc_reply nge_chip_ioctl(nge_t *ngep, mblk_t *mp, struct iocblk *iocp); 10065574Smx205022 10075574Smx205022 void nge_phys_init(nge_t *ngep); 10085574Smx205022 boolean_t nge_phy_reset(nge_t *ngep); 10095574Smx205022 uint16_t nge_mii_get16(nge_t *ngep, nge_regno_t regno); 10105574Smx205022 void nge_mii_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 10115574Smx205022 10125574Smx205022 void nge_recv_recycle(caddr_t arg); 10135574Smx205022 void nge_receive(nge_t *ngep); 10145574Smx205022 10155574Smx205022 uint_t nge_reschedule(caddr_t args1, caddr_t args2); 10165574Smx205022 mblk_t *nge_m_tx(void *arg, mblk_t *mp); 10175574Smx205022 10185574Smx205022 void nge_tx_recycle(nge_t *ngep, boolean_t is_intr); 10195574Smx205022 void nge_tx_recycle_all(nge_t *ngep); 10205574Smx205022 10215574Smx205022 int nge_nd_init(nge_t *ngep); 10225574Smx205022 void nge_nd_cleanup(nge_t *ngep); 10235574Smx205022 10245574Smx205022 10255574Smx205022 void nge_init_kstats(nge_t *ngep, int instance); 10265574Smx205022 void nge_fini_kstats(nge_t *ngep); 10275574Smx205022 int nge_m_stat(void *arg, uint_t stat, uint64_t *val); 10285574Smx205022 10295574Smx205022 uint32_t nge_atomic_shl32(uint32_t *sp, uint_t count); 10305574Smx205022 10315574Smx205022 void nge_log(nge_t *ngep, const char *fmt, ...); 10325574Smx205022 void nge_problem(nge_t *ngep, const char *fmt, ...); 10335574Smx205022 void nge_error(nge_t *ngep, const char *fmt, ...); 10345574Smx205022 void 10355574Smx205022 nge_report(nge_t *ngep, uint8_t error_id); 10365574Smx205022 10375574Smx205022 void (*nge_db(nge_t *ngep))(const char *fmt, ...); 10385574Smx205022 void (*nge_gdb(void))(const char *fmt, ...); 10395574Smx205022 extern uint32_t nge_debug; 10405574Smx205022 10415574Smx205022 /* 10425574Smx205022 * DESC MODE 2 10435574Smx205022 */ 10445574Smx205022 10455574Smx205022 extern void nge_sum_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 10465574Smx205022 extern uint32_t nge_sum_rxd_check(const void *, size_t *); 10475574Smx205022 10485574Smx205022 extern void nge_sum_txd_fill(void *, const ddi_dma_cookie_t *, 1049*10615SZhen.W@Sun.COM size_t, uint32_t, boolean_t, boolean_t); 10509906SZhen.W@Sun.COM extern uint32_t nge_sum_txd_check(const void *); 10515574Smx205022 10525574Smx205022 /* 10535574Smx205022 * DESC MODE 3 10545574Smx205022 */ 10555574Smx205022 10565574Smx205022 extern void nge_hot_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 10575574Smx205022 extern uint32_t nge_hot_rxd_check(const void *, size_t *); 10585574Smx205022 10595574Smx205022 extern void nge_hot_txd_fill(void *, const ddi_dma_cookie_t *, 1060*10615SZhen.W@Sun.COM size_t, uint32_t, boolean_t, boolean_t); 10619906SZhen.W@Sun.COM extern uint32_t nge_hot_txd_check(const void *); 10625574Smx205022 10635574Smx205022 #ifdef __cplusplus 10645574Smx205022 } 10655574Smx205022 #endif 10665574Smx205022 10675574Smx205022 #endif /* _SYS_NGE_H */ 1068