1*6621Sbt150084 /* 2*6621Sbt150084 * CDDL HEADER START 3*6621Sbt150084 * 4*6621Sbt150084 * Copyright(c) 2007-2008 Intel Corporation. All rights reserved. 5*6621Sbt150084 * The contents of this file are subject to the terms of the 6*6621Sbt150084 * Common Development and Distribution License (the "License"). 7*6621Sbt150084 * You may not use this file except in compliance with the License. 8*6621Sbt150084 * 9*6621Sbt150084 * You can obtain a copy of the license at: 10*6621Sbt150084 * http://www.opensolaris.org/os/licensing. 11*6621Sbt150084 * See the License for the specific language governing permissions 12*6621Sbt150084 * and limitations under the License. 13*6621Sbt150084 * 14*6621Sbt150084 * When using or redistributing this file, you may do so under the 15*6621Sbt150084 * License only. No other modification of this header is permitted. 16*6621Sbt150084 * 17*6621Sbt150084 * If applicable, add the following below this CDDL HEADER, with the 18*6621Sbt150084 * fields enclosed by brackets "[]" replaced with your own identifying 19*6621Sbt150084 * information: Portions Copyright [yyyy] [name of copyright owner] 20*6621Sbt150084 * 21*6621Sbt150084 * CDDL HEADER END 22*6621Sbt150084 */ 23*6621Sbt150084 24*6621Sbt150084 /* 25*6621Sbt150084 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 26*6621Sbt150084 * Use is subject to license terms of the CDDL. 27*6621Sbt150084 */ 28*6621Sbt150084 29*6621Sbt150084 /* IntelVersion: 1.81 v2008-03-04 */ 30*6621Sbt150084 31*6621Sbt150084 #pragma ident "%Z%%M% %I% %E% SMI" 32*6621Sbt150084 33*6621Sbt150084 #include "ixgbe_api.h" 34*6621Sbt150084 #include "ixgbe_common.h" 35*6621Sbt150084 36*6621Sbt150084 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 37*6621Sbt150084 38*6621Sbt150084 /* 39*6621Sbt150084 * ixgbe_init_shared_code - Initialize the shared code 40*6621Sbt150084 * @hw: pointer to hardware structure 41*6621Sbt150084 * 42*6621Sbt150084 * This will assign function pointers and assign the MAC type and PHY code. 43*6621Sbt150084 * Does not touch the hardware. This function must be called prior to any 44*6621Sbt150084 * other function in the shared code. The ixgbe_hw structure should be 45*6621Sbt150084 * memset to 0 prior to calling this function. The following fields in 46*6621Sbt150084 * hw structure should be filled in prior to calling this function: 47*6621Sbt150084 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 48*6621Sbt150084 * subsystem_vendor_id, and revision_id 49*6621Sbt150084 */ 50*6621Sbt150084 s32 51*6621Sbt150084 ixgbe_init_shared_code(struct ixgbe_hw *hw) 52*6621Sbt150084 { 53*6621Sbt150084 s32 status; 54*6621Sbt150084 55*6621Sbt150084 /* 56*6621Sbt150084 * Set the mac type 57*6621Sbt150084 */ 58*6621Sbt150084 (void) ixgbe_set_mac_type(hw); 59*6621Sbt150084 60*6621Sbt150084 switch (hw->mac.type) { 61*6621Sbt150084 case ixgbe_mac_82598EB: 62*6621Sbt150084 status = ixgbe_init_ops_82598(hw); 63*6621Sbt150084 break; 64*6621Sbt150084 default: 65*6621Sbt150084 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 66*6621Sbt150084 break; 67*6621Sbt150084 } 68*6621Sbt150084 69*6621Sbt150084 return (status); 70*6621Sbt150084 } 71*6621Sbt150084 72*6621Sbt150084 /* 73*6621Sbt150084 * ixgbe_set_mac_type - Sets MAC type 74*6621Sbt150084 * @hw: pointer to the HW structure 75*6621Sbt150084 * 76*6621Sbt150084 * This function sets the mac type of the adapter based on the 77*6621Sbt150084 * vendor ID and device ID stored in the hw structure. 78*6621Sbt150084 */ 79*6621Sbt150084 s32 80*6621Sbt150084 ixgbe_set_mac_type(struct ixgbe_hw *hw) 81*6621Sbt150084 { 82*6621Sbt150084 s32 ret_val = IXGBE_SUCCESS; 83*6621Sbt150084 84*6621Sbt150084 DEBUGFUNC("ixgbe_set_mac_type"); 85*6621Sbt150084 86*6621Sbt150084 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 87*6621Sbt150084 switch (hw->device_id) { 88*6621Sbt150084 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 89*6621Sbt150084 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 90*6621Sbt150084 case IXGBE_DEV_ID_82598EB_CX4: 91*6621Sbt150084 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 92*6621Sbt150084 case IXGBE_DEV_ID_82598EB_XF_LR: 93*6621Sbt150084 hw->mac.type = ixgbe_mac_82598EB; 94*6621Sbt150084 break; 95*6621Sbt150084 default: 96*6621Sbt150084 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 97*6621Sbt150084 break; 98*6621Sbt150084 } 99*6621Sbt150084 } else { 100*6621Sbt150084 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 101*6621Sbt150084 } 102*6621Sbt150084 103*6621Sbt150084 return (ret_val); 104*6621Sbt150084 } 105*6621Sbt150084 106*6621Sbt150084 /* 107*6621Sbt150084 * ixgbe_init_hw - Initialize the hardware 108*6621Sbt150084 * @hw: pointer to hardware structure 109*6621Sbt150084 * 110*6621Sbt150084 * Initialize the hardware by resetting and then starting the hardware 111*6621Sbt150084 */ 112*6621Sbt150084 s32 113*6621Sbt150084 ixgbe_init_hw(struct ixgbe_hw *hw) 114*6621Sbt150084 { 115*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 116*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 117*6621Sbt150084 } 118*6621Sbt150084 119*6621Sbt150084 /* 120*6621Sbt150084 * ixgbe_reset_hw - Performs a hardware reset 121*6621Sbt150084 * @hw: pointer to hardware structure 122*6621Sbt150084 * 123*6621Sbt150084 * Resets the hardware by resetting the transmit and receive units, masks and 124*6621Sbt150084 * clears all interrupts, performs a PHY reset, and performs a MAC reset 125*6621Sbt150084 */ 126*6621Sbt150084 s32 127*6621Sbt150084 ixgbe_reset_hw(struct ixgbe_hw *hw) 128*6621Sbt150084 { 129*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 130*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 131*6621Sbt150084 } 132*6621Sbt150084 133*6621Sbt150084 /* 134*6621Sbt150084 * ixgbe_start_hw - Prepares hardware for Rx/Tx 135*6621Sbt150084 * @hw: pointer to hardware structure 136*6621Sbt150084 * 137*6621Sbt150084 * Starts the hardware by filling the bus info structure and media type, 138*6621Sbt150084 * clears all on chip counters, initializes receive address registers, 139*6621Sbt150084 * multicast table, VLAN filter table, calls routine to setup link and 140*6621Sbt150084 * flow control settings, and leaves transmit and receive units disabled 141*6621Sbt150084 * and uninitialized. 142*6621Sbt150084 */ 143*6621Sbt150084 s32 144*6621Sbt150084 ixgbe_start_hw(struct ixgbe_hw *hw) 145*6621Sbt150084 { 146*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 147*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 148*6621Sbt150084 } 149*6621Sbt150084 150*6621Sbt150084 /* 151*6621Sbt150084 * ixgbe_clear_hw_cntrs - Clear hardware counters 152*6621Sbt150084 * @hw: pointer to hardware structure 153*6621Sbt150084 * 154*6621Sbt150084 * Clears all hardware statistics counters by reading them from the hardware 155*6621Sbt150084 * Statistics counters are clear on read. 156*6621Sbt150084 */ 157*6621Sbt150084 s32 158*6621Sbt150084 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 159*6621Sbt150084 { 160*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 161*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 162*6621Sbt150084 } 163*6621Sbt150084 164*6621Sbt150084 /* 165*6621Sbt150084 * ixgbe_get_media_type - Get media type 166*6621Sbt150084 * @hw: pointer to hardware structure 167*6621Sbt150084 * 168*6621Sbt150084 * Returns the media type (fiber, copper, backplane) 169*6621Sbt150084 */ 170*6621Sbt150084 enum ixgbe_media_type 171*6621Sbt150084 ixgbe_get_media_type(struct ixgbe_hw *hw) 172*6621Sbt150084 { 173*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 174*6621Sbt150084 ixgbe_media_type_unknown); 175*6621Sbt150084 } 176*6621Sbt150084 177*6621Sbt150084 /* 178*6621Sbt150084 * ixgbe_get_mac_addr - Get MAC address 179*6621Sbt150084 * @hw: pointer to hardware structure 180*6621Sbt150084 * @mac_addr: Adapter MAC address 181*6621Sbt150084 * 182*6621Sbt150084 * Reads the adapter's MAC address from the first Receive Address Register 183*6621Sbt150084 * (RAR0) A reset of the adapter must have been performed prior to calling 184*6621Sbt150084 * this function in order for the MAC address to have been loaded from the 185*6621Sbt150084 * EEPROM into RAR0 186*6621Sbt150084 */ 187*6621Sbt150084 s32 188*6621Sbt150084 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 189*6621Sbt150084 { 190*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 191*6621Sbt150084 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 192*6621Sbt150084 } 193*6621Sbt150084 194*6621Sbt150084 /* 195*6621Sbt150084 * ixgbe_get_bus_info - Set PCI bus info 196*6621Sbt150084 * @hw: pointer to hardware structure 197*6621Sbt150084 * 198*6621Sbt150084 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 199*6621Sbt150084 */ 200*6621Sbt150084 s32 201*6621Sbt150084 ixgbe_get_bus_info(struct ixgbe_hw *hw) 202*6621Sbt150084 { 203*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 204*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 205*6621Sbt150084 } 206*6621Sbt150084 207*6621Sbt150084 /* 208*6621Sbt150084 * ixgbe_get_num_of_tx_queues - Get Tx queues 209*6621Sbt150084 * @hw: pointer to hardware structure 210*6621Sbt150084 * 211*6621Sbt150084 * Returns the number of transmit queues for the given adapter. 212*6621Sbt150084 */ 213*6621Sbt150084 u32 214*6621Sbt150084 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 215*6621Sbt150084 { 216*6621Sbt150084 return (hw->mac.max_tx_queues); 217*6621Sbt150084 } 218*6621Sbt150084 219*6621Sbt150084 /* 220*6621Sbt150084 * ixgbe_get_num_of_rx_queues - Get Rx queues 221*6621Sbt150084 * @hw: pointer to hardware structure 222*6621Sbt150084 * 223*6621Sbt150084 * Returns the number of receive queues for the given adapter. 224*6621Sbt150084 */ 225*6621Sbt150084 u32 226*6621Sbt150084 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 227*6621Sbt150084 { 228*6621Sbt150084 return (hw->mac.max_rx_queues); 229*6621Sbt150084 } 230*6621Sbt150084 231*6621Sbt150084 /* 232*6621Sbt150084 * ixgbe_stop_adapter - Disable Rx/Tx units 233*6621Sbt150084 * @hw: pointer to hardware structure 234*6621Sbt150084 * 235*6621Sbt150084 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 236*6621Sbt150084 * disables transmit and receive units. The adapter_stopped flag is used by 237*6621Sbt150084 * the shared code and drivers to determine if the adapter is in a stopped 238*6621Sbt150084 * state and should not touch the hardware. 239*6621Sbt150084 */ 240*6621Sbt150084 s32 241*6621Sbt150084 ixgbe_stop_adapter(struct ixgbe_hw *hw) 242*6621Sbt150084 { 243*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 244*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 245*6621Sbt150084 } 246*6621Sbt150084 247*6621Sbt150084 /* 248*6621Sbt150084 * ixgbe_read_pba_num - Reads part number from EEPROM 249*6621Sbt150084 * @hw: pointer to hardware structure 250*6621Sbt150084 * @pba_num: stores the part number from the EEPROM 251*6621Sbt150084 * 252*6621Sbt150084 * Reads the part number from the EEPROM. 253*6621Sbt150084 */ 254*6621Sbt150084 s32 255*6621Sbt150084 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 256*6621Sbt150084 { 257*6621Sbt150084 return (ixgbe_read_pba_num_generic(hw, pba_num)); 258*6621Sbt150084 } 259*6621Sbt150084 260*6621Sbt150084 /* 261*6621Sbt150084 * ixgbe_identify_phy - Get PHY type 262*6621Sbt150084 * @hw: pointer to hardware structure 263*6621Sbt150084 * 264*6621Sbt150084 * Determines the physical layer module found on the current adapter. 265*6621Sbt150084 */ 266*6621Sbt150084 s32 267*6621Sbt150084 ixgbe_identify_phy(struct ixgbe_hw *hw) 268*6621Sbt150084 { 269*6621Sbt150084 s32 status = IXGBE_SUCCESS; 270*6621Sbt150084 271*6621Sbt150084 if (hw->phy.type == ixgbe_phy_unknown) { 272*6621Sbt150084 status = ixgbe_call_func(hw, 273*6621Sbt150084 hw->phy.ops.identify, 274*6621Sbt150084 (hw), 275*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 276*6621Sbt150084 } 277*6621Sbt150084 278*6621Sbt150084 return (status); 279*6621Sbt150084 } 280*6621Sbt150084 281*6621Sbt150084 /* 282*6621Sbt150084 * ixgbe_reset_phy - Perform a PHY reset 283*6621Sbt150084 * @hw: pointer to hardware structure 284*6621Sbt150084 */ 285*6621Sbt150084 s32 286*6621Sbt150084 ixgbe_reset_phy(struct ixgbe_hw *hw) 287*6621Sbt150084 { 288*6621Sbt150084 s32 status = IXGBE_SUCCESS; 289*6621Sbt150084 290*6621Sbt150084 if (hw->phy.type == ixgbe_phy_unknown) { 291*6621Sbt150084 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) { 292*6621Sbt150084 status = IXGBE_ERR_PHY; 293*6621Sbt150084 } 294*6621Sbt150084 } 295*6621Sbt150084 296*6621Sbt150084 if (status == IXGBE_SUCCESS) { 297*6621Sbt150084 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 298*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 299*6621Sbt150084 } 300*6621Sbt150084 return (status); 301*6621Sbt150084 } 302*6621Sbt150084 303*6621Sbt150084 /* 304*6621Sbt150084 * ixgbe_read_phy_reg - Read PHY register 305*6621Sbt150084 * @hw: pointer to hardware structure 306*6621Sbt150084 * @reg_addr: 32 bit address of PHY register to read 307*6621Sbt150084 * @phy_data: Pointer to read data from PHY register 308*6621Sbt150084 * 309*6621Sbt150084 * Reads a value from a specified PHY register 310*6621Sbt150084 */ 311*6621Sbt150084 s32 312*6621Sbt150084 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 313*6621Sbt150084 u16 *phy_data) 314*6621Sbt150084 { 315*6621Sbt150084 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 316*6621Sbt150084 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 317*6621Sbt150084 } 318*6621Sbt150084 319*6621Sbt150084 /* 320*6621Sbt150084 * ixgbe_write_phy_reg - Write PHY register 321*6621Sbt150084 * @hw: pointer to hardware structure 322*6621Sbt150084 * @reg_addr: 32 bit PHY register to write 323*6621Sbt150084 * @phy_data: Data to write to the PHY register 324*6621Sbt150084 * 325*6621Sbt150084 * Writes a value to specified PHY register 326*6621Sbt150084 */ 327*6621Sbt150084 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 328*6621Sbt150084 u16 phy_data) 329*6621Sbt150084 { 330*6621Sbt150084 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 331*6621Sbt150084 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 332*6621Sbt150084 } 333*6621Sbt150084 334*6621Sbt150084 /* 335*6621Sbt150084 * ixgbe_setup_phy_link - Restart PHY autoneg 336*6621Sbt150084 * @hw: pointer to hardware structure 337*6621Sbt150084 * 338*6621Sbt150084 * Restart autonegotiation and PHY and waits for completion. 339*6621Sbt150084 */ 340*6621Sbt150084 s32 341*6621Sbt150084 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 342*6621Sbt150084 { 343*6621Sbt150084 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 344*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 345*6621Sbt150084 } 346*6621Sbt150084 347*6621Sbt150084 /* 348*6621Sbt150084 * ixgbe_setup_phy_link_speed - Set auto advertise 349*6621Sbt150084 * @hw: pointer to hardware structure 350*6621Sbt150084 * @speed: new link speed 351*6621Sbt150084 * @autoneg: TRUE if autonegotiation enabled 352*6621Sbt150084 * 353*6621Sbt150084 * Sets the auto advertised capabilities 354*6621Sbt150084 */ 355*6621Sbt150084 s32 356*6621Sbt150084 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 357*6621Sbt150084 bool autoneg, 358*6621Sbt150084 bool autoneg_wait_to_complete) 359*6621Sbt150084 { 360*6621Sbt150084 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 361*6621Sbt150084 autoneg, autoneg_wait_to_complete), 362*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 363*6621Sbt150084 } 364*6621Sbt150084 365*6621Sbt150084 /* 366*6621Sbt150084 * ixgbe_setup_link - Configure link settings 367*6621Sbt150084 * @hw: pointer to hardware structure 368*6621Sbt150084 * 369*6621Sbt150084 * Configures link settings based on values in the ixgbe_hw struct. 370*6621Sbt150084 * Restarts the link. Performs autonegotiation if needed. 371*6621Sbt150084 */ 372*6621Sbt150084 s32 373*6621Sbt150084 ixgbe_setup_link(struct ixgbe_hw *hw) 374*6621Sbt150084 { 375*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw), 376*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 377*6621Sbt150084 } 378*6621Sbt150084 379*6621Sbt150084 /* 380*6621Sbt150084 * ixgbe_check_link - Get link and speed status 381*6621Sbt150084 * @hw: pointer to hardware structure 382*6621Sbt150084 * 383*6621Sbt150084 * Reads the links register to determine if link is up and the current speed 384*6621Sbt150084 */ 385*6621Sbt150084 s32 386*6621Sbt150084 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 387*6621Sbt150084 bool *link_up) 388*6621Sbt150084 { 389*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 390*6621Sbt150084 link_up), IXGBE_NOT_IMPLEMENTED); 391*6621Sbt150084 } 392*6621Sbt150084 393*6621Sbt150084 /* 394*6621Sbt150084 * ixgbe_setup_link_speed - Set link speed 395*6621Sbt150084 * @hw: pointer to hardware structure 396*6621Sbt150084 * @speed: new link speed 397*6621Sbt150084 * @autoneg: TRUE if autonegotiation enabled 398*6621Sbt150084 * 399*6621Sbt150084 * Set the link speed and restarts the link. 400*6621Sbt150084 */ 401*6621Sbt150084 s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 402*6621Sbt150084 bool autoneg, 403*6621Sbt150084 bool autoneg_wait_to_complete) 404*6621Sbt150084 { 405*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.setup_link_speed, (hw, speed, 406*6621Sbt150084 autoneg, autoneg_wait_to_complete), 407*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 408*6621Sbt150084 } 409*6621Sbt150084 410*6621Sbt150084 /* 411*6621Sbt150084 * ixgbe_get_link_capabilities - Returns link capabilities 412*6621Sbt150084 * @hw: pointer to hardware structure 413*6621Sbt150084 * 414*6621Sbt150084 * Determines the link capabilities of the current configuration. 415*6621Sbt150084 */ 416*6621Sbt150084 s32 417*6621Sbt150084 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 418*6621Sbt150084 bool *autoneg) 419*6621Sbt150084 { 420*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 421*6621Sbt150084 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 422*6621Sbt150084 } 423*6621Sbt150084 424*6621Sbt150084 /* 425*6621Sbt150084 * ixgbe_led_on - Turn on LEDs 426*6621Sbt150084 * @hw: pointer to hardware structure 427*6621Sbt150084 * @index: led number to turn on 428*6621Sbt150084 * 429*6621Sbt150084 * Turns on the software controllable LEDs. 430*6621Sbt150084 */ 431*6621Sbt150084 s32 432*6621Sbt150084 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 433*6621Sbt150084 { 434*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 435*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 436*6621Sbt150084 } 437*6621Sbt150084 438*6621Sbt150084 /* 439*6621Sbt150084 * ixgbe_led_off - Turn off LEDs 440*6621Sbt150084 * @hw: pointer to hardware structure 441*6621Sbt150084 * @index: led number to turn off 442*6621Sbt150084 * 443*6621Sbt150084 * Turns off the software controllable LEDs. 444*6621Sbt150084 */ 445*6621Sbt150084 s32 446*6621Sbt150084 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 447*6621Sbt150084 { 448*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 449*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 450*6621Sbt150084 } 451*6621Sbt150084 452*6621Sbt150084 /* 453*6621Sbt150084 * ixgbe_blink_led_start - Blink LEDs 454*6621Sbt150084 * @hw: pointer to hardware structure 455*6621Sbt150084 * @index: led number to blink 456*6621Sbt150084 * 457*6621Sbt150084 * Blink LED based on index. 458*6621Sbt150084 */ 459*6621Sbt150084 s32 460*6621Sbt150084 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 461*6621Sbt150084 { 462*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 463*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 464*6621Sbt150084 } 465*6621Sbt150084 466*6621Sbt150084 /* 467*6621Sbt150084 * ixgbe_blink_led_stop - Stop blinking LEDs 468*6621Sbt150084 * @hw: pointer to hardware structure 469*6621Sbt150084 * 470*6621Sbt150084 * Stop blinking LED based on index. 471*6621Sbt150084 */ 472*6621Sbt150084 s32 473*6621Sbt150084 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 474*6621Sbt150084 { 475*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 476*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 477*6621Sbt150084 } 478*6621Sbt150084 479*6621Sbt150084 /* 480*6621Sbt150084 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 481*6621Sbt150084 * @hw: pointer to hardware structure 482*6621Sbt150084 * 483*6621Sbt150084 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 484*6621Sbt150084 * ixgbe_hw struct in order to set up EEPROM access. 485*6621Sbt150084 */ 486*6621Sbt150084 s32 487*6621Sbt150084 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 488*6621Sbt150084 { 489*6621Sbt150084 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 490*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 491*6621Sbt150084 } 492*6621Sbt150084 493*6621Sbt150084 494*6621Sbt150084 /* 495*6621Sbt150084 * ixgbe_write_eeprom - Write word to EEPROM 496*6621Sbt150084 * @hw: pointer to hardware structure 497*6621Sbt150084 * @offset: offset within the EEPROM to be written to 498*6621Sbt150084 * @data: 16 bit word to be written to the EEPROM 499*6621Sbt150084 * 500*6621Sbt150084 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 501*6621Sbt150084 * called after this function, the EEPROM will most likely contain an 502*6621Sbt150084 * invalid checksum. 503*6621Sbt150084 */ 504*6621Sbt150084 s32 505*6621Sbt150084 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 506*6621Sbt150084 { 507*6621Sbt150084 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 508*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 509*6621Sbt150084 } 510*6621Sbt150084 511*6621Sbt150084 /* 512*6621Sbt150084 * ixgbe_read_eeprom - Read word from EEPROM 513*6621Sbt150084 * @hw: pointer to hardware structure 514*6621Sbt150084 * @offset: offset within the EEPROM to be read 515*6621Sbt150084 * @data: read 16 bit value from EEPROM 516*6621Sbt150084 * 517*6621Sbt150084 * Reads 16 bit value from EEPROM 518*6621Sbt150084 */ 519*6621Sbt150084 s32 520*6621Sbt150084 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 521*6621Sbt150084 { 522*6621Sbt150084 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 523*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 524*6621Sbt150084 } 525*6621Sbt150084 526*6621Sbt150084 /* 527*6621Sbt150084 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 528*6621Sbt150084 * @hw: pointer to hardware structure 529*6621Sbt150084 * @checksum_val: calculated checksum 530*6621Sbt150084 * 531*6621Sbt150084 * Performs checksum calculation and validates the EEPROM checksum 532*6621Sbt150084 */ 533*6621Sbt150084 s32 534*6621Sbt150084 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 535*6621Sbt150084 { 536*6621Sbt150084 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 537*6621Sbt150084 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 538*6621Sbt150084 } 539*6621Sbt150084 540*6621Sbt150084 /* 541*6621Sbt150084 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 542*6621Sbt150084 * @hw: pointer to hardware structure 543*6621Sbt150084 */ 544*6621Sbt150084 s32 545*6621Sbt150084 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 546*6621Sbt150084 { 547*6621Sbt150084 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 548*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 549*6621Sbt150084 } 550*6621Sbt150084 551*6621Sbt150084 /* 552*6621Sbt150084 * ixgbe_set_rar - Set Rx address register 553*6621Sbt150084 * @hw: pointer to hardware structure 554*6621Sbt150084 * @index: Receive address register to write 555*6621Sbt150084 * @addr: Address to put into receive address register 556*6621Sbt150084 * @vmdq: VMDq "set" 557*6621Sbt150084 * @enable_addr: set flag that address is active 558*6621Sbt150084 * 559*6621Sbt150084 * Puts an ethernet address into a receive address register. 560*6621Sbt150084 */ 561*6621Sbt150084 s32 562*6621Sbt150084 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 563*6621Sbt150084 u32 enable_addr) 564*6621Sbt150084 { 565*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 566*6621Sbt150084 enable_addr), IXGBE_NOT_IMPLEMENTED); 567*6621Sbt150084 } 568*6621Sbt150084 569*6621Sbt150084 /* 570*6621Sbt150084 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 571*6621Sbt150084 * @hw: pointer to hardware structure 572*6621Sbt150084 * @rar: receive address register index to associate with VMDq index 573*6621Sbt150084 * @vmdq: VMDq set or pool index 574*6621Sbt150084 */ 575*6621Sbt150084 s32 576*6621Sbt150084 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 577*6621Sbt150084 { 578*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 579*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 580*6621Sbt150084 } 581*6621Sbt150084 582*6621Sbt150084 /* 583*6621Sbt150084 * ixgbe_init_rx_addrs - Initializes receive address filters. 584*6621Sbt150084 * @hw: pointer to hardware structure 585*6621Sbt150084 * 586*6621Sbt150084 * Places the MAC address in receive address register 0 and clears the rest 587*6621Sbt150084 * of the receive address registers. Clears the multicast table. Assumes 588*6621Sbt150084 * the receiver is in reset when the routine is called. 589*6621Sbt150084 */ 590*6621Sbt150084 s32 591*6621Sbt150084 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 592*6621Sbt150084 { 593*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 594*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 595*6621Sbt150084 } 596*6621Sbt150084 597*6621Sbt150084 /* 598*6621Sbt150084 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 599*6621Sbt150084 * @hw: pointer to hardware structure 600*6621Sbt150084 */ 601*6621Sbt150084 u32 602*6621Sbt150084 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 603*6621Sbt150084 { 604*6621Sbt150084 return (hw->mac.num_rar_entries); 605*6621Sbt150084 } 606*6621Sbt150084 607*6621Sbt150084 /* 608*6621Sbt150084 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 609*6621Sbt150084 * @hw: pointer to hardware structure 610*6621Sbt150084 * @addr_list: the list of new multicast addresses 611*6621Sbt150084 * @addr_count: number of addresses 612*6621Sbt150084 * @func: iterator function to walk the multicast address list 613*6621Sbt150084 * 614*6621Sbt150084 * The given list replaces any existing list. Clears the secondary addrs from 615*6621Sbt150084 * receive address registers. Uses unused receive address registers for the 616*6621Sbt150084 * first secondary addresses, and falls back to promiscuous mode as needed. 617*6621Sbt150084 */ 618*6621Sbt150084 s32 619*6621Sbt150084 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 620*6621Sbt150084 u32 addr_count, ixgbe_mc_addr_itr func) 621*6621Sbt150084 { 622*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 623*6621Sbt150084 addr_list, addr_count, func), 624*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 625*6621Sbt150084 } 626*6621Sbt150084 627*6621Sbt150084 /* 628*6621Sbt150084 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 629*6621Sbt150084 * @hw: pointer to hardware structure 630*6621Sbt150084 * @mc_addr_list: the list of new multicast addresses 631*6621Sbt150084 * @mc_addr_count: number of addresses 632*6621Sbt150084 * @func: iterator function to walk the multicast address list 633*6621Sbt150084 * 634*6621Sbt150084 * The given list replaces any existing list. Clears the MC addrs from receive 635*6621Sbt150084 * address registers and the multicast table. Uses unused receive address 636*6621Sbt150084 * registers for the first multicast addresses, and hashes the rest into the 637*6621Sbt150084 * multicast table. 638*6621Sbt150084 */ 639*6621Sbt150084 s32 640*6621Sbt150084 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 641*6621Sbt150084 u32 mc_addr_count, ixgbe_mc_addr_itr func) 642*6621Sbt150084 { 643*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 644*6621Sbt150084 mc_addr_list, mc_addr_count, func), 645*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 646*6621Sbt150084 } 647*6621Sbt150084 648*6621Sbt150084 /* 649*6621Sbt150084 * ixgbe_enable_mc - Enable multicast address in RAR 650*6621Sbt150084 * @hw: pointer to hardware structure 651*6621Sbt150084 * 652*6621Sbt150084 * Enables multicast address in RAR and the use of the multicast hash table. 653*6621Sbt150084 */ 654*6621Sbt150084 s32 655*6621Sbt150084 ixgbe_enable_mc(struct ixgbe_hw *hw) 656*6621Sbt150084 { 657*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 658*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 659*6621Sbt150084 } 660*6621Sbt150084 661*6621Sbt150084 /* 662*6621Sbt150084 * ixgbe_disable_mc - Disable multicast address in RAR 663*6621Sbt150084 * @hw: pointer to hardware structure 664*6621Sbt150084 * 665*6621Sbt150084 * Disables multicast address in RAR and the use of the multicast hash table. 666*6621Sbt150084 */ 667*6621Sbt150084 s32 668*6621Sbt150084 ixgbe_disable_mc(struct ixgbe_hw *hw) 669*6621Sbt150084 { 670*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 671*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 672*6621Sbt150084 } 673*6621Sbt150084 674*6621Sbt150084 /* 675*6621Sbt150084 * ixgbe_clear_vfta - Clear VLAN filter table 676*6621Sbt150084 * @hw: pointer to hardware structure 677*6621Sbt150084 * 678*6621Sbt150084 * Clears the VLAN filer table, and the VMDq index associated with the filter 679*6621Sbt150084 */ 680*6621Sbt150084 s32 681*6621Sbt150084 ixgbe_clear_vfta(struct ixgbe_hw *hw) 682*6621Sbt150084 { 683*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 684*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 685*6621Sbt150084 } 686*6621Sbt150084 687*6621Sbt150084 /* 688*6621Sbt150084 * ixgbe_set_vfta - Set VLAN filter table 689*6621Sbt150084 * @hw: pointer to hardware structure 690*6621Sbt150084 * @vlan: VLAN id to write to VLAN filter 691*6621Sbt150084 * @vind: VMDq output index that maps queue to VLAN id in VFTA 692*6621Sbt150084 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 693*6621Sbt150084 * 694*6621Sbt150084 * Turn on/off specified VLAN in the VLAN filter table. 695*6621Sbt150084 */ 696*6621Sbt150084 s32 697*6621Sbt150084 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 698*6621Sbt150084 { 699*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 700*6621Sbt150084 vlan_on), IXGBE_NOT_IMPLEMENTED); 701*6621Sbt150084 } 702*6621Sbt150084 703*6621Sbt150084 /* 704*6621Sbt150084 * ixgbe_setup_fc - Set flow control 705*6621Sbt150084 * @hw: pointer to hardware structure 706*6621Sbt150084 * @packetbuf_num: packet buffer number (0-7) 707*6621Sbt150084 * 708*6621Sbt150084 * Configures the flow control settings based on SW configuration. 709*6621Sbt150084 */ 710*6621Sbt150084 s32 711*6621Sbt150084 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num) 712*6621Sbt150084 { 713*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw, packetbuf_num), 714*6621Sbt150084 IXGBE_NOT_IMPLEMENTED); 715*6621Sbt150084 } 716*6621Sbt150084 717*6621Sbt150084 /* 718*6621Sbt150084 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 719*6621Sbt150084 * @hw: pointer to hardware structure 720*6621Sbt150084 * @reg: analog register to read 721*6621Sbt150084 * @val: read value 722*6621Sbt150084 * 723*6621Sbt150084 * Performs write operation to analog register specified. 724*6621Sbt150084 */ 725*6621Sbt150084 s32 726*6621Sbt150084 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 727*6621Sbt150084 { 728*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 729*6621Sbt150084 val), IXGBE_NOT_IMPLEMENTED); 730*6621Sbt150084 } 731*6621Sbt150084 732*6621Sbt150084 /* 733*6621Sbt150084 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 734*6621Sbt150084 * @hw: pointer to hardware structure 735*6621Sbt150084 * @reg: analog register to write 736*6621Sbt150084 * @val: value to write 737*6621Sbt150084 * 738*6621Sbt150084 * Performs write operation to Atlas analog register specified. 739*6621Sbt150084 */ 740*6621Sbt150084 s32 741*6621Sbt150084 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 742*6621Sbt150084 { 743*6621Sbt150084 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 744*6621Sbt150084 val), IXGBE_NOT_IMPLEMENTED); 745*6621Sbt150084 } 746