1*5779Sxy150489 /* 2*5779Sxy150489 * CDDL HEADER START 3*5779Sxy150489 * 4*5779Sxy150489 * Copyright(c) 2007-2008 Intel Corporation. All rights reserved. 5*5779Sxy150489 * The contents of this file are subject to the terms of the 6*5779Sxy150489 * Common Development and Distribution License (the "License"). 7*5779Sxy150489 * You may not use this file except in compliance with the License. 8*5779Sxy150489 * 9*5779Sxy150489 * You can obtain a copy of the license at: 10*5779Sxy150489 * http://www.opensolaris.org/os/licensing. 11*5779Sxy150489 * See the License for the specific language governing permissions 12*5779Sxy150489 * and limitations under the License. 13*5779Sxy150489 * 14*5779Sxy150489 * When using or redistributing this file, you may do so under the 15*5779Sxy150489 * License only. No other modification of this header is permitted. 16*5779Sxy150489 * 17*5779Sxy150489 * If applicable, add the following below this CDDL HEADER, with the 18*5779Sxy150489 * fields enclosed by brackets "[]" replaced with your own identifying 19*5779Sxy150489 * information: Portions Copyright [yyyy] [name of copyright owner] 20*5779Sxy150489 * 21*5779Sxy150489 * CDDL HEADER END 22*5779Sxy150489 */ 23*5779Sxy150489 24*5779Sxy150489 /* 25*5779Sxy150489 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 26*5779Sxy150489 * Use is subject to license terms of the CDDL. 27*5779Sxy150489 */ 28*5779Sxy150489 29*5779Sxy150489 #ifndef _IGB_API_H 30*5779Sxy150489 #define _IGB_API_H 31*5779Sxy150489 32*5779Sxy150489 #pragma ident "%Z%%M% %I% %E% SMI" 33*5779Sxy150489 34*5779Sxy150489 #ifdef __cplusplus 35*5779Sxy150489 extern "C" { 36*5779Sxy150489 #endif 37*5779Sxy150489 38*5779Sxy150489 #include "igb_hw.h" 39*5779Sxy150489 40*5779Sxy150489 extern void e1000_init_function_pointers_82575(struct e1000_hw *hw); 41*5779Sxy150489 42*5779Sxy150489 s32 e1000_set_mac_type(struct e1000_hw *hw); 43*5779Sxy150489 s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device); 44*5779Sxy150489 s32 e1000_init_mac_params(struct e1000_hw *hw); 45*5779Sxy150489 s32 e1000_init_nvm_params(struct e1000_hw *hw); 46*5779Sxy150489 s32 e1000_init_phy_params(struct e1000_hw *hw); 47*5779Sxy150489 void e1000_remove_device(struct e1000_hw *hw); 48*5779Sxy150489 s32 e1000_get_bus_info(struct e1000_hw *hw); 49*5779Sxy150489 void e1000_clear_vfta(struct e1000_hw *hw); 50*5779Sxy150489 void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value); 51*5779Sxy150489 s32 e1000_force_mac_fc(struct e1000_hw *hw); 52*5779Sxy150489 s32 e1000_check_for_link(struct e1000_hw *hw); 53*5779Sxy150489 s32 e1000_reset_hw(struct e1000_hw *hw); 54*5779Sxy150489 s32 e1000_init_hw(struct e1000_hw *hw); 55*5779Sxy150489 s32 e1000_setup_link(struct e1000_hw *hw); 56*5779Sxy150489 s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex); 57*5779Sxy150489 s32 e1000_disable_pcie_master(struct e1000_hw *hw); 58*5779Sxy150489 void e1000_config_collision_dist(struct e1000_hw *hw); 59*5779Sxy150489 void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); 60*5779Sxy150489 void e1000_mta_set(struct e1000_hw *hw, u32 hash_value); 61*5779Sxy150489 u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr); 62*5779Sxy150489 void e1000_update_mc_addr_list(struct e1000_hw *hw, 63*5779Sxy150489 u8 *mc_addr_list, u32 mc_addr_count, 64*5779Sxy150489 u32 rar_used_count, u32 rar_count); 65*5779Sxy150489 s32 e1000_setup_led(struct e1000_hw *hw); 66*5779Sxy150489 s32 e1000_cleanup_led(struct e1000_hw *hw); 67*5779Sxy150489 s32 e1000_check_reset_block(struct e1000_hw *hw); 68*5779Sxy150489 s32 e1000_blink_led(struct e1000_hw *hw); 69*5779Sxy150489 s32 e1000_led_on(struct e1000_hw *hw); 70*5779Sxy150489 s32 e1000_led_off(struct e1000_hw *hw); 71*5779Sxy150489 void e1000_reset_adaptive(struct e1000_hw *hw); 72*5779Sxy150489 void e1000_update_adaptive(struct e1000_hw *hw); 73*5779Sxy150489 s32 e1000_get_cable_length(struct e1000_hw *hw); 74*5779Sxy150489 s32 e1000_validate_mdi_setting(struct e1000_hw *hw); 75*5779Sxy150489 s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data); 76*5779Sxy150489 s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data); 77*5779Sxy150489 s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, 78*5779Sxy150489 u32 offset, u8 data); 79*5779Sxy150489 s32 e1000_get_phy_info(struct e1000_hw *hw); 80*5779Sxy150489 s32 e1000_phy_hw_reset(struct e1000_hw *hw); 81*5779Sxy150489 s32 e1000_phy_commit(struct e1000_hw *hw); 82*5779Sxy150489 void e1000_power_up_phy(struct e1000_hw *hw); 83*5779Sxy150489 void e1000_power_down_phy(struct e1000_hw *hw); 84*5779Sxy150489 s32 e1000_read_mac_addr(struct e1000_hw *hw); 85*5779Sxy150489 s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num); 86*5779Sxy150489 void e1000_reload_nvm(struct e1000_hw *hw); 87*5779Sxy150489 s32 e1000_update_nvm_checksum(struct e1000_hw *hw); 88*5779Sxy150489 s32 e1000_validate_nvm_checksum(struct e1000_hw *hw); 89*5779Sxy150489 s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 90*5779Sxy150489 s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 91*5779Sxy150489 s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 92*5779Sxy150489 s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 93*5779Sxy150489 s32 e1000_wait_autoneg(struct e1000_hw *hw); 94*5779Sxy150489 s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active); 95*5779Sxy150489 s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active); 96*5779Sxy150489 bool e1000_check_mng_mode(struct e1000_hw *hw); 97*5779Sxy150489 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw); 98*5779Sxy150489 bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw); 99*5779Sxy150489 s32 e1000_mng_enable_host_if(struct e1000_hw *hw); 100*5779Sxy150489 s32 e1000_mng_host_if_write(struct e1000_hw *hw, 101*5779Sxy150489 u8 *buffer, u16 length, u16 offset, u8 *sum); 102*5779Sxy150489 s32 e1000_mng_write_cmd_header(struct e1000_hw *hw, 103*5779Sxy150489 struct e1000_host_mng_command_header *hdr); 104*5779Sxy150489 s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, 105*5779Sxy150489 u8 *buffer, u16 length); 106*5779Sxy150489 #ifndef FIFO_WORKAROUND 107*5779Sxy150489 s32 e1000_fifo_workaround_82547(struct e1000_hw *hw, u16 length); 108*5779Sxy150489 void e1000_update_tx_fifo_head_82547(struct e1000_hw *hw, u32 length); 109*5779Sxy150489 void e1000_set_ttl_workaround_state_82541(struct e1000_hw *hw, bool state); 110*5779Sxy150489 bool e1000_ttl_workaround_enabled_82541(struct e1000_hw *hw); 111*5779Sxy150489 s32 e1000_igp_ttl_workaround_82547(struct e1000_hw *hw); 112*5779Sxy150489 #endif 113*5779Sxy150489 114*5779Sxy150489 115*5779Sxy150489 /* 116*5779Sxy150489 * TBI_ACCEPT macro definition: 117*5779Sxy150489 * 118*5779Sxy150489 * This macro requires: 119*5779Sxy150489 * adapter = a pointer to struct e1000_hw 120*5779Sxy150489 * status = the 8 bit status field of the Rx descriptor with EOP set 121*5779Sxy150489 * error = the 8 bit error field of the Rx descriptor with EOP set 122*5779Sxy150489 * length = the sum of all the length fields of the Rx descriptors that 123*5779Sxy150489 * make up the current frame 124*5779Sxy150489 * last_byte = the last byte of the frame DMAed by the hardware 125*5779Sxy150489 * max_frame_length = the maximum frame length we want to accept. 126*5779Sxy150489 * min_frame_length = the minimum frame length we want to accept. 127*5779Sxy150489 * 128*5779Sxy150489 * This macro is a conditional that should be used in the interrupt 129*5779Sxy150489 * handler's Rx processing routine when RxErrors have been detected. 130*5779Sxy150489 * 131*5779Sxy150489 * Typical use: 132*5779Sxy150489 * ... 133*5779Sxy150489 * if (TBI_ACCEPT) { 134*5779Sxy150489 * accept_frame = TRUE; 135*5779Sxy150489 * e1000_tbi_adjust_stats(adapter, MacAddress); 136*5779Sxy150489 * frame_length--; 137*5779Sxy150489 * } else { 138*5779Sxy150489 * accept_frame = FALSE; 139*5779Sxy150489 * } 140*5779Sxy150489 * ... 141*5779Sxy150489 */ 142*5779Sxy150489 143*5779Sxy150489 /* The carrier extension symbol, as received by the NIC. */ 144*5779Sxy150489 #define CARRIER_EXTENSION 0x0F 145*5779Sxy150489 146*5779Sxy150489 #define TBI_ACCEPT(a, status, errors, length, last_byte, \ 147*5779Sxy150489 min_frame_size, max_frame_size) \ 148*5779Sxy150489 (e1000_tbi_sbp_enabled_82543(a) && \ 149*5779Sxy150489 (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \ 150*5779Sxy150489 ((last_byte) == CARRIER_EXTENSION) && \ 151*5779Sxy150489 (((status) & E1000_RXD_STAT_VP) ? \ 152*5779Sxy150489 (((length) > (min_frame_size - VLAN_TAG_SIZE)) && \ 153*5779Sxy150489 ((length) <= (max_frame_size + 1))) : \ 154*5779Sxy150489 (((length) > min_frame_size) && \ 155*5779Sxy150489 ((length) <= (max_frame_size + VLAN_TAG_SIZE + 1))))) 156*5779Sxy150489 157*5779Sxy150489 #ifdef __cplusplus 158*5779Sxy150489 } 159*5779Sxy150489 #endif 160*5779Sxy150489 161*5779Sxy150489 #endif /* _IGB_API_H */ 162