xref: /onnv-gate/usr/src/uts/common/io/hxge/hxge_vmac.c (revision 11257:9e958eb3e4e3)
16349Sqs148142 /*
26349Sqs148142  * CDDL HEADER START
36349Sqs148142  *
46349Sqs148142  * The contents of this file are subject to the terms of the
56349Sqs148142  * Common Development and Distribution License (the "License").
66349Sqs148142  * You may not use this file except in compliance with the License.
76349Sqs148142  *
86349Sqs148142  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
96349Sqs148142  * or http://www.opensolaris.org/os/licensing.
106349Sqs148142  * See the License for the specific language governing permissions
116349Sqs148142  * and limitations under the License.
126349Sqs148142  *
136349Sqs148142  * When distributing Covered Code, include this CDDL HEADER in each
146349Sqs148142  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
156349Sqs148142  * If applicable, add the following below this CDDL HEADER, with the
166349Sqs148142  * fields enclosed by brackets "[]" replaced with your own identifying
176349Sqs148142  * information: Portions Copyright [yyyy] [name of copyright owner]
186349Sqs148142  *
196349Sqs148142  * CDDL HEADER END
206349Sqs148142  */
21*11257SMichael.Speer@Sun.COM 
226349Sqs148142 /*
23*11257SMichael.Speer@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
246349Sqs148142  * Use is subject to license terms.
256349Sqs148142  */
266349Sqs148142 
276349Sqs148142 #include <hxge_impl.h>
286349Sqs148142 #include <hxge_vmac.h>
296349Sqs148142 
306349Sqs148142 hxge_status_t hxge_vmac_init(p_hxge_t hxgep);
316349Sqs148142 hxge_status_t hxge_tx_vmac_init(p_hxge_t hxgep);
326349Sqs148142 hxge_status_t hxge_rx_vmac_init(p_hxge_t hxgep);
336349Sqs148142 hxge_status_t hxge_tx_vmac_enable(p_hxge_t hxgep);
346349Sqs148142 hxge_status_t hxge_tx_vmac_disable(p_hxge_t hxgep);
356349Sqs148142 hxge_status_t hxge_rx_vmac_enable(p_hxge_t hxgep);
366349Sqs148142 hxge_status_t hxge_rx_vmac_disable(p_hxge_t hxgep);
376349Sqs148142 hxge_status_t hxge_tx_vmac_reset(p_hxge_t hxgep);
386349Sqs148142 hxge_status_t hxge_rx_vmac_reset(p_hxge_t hxgep);
396349Sqs148142 uint_t hxge_vmac_intr(caddr_t arg1, caddr_t arg2);
406349Sqs148142 hxge_status_t hxge_set_promisc(p_hxge_t hxgep, boolean_t on);
416349Sqs148142 
426349Sqs148142 hxge_status_t
hxge_link_init(p_hxge_t hxgep)436349Sqs148142 hxge_link_init(p_hxge_t hxgep)
446349Sqs148142 {
456349Sqs148142 	p_hxge_stats_t		statsp;
466349Sqs148142 
476349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_link_init>"));
486349Sqs148142 
496349Sqs148142 	statsp = hxgep->statsp;
506349Sqs148142 
516349Sqs148142 	statsp->mac_stats.cap_10gfdx = 1;
526349Sqs148142 	statsp->mac_stats.lp_cap_10gfdx = 1;
536349Sqs148142 
546349Sqs148142 	/*
556349Sqs148142 	 * The driver doesn't control the link.
566349Sqs148142 	 * It is always 10Gb full duplex.
576349Sqs148142 	 */
586349Sqs148142 	statsp->mac_stats.link_duplex = 2;
596349Sqs148142 	statsp->mac_stats.link_speed = 10000;
606349Sqs148142 
616349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_link_init"));
626349Sqs148142 	return (HXGE_OK);
636349Sqs148142 }
646349Sqs148142 
656349Sqs148142 hxge_status_t
hxge_vmac_init(p_hxge_t hxgep)666349Sqs148142 hxge_vmac_init(p_hxge_t hxgep)
676349Sqs148142 {
686349Sqs148142 	hxge_status_t status = HXGE_OK;
696349Sqs148142 
706349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_vmac_init:"));
716349Sqs148142 
726349Sqs148142 	if ((status = hxge_tx_vmac_reset(hxgep)) != HXGE_OK)
736349Sqs148142 		goto fail;
746349Sqs148142 
756349Sqs148142 	if ((status = hxge_rx_vmac_reset(hxgep)) != HXGE_OK)
766349Sqs148142 		goto fail;
776349Sqs148142 
786349Sqs148142 	if ((status = hxge_tx_vmac_enable(hxgep)) != HXGE_OK)
796349Sqs148142 		goto fail;
806349Sqs148142 
816349Sqs148142 	if ((status = hxge_rx_vmac_enable(hxgep)) != HXGE_OK)
826349Sqs148142 		goto fail;
836349Sqs148142 
846349Sqs148142 	/* Clear the interrupt status registers */
856349Sqs148142 	(void) hpi_vmac_clear_rx_int_stat(hxgep->hpi_handle);
866349Sqs148142 	(void) hpi_vmac_clear_tx_int_stat(hxgep->hpi_handle);
876349Sqs148142 
886349Sqs148142 	/*
896349Sqs148142 	 * Take the masks off the overflow counters. Interrupt the system when
906349Sqs148142 	 * any counts overflow. Don't interrupt the system for each frame.
916349Sqs148142 	 * The current counts are retrieved when the "kstat" command is used.
926349Sqs148142 	 */
936349Sqs148142 	(void) hpi_pfc_set_rx_int_stat_mask(hxgep->hpi_handle, 0, 1);
946349Sqs148142 	(void) hpi_pfc_set_tx_int_stat_mask(hxgep->hpi_handle, 0, 1);
956349Sqs148142 
966349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_vmac_init:"));
976349Sqs148142 
986349Sqs148142 	return (HXGE_OK);
996349Sqs148142 fail:
1006349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL,
1016349Sqs148142 	    "hxge_vmac_init: failed to initialize VMAC>"));
1026349Sqs148142 
1036349Sqs148142 	return (status);
1046349Sqs148142 }
1056349Sqs148142 
1066349Sqs148142 
1076349Sqs148142 /* Initialize the TxVMAC sub-block */
1086349Sqs148142 
1096349Sqs148142 hxge_status_t
hxge_tx_vmac_init(p_hxge_t hxgep)1106349Sqs148142 hxge_tx_vmac_init(p_hxge_t hxgep)
1116349Sqs148142 {
1126349Sqs148142 	uint64_t	config;
1136349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
1146349Sqs148142 
1156349Sqs148142 	/* CFG_VMAC_TX_EN is done separately */
1166349Sqs148142 	config = CFG_VMAC_TX_CRC_INSERT | CFG_VMAC_TX_PAD;
1176349Sqs148142 
1186349Sqs148142 	if (hpi_vmac_tx_config(handle, INIT, config,
1196349Sqs148142 	    hxgep->vmac.maxframesize) != HPI_SUCCESS)
1206349Sqs148142 		return (HXGE_ERROR);
1216349Sqs148142 
1226349Sqs148142 	hxgep->vmac.tx_config = config;
1236349Sqs148142 
1246349Sqs148142 	return (HXGE_OK);
1256349Sqs148142 }
1266349Sqs148142 
1276349Sqs148142 /* Initialize the RxVMAC sub-block */
1286349Sqs148142 
1296349Sqs148142 hxge_status_t
hxge_rx_vmac_init(p_hxge_t hxgep)1306349Sqs148142 hxge_rx_vmac_init(p_hxge_t hxgep)
1316349Sqs148142 {
1326349Sqs148142 	uint64_t	xconfig;
1336349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
1346349Sqs148142 	uint16_t	max_frame_length = hxgep->vmac.maxframesize;
1356349Sqs148142 
1366349Sqs148142 	/*
1376349Sqs148142 	 * NOTE: CFG_VMAC_RX_ENABLE is done separately. Do not enable
1386349Sqs148142 	 * strip CRC.  Bug ID 11451 -- enable strip CRC will cause
1396349Sqs148142 	 * rejection on minimum sized packets.
1406349Sqs148142 	 */
1418236SQiyan.Sun@Sun.COM 	xconfig = CFG_VMAC_RX_PASS_FLOW_CTRL_FR;
1426349Sqs148142 
1436349Sqs148142 	if (hxgep->filter.all_phys_cnt != 0)
1446349Sqs148142 		xconfig |= CFG_VMAC_RX_PROMISCUOUS_MODE;
1456349Sqs148142 
1466349Sqs148142 	if (hxgep->filter.all_multicast_cnt != 0)
1476349Sqs148142 		xconfig |= CFG_VMAC_RX_PROMIXCUOUS_GROUP;
1486349Sqs148142 
1496349Sqs148142 	if (hxgep->statsp->port_stats.lb_mode != hxge_lb_normal)
1506349Sqs148142 		xconfig |= CFG_VMAC_RX_LOOP_BACK;
1516349Sqs148142 
152*11257SMichael.Speer@Sun.COM 	if (hpi_vmac_rx_config(handle, INIT, xconfig,
153*11257SMichael.Speer@Sun.COM 	    max_frame_length) != HPI_SUCCESS)
1546349Sqs148142 		return (HXGE_ERROR);
1556349Sqs148142 
1566349Sqs148142 	hxgep->vmac.rx_config = xconfig;
1576349Sqs148142 
1586349Sqs148142 	return (HXGE_OK);
1596349Sqs148142 }
1606349Sqs148142 
1616349Sqs148142 /* Enable TxVMAC */
1626349Sqs148142 
1636349Sqs148142 hxge_status_t
hxge_tx_vmac_enable(p_hxge_t hxgep)1646349Sqs148142 hxge_tx_vmac_enable(p_hxge_t hxgep)
1656349Sqs148142 {
1666349Sqs148142 	hpi_status_t	rv;
1676349Sqs148142 	hxge_status_t	status = HXGE_OK;
1686349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
1696349Sqs148142 
1706349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_tx_vmac_enable"));
1716349Sqs148142 
1726349Sqs148142 	rv = hxge_tx_vmac_init(hxgep);
1736349Sqs148142 	if (rv != HXGE_OK)
1746349Sqs148142 		return (rv);
1756349Sqs148142 
1766349Sqs148142 	/* Based on speed */
1776349Sqs148142 	hxgep->msg_min = ETHERMIN;
1786349Sqs148142 
1796349Sqs148142 	rv = hpi_vmac_tx_config(handle, ENABLE, CFG_VMAC_TX_EN, 0);
1806349Sqs148142 
1816349Sqs148142 	status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
1826349Sqs148142 
1836349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_tx_vmac_enable"));
1846349Sqs148142 
1856349Sqs148142 	return (status);
1866349Sqs148142 }
1876349Sqs148142 
1886349Sqs148142 /* Disable TxVMAC */
1896349Sqs148142 
1906349Sqs148142 hxge_status_t
hxge_tx_vmac_disable(p_hxge_t hxgep)1916349Sqs148142 hxge_tx_vmac_disable(p_hxge_t hxgep)
1926349Sqs148142 {
1936349Sqs148142 	hpi_status_t	rv;
1946349Sqs148142 	hxge_status_t	status = HXGE_OK;
1956349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
1966349Sqs148142 
1976349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_tx_vmac_disable"));
1986349Sqs148142 
1996349Sqs148142 	rv = hpi_vmac_tx_config(handle, DISABLE, CFG_VMAC_TX_EN, 0);
2006349Sqs148142 
2016349Sqs148142 	status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
2026349Sqs148142 
2036349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_tx_vmac_disable"));
2046349Sqs148142 
2056349Sqs148142 	return (status);
2066349Sqs148142 }
2076349Sqs148142 
2086349Sqs148142 /* Enable RxVMAC */
2096349Sqs148142 
2106349Sqs148142 hxge_status_t
hxge_rx_vmac_enable(p_hxge_t hxgep)2116349Sqs148142 hxge_rx_vmac_enable(p_hxge_t hxgep)
2126349Sqs148142 {
2136349Sqs148142 	hpi_status_t	rv;
2146349Sqs148142 	hxge_status_t	status = HXGE_OK;
2156349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
2166349Sqs148142 
2176349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_rx_vmac_enable"));
2186349Sqs148142 
2198326SMichael.Speer@Sun.COM 	/*
2208326SMichael.Speer@Sun.COM 	 * Because of hardware bug document with CR6770577, need
2218326SMichael.Speer@Sun.COM 	 * reprogram max framesize when enabling/disabling RX
2228326SMichael.Speer@Sun.COM 	 * vmac.  Max framesize is programed here in
2238326SMichael.Speer@Sun.COM 	 * hxge_rx_vmac_init().
2248326SMichael.Speer@Sun.COM 	 */
225*11257SMichael.Speer@Sun.COM 	rv = hpi_vmac_rx_set_framesize(HXGE_DEV_HPI_HANDLE(hxgep),
226*11257SMichael.Speer@Sun.COM 	    (uint16_t)hxgep->vmac.maxframesize);
227*11257SMichael.Speer@Sun.COM 	if (rv != HPI_SUCCESS) {
228*11257SMichael.Speer@Sun.COM 		HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_rx_vmac_enable"));
229*11257SMichael.Speer@Sun.COM 		return (HXGE_ERROR);
230*11257SMichael.Speer@Sun.COM 	}
2316349Sqs148142 
232*11257SMichael.Speer@Sun.COM 	/*
233*11257SMichael.Speer@Sun.COM 	 * Wait for a period of time.
234*11257SMichael.Speer@Sun.COM 	 */
235*11257SMichael.Speer@Sun.COM 	HXGE_DELAY(10);
236*11257SMichael.Speer@Sun.COM 
237*11257SMichael.Speer@Sun.COM 	/*
238*11257SMichael.Speer@Sun.COM 	 * Enable the vmac.
239*11257SMichael.Speer@Sun.COM 	 */
2406349Sqs148142 	rv = hpi_vmac_rx_config(handle, ENABLE, CFG_VMAC_RX_EN, 0);
2416349Sqs148142 
2426349Sqs148142 	status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
2436349Sqs148142 
2446349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_rx_vmac_enable"));
2456349Sqs148142 	return (status);
2466349Sqs148142 }
2476349Sqs148142 
2486349Sqs148142 /* Disable RxVMAC */
2496349Sqs148142 
2506349Sqs148142 hxge_status_t
hxge_rx_vmac_disable(p_hxge_t hxgep)2516349Sqs148142 hxge_rx_vmac_disable(p_hxge_t hxgep)
2526349Sqs148142 {
2536349Sqs148142 	hpi_status_t	rv;
2546349Sqs148142 	hxge_status_t	status = HXGE_OK;
2556349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
2566349Sqs148142 
2576349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_rx_vmac_disable"));
2586349Sqs148142 
2598326SMichael.Speer@Sun.COM 	/*
2608326SMichael.Speer@Sun.COM 	 * Because of hardware bug document with CR6770577, need
2618326SMichael.Speer@Sun.COM 	 * reprogram max framesize when enabling/disabling RX
2628326SMichael.Speer@Sun.COM 	 * vmac.  Max framesize is programed here in
2638326SMichael.Speer@Sun.COM 	 * hxge_rx_vmac_init().
2648326SMichael.Speer@Sun.COM 	 */
2658326SMichael.Speer@Sun.COM 	(void) hpi_vmac_rx_set_framesize(HXGE_DEV_HPI_HANDLE(hxgep),
2668326SMichael.Speer@Sun.COM 	    (uint16_t)0);
2678326SMichael.Speer@Sun.COM 
268*11257SMichael.Speer@Sun.COM 	/*
269*11257SMichael.Speer@Sun.COM 	 * Wait for 10us before doing disable.
270*11257SMichael.Speer@Sun.COM 	 */
271*11257SMichael.Speer@Sun.COM 	HXGE_DELAY(10);
272*11257SMichael.Speer@Sun.COM 
2736349Sqs148142 	rv = hpi_vmac_rx_config(handle, DISABLE, CFG_VMAC_RX_EN, 0);
2746349Sqs148142 
2756349Sqs148142 	status = (rv == HPI_SUCCESS) ? HXGE_OK : HXGE_ERROR;
2766349Sqs148142 
2776349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_rx_vmac_disable"));
2786349Sqs148142 	return (status);
2796349Sqs148142 }
2806349Sqs148142 
2816349Sqs148142 /* Reset TxVMAC */
2826349Sqs148142 
2836349Sqs148142 hxge_status_t
hxge_tx_vmac_reset(p_hxge_t hxgep)2846349Sqs148142 hxge_tx_vmac_reset(p_hxge_t hxgep)
2856349Sqs148142 {
2866349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
2876349Sqs148142 
2886349Sqs148142 	(void) hpi_tx_vmac_reset(handle);
2896349Sqs148142 
2906349Sqs148142 	return (HXGE_OK);
2916349Sqs148142 }
2926349Sqs148142 
2936349Sqs148142 /* Reset RxVMAC */
2946349Sqs148142 
2956349Sqs148142 hxge_status_t
hxge_rx_vmac_reset(p_hxge_t hxgep)2966349Sqs148142 hxge_rx_vmac_reset(p_hxge_t hxgep)
2976349Sqs148142 {
2986349Sqs148142 	hpi_handle_t	handle = hxgep->hpi_handle;
2996349Sqs148142 
300*11257SMichael.Speer@Sun.COM 	(void) hpi_vmac_rx_set_framesize(HXGE_DEV_HPI_HANDLE(hxgep),
301*11257SMichael.Speer@Sun.COM 	    (uint16_t)0);
302*11257SMichael.Speer@Sun.COM 
303*11257SMichael.Speer@Sun.COM 	/*
304*11257SMichael.Speer@Sun.COM 	 * Wait for 10us  before doing reset.
305*11257SMichael.Speer@Sun.COM 	 */
306*11257SMichael.Speer@Sun.COM 	HXGE_DELAY(10);
307*11257SMichael.Speer@Sun.COM 
3086349Sqs148142 	(void) hpi_rx_vmac_reset(handle);
3096349Sqs148142 
3106349Sqs148142 	return (HXGE_OK);
3116349Sqs148142 }
3126349Sqs148142 
3136349Sqs148142 /*ARGSUSED*/
3146349Sqs148142 uint_t
hxge_vmac_intr(caddr_t arg1,caddr_t arg2)3156349Sqs148142 hxge_vmac_intr(caddr_t arg1, caddr_t arg2)
3166349Sqs148142 {
3176349Sqs148142 	p_hxge_t	hxgep = (p_hxge_t)arg2;
3186349Sqs148142 	hpi_handle_t	handle;
3196349Sqs148142 
3206349Sqs148142 	HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_vmac_intr"));
3216349Sqs148142 
3226349Sqs148142 	handle = HXGE_DEV_HPI_HANDLE(hxgep);
3236349Sqs148142 
3246349Sqs148142 	hxge_save_cntrs(hxgep);
3256349Sqs148142 
3266349Sqs148142 	/* Clear the interrupt status registers */
3276349Sqs148142 	(void) hpi_vmac_clear_rx_int_stat(handle);
3286349Sqs148142 	(void) hpi_vmac_clear_tx_int_stat(handle);
3296349Sqs148142 
3306349Sqs148142 	HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_vmac_intr"));
3316349Sqs148142 	return (DDI_INTR_CLAIMED);
3326349Sqs148142 }
3336349Sqs148142 
3346349Sqs148142 /*
3356349Sqs148142  * Set promiscous mode
3366349Sqs148142  */
3376349Sqs148142 hxge_status_t
hxge_set_promisc(p_hxge_t hxgep,boolean_t on)3386349Sqs148142 hxge_set_promisc(p_hxge_t hxgep, boolean_t on)
3396349Sqs148142 {
3406349Sqs148142 	hxge_status_t status = HXGE_OK;
3416349Sqs148142 
3426349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "==> hxge_set_promisc: on %d", on));
3436349Sqs148142 
3446349Sqs148142 	hxgep->filter.all_phys_cnt = ((on) ? 1 : 0);
3456349Sqs148142 
3466349Sqs148142 	RW_ENTER_WRITER(&hxgep->filter_lock);
3476349Sqs148142 	if ((status = hxge_rx_vmac_disable(hxgep)) != HXGE_OK)
3486349Sqs148142 		goto fail;
3496349Sqs148142 	if ((status = hxge_rx_vmac_enable(hxgep)) != HXGE_OK)
3506349Sqs148142 		goto fail;
3516349Sqs148142 	RW_EXIT(&hxgep->filter_lock);
3526349Sqs148142 
3536349Sqs148142 	if (on)
3546349Sqs148142 		hxgep->statsp->mac_stats.promisc = B_TRUE;
3556349Sqs148142 	else
3566349Sqs148142 		hxgep->statsp->mac_stats.promisc = B_FALSE;
3576349Sqs148142 
3586349Sqs148142 	HXGE_DEBUG_MSG((hxgep, MAC_CTL, "<== hxge_set_promisc"));
3596349Sqs148142 	return (HXGE_OK);
3606349Sqs148142 
3616349Sqs148142 fail:
3626349Sqs148142 	RW_EXIT(&hxgep->filter_lock);
3636349Sqs148142 
3646349Sqs148142 	HXGE_ERROR_MSG((hxgep, HXGE_ERR_CTL, "hxge_set_promisc: "
3656349Sqs148142 	    "Unable to set promisc (%d)", on));
3666349Sqs148142 	return (status);
3676349Sqs148142 }
3686349Sqs148142 
3696349Sqs148142 void
hxge_save_cntrs(p_hxge_t hxgep)3706349Sqs148142 hxge_save_cntrs(p_hxge_t hxgep)
3716349Sqs148142 {
3726349Sqs148142 	p_hxge_stats_t	statsp;
3736349Sqs148142 	hpi_handle_t	handle;
3746349Sqs148142 
3756349Sqs148142 	vmac_tx_frame_cnt_t tx_frame_cnt;
3766349Sqs148142 	vmac_tx_byte_cnt_t tx_byte_cnt;
3776349Sqs148142 	vmac_rx_frame_cnt_t rx_frame_cnt;
3786349Sqs148142 	vmac_rx_byte_cnt_t rx_byte_cnt;
3796349Sqs148142 	vmac_rx_drop_fr_cnt_t rx_drop_fr_cnt;
3806349Sqs148142 	vmac_rx_drop_byte_cnt_t rx_drop_byte_cnt;
3816349Sqs148142 	vmac_rx_crc_cnt_t rx_crc_cnt;
3826349Sqs148142 	vmac_rx_pause_cnt_t rx_pause_cnt;
3836349Sqs148142 	vmac_rx_bcast_fr_cnt_t rx_bcast_fr_cnt;
3846349Sqs148142 	vmac_rx_mcast_fr_cnt_t rx_mcast_fr_cnt;
3856349Sqs148142 
3866349Sqs148142 	HXGE_DEBUG_MSG((hxgep, INT_CTL, "==> hxge_save_cntrs"));
3876349Sqs148142 
3886349Sqs148142 	statsp = (p_hxge_stats_t)hxgep->statsp;
3896349Sqs148142 	handle = hxgep->hpi_handle;
3906349Sqs148142 
3916349Sqs148142 	HXGE_REG_RD64(handle, VMAC_TX_FRAME_CNT, &tx_frame_cnt.value);
3926349Sqs148142 	HXGE_REG_RD64(handle, VMAC_TX_BYTE_CNT, &tx_byte_cnt.value);
3936349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_FRAME_CNT, &rx_frame_cnt.value);
3946349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_BYTE_CNT, &rx_byte_cnt.value);
3956349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_DROP_FR_CNT, &rx_drop_fr_cnt.value);
3966349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_DROP_BYTE_CNT, &rx_drop_byte_cnt.value);
3976349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_CRC_CNT, &rx_crc_cnt.value);
3986349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_PAUSE_CNT, &rx_pause_cnt.value);
3996349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_BCAST_FR_CNT, &rx_bcast_fr_cnt.value);
4006349Sqs148142 	HXGE_REG_RD64(handle, VMAC_RX_MCAST_FR_CNT, &rx_mcast_fr_cnt.value);
4016349Sqs148142 
4026349Sqs148142 	statsp->vmac_stats.tx_frame_cnt += tx_frame_cnt.bits.tx_frame_cnt;
4036349Sqs148142 	statsp->vmac_stats.tx_byte_cnt += tx_byte_cnt.bits.tx_byte_cnt;
4046349Sqs148142 	statsp->vmac_stats.rx_frame_cnt += rx_frame_cnt.bits.rx_frame_cnt;
4056349Sqs148142 	statsp->vmac_stats.rx_byte_cnt += rx_byte_cnt.bits.rx_byte_cnt;
4066349Sqs148142 	statsp->vmac_stats.rx_drop_frame_cnt +=
4076349Sqs148142 	    rx_drop_fr_cnt.bits.rx_drop_frame_cnt;
4086349Sqs148142 	statsp->vmac_stats.rx_drop_byte_cnt +=
4096349Sqs148142 	    rx_drop_byte_cnt.bits.rx_drop_byte_cnt;
4106349Sqs148142 	statsp->vmac_stats.rx_crc_cnt += rx_crc_cnt.bits.rx_crc_cnt;
4116349Sqs148142 	statsp->vmac_stats.rx_pause_cnt += rx_pause_cnt.bits.rx_pause_cnt;
4126349Sqs148142 	statsp->vmac_stats.rx_bcast_fr_cnt +=
4136349Sqs148142 	    rx_bcast_fr_cnt.bits.rx_bcast_fr_cnt;
4146349Sqs148142 	statsp->vmac_stats.rx_mcast_fr_cnt +=
4156349Sqs148142 	    rx_mcast_fr_cnt.bits.rx_mcast_fr_cnt;
4166349Sqs148142 
4176349Sqs148142 hxge_save_cntrs_exit:
4186349Sqs148142 	HXGE_DEBUG_MSG((hxgep, INT_CTL, "<== hxge_save_cntrs"));
4196349Sqs148142 }
4207584SQiyan.Sun@Sun.COM 
4217584SQiyan.Sun@Sun.COM int
hxge_vmac_set_framesize(p_hxge_t hxgep)4227584SQiyan.Sun@Sun.COM hxge_vmac_set_framesize(p_hxge_t hxgep)
4237584SQiyan.Sun@Sun.COM {
4247584SQiyan.Sun@Sun.COM 	int	status = 0;
4257584SQiyan.Sun@Sun.COM 
4267584SQiyan.Sun@Sun.COM 	HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_vmac_set_framesize"));
4277584SQiyan.Sun@Sun.COM 
4287584SQiyan.Sun@Sun.COM 	RW_ENTER_WRITER(&hxgep->filter_lock);
4297584SQiyan.Sun@Sun.COM 	(void) hxge_rx_vmac_disable(hxgep);
4307584SQiyan.Sun@Sun.COM 	(void) hxge_tx_vmac_disable(hxgep);
4317584SQiyan.Sun@Sun.COM 
4327584SQiyan.Sun@Sun.COM 	/*
4337584SQiyan.Sun@Sun.COM 	 * Apply the new jumbo parameter here which is contained in hxgep
4347584SQiyan.Sun@Sun.COM 	 * data structure (hxgep->vmac.maxframesize);
4357584SQiyan.Sun@Sun.COM 	 * The order of the following two calls is important.
4367584SQiyan.Sun@Sun.COM 	 */
4377584SQiyan.Sun@Sun.COM 	(void) hxge_tx_vmac_enable(hxgep);
4387584SQiyan.Sun@Sun.COM 	(void) hxge_rx_vmac_enable(hxgep);
4397584SQiyan.Sun@Sun.COM 	RW_EXIT(&hxgep->filter_lock);
4407584SQiyan.Sun@Sun.COM 
4417584SQiyan.Sun@Sun.COM 	HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_vmac_set_framesize"));
4427584SQiyan.Sun@Sun.COM 	return (status);
4437584SQiyan.Sun@Sun.COM }
444