xref: /onnv-gate/usr/src/uts/common/io/e1000g/e1000_manage.h (revision 11020:e0feef27b61a)
14919Sxy150489 /*
24919Sxy150489  * This file is provided under a CDDLv1 license.  When using or
34919Sxy150489  * redistributing this file, you may do so under this license.
44919Sxy150489  * In redistributing this file this license must be included
54919Sxy150489  * and no other modification of this header file is permitted.
64919Sxy150489  *
74919Sxy150489  * CDDL LICENSE SUMMARY
84919Sxy150489  *
98479SChenlu.Chen@Sun.COM  * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
104919Sxy150489  *
114919Sxy150489  * The contents of this file are subject to the terms of Version
124919Sxy150489  * 1.0 of the Common Development and Distribution License (the "License").
134919Sxy150489  *
144919Sxy150489  * You should have received a copy of the License with this software.
154919Sxy150489  * You can obtain a copy of the License at
164919Sxy150489  *	http://www.opensolaris.org/os/licensing.
174919Sxy150489  * See the License for the specific language governing permissions
184919Sxy150489  * and limitations under the License.
194919Sxy150489  */
204919Sxy150489 
214919Sxy150489 /*
228479SChenlu.Chen@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
234919Sxy150489  * Use is subject to license terms of the CDDLv1.
244919Sxy150489  */
254919Sxy150489 
264919Sxy150489 /*
27*11020SMin.Xu@Sun.COM  * IntelVersion: 1.18 v3-1-10-1_2009-9-18_Release14-6
284919Sxy150489  */
294919Sxy150489 #ifndef _E1000_MANAGE_H_
304919Sxy150489 #define	_E1000_MANAGE_H_
314919Sxy150489 
324919Sxy150489 #ifdef __cplusplus
334919Sxy150489 extern "C" {
344919Sxy150489 #endif
354919Sxy150489 
366735Scc210113 bool e1000_check_mng_mode_generic(struct e1000_hw *hw);
376735Scc210113 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);
384919Sxy150489 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
394919Sxy150489 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
404919Sxy150489     u16 length, u16 offset, u8 *sum);
414919Sxy150489 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
424919Sxy150489     struct e1000_host_mng_command_header *hdr);
434919Sxy150489 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
444919Sxy150489     u8 *buffer, u16 length);
457607STed.You@Sun.COM bool e1000_enable_mng_pass_thru(struct e1000_hw *hw);
464919Sxy150489 
478479SChenlu.Chen@Sun.COM enum e1000_mng_mode {
484919Sxy150489 	e1000_mng_mode_none = 0,
494919Sxy150489 	e1000_mng_mode_asf,
504919Sxy150489 	e1000_mng_mode_pt,
514919Sxy150489 	e1000_mng_mode_ipmi,
524919Sxy150489 	e1000_mng_mode_host_if_only
538479SChenlu.Chen@Sun.COM };
544919Sxy150489 
554919Sxy150489 #define	E1000_FACTPS_MNGCG	0x20000000
564919Sxy150489 
574919Sxy150489 #define	E1000_FWSM_MODE_MASK	0xE
584919Sxy150489 #define	E1000_FWSM_MODE_SHIFT	1
594919Sxy150489 
604919Sxy150489 #define	E1000_MNG_IAMT_MODE			0x3
614919Sxy150489 #define	E1000_MNG_DHCP_COOKIE_LENGTH		0x10
624919Sxy150489 #define	E1000_MNG_DHCP_COOKIE_OFFSET		0x6F0
634919Sxy150489 #define	E1000_MNG_DHCP_COMMAND_TIMEOUT		10
644919Sxy150489 #define	E1000_MNG_DHCP_TX_PAYLOAD_CMD		64
654919Sxy150489 #define	E1000_MNG_DHCP_COOKIE_STATUS_PARSING	0x1
664919Sxy150489 #define	E1000_MNG_DHCP_COOKIE_STATUS_VLAN	0x2
674919Sxy150489 
684919Sxy150489 #define	E1000_VFTA_ENTRY_SHIFT		5
694919Sxy150489 #define	E1000_VFTA_ENTRY_MASK		0x7F
704919Sxy150489 #define	E1000_VFTA_ENTRY_BIT_SHIFT_MASK	0x1F
714919Sxy150489 
726735Scc210113 #define	E1000_HI_MAX_BLOCK_BYTE_LENGTH	1792	/* Num of bytes in range */
736735Scc210113 #define	E1000_HI_MAX_BLOCK_DWORD_LENGTH	448	/* Num of dwords in range */
744919Sxy150489 #define	E1000_HI_COMMAND_TIMEOUT	500	/* Process HI command limit */
754919Sxy150489 
764919Sxy150489 #define	E1000_HICR_EN			0x01	/* Enable bit - RO */
774919Sxy150489 /* Driver sets this bit when done to put command in RAM */
784919Sxy150489 #define	E1000_HICR_C			0x02
794919Sxy150489 #define	E1000_HICR_SV			0x04	/* Status Validity */
804919Sxy150489 #define	E1000_HICR_FW_RESET_ENABLE	0x40
814919Sxy150489 #define	E1000_HICR_FW_RESET		0x80
824919Sxy150489 
834919Sxy150489 /* Intel(R) Active Management Technology signature */
844919Sxy150489 #define	E1000_IAMT_SIGNATURE	0x544D4149
854919Sxy150489 
864919Sxy150489 #ifdef __cplusplus
874919Sxy150489 }
884919Sxy150489 #endif
894919Sxy150489 
904919Sxy150489 #endif	/* _E1000_MANAGE_H_ */
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