14667Smh27603 /* 24667Smh27603 * CDDL HEADER START 34667Smh27603 * 44667Smh27603 * The contents of this file are subject to the terms of the 54667Smh27603 * Common Development and Distribution License (the "License"). 64667Smh27603 * You may not use this file except in compliance with the License. 74667Smh27603 * 84667Smh27603 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 94667Smh27603 * or http://www.opensolaris.org/os/licensing. 104667Smh27603 * See the License for the specific language governing permissions 114667Smh27603 * and limitations under the License. 124667Smh27603 * 134667Smh27603 * When distributing Covered Code, include this CDDL HEADER in each 144667Smh27603 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 154667Smh27603 * If applicable, add the following below this CDDL HEADER, with the 164667Smh27603 * fields enclosed by brackets "[]" replaced with your own identifying 174667Smh27603 * information: Portions Copyright [yyyy] [name of copyright owner] 184667Smh27603 * 194667Smh27603 * CDDL HEADER END 204667Smh27603 */ 214667Smh27603 /* 225864Sesaxe * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 234667Smh27603 * Use is subject to license terms. 244667Smh27603 */ 254667Smh27603 264667Smh27603 /* 274667Smh27603 * CPU Device driver. The driver is not DDI-compliant. 284667Smh27603 * 294667Smh27603 * The driver supports following features: 304667Smh27603 * - Power management. 314667Smh27603 */ 324667Smh27603 334667Smh27603 #include <sys/types.h> 344667Smh27603 #include <sys/param.h> 354667Smh27603 #include <sys/errno.h> 364667Smh27603 #include <sys/modctl.h> 374667Smh27603 #include <sys/kmem.h> 384667Smh27603 #include <sys/conf.h> 394667Smh27603 #include <sys/cmn_err.h> 404667Smh27603 #include <sys/stat.h> 414667Smh27603 #include <sys/debug.h> 424667Smh27603 #include <sys/systm.h> 434667Smh27603 #include <sys/ddi.h> 444667Smh27603 #include <sys/sunddi.h> 455864Sesaxe #include <sys/sdt.h> 464667Smh27603 474667Smh27603 #include <sys/machsystm.h> 484667Smh27603 #include <sys/x_call.h> 49*7319SMark.Haywood@Sun.COM #include <sys/cpudrv_mach.h> 504667Smh27603 #include <sys/msacct.h> 514667Smh27603 524667Smh27603 /* 534667Smh27603 * CPU power management 544667Smh27603 * 554667Smh27603 * The supported power saving model is to slow down the CPU (on SPARC by 564667Smh27603 * dividing the CPU clock and on x86 by dropping down a P-state). 574667Smh27603 * Periodically we determine the amount of time the CPU is running 584667Smh27603 * idle thread and threads in user mode during the last quantum. If the idle 594667Smh27603 * thread was running less than its low water mark for current speed for 604667Smh27603 * number of consecutive sampling periods, or number of running threads in 614667Smh27603 * user mode are above its high water mark, we arrange to go to the higher 624667Smh27603 * speed. If the idle thread was running more than its high water mark without 634667Smh27603 * dropping a number of consecutive times below the mark, and number of threads 644667Smh27603 * running in user mode are below its low water mark, we arrange to go to the 654667Smh27603 * next lower speed. While going down, we go through all the speeds. While 664667Smh27603 * going up we go to the maximum speed to minimize impact on the user, but have 674667Smh27603 * provisions in the driver to go to other speeds. 684667Smh27603 * 694667Smh27603 * The driver does not have knowledge of a particular implementation of this 704667Smh27603 * scheme and will work with all CPUs supporting this model. On SPARC, the 714667Smh27603 * driver determines supported speeds by looking at 'clock-divisors' property 724667Smh27603 * created by OBP. On x86, the driver retrieves the supported speeds from 734667Smh27603 * ACPI. 744667Smh27603 */ 754667Smh27603 764667Smh27603 /* 774667Smh27603 * Configuration function prototypes and data structures 784667Smh27603 */ 794667Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 804667Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 814667Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level); 824667Smh27603 834667Smh27603 struct dev_ops cpudrv_ops = { 844667Smh27603 DEVO_REV, /* rev */ 854667Smh27603 0, /* refcnt */ 864667Smh27603 nodev, /* getinfo */ 874667Smh27603 nulldev, /* identify */ 884667Smh27603 nulldev, /* probe */ 894667Smh27603 cpudrv_attach, /* attach */ 904667Smh27603 cpudrv_detach, /* detach */ 914667Smh27603 nodev, /* reset */ 924667Smh27603 (struct cb_ops *)NULL, /* cb_ops */ 934667Smh27603 (struct bus_ops *)NULL, /* bus_ops */ 944667Smh27603 cpudrv_power /* power */ 954667Smh27603 }; 964667Smh27603 974667Smh27603 static struct modldrv modldrv = { 984667Smh27603 &mod_driverops, /* modops */ 99*7319SMark.Haywood@Sun.COM "CPU Driver", /* linkinfo */ 1004667Smh27603 &cpudrv_ops, /* dev_ops */ 1014667Smh27603 }; 1024667Smh27603 1034667Smh27603 static struct modlinkage modlinkage = { 1044667Smh27603 MODREV_1, /* rev */ 1054667Smh27603 &modldrv, /* linkage */ 1064667Smh27603 NULL 1074667Smh27603 }; 1084667Smh27603 1094667Smh27603 /* 1104667Smh27603 * Function prototypes 1114667Smh27603 */ 112*7319SMark.Haywood@Sun.COM static int cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp); 1134667Smh27603 static void cpudrv_pm_free(cpudrv_devstate_t *cpudsp); 1144667Smh27603 static int cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp); 1154667Smh27603 static void cpudrv_pm_monitor_disp(void *arg); 1164667Smh27603 static void cpudrv_pm_monitor(void *arg); 1174667Smh27603 1184667Smh27603 /* 1194667Smh27603 * Driver global variables 1204667Smh27603 */ 1214667Smh27603 uint_t cpudrv_debug = 0; 1224667Smh27603 void *cpudrv_state; 1234667Smh27603 static uint_t cpudrv_pm_idle_hwm = CPUDRV_PM_IDLE_HWM; 1244667Smh27603 static uint_t cpudrv_pm_idle_lwm = CPUDRV_PM_IDLE_LWM; 1254667Smh27603 static uint_t cpudrv_pm_idle_buf_zone = CPUDRV_PM_IDLE_BUF_ZONE; 1264667Smh27603 static uint_t cpudrv_pm_idle_bhwm_cnt_max = CPUDRV_PM_IDLE_BHWM_CNT_MAX; 1274667Smh27603 static uint_t cpudrv_pm_idle_blwm_cnt_max = CPUDRV_PM_IDLE_BLWM_CNT_MAX; 1284667Smh27603 static uint_t cpudrv_pm_user_hwm = CPUDRV_PM_USER_HWM; 1294667Smh27603 1304667Smh27603 /* 1314667Smh27603 * cpudrv_direct_pm allows user applications to directly control the 1324667Smh27603 * power state transitions (direct pm) without following the normal 1334667Smh27603 * direct pm protocol. This is needed because the normal protocol 1344667Smh27603 * requires that a device only be lowered when it is idle, and be 1354667Smh27603 * brought up when it request to do so by calling pm_raise_power(). 1364667Smh27603 * Ignoring this protocol is harmless for CPU (other than speed). 1374667Smh27603 * Moreover it might be the case that CPU is never idle or wants 1384667Smh27603 * to be at higher speed because of the addition CPU cycles required 1394667Smh27603 * to run the user application. 1404667Smh27603 * 1414667Smh27603 * The driver will still report idle/busy status to the framework. Although 1424667Smh27603 * framework will ignore this information for direct pm devices and not 1434667Smh27603 * try to bring them down when idle, user applications can still use this 1444667Smh27603 * information if they wants. 1454667Smh27603 * 1464667Smh27603 * In the future, provide an ioctl to control setting of this mode. In 1474667Smh27603 * that case, this variable should move to the state structure and 1484667Smh27603 * be protected by the lock in the state structure. 1494667Smh27603 */ 1504667Smh27603 int cpudrv_direct_pm = 0; 1514667Smh27603 1524667Smh27603 /* 1534667Smh27603 * Arranges for the handler function to be called at the interval suitable 1544667Smh27603 * for current speed. 1554667Smh27603 */ 1564667Smh27603 #define CPUDRV_PM_MONITOR_INIT(cpudsp) { \ 157*7319SMark.Haywood@Sun.COM if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { \ 158*7319SMark.Haywood@Sun.COM ASSERT(mutex_owned(&(cpudsp)->lock)); \ 159*7319SMark.Haywood@Sun.COM (cpudsp)->cpudrv_pm.timeout_id = \ 160*7319SMark.Haywood@Sun.COM timeout(cpudrv_pm_monitor_disp, \ 161*7319SMark.Haywood@Sun.COM (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \ 162*7319SMark.Haywood@Sun.COM CPUDRV_PM_QUANT_CNT_OTHR : \ 163*7319SMark.Haywood@Sun.COM (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \ 164*7319SMark.Haywood@Sun.COM } \ 1654667Smh27603 } 1664667Smh27603 1674667Smh27603 /* 1684667Smh27603 * Arranges for the handler function not to be called back. 1694667Smh27603 */ 1704667Smh27603 #define CPUDRV_PM_MONITOR_FINI(cpudsp) { \ 1714667Smh27603 timeout_id_t tmp_tid; \ 1724667Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 1734667Smh27603 tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \ 1744667Smh27603 (cpudsp)->cpudrv_pm.timeout_id = 0; \ 1754667Smh27603 mutex_exit(&(cpudsp)->lock); \ 176*7319SMark.Haywood@Sun.COM if (tmp_tid != 0) { \ 177*7319SMark.Haywood@Sun.COM (void) untimeout(tmp_tid); \ 178*7319SMark.Haywood@Sun.COM mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \ 179*7319SMark.Haywood@Sun.COM while ((cpudsp)->cpudrv_pm.timeout_count != 0) \ 180*7319SMark.Haywood@Sun.COM cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \ 181*7319SMark.Haywood@Sun.COM &(cpudsp)->cpudrv_pm.timeout_lock); \ 182*7319SMark.Haywood@Sun.COM mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \ 183*7319SMark.Haywood@Sun.COM } \ 1844667Smh27603 mutex_enter(&(cpudsp)->lock); \ 1854667Smh27603 } 1864667Smh27603 1874667Smh27603 int 1884667Smh27603 _init(void) 1894667Smh27603 { 1904667Smh27603 int error; 1914667Smh27603 1924667Smh27603 DPRINTF(D_INIT, (" _init: function called\n")); 1934667Smh27603 if ((error = ddi_soft_state_init(&cpudrv_state, 1944667Smh27603 sizeof (cpudrv_devstate_t), 0)) != 0) { 1954667Smh27603 return (error); 1964667Smh27603 } 1974667Smh27603 1984667Smh27603 if ((error = mod_install(&modlinkage)) != 0) { 1994667Smh27603 ddi_soft_state_fini(&cpudrv_state); 2004667Smh27603 } 2014667Smh27603 2024667Smh27603 /* 2034667Smh27603 * Callbacks used by the PPM driver. 2044667Smh27603 */ 2054667Smh27603 CPUDRV_PM_SET_PPM_CALLBACKS(); 2064667Smh27603 return (error); 2074667Smh27603 } 2084667Smh27603 2094667Smh27603 int 2104667Smh27603 _fini(void) 2114667Smh27603 { 2124667Smh27603 int error; 2134667Smh27603 2144667Smh27603 DPRINTF(D_FINI, (" _fini: function called\n")); 2154667Smh27603 if ((error = mod_remove(&modlinkage)) == 0) { 2164667Smh27603 ddi_soft_state_fini(&cpudrv_state); 2174667Smh27603 } 2184667Smh27603 2194667Smh27603 return (error); 2204667Smh27603 } 2214667Smh27603 2224667Smh27603 int 2234667Smh27603 _info(struct modinfo *modinfop) 2244667Smh27603 { 2254667Smh27603 return (mod_info(&modlinkage, modinfop)); 2264667Smh27603 } 2274667Smh27603 2284667Smh27603 /* 2294667Smh27603 * Driver attach(9e) entry point. 2304667Smh27603 */ 2314667Smh27603 static int 2324667Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 2334667Smh27603 { 2344667Smh27603 int instance; 2354667Smh27603 cpudrv_devstate_t *cpudsp; 2364667Smh27603 extern pri_t maxclsyspri; 2374667Smh27603 2384667Smh27603 instance = ddi_get_instance(dip); 2394667Smh27603 2404667Smh27603 switch (cmd) { 2414667Smh27603 case DDI_ATTACH: 2424667Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 2434667Smh27603 "DDI_ATTACH called\n", instance)); 244*7319SMark.Haywood@Sun.COM if (CPUDRV_PM_DISABLED()) 245*7319SMark.Haywood@Sun.COM return (DDI_FAILURE); 2464667Smh27603 if (ddi_soft_state_zalloc(cpudrv_state, instance) != 2474667Smh27603 DDI_SUCCESS) { 2484667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2494667Smh27603 "can't allocate state", instance); 2504667Smh27603 CPUDRV_PM_DISABLE(); 2514667Smh27603 return (DDI_FAILURE); 2524667Smh27603 } 2534667Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 2544667Smh27603 NULL) { 2554667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2564667Smh27603 "can't get state", instance); 2574667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 2584667Smh27603 CPUDRV_PM_DISABLE(); 2594667Smh27603 return (DDI_FAILURE); 2604667Smh27603 } 2614667Smh27603 cpudsp->dip = dip; 2624667Smh27603 2634667Smh27603 /* 2644667Smh27603 * Find CPU number for this dev_info node. 2654667Smh27603 */ 2664667Smh27603 if (!cpudrv_pm_get_cpu_id(dip, &(cpudsp->cpu_id))) { 2674667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 2684667Smh27603 "can't convert dip to cpu_id", instance); 2694667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 2704667Smh27603 CPUDRV_PM_DISABLE(); 2714667Smh27603 return (DDI_FAILURE); 2724667Smh27603 } 273*7319SMark.Haywood@Sun.COM if (!cpudrv_mach_pm_init(cpudsp)) { 2744667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 2754667Smh27603 CPUDRV_PM_DISABLE(); 2764667Smh27603 return (DDI_FAILURE); 2774667Smh27603 } 278*7319SMark.Haywood@Sun.COM mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL); 279*7319SMark.Haywood@Sun.COM if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { 280*7319SMark.Haywood@Sun.COM if (cpudrv_pm_init_power(cpudsp) != DDI_SUCCESS) { 281*7319SMark.Haywood@Sun.COM CPUDRV_PM_DISABLE(); 282*7319SMark.Haywood@Sun.COM cpudrv_pm_free(cpudsp); 283*7319SMark.Haywood@Sun.COM ddi_soft_state_free(cpudrv_state, instance); 284*7319SMark.Haywood@Sun.COM return (DDI_FAILURE); 285*7319SMark.Haywood@Sun.COM } 286*7319SMark.Haywood@Sun.COM if (cpudrv_pm_comp_create(cpudsp) != DDI_SUCCESS) { 287*7319SMark.Haywood@Sun.COM CPUDRV_PM_DISABLE(); 288*7319SMark.Haywood@Sun.COM cpudrv_pm_free(cpudsp); 289*7319SMark.Haywood@Sun.COM ddi_soft_state_free(cpudrv_state, instance); 290*7319SMark.Haywood@Sun.COM return (DDI_FAILURE); 291*7319SMark.Haywood@Sun.COM } 292*7319SMark.Haywood@Sun.COM if (ddi_prop_update_string(DDI_DEV_T_NONE, 293*7319SMark.Haywood@Sun.COM dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) { 294*7319SMark.Haywood@Sun.COM CPUDRV_PM_DISABLE(); 295*7319SMark.Haywood@Sun.COM cpudrv_pm_free(cpudsp); 296*7319SMark.Haywood@Sun.COM ddi_soft_state_free(cpudrv_state, instance); 297*7319SMark.Haywood@Sun.COM return (DDI_FAILURE); 298*7319SMark.Haywood@Sun.COM } 299*7319SMark.Haywood@Sun.COM 300*7319SMark.Haywood@Sun.COM /* 301*7319SMark.Haywood@Sun.COM * Taskq is used to dispatch routine to monitor CPU 302*7319SMark.Haywood@Sun.COM * activities. 303*7319SMark.Haywood@Sun.COM */ 304*7319SMark.Haywood@Sun.COM cpudsp->cpudrv_pm.tq = taskq_create_instance( 305*7319SMark.Haywood@Sun.COM "cpudrv_pm_monitor", 306*7319SMark.Haywood@Sun.COM ddi_get_instance(dip), CPUDRV_PM_TASKQ_THREADS, 307*7319SMark.Haywood@Sun.COM (maxclsyspri - 1), CPUDRV_PM_TASKQ_MIN, 308*7319SMark.Haywood@Sun.COM CPUDRV_PM_TASKQ_MAX, 309*7319SMark.Haywood@Sun.COM TASKQ_PREPOPULATE|TASKQ_CPR_SAFE); 310*7319SMark.Haywood@Sun.COM 311*7319SMark.Haywood@Sun.COM mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL, 312*7319SMark.Haywood@Sun.COM MUTEX_DRIVER, NULL); 313*7319SMark.Haywood@Sun.COM cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL, 314*7319SMark.Haywood@Sun.COM CV_DEFAULT, NULL); 315*7319SMark.Haywood@Sun.COM 316*7319SMark.Haywood@Sun.COM /* 317*7319SMark.Haywood@Sun.COM * Driver needs to assume that CPU is running at 318*7319SMark.Haywood@Sun.COM * unknown speed at DDI_ATTACH and switch it to the 319*7319SMark.Haywood@Sun.COM * needed speed. We assume that initial needed speed 320*7319SMark.Haywood@Sun.COM * is full speed for us. 321*7319SMark.Haywood@Sun.COM */ 322*7319SMark.Haywood@Sun.COM /* 323*7319SMark.Haywood@Sun.COM * We need to take the lock because cpudrv_pm_monitor() 324*7319SMark.Haywood@Sun.COM * will start running in parallel with attach(). 325*7319SMark.Haywood@Sun.COM */ 326*7319SMark.Haywood@Sun.COM mutex_enter(&cpudsp->lock); 327*7319SMark.Haywood@Sun.COM cpudsp->cpudrv_pm.cur_spd = NULL; 328*7319SMark.Haywood@Sun.COM cpudsp->cpudrv_pm.targ_spd = 329*7319SMark.Haywood@Sun.COM cpudsp->cpudrv_pm.head_spd; 330*7319SMark.Haywood@Sun.COM cpudsp->cpudrv_pm.pm_started = B_FALSE; 331*7319SMark.Haywood@Sun.COM /* 332*7319SMark.Haywood@Sun.COM * We don't call pm_raise_power() directly from attach 333*7319SMark.Haywood@Sun.COM * because driver attach for a slave CPU node can 334*7319SMark.Haywood@Sun.COM * happen before the CPU is even initialized. We just 335*7319SMark.Haywood@Sun.COM * start the monitoring system which understands 336*7319SMark.Haywood@Sun.COM * unknown speed and moves CPU to targ_spd when it 337*7319SMark.Haywood@Sun.COM * have been initialized. 338*7319SMark.Haywood@Sun.COM */ 339*7319SMark.Haywood@Sun.COM CPUDRV_PM_MONITOR_INIT(cpudsp); 340*7319SMark.Haywood@Sun.COM mutex_exit(&cpudsp->lock); 341*7319SMark.Haywood@Sun.COM 3424667Smh27603 } 3434667Smh27603 344*7319SMark.Haywood@Sun.COM CPUDRV_PM_INSTALL_MAX_CHANGE_HANDLER(cpudsp, dip); 3454667Smh27603 3464667Smh27603 ddi_report_dev(dip); 3474667Smh27603 return (DDI_SUCCESS); 3484667Smh27603 3494667Smh27603 case DDI_RESUME: 3504667Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 3514667Smh27603 "DDI_RESUME called\n", instance)); 352*7319SMark.Haywood@Sun.COM 353*7319SMark.Haywood@Sun.COM cpudsp = ddi_get_soft_state(cpudrv_state, instance); 354*7319SMark.Haywood@Sun.COM ASSERT(cpudsp != NULL); 355*7319SMark.Haywood@Sun.COM 356*7319SMark.Haywood@Sun.COM /* 357*7319SMark.Haywood@Sun.COM * Nothing to do for resume, if not doing active PM. 358*7319SMark.Haywood@Sun.COM */ 359*7319SMark.Haywood@Sun.COM if (!CPUDRV_PM_POWER_ENABLED(cpudsp)) 360*7319SMark.Haywood@Sun.COM return (DDI_SUCCESS); 361*7319SMark.Haywood@Sun.COM 3624667Smh27603 mutex_enter(&cpudsp->lock); 3634667Smh27603 /* 3644667Smh27603 * Driver needs to assume that CPU is running at unknown speed 3654667Smh27603 * at DDI_RESUME and switch it to the needed speed. We assume 3664667Smh27603 * that the needed speed is full speed for us. 3674667Smh27603 */ 3684667Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 3694667Smh27603 cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd; 3704667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 3714667Smh27603 mutex_exit(&cpudsp->lock); 3724667Smh27603 CPUDRV_PM_REDEFINE_TOPSPEED(dip); 3734667Smh27603 return (DDI_SUCCESS); 3744667Smh27603 3754667Smh27603 default: 3764667Smh27603 return (DDI_FAILURE); 3774667Smh27603 } 3784667Smh27603 } 3794667Smh27603 3804667Smh27603 /* 3814667Smh27603 * Driver detach(9e) entry point. 3824667Smh27603 */ 3834667Smh27603 static int 3844667Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 3854667Smh27603 { 3864667Smh27603 int instance; 3874667Smh27603 cpudrv_devstate_t *cpudsp; 3884667Smh27603 cpudrv_pm_t *cpupm; 3894667Smh27603 3904667Smh27603 instance = ddi_get_instance(dip); 3914667Smh27603 3924667Smh27603 switch (cmd) { 3934667Smh27603 case DDI_DETACH: 3944667Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 3954667Smh27603 "DDI_DETACH called\n", instance)); 3964667Smh27603 /* 3974667Smh27603 * If the only thing supported by the driver is power 3984667Smh27603 * management, we can in future enhance the driver and 3994667Smh27603 * framework that loads it to unload the driver when 4004667Smh27603 * user has disabled CPU power management. 4014667Smh27603 */ 4024667Smh27603 return (DDI_FAILURE); 4034667Smh27603 4044667Smh27603 case DDI_SUSPEND: 4054667Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 4064667Smh27603 "DDI_SUSPEND called\n", instance)); 407*7319SMark.Haywood@Sun.COM 408*7319SMark.Haywood@Sun.COM cpudsp = ddi_get_soft_state(cpudrv_state, instance); 409*7319SMark.Haywood@Sun.COM ASSERT(cpudsp != NULL); 410*7319SMark.Haywood@Sun.COM 411*7319SMark.Haywood@Sun.COM /* 412*7319SMark.Haywood@Sun.COM * Nothing to do for suspend, if not doing active PM. 413*7319SMark.Haywood@Sun.COM */ 414*7319SMark.Haywood@Sun.COM if (!CPUDRV_PM_POWER_ENABLED(cpudsp)) 415*7319SMark.Haywood@Sun.COM return (DDI_SUCCESS); 416*7319SMark.Haywood@Sun.COM 4174667Smh27603 /* 4184667Smh27603 * During a checkpoint-resume sequence, framework will 4194667Smh27603 * stop interrupts to quiesce kernel activity. This will 4204667Smh27603 * leave our monitoring system ineffective. Handle this 4214667Smh27603 * by stopping our monitoring system and bringing CPU 4224667Smh27603 * to full speed. In case we are in special direct pm 4234667Smh27603 * mode, we leave the CPU at whatever speed it is. This 4244667Smh27603 * is harmless other than speed. 4254667Smh27603 */ 4264667Smh27603 mutex_enter(&cpudsp->lock); 4274667Smh27603 cpupm = &(cpudsp->cpudrv_pm); 4284667Smh27603 4294667Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - " 4304667Smh27603 "cur_spd %d, head_spd %d\n", instance, 4314667Smh27603 cpupm->cur_spd->pm_level, cpupm->head_spd->pm_level)); 4324667Smh27603 4334667Smh27603 CPUDRV_PM_MONITOR_FINI(cpudsp); 4344667Smh27603 4354667Smh27603 if (!cpudrv_direct_pm && (cpupm->cur_spd != cpupm->head_spd)) { 4364667Smh27603 if (cpupm->pm_busycnt < 1) { 4374667Smh27603 if ((pm_busy_component(dip, CPUDRV_PM_COMP_NUM) 4384667Smh27603 == DDI_SUCCESS)) { 4394667Smh27603 cpupm->pm_busycnt++; 4404667Smh27603 } else { 4414667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 4424667Smh27603 mutex_exit(&cpudsp->lock); 4434667Smh27603 cmn_err(CE_WARN, "cpudrv_detach: " 4444667Smh27603 "instance %d: can't busy CPU " 4454667Smh27603 "component", instance); 4464667Smh27603 return (DDI_FAILURE); 4474667Smh27603 } 4484667Smh27603 } 4494667Smh27603 mutex_exit(&cpudsp->lock); 4504667Smh27603 if (pm_raise_power(dip, CPUDRV_PM_COMP_NUM, 4514667Smh27603 cpupm->head_spd->pm_level) != DDI_SUCCESS) { 4524667Smh27603 mutex_enter(&cpudsp->lock); 4534667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 4544667Smh27603 mutex_exit(&cpudsp->lock); 4554667Smh27603 cmn_err(CE_WARN, "cpudrv_detach: instance %d: " 4564667Smh27603 "can't raise CPU power level", instance); 4574667Smh27603 return (DDI_FAILURE); 4584667Smh27603 } else { 4594667Smh27603 return (DDI_SUCCESS); 4604667Smh27603 } 4614667Smh27603 } else { 4624667Smh27603 mutex_exit(&cpudsp->lock); 4634667Smh27603 return (DDI_SUCCESS); 4644667Smh27603 } 4654667Smh27603 4664667Smh27603 default: 4674667Smh27603 return (DDI_FAILURE); 4684667Smh27603 } 4694667Smh27603 } 4704667Smh27603 4714667Smh27603 /* 4724667Smh27603 * Driver power(9e) entry point. 4734667Smh27603 * 4744667Smh27603 * Driver's notion of current power is set *only* in power(9e) entry point 4754667Smh27603 * after actual power change operation has been successfully completed. 4764667Smh27603 */ 4774667Smh27603 /* ARGSUSED */ 4784667Smh27603 static int 4794667Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level) 4804667Smh27603 { 4814667Smh27603 int instance; 4824667Smh27603 cpudrv_devstate_t *cpudsp; 4834667Smh27603 cpudrv_pm_t *cpupm; 4844667Smh27603 cpudrv_pm_spd_t *new_spd; 4854667Smh27603 boolean_t is_ready; 4864667Smh27603 int ret; 4874667Smh27603 4884667Smh27603 instance = ddi_get_instance(dip); 4894667Smh27603 4904667Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n", 4914667Smh27603 instance, level)); 4924667Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) { 4934667Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: can't get state", 4944667Smh27603 instance); 4954667Smh27603 return (DDI_FAILURE); 4964667Smh27603 } 4974667Smh27603 4984667Smh27603 mutex_enter(&cpudsp->lock); 4994667Smh27603 cpupm = &(cpudsp->cpudrv_pm); 5004667Smh27603 5014667Smh27603 /* 5024667Smh27603 * In normal operation, we fail if we are busy and request is 5034667Smh27603 * to lower the power level. We let this go through if the driver 5044667Smh27603 * is in special direct pm mode. On x86, we also let this through 505*7319SMark.Haywood@Sun.COM * if the change is due to a request to govern the max speed. 5064667Smh27603 */ 5074667Smh27603 if (!cpudrv_direct_pm && (cpupm->pm_busycnt >= 1) && 508*7319SMark.Haywood@Sun.COM !cpudrv_pm_is_governor_thread(cpupm)) { 5094667Smh27603 if ((cpupm->cur_spd != NULL) && 5104667Smh27603 (level < cpupm->cur_spd->pm_level)) { 5114667Smh27603 mutex_exit(&cpudsp->lock); 5124667Smh27603 return (DDI_FAILURE); 5134667Smh27603 } 5144667Smh27603 } 5154667Smh27603 5164667Smh27603 for (new_spd = cpupm->head_spd; new_spd; new_spd = new_spd->down_spd) { 5174667Smh27603 if (new_spd->pm_level == level) 5184667Smh27603 break; 5194667Smh27603 } 5204667Smh27603 if (!new_spd) { 521*7319SMark.Haywood@Sun.COM CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm); 5224667Smh27603 mutex_exit(&cpudsp->lock); 5234667Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: " 5244667Smh27603 "can't locate new CPU speed", instance); 5254667Smh27603 return (DDI_FAILURE); 5264667Smh27603 } 5274667Smh27603 5284667Smh27603 /* 5294667Smh27603 * We currently refuse to power manage if the CPU is not ready to 5304667Smh27603 * take cross calls (cross calls fail silently if CPU is not ready 5314667Smh27603 * for it). 5324667Smh27603 * 5334667Smh27603 * Additionally, for x86 platforms we cannot power manage 5344667Smh27603 * any one instance, until all instances have been initialized. 5354667Smh27603 * That's because we don't know what the CPU domains look like 5364667Smh27603 * until all instances have been initialized. 5374667Smh27603 */ 5384667Smh27603 is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id); 5394667Smh27603 if (!is_ready) { 5404667Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 5414667Smh27603 "CPU not ready for x-calls\n", instance)); 542*7319SMark.Haywood@Sun.COM } else if (!(is_ready = cpudrv_pm_power_ready())) { 5434667Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 544*7319SMark.Haywood@Sun.COM "waiting for all CPUs to be power manageable\n", instance)); 5454667Smh27603 } 5464667Smh27603 if (!is_ready) { 547*7319SMark.Haywood@Sun.COM CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm); 5484667Smh27603 mutex_exit(&cpudsp->lock); 5494667Smh27603 return (DDI_FAILURE); 5504667Smh27603 } 5514667Smh27603 5524667Smh27603 /* 5534667Smh27603 * Execute CPU specific routine on the requested CPU to change its 5544667Smh27603 * speed to normal-speed/divisor. 5554667Smh27603 */ 5564667Smh27603 if ((ret = cpudrv_pm_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) { 5574667Smh27603 cmn_err(CE_WARN, "cpudrv_power: cpudrv_pm_change_speed() " 5584667Smh27603 "return = %d", ret); 5594667Smh27603 mutex_exit(&cpudsp->lock); 5604667Smh27603 return (DDI_FAILURE); 5614667Smh27603 } 5624667Smh27603 5634667Smh27603 /* 5645864Sesaxe * DTrace probe point for CPU speed change transition 5655864Sesaxe */ 5665864Sesaxe DTRACE_PROBE3(cpu__change__speed, cpudrv_devstate_t *, cpudsp, 5675864Sesaxe cpudrv_pm_t *, cpupm, cpudrv_pm_spd_t *, new_spd); 5685864Sesaxe 5695864Sesaxe /* 5704667Smh27603 * Reset idle threshold time for the new power level. 5714667Smh27603 */ 5724667Smh27603 if ((cpupm->cur_spd != NULL) && (level < cpupm->cur_spd->pm_level)) { 5734667Smh27603 if (pm_idle_component(dip, CPUDRV_PM_COMP_NUM) == 5744667Smh27603 DDI_SUCCESS) { 5754667Smh27603 if (cpupm->pm_busycnt >= 1) 5764667Smh27603 cpupm->pm_busycnt--; 5774667Smh27603 } else 5784667Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: can't " 5794667Smh27603 "idle CPU component", ddi_get_instance(dip)); 5804667Smh27603 } 5814667Smh27603 /* 5824667Smh27603 * Reset various parameters because we are now running at new speed. 5834667Smh27603 */ 5844667Smh27603 cpupm->lastquan_mstate[CMS_IDLE] = 0; 5854667Smh27603 cpupm->lastquan_mstate[CMS_SYSTEM] = 0; 5864667Smh27603 cpupm->lastquan_mstate[CMS_USER] = 0; 5874667Smh27603 cpupm->lastquan_lbolt = 0; 5884667Smh27603 cpupm->cur_spd = new_spd; 589*7319SMark.Haywood@Sun.COM CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm); 5904667Smh27603 mutex_exit(&cpudsp->lock); 5914667Smh27603 5924667Smh27603 return (DDI_SUCCESS); 5934667Smh27603 } 5944667Smh27603 5954667Smh27603 /* 5964667Smh27603 * Initialize the field that will be used for reporting 5974667Smh27603 * the supported_frequencies_Hz cpu_info kstat. 5984667Smh27603 */ 5994667Smh27603 static void 6004667Smh27603 set_supp_freqs(cpu_t *cp, cpudrv_pm_t *cpupm) 6014667Smh27603 { 6024667Smh27603 char *supp_freqs; 6034667Smh27603 char *sfptr; 6044667Smh27603 uint64_t *speeds; 6054667Smh27603 cpudrv_pm_spd_t *spd; 6064667Smh27603 int i; 6074667Smh27603 #define UINT64_MAX_STRING (sizeof ("18446744073709551615")) 6084667Smh27603 6094667Smh27603 speeds = kmem_zalloc(cpupm->num_spd * sizeof (uint64_t), KM_SLEEP); 6104667Smh27603 for (i = cpupm->num_spd - 1, spd = cpupm->head_spd; spd; 6114667Smh27603 i--, spd = spd->down_spd) { 6124667Smh27603 speeds[i] = 6134667Smh27603 CPUDRV_PM_SPEED_HZ(cp->cpu_type_info.pi_clock, spd->speed); 6144667Smh27603 } 6154667Smh27603 6164667Smh27603 supp_freqs = kmem_zalloc((UINT64_MAX_STRING * cpupm->num_spd), 6174667Smh27603 KM_SLEEP); 6184667Smh27603 sfptr = supp_freqs; 6194667Smh27603 for (i = 0; i < cpupm->num_spd; i++) { 6204667Smh27603 if (i == cpupm->num_spd - 1) { 6214667Smh27603 (void) sprintf(sfptr, "%"PRIu64, speeds[i]); 6224667Smh27603 } else { 6234667Smh27603 (void) sprintf(sfptr, "%"PRIu64":", speeds[i]); 6244667Smh27603 sfptr = supp_freqs + strlen(supp_freqs); 6254667Smh27603 } 6264667Smh27603 } 6274877Smh27603 cpu_set_supp_freqs(cp, supp_freqs); 6284877Smh27603 kmem_free(supp_freqs, (UINT64_MAX_STRING * cpupm->num_spd)); 6294667Smh27603 kmem_free(speeds, cpupm->num_spd * sizeof (uint64_t)); 6304667Smh27603 } 6314667Smh27603 6324667Smh27603 /* 6334667Smh27603 * Initialize power management data. 6344667Smh27603 */ 6354667Smh27603 static int 636*7319SMark.Haywood@Sun.COM cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp) 6374667Smh27603 { 6384667Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 6394667Smh27603 cpudrv_pm_spd_t *cur_spd; 6404667Smh27603 cpudrv_pm_spd_t *prev_spd = NULL; 6414667Smh27603 int *speeds; 6424667Smh27603 uint_t nspeeds; 6434667Smh27603 int idle_cnt_percent; 6444667Smh27603 int user_cnt_percent; 6454667Smh27603 int i; 6464667Smh27603 6474667Smh27603 CPUDRV_PM_GET_SPEEDS(cpudsp, speeds, nspeeds); 6484667Smh27603 if (nspeeds < 2) { 6494667Smh27603 /* Need at least two speeds to power manage */ 6504667Smh27603 CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds); 6514667Smh27603 return (DDI_FAILURE); 6524667Smh27603 } 6534667Smh27603 cpupm->num_spd = nspeeds; 6544667Smh27603 6554667Smh27603 /* 6564667Smh27603 * Calculate the watermarks and other parameters based on the 6574667Smh27603 * supplied speeds. 6584667Smh27603 * 6594667Smh27603 * One of the basic assumption is that for X amount of CPU work, 6604667Smh27603 * if CPU is slowed down by a factor of N, the time it takes to 6614667Smh27603 * do the same work will be N * X. 6624667Smh27603 * 6634667Smh27603 * The driver declares that a CPU is idle and ready for slowed down, 6644667Smh27603 * if amount of idle thread is more than the current speed idle_hwm 6654667Smh27603 * without dropping below idle_hwm a number of consecutive sampling 6664667Smh27603 * intervals and number of running threads in user mode are below 6674667Smh27603 * user_lwm. We want to set the current user_lwm such that if we 6684667Smh27603 * just switched to the next slower speed with no change in real work 6694667Smh27603 * load, the amount of user threads at the slower speed will be such 6704667Smh27603 * that it falls below the slower speed's user_hwm. If we didn't do 6714667Smh27603 * that then we will just come back to the higher speed as soon as we 6724667Smh27603 * go down even with no change in work load. 6734667Smh27603 * The user_hwm is a fixed precentage and not calculated dynamically. 6744667Smh27603 * 6754667Smh27603 * We bring the CPU up if idle thread at current speed is less than 6764667Smh27603 * the current speed idle_lwm for a number of consecutive sampling 6774667Smh27603 * intervals or user threads are above the user_hwm for the current 6784667Smh27603 * speed. 6794667Smh27603 */ 6804667Smh27603 for (i = 0; i < nspeeds; i++) { 6814667Smh27603 cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP); 6824667Smh27603 cur_spd->speed = speeds[i]; 6834667Smh27603 if (i == 0) { /* normal speed */ 6844667Smh27603 cpupm->head_spd = cur_spd; 6854667Smh27603 cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_NORMAL; 6864667Smh27603 cur_spd->idle_hwm = 6874667Smh27603 (cpudrv_pm_idle_hwm * cur_spd->quant_cnt) / 100; 6884667Smh27603 /* can't speed anymore */ 6894667Smh27603 cur_spd->idle_lwm = 0; 6904667Smh27603 cur_spd->user_hwm = UINT_MAX; 6914667Smh27603 } else { 6924667Smh27603 cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_OTHR; 6934667Smh27603 ASSERT(prev_spd != NULL); 6944667Smh27603 prev_spd->down_spd = cur_spd; 6954667Smh27603 cur_spd->up_spd = cpupm->head_spd; 6964667Smh27603 6974667Smh27603 /* 6984667Smh27603 * Let's assume CPU is considered idle at full speed 6994667Smh27603 * when it is spending I% of time in running the idle 7004667Smh27603 * thread. At full speed, CPU will be busy (100 - I) % 7014667Smh27603 * of times. This % of busyness increases by factor of 7024667Smh27603 * N as CPU slows down. CPU that is idle I% of times 7034667Smh27603 * in full speed, it is idle (100 - ((100 - I) * N)) % 7044667Smh27603 * of times in N speed. The idle_lwm is a fixed 7054667Smh27603 * percentage. A large value of N may result in 7064667Smh27603 * idle_hwm to go below idle_lwm. We need to make sure 7074667Smh27603 * that there is at least a buffer zone seperation 7084667Smh27603 * between the idle_lwm and idle_hwm values. 7094667Smh27603 */ 7104667Smh27603 idle_cnt_percent = CPUDRV_PM_IDLE_CNT_PERCENT( 7114667Smh27603 cpudrv_pm_idle_hwm, speeds, i); 7124667Smh27603 idle_cnt_percent = max(idle_cnt_percent, 7134667Smh27603 (cpudrv_pm_idle_lwm + cpudrv_pm_idle_buf_zone)); 7144667Smh27603 cur_spd->idle_hwm = 7154667Smh27603 (idle_cnt_percent * cur_spd->quant_cnt) / 100; 7164667Smh27603 cur_spd->idle_lwm = 7174667Smh27603 (cpudrv_pm_idle_lwm * cur_spd->quant_cnt) / 100; 7184667Smh27603 7194667Smh27603 /* 7204667Smh27603 * The lwm for user threads are determined such that 7214667Smh27603 * if CPU slows down, the load of work in the 7224667Smh27603 * new speed would still keep the CPU at or below the 7234667Smh27603 * user_hwm in the new speed. This is to prevent 7244667Smh27603 * the quick jump back up to higher speed. 7254667Smh27603 */ 7264667Smh27603 cur_spd->user_hwm = (cpudrv_pm_user_hwm * 7274667Smh27603 cur_spd->quant_cnt) / 100; 7284667Smh27603 user_cnt_percent = CPUDRV_PM_USER_CNT_PERCENT( 7294667Smh27603 cpudrv_pm_user_hwm, speeds, i); 7304667Smh27603 prev_spd->user_lwm = 7314667Smh27603 (user_cnt_percent * prev_spd->quant_cnt) / 100; 7324667Smh27603 } 7334667Smh27603 prev_spd = cur_spd; 7344667Smh27603 } 7354667Smh27603 /* Slowest speed. Can't slow down anymore */ 7364667Smh27603 cur_spd->idle_hwm = UINT_MAX; 7374667Smh27603 cur_spd->user_lwm = -1; 7384667Smh27603 #ifdef DEBUG 7394667Smh27603 DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: head_spd spd %d, " 7404667Smh27603 "num_spd %d\n", ddi_get_instance(cpudsp->dip), 7414667Smh27603 cpupm->head_spd->speed, cpupm->num_spd)); 7424667Smh27603 for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) { 7434667Smh27603 DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: speed %d, " 7444667Smh27603 "down_spd spd %d, idle_hwm %d, user_lwm %d, " 7454667Smh27603 "up_spd spd %d, idle_lwm %d, user_hwm %d, " 7464667Smh27603 "quant_cnt %d\n", ddi_get_instance(cpudsp->dip), 7474667Smh27603 cur_spd->speed, 7484667Smh27603 (cur_spd->down_spd ? cur_spd->down_spd->speed : 0), 7494667Smh27603 cur_spd->idle_hwm, cur_spd->user_lwm, 7504667Smh27603 (cur_spd->up_spd ? cur_spd->up_spd->speed : 0), 7514667Smh27603 cur_spd->idle_lwm, cur_spd->user_hwm, 7524667Smh27603 cur_spd->quant_cnt)); 7534667Smh27603 } 7544667Smh27603 #endif /* DEBUG */ 7554667Smh27603 CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds); 7564667Smh27603 return (DDI_SUCCESS); 7574667Smh27603 } 7584667Smh27603 7594667Smh27603 /* 7604667Smh27603 * Free CPU power management data. 7614667Smh27603 */ 7624667Smh27603 static void 7634667Smh27603 cpudrv_pm_free(cpudrv_devstate_t *cpudsp) 7644667Smh27603 { 7654667Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 7664667Smh27603 cpudrv_pm_spd_t *cur_spd, *next_spd; 7674667Smh27603 7684667Smh27603 cur_spd = cpupm->head_spd; 7694667Smh27603 while (cur_spd) { 7704667Smh27603 next_spd = cur_spd->down_spd; 7714667Smh27603 kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t)); 7724667Smh27603 cur_spd = next_spd; 7734667Smh27603 } 7744667Smh27603 bzero(cpupm, sizeof (cpudrv_pm_t)); 775*7319SMark.Haywood@Sun.COM cpudrv_mach_pm_free(cpudsp); 7764667Smh27603 } 7774667Smh27603 7784667Smh27603 /* 7794667Smh27603 * Create pm-components property. 7804667Smh27603 */ 7814667Smh27603 static int 7824667Smh27603 cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp) 7834667Smh27603 { 7844667Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 7854667Smh27603 cpudrv_pm_spd_t *cur_spd; 7864667Smh27603 char **pmc; 7874667Smh27603 int size; 7884667Smh27603 char name[] = "NAME=CPU Speed"; 7894667Smh27603 int i, j; 7904667Smh27603 uint_t comp_spd; 7914667Smh27603 int result = DDI_FAILURE; 7924667Smh27603 7934667Smh27603 pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP); 7944667Smh27603 size = CPUDRV_PM_COMP_SIZE(); 7954667Smh27603 if (cpupm->num_spd > CPUDRV_PM_COMP_MAX_VAL) { 7964667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: " 7974667Smh27603 "number of speeds exceeded limits", 7984667Smh27603 ddi_get_instance(cpudsp->dip)); 7994667Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 8004667Smh27603 return (result); 8014667Smh27603 } 8024667Smh27603 8034667Smh27603 for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0; 8044667Smh27603 i--, cur_spd = cur_spd->down_spd) { 8054667Smh27603 cur_spd->pm_level = i; 8064667Smh27603 pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP); 8074667Smh27603 comp_spd = CPUDRV_PM_COMP_SPEED(cpupm, cur_spd); 8084667Smh27603 if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) { 8094667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_comp_create: " 8104667Smh27603 "instance %d: speed exceeded limits", 8114667Smh27603 ddi_get_instance(cpudsp->dip)); 8124667Smh27603 for (j = cpupm->num_spd; j >= i; j--) { 8134667Smh27603 kmem_free(pmc[j], size * sizeof (char)); 8144667Smh27603 } 8154667Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * 8164667Smh27603 sizeof (char *)); 8174667Smh27603 return (result); 8184667Smh27603 } 8194667Smh27603 CPUDRV_PM_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd) 8204667Smh27603 DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: " 8214667Smh27603 "instance %d: pm-components power level %d string '%s'\n", 8224667Smh27603 ddi_get_instance(cpudsp->dip), i, pmc[i])); 8234667Smh27603 } 8244667Smh27603 pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP); 8254667Smh27603 (void) strcat(pmc[0], name); 8264667Smh27603 DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: instance %d: " 8274667Smh27603 "pm-components component name '%s'\n", 8284667Smh27603 ddi_get_instance(cpudsp->dip), pmc[0])); 8294667Smh27603 8304667Smh27603 if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip, 8314667Smh27603 "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) { 8324667Smh27603 result = DDI_SUCCESS; 8334667Smh27603 } else { 8344667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: " 8354667Smh27603 "can't create pm-components property", 8364667Smh27603 ddi_get_instance(cpudsp->dip)); 8374667Smh27603 } 8384667Smh27603 8394667Smh27603 for (i = cpupm->num_spd; i > 0; i--) { 8404667Smh27603 kmem_free(pmc[i], size * sizeof (char)); 8414667Smh27603 } 8424667Smh27603 kmem_free(pmc[0], sizeof (name)); 8434667Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 8444667Smh27603 return (result); 8454667Smh27603 } 8464667Smh27603 8474667Smh27603 /* 8484667Smh27603 * Mark a component idle. 8494667Smh27603 */ 8504667Smh27603 #define CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm) { \ 8514667Smh27603 if ((cpupm)->pm_busycnt >= 1) { \ 8524667Smh27603 if (pm_idle_component((dip), CPUDRV_PM_COMP_NUM) == \ 8534667Smh27603 DDI_SUCCESS) { \ 8544667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \ 8554667Smh27603 "instance %d: pm_idle_component called\n", \ 8564667Smh27603 ddi_get_instance((dip)))); \ 8574667Smh27603 (cpupm)->pm_busycnt--; \ 8584667Smh27603 } else { \ 8594667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \ 8604667Smh27603 "can't idle CPU component", \ 8614667Smh27603 ddi_get_instance((dip))); \ 8624667Smh27603 } \ 8634667Smh27603 } \ 8644667Smh27603 } 8654667Smh27603 8664667Smh27603 /* 8674667Smh27603 * Marks a component busy in both PM framework and driver state structure. 8684667Smh27603 */ 8694667Smh27603 #define CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm) { \ 8704667Smh27603 if ((cpupm)->pm_busycnt < 1) { \ 8714667Smh27603 if (pm_busy_component((dip), CPUDRV_PM_COMP_NUM) == \ 8724667Smh27603 DDI_SUCCESS) { \ 8734667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \ 8744667Smh27603 "instance %d: pm_busy_component called\n", \ 8754667Smh27603 ddi_get_instance((dip)))); \ 8764667Smh27603 (cpupm)->pm_busycnt++; \ 8774667Smh27603 } else { \ 8784667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \ 8794667Smh27603 "can't busy CPU component", \ 8804667Smh27603 ddi_get_instance((dip))); \ 8814667Smh27603 } \ 8824667Smh27603 } \ 8834667Smh27603 } 8844667Smh27603 8854667Smh27603 /* 8864667Smh27603 * Marks a component busy and calls pm_raise_power(). 8874667Smh27603 */ 8884667Smh27603 #define CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \ 8894667Smh27603 /* \ 8904667Smh27603 * Mark driver and PM framework busy first so framework doesn't try \ 8914667Smh27603 * to bring CPU to lower speed when we need to be at higher speed. \ 8924667Smh27603 */ \ 8934667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \ 8944667Smh27603 mutex_exit(&(cpudsp)->lock); \ 8954667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " \ 8964667Smh27603 "pm_raise_power called to %d\n", ddi_get_instance((dip)), \ 8974667Smh27603 (new_level))); \ 8984667Smh27603 if (pm_raise_power((dip), CPUDRV_PM_COMP_NUM, (new_level)) != \ 8994667Smh27603 DDI_SUCCESS) { \ 9004667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't " \ 9014667Smh27603 "raise CPU power level", ddi_get_instance((dip))); \ 9024667Smh27603 } \ 9034667Smh27603 mutex_enter(&(cpudsp)->lock); \ 9044667Smh27603 } 9054667Smh27603 9064667Smh27603 /* 9074667Smh27603 * In order to monitor a CPU, we need to hold cpu_lock to access CPU 9084667Smh27603 * statistics. Holding cpu_lock is not allowed from a callout routine. 9094667Smh27603 * We dispatch a taskq to do that job. 9104667Smh27603 */ 9114667Smh27603 static void 9124667Smh27603 cpudrv_pm_monitor_disp(void *arg) 9134667Smh27603 { 9144667Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 9154667Smh27603 9164667Smh27603 /* 9174667Smh27603 * We are here because the last task has scheduled a timeout. 9184667Smh27603 * The queue should be empty at this time. 9194667Smh27603 */ 9204667Smh27603 mutex_enter(&cpudsp->cpudrv_pm.timeout_lock); 9214667Smh27603 if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_pm_monitor, arg, 9224667Smh27603 TQ_NOSLEEP)) { 9234667Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 9244667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor_disp: failed to " 9254667Smh27603 "dispatch the cpudrv_pm_monitor taskq\n")); 9264667Smh27603 mutex_enter(&cpudsp->lock); 9274667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 9284667Smh27603 mutex_exit(&cpudsp->lock); 9294667Smh27603 return; 9304667Smh27603 } 9314667Smh27603 cpudsp->cpudrv_pm.timeout_count++; 9324667Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 9334667Smh27603 } 9344667Smh27603 9354667Smh27603 /* 9364667Smh27603 * Monitors each CPU for the amount of time idle thread was running in the 9374667Smh27603 * last quantum and arranges for the CPU to go to the lower or higher speed. 9384667Smh27603 * Called at the time interval appropriate for the current speed. The 9394667Smh27603 * time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time 9404667Smh27603 * interval for other speeds (including unknown speed) is 9414667Smh27603 * CPUDRV_PM_QUANT_CNT_OTHR. 9424667Smh27603 */ 9434667Smh27603 static void 9444667Smh27603 cpudrv_pm_monitor(void *arg) 9454667Smh27603 { 9464667Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 9474667Smh27603 cpudrv_pm_t *cpupm; 9484667Smh27603 cpudrv_pm_spd_t *cur_spd, *new_spd; 9494667Smh27603 cpu_t *cp; 9504667Smh27603 dev_info_t *dip; 9514667Smh27603 uint_t idle_cnt, user_cnt, system_cnt; 9524667Smh27603 clock_t lbolt_cnt; 9534667Smh27603 hrtime_t msnsecs[NCMSTATES]; 9544667Smh27603 boolean_t is_ready; 9554667Smh27603 9564667Smh27603 #define GET_CPU_MSTATE_CNT(state, cnt) \ 9574667Smh27603 msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \ 9584667Smh27603 if (cpupm->lastquan_mstate[state] > msnsecs[state]) \ 9594667Smh27603 msnsecs[state] = cpupm->lastquan_mstate[state]; \ 9604667Smh27603 cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \ 9614667Smh27603 cpupm->lastquan_mstate[state] = msnsecs[state] 9624667Smh27603 9634667Smh27603 mutex_enter(&cpudsp->lock); 9644667Smh27603 cpupm = &(cpudsp->cpudrv_pm); 9654667Smh27603 if (cpupm->timeout_id == 0) { 9664667Smh27603 mutex_exit(&cpudsp->lock); 9674667Smh27603 goto do_return; 9684667Smh27603 } 9694667Smh27603 cur_spd = cpupm->cur_spd; 9704667Smh27603 dip = cpudsp->dip; 9714667Smh27603 9724667Smh27603 /* 9734667Smh27603 * We assume that a CPU is initialized and has a valid cpu_t 9744667Smh27603 * structure, if it is ready for cross calls. If this changes, 9754667Smh27603 * additional checks might be needed. 9764667Smh27603 * 9774667Smh27603 * Additionally, for x86 platforms we cannot power manage 9784667Smh27603 * any one instance, until all instances have been initialized. 9794667Smh27603 * That's because we don't know what the CPU domains look like 9804667Smh27603 * until all instances have been initialized. 9814667Smh27603 */ 9824667Smh27603 is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id); 9834667Smh27603 if (!is_ready) { 9844667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 9854667Smh27603 "CPU not ready for x-calls\n", ddi_get_instance(dip))); 986*7319SMark.Haywood@Sun.COM } else if (!(is_ready = cpudrv_pm_power_ready())) { 9874667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 988*7319SMark.Haywood@Sun.COM "waiting for all CPUs to be power manageable\n", 9894667Smh27603 ddi_get_instance(dip))); 9904667Smh27603 } 9914667Smh27603 if (!is_ready) { 9924667Smh27603 /* 9934667Smh27603 * Make sure that we are busy so that framework doesn't 9944667Smh27603 * try to bring us down in this situation. 9954667Smh27603 */ 9964667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 9974667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 9984667Smh27603 mutex_exit(&cpudsp->lock); 9994667Smh27603 goto do_return; 10004667Smh27603 } 10014667Smh27603 10024667Smh27603 /* 10034667Smh27603 * Make sure that we are still not at unknown power level. 10044667Smh27603 */ 10054667Smh27603 if (cur_spd == NULL) { 10064667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 10074667Smh27603 "cur_spd is unknown\n", ddi_get_instance(dip))); 10084667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 10094667Smh27603 cpupm->targ_spd->pm_level); 10104667Smh27603 /* 10114667Smh27603 * We just changed the speed. Wait till at least next 10124667Smh27603 * call to this routine before proceeding ahead. 10134667Smh27603 */ 10144667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 10154667Smh27603 mutex_exit(&cpudsp->lock); 10164667Smh27603 goto do_return; 10174667Smh27603 } 10184667Smh27603 10194667Smh27603 mutex_enter(&cpu_lock); 10204667Smh27603 if ((cp = cpu_get(cpudsp->cpu_id)) == NULL) { 10214667Smh27603 mutex_exit(&cpu_lock); 10224667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 10234667Smh27603 mutex_exit(&cpudsp->lock); 10244667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't get " 10254667Smh27603 "cpu_t", ddi_get_instance(dip)); 10264667Smh27603 goto do_return; 10274667Smh27603 } 10284877Smh27603 10294877Smh27603 if (!cpupm->pm_started) { 10304877Smh27603 cpupm->pm_started = B_TRUE; 10314667Smh27603 set_supp_freqs(cp, cpupm); 10324877Smh27603 } 10334667Smh27603 10345611Smh27603 get_cpu_mstate(cp, msnsecs); 10354667Smh27603 GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt); 10364667Smh27603 GET_CPU_MSTATE_CNT(CMS_USER, user_cnt); 10374667Smh27603 GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt); 10384667Smh27603 10394667Smh27603 /* 10404667Smh27603 * We can't do anything when we have just switched to a state 10414667Smh27603 * because there is no valid timestamp. 10424667Smh27603 */ 10434667Smh27603 if (cpupm->lastquan_lbolt == 0) { 10444667Smh27603 cpupm->lastquan_lbolt = lbolt; 10454667Smh27603 mutex_exit(&cpu_lock); 10464667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 10474667Smh27603 mutex_exit(&cpudsp->lock); 10484667Smh27603 goto do_return; 10494667Smh27603 } 10504667Smh27603 10514667Smh27603 /* 10524667Smh27603 * Various watermarks are based on this routine being called back 10534667Smh27603 * exactly at the requested period. This is not guaranteed 10544667Smh27603 * because this routine is called from a taskq that is dispatched 10554667Smh27603 * from a timeout routine. Handle this by finding out how many 10564667Smh27603 * ticks have elapsed since the last call (lbolt_cnt) and adjusting 10574667Smh27603 * the idle_cnt based on the delay added to the requested period 10584667Smh27603 * by timeout and taskq. 10594667Smh27603 */ 10604667Smh27603 lbolt_cnt = lbolt - cpupm->lastquan_lbolt; 10614667Smh27603 cpupm->lastquan_lbolt = lbolt; 10624667Smh27603 mutex_exit(&cpu_lock); 10634667Smh27603 /* 10644667Smh27603 * Time taken between recording the current counts and 10654667Smh27603 * arranging the next call of this routine is an error in our 10664667Smh27603 * calculation. We minimize the error by calling 10674667Smh27603 * CPUDRV_PM_MONITOR_INIT() here instead of end of this routine. 10684667Smh27603 */ 10694667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 10704667Smh27603 DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_pm_monitor: instance %d: " 10714667Smh27603 "idle count %d, user count %d, system count %d, pm_level %d, " 10724667Smh27603 "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt, 10734667Smh27603 system_cnt, cur_spd->pm_level, cpupm->pm_busycnt)); 10744667Smh27603 10754667Smh27603 #ifdef DEBUG 10764667Smh27603 /* 10774667Smh27603 * Notify that timeout and taskq has caused delays and we need to 10784667Smh27603 * scale our parameters accordingly. 10794667Smh27603 * 10804667Smh27603 * To get accurate result, don't turn on other DPRINTFs with 10814667Smh27603 * the following DPRINTF. PROM calls generated by other 10824667Smh27603 * DPRINTFs changes the timing. 10834667Smh27603 */ 10844667Smh27603 if (lbolt_cnt > cur_spd->quant_cnt) { 10854667Smh27603 DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_pm_monitor: instance %d: " 10864667Smh27603 "lbolt count %ld > quantum_count %u\n", 10874667Smh27603 ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt)); 10884667Smh27603 } 10894667Smh27603 #endif /* DEBUG */ 10904667Smh27603 10914667Smh27603 /* 10924667Smh27603 * Adjust counts based on the delay added by timeout and taskq. 10934667Smh27603 */ 10944667Smh27603 idle_cnt = (idle_cnt * cur_spd->quant_cnt) / lbolt_cnt; 10954667Smh27603 user_cnt = (user_cnt * cur_spd->quant_cnt) / lbolt_cnt; 10964667Smh27603 if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm && 10974667Smh27603 cur_spd->idle_blwm_cnt >= cpudrv_pm_idle_blwm_cnt_max)) { 10984667Smh27603 cur_spd->idle_blwm_cnt = 0; 10994667Smh27603 cur_spd->idle_bhwm_cnt = 0; 11004667Smh27603 /* 11014667Smh27603 * In normal situation, arrange to go to next higher speed. 11024667Smh27603 * If we are running in special direct pm mode, we just stay 11034667Smh27603 * at the current speed. 11044667Smh27603 */ 11054667Smh27603 if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) { 11064667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 11074667Smh27603 } else { 11084667Smh27603 new_spd = cur_spd->up_spd; 11094667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 11104667Smh27603 new_spd->pm_level); 11114667Smh27603 } 11124667Smh27603 } else if ((user_cnt <= cur_spd->user_lwm) && 11134667Smh27603 (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cp)) { 11144667Smh27603 cur_spd->idle_blwm_cnt = 0; 11154667Smh27603 cur_spd->idle_bhwm_cnt = 0; 11164667Smh27603 /* 11174667Smh27603 * Arrange to go to next lower speed by informing our idle 11184667Smh27603 * status to the power management framework. 11194667Smh27603 */ 11204667Smh27603 CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm); 11214667Smh27603 } else { 11224667Smh27603 /* 11234667Smh27603 * If we are between the idle water marks and have not 11244667Smh27603 * been here enough consecutive times to be considered 11254667Smh27603 * busy, just increment the count and return. 11264667Smh27603 */ 11274667Smh27603 if ((idle_cnt < cur_spd->idle_hwm) && 11284667Smh27603 (idle_cnt >= cur_spd->idle_lwm) && 11294667Smh27603 (cur_spd->idle_bhwm_cnt < cpudrv_pm_idle_bhwm_cnt_max)) { 11304667Smh27603 cur_spd->idle_blwm_cnt = 0; 11314667Smh27603 cur_spd->idle_bhwm_cnt++; 11324667Smh27603 mutex_exit(&cpudsp->lock); 11334667Smh27603 goto do_return; 11344667Smh27603 } 11354667Smh27603 if (idle_cnt < cur_spd->idle_lwm) { 11364667Smh27603 cur_spd->idle_blwm_cnt++; 11374667Smh27603 cur_spd->idle_bhwm_cnt = 0; 11384667Smh27603 } 11394667Smh27603 /* 11404667Smh27603 * Arranges to stay at the current speed. 11414667Smh27603 */ 11424667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 11434667Smh27603 } 11444667Smh27603 mutex_exit(&cpudsp->lock); 11454667Smh27603 do_return: 11464667Smh27603 mutex_enter(&cpupm->timeout_lock); 11474667Smh27603 ASSERT(cpupm->timeout_count > 0); 11484667Smh27603 cpupm->timeout_count--; 11494667Smh27603 cv_signal(&cpupm->timeout_cv); 11504667Smh27603 mutex_exit(&cpupm->timeout_lock); 11514667Smh27603 } 1152