1*4667Smh27603 /* 2*4667Smh27603 * CDDL HEADER START 3*4667Smh27603 * 4*4667Smh27603 * The contents of this file are subject to the terms of the 5*4667Smh27603 * Common Development and Distribution License (the "License"). 6*4667Smh27603 * You may not use this file except in compliance with the License. 7*4667Smh27603 * 8*4667Smh27603 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*4667Smh27603 * or http://www.opensolaris.org/os/licensing. 10*4667Smh27603 * See the License for the specific language governing permissions 11*4667Smh27603 * and limitations under the License. 12*4667Smh27603 * 13*4667Smh27603 * When distributing Covered Code, include this CDDL HEADER in each 14*4667Smh27603 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*4667Smh27603 * If applicable, add the following below this CDDL HEADER, with the 16*4667Smh27603 * fields enclosed by brackets "[]" replaced with your own identifying 17*4667Smh27603 * information: Portions Copyright [yyyy] [name of copyright owner] 18*4667Smh27603 * 19*4667Smh27603 * CDDL HEADER END 20*4667Smh27603 */ 21*4667Smh27603 /* 22*4667Smh27603 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23*4667Smh27603 * Use is subject to license terms. 24*4667Smh27603 */ 25*4667Smh27603 26*4667Smh27603 #pragma ident "%Z%%M% %I% %E% SMI" 27*4667Smh27603 28*4667Smh27603 /* 29*4667Smh27603 * CPU Device driver. The driver is not DDI-compliant. 30*4667Smh27603 * 31*4667Smh27603 * The driver supports following features: 32*4667Smh27603 * - Power management. 33*4667Smh27603 */ 34*4667Smh27603 35*4667Smh27603 #include <sys/types.h> 36*4667Smh27603 #include <sys/param.h> 37*4667Smh27603 #include <sys/errno.h> 38*4667Smh27603 #include <sys/modctl.h> 39*4667Smh27603 #include <sys/kmem.h> 40*4667Smh27603 #include <sys/conf.h> 41*4667Smh27603 #include <sys/cmn_err.h> 42*4667Smh27603 #include <sys/stat.h> 43*4667Smh27603 #include <sys/debug.h> 44*4667Smh27603 #include <sys/systm.h> 45*4667Smh27603 #include <sys/ddi.h> 46*4667Smh27603 #include <sys/sunddi.h> 47*4667Smh27603 48*4667Smh27603 #include <sys/machsystm.h> 49*4667Smh27603 #include <sys/x_call.h> 50*4667Smh27603 #include <sys/cpudrv.h> 51*4667Smh27603 #include <sys/cpudrv_plat.h> 52*4667Smh27603 #include <sys/msacct.h> 53*4667Smh27603 54*4667Smh27603 /* 55*4667Smh27603 * CPU power management 56*4667Smh27603 * 57*4667Smh27603 * The supported power saving model is to slow down the CPU (on SPARC by 58*4667Smh27603 * dividing the CPU clock and on x86 by dropping down a P-state). 59*4667Smh27603 * Periodically we determine the amount of time the CPU is running 60*4667Smh27603 * idle thread and threads in user mode during the last quantum. If the idle 61*4667Smh27603 * thread was running less than its low water mark for current speed for 62*4667Smh27603 * number of consecutive sampling periods, or number of running threads in 63*4667Smh27603 * user mode are above its high water mark, we arrange to go to the higher 64*4667Smh27603 * speed. If the idle thread was running more than its high water mark without 65*4667Smh27603 * dropping a number of consecutive times below the mark, and number of threads 66*4667Smh27603 * running in user mode are below its low water mark, we arrange to go to the 67*4667Smh27603 * next lower speed. While going down, we go through all the speeds. While 68*4667Smh27603 * going up we go to the maximum speed to minimize impact on the user, but have 69*4667Smh27603 * provisions in the driver to go to other speeds. 70*4667Smh27603 * 71*4667Smh27603 * The driver does not have knowledge of a particular implementation of this 72*4667Smh27603 * scheme and will work with all CPUs supporting this model. On SPARC, the 73*4667Smh27603 * driver determines supported speeds by looking at 'clock-divisors' property 74*4667Smh27603 * created by OBP. On x86, the driver retrieves the supported speeds from 75*4667Smh27603 * ACPI. 76*4667Smh27603 */ 77*4667Smh27603 78*4667Smh27603 /* 79*4667Smh27603 * Configuration function prototypes and data structures 80*4667Smh27603 */ 81*4667Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 82*4667Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 83*4667Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level); 84*4667Smh27603 85*4667Smh27603 struct dev_ops cpudrv_ops = { 86*4667Smh27603 DEVO_REV, /* rev */ 87*4667Smh27603 0, /* refcnt */ 88*4667Smh27603 nodev, /* getinfo */ 89*4667Smh27603 nulldev, /* identify */ 90*4667Smh27603 nulldev, /* probe */ 91*4667Smh27603 cpudrv_attach, /* attach */ 92*4667Smh27603 cpudrv_detach, /* detach */ 93*4667Smh27603 nodev, /* reset */ 94*4667Smh27603 (struct cb_ops *)NULL, /* cb_ops */ 95*4667Smh27603 (struct bus_ops *)NULL, /* bus_ops */ 96*4667Smh27603 cpudrv_power /* power */ 97*4667Smh27603 }; 98*4667Smh27603 99*4667Smh27603 static struct modldrv modldrv = { 100*4667Smh27603 &mod_driverops, /* modops */ 101*4667Smh27603 "CPU Driver %I%", /* linkinfo */ 102*4667Smh27603 &cpudrv_ops, /* dev_ops */ 103*4667Smh27603 }; 104*4667Smh27603 105*4667Smh27603 static struct modlinkage modlinkage = { 106*4667Smh27603 MODREV_1, /* rev */ 107*4667Smh27603 &modldrv, /* linkage */ 108*4667Smh27603 NULL 109*4667Smh27603 }; 110*4667Smh27603 111*4667Smh27603 /* 112*4667Smh27603 * Function prototypes 113*4667Smh27603 */ 114*4667Smh27603 static int cpudrv_pm_init(cpudrv_devstate_t *cpudsp); 115*4667Smh27603 static void cpudrv_pm_free(cpudrv_devstate_t *cpudsp); 116*4667Smh27603 static int cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp); 117*4667Smh27603 static void cpudrv_pm_monitor_disp(void *arg); 118*4667Smh27603 static void cpudrv_pm_monitor(void *arg); 119*4667Smh27603 120*4667Smh27603 /* 121*4667Smh27603 * Driver global variables 122*4667Smh27603 */ 123*4667Smh27603 uint_t cpudrv_debug = 0; 124*4667Smh27603 void *cpudrv_state; 125*4667Smh27603 static uint_t cpudrv_pm_idle_hwm = CPUDRV_PM_IDLE_HWM; 126*4667Smh27603 static uint_t cpudrv_pm_idle_lwm = CPUDRV_PM_IDLE_LWM; 127*4667Smh27603 static uint_t cpudrv_pm_idle_buf_zone = CPUDRV_PM_IDLE_BUF_ZONE; 128*4667Smh27603 static uint_t cpudrv_pm_idle_bhwm_cnt_max = CPUDRV_PM_IDLE_BHWM_CNT_MAX; 129*4667Smh27603 static uint_t cpudrv_pm_idle_blwm_cnt_max = CPUDRV_PM_IDLE_BLWM_CNT_MAX; 130*4667Smh27603 static uint_t cpudrv_pm_user_hwm = CPUDRV_PM_USER_HWM; 131*4667Smh27603 132*4667Smh27603 /* 133*4667Smh27603 * cpudrv_direct_pm allows user applications to directly control the 134*4667Smh27603 * power state transitions (direct pm) without following the normal 135*4667Smh27603 * direct pm protocol. This is needed because the normal protocol 136*4667Smh27603 * requires that a device only be lowered when it is idle, and be 137*4667Smh27603 * brought up when it request to do so by calling pm_raise_power(). 138*4667Smh27603 * Ignoring this protocol is harmless for CPU (other than speed). 139*4667Smh27603 * Moreover it might be the case that CPU is never idle or wants 140*4667Smh27603 * to be at higher speed because of the addition CPU cycles required 141*4667Smh27603 * to run the user application. 142*4667Smh27603 * 143*4667Smh27603 * The driver will still report idle/busy status to the framework. Although 144*4667Smh27603 * framework will ignore this information for direct pm devices and not 145*4667Smh27603 * try to bring them down when idle, user applications can still use this 146*4667Smh27603 * information if they wants. 147*4667Smh27603 * 148*4667Smh27603 * In the future, provide an ioctl to control setting of this mode. In 149*4667Smh27603 * that case, this variable should move to the state structure and 150*4667Smh27603 * be protected by the lock in the state structure. 151*4667Smh27603 */ 152*4667Smh27603 int cpudrv_direct_pm = 0; 153*4667Smh27603 154*4667Smh27603 /* 155*4667Smh27603 * Arranges for the handler function to be called at the interval suitable 156*4667Smh27603 * for current speed. 157*4667Smh27603 */ 158*4667Smh27603 #define CPUDRV_PM_MONITOR_INIT(cpudsp) { \ 159*4667Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 160*4667Smh27603 (cpudsp)->cpudrv_pm.timeout_id = timeout(cpudrv_pm_monitor_disp, \ 161*4667Smh27603 (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \ 162*4667Smh27603 CPUDRV_PM_QUANT_CNT_OTHR : \ 163*4667Smh27603 (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \ 164*4667Smh27603 } 165*4667Smh27603 166*4667Smh27603 /* 167*4667Smh27603 * Arranges for the handler function not to be called back. 168*4667Smh27603 */ 169*4667Smh27603 #define CPUDRV_PM_MONITOR_FINI(cpudsp) { \ 170*4667Smh27603 timeout_id_t tmp_tid; \ 171*4667Smh27603 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 172*4667Smh27603 ASSERT((cpudsp)->cpudrv_pm.timeout_id); \ 173*4667Smh27603 tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \ 174*4667Smh27603 (cpudsp)->cpudrv_pm.timeout_id = 0; \ 175*4667Smh27603 mutex_exit(&(cpudsp)->lock); \ 176*4667Smh27603 (void) untimeout(tmp_tid); \ 177*4667Smh27603 mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \ 178*4667Smh27603 while ((cpudsp)->cpudrv_pm.timeout_count != 0) \ 179*4667Smh27603 cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \ 180*4667Smh27603 &(cpudsp)->cpudrv_pm.timeout_lock); \ 181*4667Smh27603 mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \ 182*4667Smh27603 mutex_enter(&(cpudsp)->lock); \ 183*4667Smh27603 } 184*4667Smh27603 185*4667Smh27603 int 186*4667Smh27603 _init(void) 187*4667Smh27603 { 188*4667Smh27603 int error; 189*4667Smh27603 190*4667Smh27603 DPRINTF(D_INIT, (" _init: function called\n")); 191*4667Smh27603 if ((error = ddi_soft_state_init(&cpudrv_state, 192*4667Smh27603 sizeof (cpudrv_devstate_t), 0)) != 0) { 193*4667Smh27603 return (error); 194*4667Smh27603 } 195*4667Smh27603 196*4667Smh27603 if ((error = mod_install(&modlinkage)) != 0) { 197*4667Smh27603 ddi_soft_state_fini(&cpudrv_state); 198*4667Smh27603 } 199*4667Smh27603 200*4667Smh27603 /* 201*4667Smh27603 * Callbacks used by the PPM driver. 202*4667Smh27603 */ 203*4667Smh27603 CPUDRV_PM_SET_PPM_CALLBACKS(); 204*4667Smh27603 return (error); 205*4667Smh27603 } 206*4667Smh27603 207*4667Smh27603 int 208*4667Smh27603 _fini(void) 209*4667Smh27603 { 210*4667Smh27603 int error; 211*4667Smh27603 212*4667Smh27603 DPRINTF(D_FINI, (" _fini: function called\n")); 213*4667Smh27603 if ((error = mod_remove(&modlinkage)) == 0) { 214*4667Smh27603 ddi_soft_state_fini(&cpudrv_state); 215*4667Smh27603 } 216*4667Smh27603 217*4667Smh27603 return (error); 218*4667Smh27603 } 219*4667Smh27603 220*4667Smh27603 int 221*4667Smh27603 _info(struct modinfo *modinfop) 222*4667Smh27603 { 223*4667Smh27603 return (mod_info(&modlinkage, modinfop)); 224*4667Smh27603 } 225*4667Smh27603 226*4667Smh27603 /* 227*4667Smh27603 * Driver attach(9e) entry point. 228*4667Smh27603 */ 229*4667Smh27603 static int 230*4667Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 231*4667Smh27603 { 232*4667Smh27603 int instance; 233*4667Smh27603 cpudrv_devstate_t *cpudsp; 234*4667Smh27603 extern pri_t maxclsyspri; 235*4667Smh27603 236*4667Smh27603 instance = ddi_get_instance(dip); 237*4667Smh27603 238*4667Smh27603 switch (cmd) { 239*4667Smh27603 case DDI_ATTACH: 240*4667Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 241*4667Smh27603 "DDI_ATTACH called\n", instance)); 242*4667Smh27603 if (ddi_soft_state_zalloc(cpudrv_state, instance) != 243*4667Smh27603 DDI_SUCCESS) { 244*4667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 245*4667Smh27603 "can't allocate state", instance); 246*4667Smh27603 CPUDRV_PM_DISABLE(); 247*4667Smh27603 return (DDI_FAILURE); 248*4667Smh27603 } 249*4667Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 250*4667Smh27603 NULL) { 251*4667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 252*4667Smh27603 "can't get state", instance); 253*4667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 254*4667Smh27603 CPUDRV_PM_DISABLE(); 255*4667Smh27603 return (DDI_FAILURE); 256*4667Smh27603 } 257*4667Smh27603 cpudsp->dip = dip; 258*4667Smh27603 259*4667Smh27603 /* 260*4667Smh27603 * Find CPU number for this dev_info node. 261*4667Smh27603 */ 262*4667Smh27603 if (!cpudrv_pm_get_cpu_id(dip, &(cpudsp->cpu_id))) { 263*4667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 264*4667Smh27603 "can't convert dip to cpu_id", instance); 265*4667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 266*4667Smh27603 CPUDRV_PM_DISABLE(); 267*4667Smh27603 return (DDI_FAILURE); 268*4667Smh27603 } 269*4667Smh27603 if (cpudrv_pm_init(cpudsp) != DDI_SUCCESS) { 270*4667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 271*4667Smh27603 CPUDRV_PM_DISABLE(); 272*4667Smh27603 return (DDI_FAILURE); 273*4667Smh27603 } 274*4667Smh27603 if (cpudrv_pm_comp_create(cpudsp) != DDI_SUCCESS) { 275*4667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 276*4667Smh27603 CPUDRV_PM_DISABLE(); 277*4667Smh27603 cpudrv_pm_free(cpudsp); 278*4667Smh27603 return (DDI_FAILURE); 279*4667Smh27603 } 280*4667Smh27603 if (ddi_prop_update_string(DDI_DEV_T_NONE, 281*4667Smh27603 dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) { 282*4667Smh27603 ddi_soft_state_free(cpudrv_state, instance); 283*4667Smh27603 CPUDRV_PM_DISABLE(); 284*4667Smh27603 cpudrv_pm_free(cpudsp); 285*4667Smh27603 return (DDI_FAILURE); 286*4667Smh27603 } 287*4667Smh27603 288*4667Smh27603 /* 289*4667Smh27603 * Taskq is used to dispatch routine to monitor CPU activities. 290*4667Smh27603 */ 291*4667Smh27603 cpudsp->cpudrv_pm.tq = taskq_create_instance( 292*4667Smh27603 "cpudrv_pm_monitor", 293*4667Smh27603 ddi_get_instance(dip), CPUDRV_PM_TASKQ_THREADS, 294*4667Smh27603 (maxclsyspri - 1), CPUDRV_PM_TASKQ_MIN, 295*4667Smh27603 CPUDRV_PM_TASKQ_MAX, TASKQ_PREPOPULATE|TASKQ_CPR_SAFE); 296*4667Smh27603 297*4667Smh27603 mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL); 298*4667Smh27603 mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL, MUTEX_DRIVER, 299*4667Smh27603 NULL); 300*4667Smh27603 cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL, CV_DEFAULT, NULL); 301*4667Smh27603 302*4667Smh27603 /* 303*4667Smh27603 * Driver needs to assume that CPU is running at unknown speed 304*4667Smh27603 * at DDI_ATTACH and switch it to the needed speed. We assume 305*4667Smh27603 * that initial needed speed is full speed for us. 306*4667Smh27603 */ 307*4667Smh27603 /* 308*4667Smh27603 * We need to take the lock because cpudrv_pm_monitor() 309*4667Smh27603 * will start running in parallel with attach(). 310*4667Smh27603 */ 311*4667Smh27603 mutex_enter(&cpudsp->lock); 312*4667Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 313*4667Smh27603 cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd; 314*4667Smh27603 /* 315*4667Smh27603 * We don't call pm_raise_power() directly from attach because 316*4667Smh27603 * driver attach for a slave CPU node can happen before the 317*4667Smh27603 * CPU is even initialized. We just start the monitoring 318*4667Smh27603 * system which understands unknown speed and moves CPU 319*4667Smh27603 * to targ_spd when it have been initialized. 320*4667Smh27603 */ 321*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 322*4667Smh27603 mutex_exit(&cpudsp->lock); 323*4667Smh27603 324*4667Smh27603 CPUDRV_PM_INSTALL_TOPSPEED_CHANGE_HANDLER(cpudsp, dip); 325*4667Smh27603 326*4667Smh27603 ddi_report_dev(dip); 327*4667Smh27603 return (DDI_SUCCESS); 328*4667Smh27603 329*4667Smh27603 case DDI_RESUME: 330*4667Smh27603 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 331*4667Smh27603 "DDI_RESUME called\n", instance)); 332*4667Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 333*4667Smh27603 NULL) { 334*4667Smh27603 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 335*4667Smh27603 "can't get state", instance); 336*4667Smh27603 return (DDI_FAILURE); 337*4667Smh27603 } 338*4667Smh27603 mutex_enter(&cpudsp->lock); 339*4667Smh27603 /* 340*4667Smh27603 * Driver needs to assume that CPU is running at unknown speed 341*4667Smh27603 * at DDI_RESUME and switch it to the needed speed. We assume 342*4667Smh27603 * that the needed speed is full speed for us. 343*4667Smh27603 */ 344*4667Smh27603 cpudsp->cpudrv_pm.cur_spd = NULL; 345*4667Smh27603 cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd; 346*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 347*4667Smh27603 mutex_exit(&cpudsp->lock); 348*4667Smh27603 CPUDRV_PM_REDEFINE_TOPSPEED(dip); 349*4667Smh27603 return (DDI_SUCCESS); 350*4667Smh27603 351*4667Smh27603 default: 352*4667Smh27603 return (DDI_FAILURE); 353*4667Smh27603 } 354*4667Smh27603 } 355*4667Smh27603 356*4667Smh27603 /* 357*4667Smh27603 * Driver detach(9e) entry point. 358*4667Smh27603 */ 359*4667Smh27603 static int 360*4667Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 361*4667Smh27603 { 362*4667Smh27603 int instance; 363*4667Smh27603 cpudrv_devstate_t *cpudsp; 364*4667Smh27603 cpudrv_pm_t *cpupm; 365*4667Smh27603 366*4667Smh27603 instance = ddi_get_instance(dip); 367*4667Smh27603 368*4667Smh27603 switch (cmd) { 369*4667Smh27603 case DDI_DETACH: 370*4667Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 371*4667Smh27603 "DDI_DETACH called\n", instance)); 372*4667Smh27603 /* 373*4667Smh27603 * If the only thing supported by the driver is power 374*4667Smh27603 * management, we can in future enhance the driver and 375*4667Smh27603 * framework that loads it to unload the driver when 376*4667Smh27603 * user has disabled CPU power management. 377*4667Smh27603 */ 378*4667Smh27603 return (DDI_FAILURE); 379*4667Smh27603 380*4667Smh27603 case DDI_SUSPEND: 381*4667Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 382*4667Smh27603 "DDI_SUSPEND called\n", instance)); 383*4667Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 384*4667Smh27603 NULL) { 385*4667Smh27603 cmn_err(CE_WARN, "cpudrv_detach: instance %d: " 386*4667Smh27603 "can't get state", instance); 387*4667Smh27603 return (DDI_FAILURE); 388*4667Smh27603 } 389*4667Smh27603 /* 390*4667Smh27603 * During a checkpoint-resume sequence, framework will 391*4667Smh27603 * stop interrupts to quiesce kernel activity. This will 392*4667Smh27603 * leave our monitoring system ineffective. Handle this 393*4667Smh27603 * by stopping our monitoring system and bringing CPU 394*4667Smh27603 * to full speed. In case we are in special direct pm 395*4667Smh27603 * mode, we leave the CPU at whatever speed it is. This 396*4667Smh27603 * is harmless other than speed. 397*4667Smh27603 */ 398*4667Smh27603 mutex_enter(&cpudsp->lock); 399*4667Smh27603 cpupm = &(cpudsp->cpudrv_pm); 400*4667Smh27603 401*4667Smh27603 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - " 402*4667Smh27603 "cur_spd %d, head_spd %d\n", instance, 403*4667Smh27603 cpupm->cur_spd->pm_level, cpupm->head_spd->pm_level)); 404*4667Smh27603 405*4667Smh27603 CPUDRV_PM_MONITOR_FINI(cpudsp); 406*4667Smh27603 407*4667Smh27603 if (!cpudrv_direct_pm && (cpupm->cur_spd != cpupm->head_spd)) { 408*4667Smh27603 if (cpupm->pm_busycnt < 1) { 409*4667Smh27603 if ((pm_busy_component(dip, CPUDRV_PM_COMP_NUM) 410*4667Smh27603 == DDI_SUCCESS)) { 411*4667Smh27603 cpupm->pm_busycnt++; 412*4667Smh27603 } else { 413*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 414*4667Smh27603 mutex_exit(&cpudsp->lock); 415*4667Smh27603 cmn_err(CE_WARN, "cpudrv_detach: " 416*4667Smh27603 "instance %d: can't busy CPU " 417*4667Smh27603 "component", instance); 418*4667Smh27603 return (DDI_FAILURE); 419*4667Smh27603 } 420*4667Smh27603 } 421*4667Smh27603 mutex_exit(&cpudsp->lock); 422*4667Smh27603 if (pm_raise_power(dip, CPUDRV_PM_COMP_NUM, 423*4667Smh27603 cpupm->head_spd->pm_level) != DDI_SUCCESS) { 424*4667Smh27603 mutex_enter(&cpudsp->lock); 425*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 426*4667Smh27603 mutex_exit(&cpudsp->lock); 427*4667Smh27603 cmn_err(CE_WARN, "cpudrv_detach: instance %d: " 428*4667Smh27603 "can't raise CPU power level", instance); 429*4667Smh27603 return (DDI_FAILURE); 430*4667Smh27603 } else { 431*4667Smh27603 return (DDI_SUCCESS); 432*4667Smh27603 } 433*4667Smh27603 } else { 434*4667Smh27603 mutex_exit(&cpudsp->lock); 435*4667Smh27603 return (DDI_SUCCESS); 436*4667Smh27603 } 437*4667Smh27603 438*4667Smh27603 default: 439*4667Smh27603 return (DDI_FAILURE); 440*4667Smh27603 } 441*4667Smh27603 } 442*4667Smh27603 443*4667Smh27603 /* 444*4667Smh27603 * Driver power(9e) entry point. 445*4667Smh27603 * 446*4667Smh27603 * Driver's notion of current power is set *only* in power(9e) entry point 447*4667Smh27603 * after actual power change operation has been successfully completed. 448*4667Smh27603 */ 449*4667Smh27603 /* ARGSUSED */ 450*4667Smh27603 static int 451*4667Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level) 452*4667Smh27603 { 453*4667Smh27603 int instance; 454*4667Smh27603 cpudrv_devstate_t *cpudsp; 455*4667Smh27603 cpudrv_pm_t *cpupm; 456*4667Smh27603 cpudrv_pm_spd_t *new_spd; 457*4667Smh27603 boolean_t is_ready; 458*4667Smh27603 int ret; 459*4667Smh27603 460*4667Smh27603 instance = ddi_get_instance(dip); 461*4667Smh27603 462*4667Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n", 463*4667Smh27603 instance, level)); 464*4667Smh27603 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) { 465*4667Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: can't get state", 466*4667Smh27603 instance); 467*4667Smh27603 return (DDI_FAILURE); 468*4667Smh27603 } 469*4667Smh27603 470*4667Smh27603 mutex_enter(&cpudsp->lock); 471*4667Smh27603 cpupm = &(cpudsp->cpudrv_pm); 472*4667Smh27603 473*4667Smh27603 /* 474*4667Smh27603 * In normal operation, we fail if we are busy and request is 475*4667Smh27603 * to lower the power level. We let this go through if the driver 476*4667Smh27603 * is in special direct pm mode. On x86, we also let this through 477*4667Smh27603 * if the change is due to a request to throttle the max speed. 478*4667Smh27603 */ 479*4667Smh27603 if (!cpudrv_direct_pm && (cpupm->pm_busycnt >= 1) && 480*4667Smh27603 !cpudrv_pm_is_throttle_thread(cpupm)) { 481*4667Smh27603 if ((cpupm->cur_spd != NULL) && 482*4667Smh27603 (level < cpupm->cur_spd->pm_level)) { 483*4667Smh27603 mutex_exit(&cpudsp->lock); 484*4667Smh27603 return (DDI_FAILURE); 485*4667Smh27603 } 486*4667Smh27603 } 487*4667Smh27603 488*4667Smh27603 for (new_spd = cpupm->head_spd; new_spd; new_spd = new_spd->down_spd) { 489*4667Smh27603 if (new_spd->pm_level == level) 490*4667Smh27603 break; 491*4667Smh27603 } 492*4667Smh27603 if (!new_spd) { 493*4667Smh27603 CPUDRV_PM_RESET_THROTTLE_THREAD(cpupm); 494*4667Smh27603 mutex_exit(&cpudsp->lock); 495*4667Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: " 496*4667Smh27603 "can't locate new CPU speed", instance); 497*4667Smh27603 return (DDI_FAILURE); 498*4667Smh27603 } 499*4667Smh27603 500*4667Smh27603 /* 501*4667Smh27603 * We currently refuse to power manage if the CPU is not ready to 502*4667Smh27603 * take cross calls (cross calls fail silently if CPU is not ready 503*4667Smh27603 * for it). 504*4667Smh27603 * 505*4667Smh27603 * Additionally, for x86 platforms we cannot power manage 506*4667Smh27603 * any one instance, until all instances have been initialized. 507*4667Smh27603 * That's because we don't know what the CPU domains look like 508*4667Smh27603 * until all instances have been initialized. 509*4667Smh27603 */ 510*4667Smh27603 is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id); 511*4667Smh27603 if (!is_ready) { 512*4667Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 513*4667Smh27603 "CPU not ready for x-calls\n", instance)); 514*4667Smh27603 } else if (!(is_ready = cpudrv_pm_all_instances_ready())) { 515*4667Smh27603 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 516*4667Smh27603 "waiting for all CPUs to be ready\n", instance)); 517*4667Smh27603 } 518*4667Smh27603 if (!is_ready) { 519*4667Smh27603 CPUDRV_PM_RESET_THROTTLE_THREAD(cpupm); 520*4667Smh27603 mutex_exit(&cpudsp->lock); 521*4667Smh27603 return (DDI_FAILURE); 522*4667Smh27603 } 523*4667Smh27603 524*4667Smh27603 /* 525*4667Smh27603 * Execute CPU specific routine on the requested CPU to change its 526*4667Smh27603 * speed to normal-speed/divisor. 527*4667Smh27603 */ 528*4667Smh27603 if ((ret = cpudrv_pm_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) { 529*4667Smh27603 cmn_err(CE_WARN, "cpudrv_power: cpudrv_pm_change_speed() " 530*4667Smh27603 "return = %d", ret); 531*4667Smh27603 mutex_exit(&cpudsp->lock); 532*4667Smh27603 return (DDI_FAILURE); 533*4667Smh27603 } 534*4667Smh27603 535*4667Smh27603 /* 536*4667Smh27603 * Reset idle threshold time for the new power level. 537*4667Smh27603 */ 538*4667Smh27603 if ((cpupm->cur_spd != NULL) && (level < cpupm->cur_spd->pm_level)) { 539*4667Smh27603 if (pm_idle_component(dip, CPUDRV_PM_COMP_NUM) == 540*4667Smh27603 DDI_SUCCESS) { 541*4667Smh27603 if (cpupm->pm_busycnt >= 1) 542*4667Smh27603 cpupm->pm_busycnt--; 543*4667Smh27603 } else 544*4667Smh27603 cmn_err(CE_WARN, "cpudrv_power: instance %d: can't " 545*4667Smh27603 "idle CPU component", ddi_get_instance(dip)); 546*4667Smh27603 } 547*4667Smh27603 /* 548*4667Smh27603 * Reset various parameters because we are now running at new speed. 549*4667Smh27603 */ 550*4667Smh27603 cpupm->lastquan_mstate[CMS_IDLE] = 0; 551*4667Smh27603 cpupm->lastquan_mstate[CMS_SYSTEM] = 0; 552*4667Smh27603 cpupm->lastquan_mstate[CMS_USER] = 0; 553*4667Smh27603 cpupm->lastquan_lbolt = 0; 554*4667Smh27603 cpupm->cur_spd = new_spd; 555*4667Smh27603 CPUDRV_PM_RESET_THROTTLE_THREAD(cpupm); 556*4667Smh27603 mutex_exit(&cpudsp->lock); 557*4667Smh27603 558*4667Smh27603 return (DDI_SUCCESS); 559*4667Smh27603 } 560*4667Smh27603 561*4667Smh27603 /* 562*4667Smh27603 * Initialize the field that will be used for reporting 563*4667Smh27603 * the supported_frequencies_Hz cpu_info kstat. 564*4667Smh27603 */ 565*4667Smh27603 static void 566*4667Smh27603 set_supp_freqs(cpu_t *cp, cpudrv_pm_t *cpupm) 567*4667Smh27603 { 568*4667Smh27603 char *supp_freqs; 569*4667Smh27603 char *sfptr; 570*4667Smh27603 uint64_t *speeds; 571*4667Smh27603 cpudrv_pm_spd_t *spd; 572*4667Smh27603 int i; 573*4667Smh27603 #define UINT64_MAX_STRING (sizeof ("18446744073709551615")) 574*4667Smh27603 575*4667Smh27603 speeds = kmem_zalloc(cpupm->num_spd * sizeof (uint64_t), KM_SLEEP); 576*4667Smh27603 for (i = cpupm->num_spd - 1, spd = cpupm->head_spd; spd; 577*4667Smh27603 i--, spd = spd->down_spd) { 578*4667Smh27603 speeds[i] = 579*4667Smh27603 CPUDRV_PM_SPEED_HZ(cp->cpu_type_info.pi_clock, spd->speed); 580*4667Smh27603 } 581*4667Smh27603 582*4667Smh27603 supp_freqs = kmem_zalloc((UINT64_MAX_STRING * cpupm->num_spd), 583*4667Smh27603 KM_SLEEP); 584*4667Smh27603 sfptr = supp_freqs; 585*4667Smh27603 for (i = 0; i < cpupm->num_spd; i++) { 586*4667Smh27603 if (i == cpupm->num_spd - 1) { 587*4667Smh27603 (void) sprintf(sfptr, "%"PRIu64, speeds[i]); 588*4667Smh27603 } else { 589*4667Smh27603 (void) sprintf(sfptr, "%"PRIu64":", speeds[i]); 590*4667Smh27603 sfptr = supp_freqs + strlen(supp_freqs); 591*4667Smh27603 } 592*4667Smh27603 } 593*4667Smh27603 cp->cpu_type_info.pi_supp_freqs = supp_freqs; 594*4667Smh27603 kmem_free(speeds, cpupm->num_spd * sizeof (uint64_t)); 595*4667Smh27603 } 596*4667Smh27603 597*4667Smh27603 /* 598*4667Smh27603 * Initialize power management data. 599*4667Smh27603 */ 600*4667Smh27603 static int 601*4667Smh27603 cpudrv_pm_init(cpudrv_devstate_t *cpudsp) 602*4667Smh27603 { 603*4667Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 604*4667Smh27603 cpudrv_pm_spd_t *cur_spd; 605*4667Smh27603 cpudrv_pm_spd_t *prev_spd = NULL; 606*4667Smh27603 int *speeds; 607*4667Smh27603 uint_t nspeeds; 608*4667Smh27603 int idle_cnt_percent; 609*4667Smh27603 int user_cnt_percent; 610*4667Smh27603 int i; 611*4667Smh27603 612*4667Smh27603 if (!cpudrv_pm_init_module(cpudsp)) 613*4667Smh27603 return (DDI_FAILURE); 614*4667Smh27603 615*4667Smh27603 CPUDRV_PM_GET_SPEEDS(cpudsp, speeds, nspeeds); 616*4667Smh27603 if (nspeeds < 2) { 617*4667Smh27603 /* Need at least two speeds to power manage */ 618*4667Smh27603 CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds); 619*4667Smh27603 cpudrv_pm_free_module(cpudsp); 620*4667Smh27603 return (DDI_FAILURE); 621*4667Smh27603 } 622*4667Smh27603 cpupm->num_spd = nspeeds; 623*4667Smh27603 624*4667Smh27603 /* 625*4667Smh27603 * Calculate the watermarks and other parameters based on the 626*4667Smh27603 * supplied speeds. 627*4667Smh27603 * 628*4667Smh27603 * One of the basic assumption is that for X amount of CPU work, 629*4667Smh27603 * if CPU is slowed down by a factor of N, the time it takes to 630*4667Smh27603 * do the same work will be N * X. 631*4667Smh27603 * 632*4667Smh27603 * The driver declares that a CPU is idle and ready for slowed down, 633*4667Smh27603 * if amount of idle thread is more than the current speed idle_hwm 634*4667Smh27603 * without dropping below idle_hwm a number of consecutive sampling 635*4667Smh27603 * intervals and number of running threads in user mode are below 636*4667Smh27603 * user_lwm. We want to set the current user_lwm such that if we 637*4667Smh27603 * just switched to the next slower speed with no change in real work 638*4667Smh27603 * load, the amount of user threads at the slower speed will be such 639*4667Smh27603 * that it falls below the slower speed's user_hwm. If we didn't do 640*4667Smh27603 * that then we will just come back to the higher speed as soon as we 641*4667Smh27603 * go down even with no change in work load. 642*4667Smh27603 * The user_hwm is a fixed precentage and not calculated dynamically. 643*4667Smh27603 * 644*4667Smh27603 * We bring the CPU up if idle thread at current speed is less than 645*4667Smh27603 * the current speed idle_lwm for a number of consecutive sampling 646*4667Smh27603 * intervals or user threads are above the user_hwm for the current 647*4667Smh27603 * speed. 648*4667Smh27603 */ 649*4667Smh27603 for (i = 0; i < nspeeds; i++) { 650*4667Smh27603 cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP); 651*4667Smh27603 cur_spd->speed = speeds[i]; 652*4667Smh27603 if (i == 0) { /* normal speed */ 653*4667Smh27603 cpupm->head_spd = cur_spd; 654*4667Smh27603 cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_NORMAL; 655*4667Smh27603 cur_spd->idle_hwm = 656*4667Smh27603 (cpudrv_pm_idle_hwm * cur_spd->quant_cnt) / 100; 657*4667Smh27603 /* can't speed anymore */ 658*4667Smh27603 cur_spd->idle_lwm = 0; 659*4667Smh27603 cur_spd->user_hwm = UINT_MAX; 660*4667Smh27603 } else { 661*4667Smh27603 cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_OTHR; 662*4667Smh27603 ASSERT(prev_spd != NULL); 663*4667Smh27603 prev_spd->down_spd = cur_spd; 664*4667Smh27603 cur_spd->up_spd = cpupm->head_spd; 665*4667Smh27603 666*4667Smh27603 /* 667*4667Smh27603 * Let's assume CPU is considered idle at full speed 668*4667Smh27603 * when it is spending I% of time in running the idle 669*4667Smh27603 * thread. At full speed, CPU will be busy (100 - I) % 670*4667Smh27603 * of times. This % of busyness increases by factor of 671*4667Smh27603 * N as CPU slows down. CPU that is idle I% of times 672*4667Smh27603 * in full speed, it is idle (100 - ((100 - I) * N)) % 673*4667Smh27603 * of times in N speed. The idle_lwm is a fixed 674*4667Smh27603 * percentage. A large value of N may result in 675*4667Smh27603 * idle_hwm to go below idle_lwm. We need to make sure 676*4667Smh27603 * that there is at least a buffer zone seperation 677*4667Smh27603 * between the idle_lwm and idle_hwm values. 678*4667Smh27603 */ 679*4667Smh27603 idle_cnt_percent = CPUDRV_PM_IDLE_CNT_PERCENT( 680*4667Smh27603 cpudrv_pm_idle_hwm, speeds, i); 681*4667Smh27603 idle_cnt_percent = max(idle_cnt_percent, 682*4667Smh27603 (cpudrv_pm_idle_lwm + cpudrv_pm_idle_buf_zone)); 683*4667Smh27603 cur_spd->idle_hwm = 684*4667Smh27603 (idle_cnt_percent * cur_spd->quant_cnt) / 100; 685*4667Smh27603 cur_spd->idle_lwm = 686*4667Smh27603 (cpudrv_pm_idle_lwm * cur_spd->quant_cnt) / 100; 687*4667Smh27603 688*4667Smh27603 /* 689*4667Smh27603 * The lwm for user threads are determined such that 690*4667Smh27603 * if CPU slows down, the load of work in the 691*4667Smh27603 * new speed would still keep the CPU at or below the 692*4667Smh27603 * user_hwm in the new speed. This is to prevent 693*4667Smh27603 * the quick jump back up to higher speed. 694*4667Smh27603 */ 695*4667Smh27603 cur_spd->user_hwm = (cpudrv_pm_user_hwm * 696*4667Smh27603 cur_spd->quant_cnt) / 100; 697*4667Smh27603 user_cnt_percent = CPUDRV_PM_USER_CNT_PERCENT( 698*4667Smh27603 cpudrv_pm_user_hwm, speeds, i); 699*4667Smh27603 prev_spd->user_lwm = 700*4667Smh27603 (user_cnt_percent * prev_spd->quant_cnt) / 100; 701*4667Smh27603 } 702*4667Smh27603 prev_spd = cur_spd; 703*4667Smh27603 } 704*4667Smh27603 /* Slowest speed. Can't slow down anymore */ 705*4667Smh27603 cur_spd->idle_hwm = UINT_MAX; 706*4667Smh27603 cur_spd->user_lwm = -1; 707*4667Smh27603 #ifdef DEBUG 708*4667Smh27603 DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: head_spd spd %d, " 709*4667Smh27603 "num_spd %d\n", ddi_get_instance(cpudsp->dip), 710*4667Smh27603 cpupm->head_spd->speed, cpupm->num_spd)); 711*4667Smh27603 for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) { 712*4667Smh27603 DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: speed %d, " 713*4667Smh27603 "down_spd spd %d, idle_hwm %d, user_lwm %d, " 714*4667Smh27603 "up_spd spd %d, idle_lwm %d, user_hwm %d, " 715*4667Smh27603 "quant_cnt %d\n", ddi_get_instance(cpudsp->dip), 716*4667Smh27603 cur_spd->speed, 717*4667Smh27603 (cur_spd->down_spd ? cur_spd->down_spd->speed : 0), 718*4667Smh27603 cur_spd->idle_hwm, cur_spd->user_lwm, 719*4667Smh27603 (cur_spd->up_spd ? cur_spd->up_spd->speed : 0), 720*4667Smh27603 cur_spd->idle_lwm, cur_spd->user_hwm, 721*4667Smh27603 cur_spd->quant_cnt)); 722*4667Smh27603 } 723*4667Smh27603 #endif /* DEBUG */ 724*4667Smh27603 CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds); 725*4667Smh27603 return (DDI_SUCCESS); 726*4667Smh27603 } 727*4667Smh27603 728*4667Smh27603 /* 729*4667Smh27603 * Free CPU power management data. 730*4667Smh27603 */ 731*4667Smh27603 static void 732*4667Smh27603 cpudrv_pm_free(cpudrv_devstate_t *cpudsp) 733*4667Smh27603 { 734*4667Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 735*4667Smh27603 cpudrv_pm_spd_t *cur_spd, *next_spd; 736*4667Smh27603 737*4667Smh27603 cur_spd = cpupm->head_spd; 738*4667Smh27603 while (cur_spd) { 739*4667Smh27603 next_spd = cur_spd->down_spd; 740*4667Smh27603 kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t)); 741*4667Smh27603 cur_spd = next_spd; 742*4667Smh27603 } 743*4667Smh27603 bzero(cpupm, sizeof (cpudrv_pm_t)); 744*4667Smh27603 cpudrv_pm_free_module(cpudsp); 745*4667Smh27603 } 746*4667Smh27603 747*4667Smh27603 /* 748*4667Smh27603 * Create pm-components property. 749*4667Smh27603 */ 750*4667Smh27603 static int 751*4667Smh27603 cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp) 752*4667Smh27603 { 753*4667Smh27603 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 754*4667Smh27603 cpudrv_pm_spd_t *cur_spd; 755*4667Smh27603 char **pmc; 756*4667Smh27603 int size; 757*4667Smh27603 char name[] = "NAME=CPU Speed"; 758*4667Smh27603 int i, j; 759*4667Smh27603 uint_t comp_spd; 760*4667Smh27603 int result = DDI_FAILURE; 761*4667Smh27603 762*4667Smh27603 pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP); 763*4667Smh27603 size = CPUDRV_PM_COMP_SIZE(); 764*4667Smh27603 if (cpupm->num_spd > CPUDRV_PM_COMP_MAX_VAL) { 765*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: " 766*4667Smh27603 "number of speeds exceeded limits", 767*4667Smh27603 ddi_get_instance(cpudsp->dip)); 768*4667Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 769*4667Smh27603 return (result); 770*4667Smh27603 } 771*4667Smh27603 772*4667Smh27603 for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0; 773*4667Smh27603 i--, cur_spd = cur_spd->down_spd) { 774*4667Smh27603 cur_spd->pm_level = i; 775*4667Smh27603 pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP); 776*4667Smh27603 comp_spd = CPUDRV_PM_COMP_SPEED(cpupm, cur_spd); 777*4667Smh27603 if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) { 778*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_comp_create: " 779*4667Smh27603 "instance %d: speed exceeded limits", 780*4667Smh27603 ddi_get_instance(cpudsp->dip)); 781*4667Smh27603 for (j = cpupm->num_spd; j >= i; j--) { 782*4667Smh27603 kmem_free(pmc[j], size * sizeof (char)); 783*4667Smh27603 } 784*4667Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * 785*4667Smh27603 sizeof (char *)); 786*4667Smh27603 return (result); 787*4667Smh27603 } 788*4667Smh27603 CPUDRV_PM_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd) 789*4667Smh27603 DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: " 790*4667Smh27603 "instance %d: pm-components power level %d string '%s'\n", 791*4667Smh27603 ddi_get_instance(cpudsp->dip), i, pmc[i])); 792*4667Smh27603 } 793*4667Smh27603 pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP); 794*4667Smh27603 (void) strcat(pmc[0], name); 795*4667Smh27603 DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: instance %d: " 796*4667Smh27603 "pm-components component name '%s'\n", 797*4667Smh27603 ddi_get_instance(cpudsp->dip), pmc[0])); 798*4667Smh27603 799*4667Smh27603 if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip, 800*4667Smh27603 "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) { 801*4667Smh27603 result = DDI_SUCCESS; 802*4667Smh27603 } else { 803*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: " 804*4667Smh27603 "can't create pm-components property", 805*4667Smh27603 ddi_get_instance(cpudsp->dip)); 806*4667Smh27603 } 807*4667Smh27603 808*4667Smh27603 for (i = cpupm->num_spd; i > 0; i--) { 809*4667Smh27603 kmem_free(pmc[i], size * sizeof (char)); 810*4667Smh27603 } 811*4667Smh27603 kmem_free(pmc[0], sizeof (name)); 812*4667Smh27603 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 813*4667Smh27603 return (result); 814*4667Smh27603 } 815*4667Smh27603 816*4667Smh27603 /* 817*4667Smh27603 * Mark a component idle. 818*4667Smh27603 */ 819*4667Smh27603 #define CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm) { \ 820*4667Smh27603 if ((cpupm)->pm_busycnt >= 1) { \ 821*4667Smh27603 if (pm_idle_component((dip), CPUDRV_PM_COMP_NUM) == \ 822*4667Smh27603 DDI_SUCCESS) { \ 823*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \ 824*4667Smh27603 "instance %d: pm_idle_component called\n", \ 825*4667Smh27603 ddi_get_instance((dip)))); \ 826*4667Smh27603 (cpupm)->pm_busycnt--; \ 827*4667Smh27603 } else { \ 828*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \ 829*4667Smh27603 "can't idle CPU component", \ 830*4667Smh27603 ddi_get_instance((dip))); \ 831*4667Smh27603 } \ 832*4667Smh27603 } \ 833*4667Smh27603 } 834*4667Smh27603 835*4667Smh27603 /* 836*4667Smh27603 * Marks a component busy in both PM framework and driver state structure. 837*4667Smh27603 */ 838*4667Smh27603 #define CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm) { \ 839*4667Smh27603 if ((cpupm)->pm_busycnt < 1) { \ 840*4667Smh27603 if (pm_busy_component((dip), CPUDRV_PM_COMP_NUM) == \ 841*4667Smh27603 DDI_SUCCESS) { \ 842*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \ 843*4667Smh27603 "instance %d: pm_busy_component called\n", \ 844*4667Smh27603 ddi_get_instance((dip)))); \ 845*4667Smh27603 (cpupm)->pm_busycnt++; \ 846*4667Smh27603 } else { \ 847*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \ 848*4667Smh27603 "can't busy CPU component", \ 849*4667Smh27603 ddi_get_instance((dip))); \ 850*4667Smh27603 } \ 851*4667Smh27603 } \ 852*4667Smh27603 } 853*4667Smh27603 854*4667Smh27603 /* 855*4667Smh27603 * Marks a component busy and calls pm_raise_power(). 856*4667Smh27603 */ 857*4667Smh27603 #define CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \ 858*4667Smh27603 /* \ 859*4667Smh27603 * Mark driver and PM framework busy first so framework doesn't try \ 860*4667Smh27603 * to bring CPU to lower speed when we need to be at higher speed. \ 861*4667Smh27603 */ \ 862*4667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \ 863*4667Smh27603 mutex_exit(&(cpudsp)->lock); \ 864*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " \ 865*4667Smh27603 "pm_raise_power called to %d\n", ddi_get_instance((dip)), \ 866*4667Smh27603 (new_level))); \ 867*4667Smh27603 if (pm_raise_power((dip), CPUDRV_PM_COMP_NUM, (new_level)) != \ 868*4667Smh27603 DDI_SUCCESS) { \ 869*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't " \ 870*4667Smh27603 "raise CPU power level", ddi_get_instance((dip))); \ 871*4667Smh27603 } \ 872*4667Smh27603 mutex_enter(&(cpudsp)->lock); \ 873*4667Smh27603 } 874*4667Smh27603 875*4667Smh27603 /* 876*4667Smh27603 * In order to monitor a CPU, we need to hold cpu_lock to access CPU 877*4667Smh27603 * statistics. Holding cpu_lock is not allowed from a callout routine. 878*4667Smh27603 * We dispatch a taskq to do that job. 879*4667Smh27603 */ 880*4667Smh27603 static void 881*4667Smh27603 cpudrv_pm_monitor_disp(void *arg) 882*4667Smh27603 { 883*4667Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 884*4667Smh27603 885*4667Smh27603 /* 886*4667Smh27603 * We are here because the last task has scheduled a timeout. 887*4667Smh27603 * The queue should be empty at this time. 888*4667Smh27603 */ 889*4667Smh27603 mutex_enter(&cpudsp->cpudrv_pm.timeout_lock); 890*4667Smh27603 if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_pm_monitor, arg, 891*4667Smh27603 TQ_NOSLEEP)) { 892*4667Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 893*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor_disp: failed to " 894*4667Smh27603 "dispatch the cpudrv_pm_monitor taskq\n")); 895*4667Smh27603 mutex_enter(&cpudsp->lock); 896*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 897*4667Smh27603 mutex_exit(&cpudsp->lock); 898*4667Smh27603 return; 899*4667Smh27603 } 900*4667Smh27603 cpudsp->cpudrv_pm.timeout_count++; 901*4667Smh27603 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 902*4667Smh27603 } 903*4667Smh27603 904*4667Smh27603 /* 905*4667Smh27603 * Get current CPU microstate times and scale them. We should probably be 906*4667Smh27603 * using get_cpu_mstate() to get this data, but bugs in some of the ISRs 907*4667Smh27603 * have led to inflated system times and prevented CPUs from being power 908*4667Smh27603 * managed. We can probably safely ignore time spent in ISRs when 909*4667Smh27603 * determining idleness. 910*4667Smh27603 */ 911*4667Smh27603 static void 912*4667Smh27603 cpudrv_get_cpu_mstate(cpu_t *cpu, hrtime_t *times) 913*4667Smh27603 { 914*4667Smh27603 int i; 915*4667Smh27603 916*4667Smh27603 for (i = 0; i < NCMSTATES; i++) { 917*4667Smh27603 times[i] = cpu->cpu_acct[i]; 918*4667Smh27603 scalehrtime(×[i]); 919*4667Smh27603 } 920*4667Smh27603 } 921*4667Smh27603 922*4667Smh27603 /* 923*4667Smh27603 * Monitors each CPU for the amount of time idle thread was running in the 924*4667Smh27603 * last quantum and arranges for the CPU to go to the lower or higher speed. 925*4667Smh27603 * Called at the time interval appropriate for the current speed. The 926*4667Smh27603 * time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time 927*4667Smh27603 * interval for other speeds (including unknown speed) is 928*4667Smh27603 * CPUDRV_PM_QUANT_CNT_OTHR. 929*4667Smh27603 */ 930*4667Smh27603 static void 931*4667Smh27603 cpudrv_pm_monitor(void *arg) 932*4667Smh27603 { 933*4667Smh27603 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 934*4667Smh27603 cpudrv_pm_t *cpupm; 935*4667Smh27603 cpudrv_pm_spd_t *cur_spd, *new_spd; 936*4667Smh27603 cpu_t *cp; 937*4667Smh27603 dev_info_t *dip; 938*4667Smh27603 uint_t idle_cnt, user_cnt, system_cnt; 939*4667Smh27603 clock_t lbolt_cnt; 940*4667Smh27603 hrtime_t msnsecs[NCMSTATES]; 941*4667Smh27603 boolean_t is_ready; 942*4667Smh27603 943*4667Smh27603 #define GET_CPU_MSTATE_CNT(state, cnt) \ 944*4667Smh27603 msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \ 945*4667Smh27603 if (cpupm->lastquan_mstate[state] > msnsecs[state]) \ 946*4667Smh27603 msnsecs[state] = cpupm->lastquan_mstate[state]; \ 947*4667Smh27603 cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \ 948*4667Smh27603 cpupm->lastquan_mstate[state] = msnsecs[state] 949*4667Smh27603 950*4667Smh27603 mutex_enter(&cpudsp->lock); 951*4667Smh27603 cpupm = &(cpudsp->cpudrv_pm); 952*4667Smh27603 if (cpupm->timeout_id == 0) { 953*4667Smh27603 mutex_exit(&cpudsp->lock); 954*4667Smh27603 goto do_return; 955*4667Smh27603 } 956*4667Smh27603 cur_spd = cpupm->cur_spd; 957*4667Smh27603 dip = cpudsp->dip; 958*4667Smh27603 959*4667Smh27603 /* 960*4667Smh27603 * We assume that a CPU is initialized and has a valid cpu_t 961*4667Smh27603 * structure, if it is ready for cross calls. If this changes, 962*4667Smh27603 * additional checks might be needed. 963*4667Smh27603 * 964*4667Smh27603 * Additionally, for x86 platforms we cannot power manage 965*4667Smh27603 * any one instance, until all instances have been initialized. 966*4667Smh27603 * That's because we don't know what the CPU domains look like 967*4667Smh27603 * until all instances have been initialized. 968*4667Smh27603 */ 969*4667Smh27603 is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id); 970*4667Smh27603 if (!is_ready) { 971*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 972*4667Smh27603 "CPU not ready for x-calls\n", ddi_get_instance(dip))); 973*4667Smh27603 } else if (!(is_ready = cpudrv_pm_all_instances_ready())) { 974*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 975*4667Smh27603 "waiting for all CPUs to be ready\n", 976*4667Smh27603 ddi_get_instance(dip))); 977*4667Smh27603 } 978*4667Smh27603 if (!is_ready) { 979*4667Smh27603 /* 980*4667Smh27603 * Make sure that we are busy so that framework doesn't 981*4667Smh27603 * try to bring us down in this situation. 982*4667Smh27603 */ 983*4667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 984*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 985*4667Smh27603 mutex_exit(&cpudsp->lock); 986*4667Smh27603 goto do_return; 987*4667Smh27603 } 988*4667Smh27603 989*4667Smh27603 /* 990*4667Smh27603 * Make sure that we are still not at unknown power level. 991*4667Smh27603 */ 992*4667Smh27603 if (cur_spd == NULL) { 993*4667Smh27603 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 994*4667Smh27603 "cur_spd is unknown\n", ddi_get_instance(dip))); 995*4667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 996*4667Smh27603 cpupm->targ_spd->pm_level); 997*4667Smh27603 /* 998*4667Smh27603 * We just changed the speed. Wait till at least next 999*4667Smh27603 * call to this routine before proceeding ahead. 1000*4667Smh27603 */ 1001*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 1002*4667Smh27603 mutex_exit(&cpudsp->lock); 1003*4667Smh27603 goto do_return; 1004*4667Smh27603 } 1005*4667Smh27603 1006*4667Smh27603 mutex_enter(&cpu_lock); 1007*4667Smh27603 if ((cp = cpu_get(cpudsp->cpu_id)) == NULL) { 1008*4667Smh27603 mutex_exit(&cpu_lock); 1009*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 1010*4667Smh27603 mutex_exit(&cpudsp->lock); 1011*4667Smh27603 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't get " 1012*4667Smh27603 "cpu_t", ddi_get_instance(dip)); 1013*4667Smh27603 goto do_return; 1014*4667Smh27603 } 1015*4667Smh27603 if (cp->cpu_type_info.pi_supp_freqs == NULL) 1016*4667Smh27603 set_supp_freqs(cp, cpupm); 1017*4667Smh27603 1018*4667Smh27603 cpudrv_get_cpu_mstate(cp, msnsecs); 1019*4667Smh27603 GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt); 1020*4667Smh27603 GET_CPU_MSTATE_CNT(CMS_USER, user_cnt); 1021*4667Smh27603 GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt); 1022*4667Smh27603 1023*4667Smh27603 /* 1024*4667Smh27603 * We can't do anything when we have just switched to a state 1025*4667Smh27603 * because there is no valid timestamp. 1026*4667Smh27603 */ 1027*4667Smh27603 if (cpupm->lastquan_lbolt == 0) { 1028*4667Smh27603 cpupm->lastquan_lbolt = lbolt; 1029*4667Smh27603 mutex_exit(&cpu_lock); 1030*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 1031*4667Smh27603 mutex_exit(&cpudsp->lock); 1032*4667Smh27603 goto do_return; 1033*4667Smh27603 } 1034*4667Smh27603 1035*4667Smh27603 /* 1036*4667Smh27603 * Various watermarks are based on this routine being called back 1037*4667Smh27603 * exactly at the requested period. This is not guaranteed 1038*4667Smh27603 * because this routine is called from a taskq that is dispatched 1039*4667Smh27603 * from a timeout routine. Handle this by finding out how many 1040*4667Smh27603 * ticks have elapsed since the last call (lbolt_cnt) and adjusting 1041*4667Smh27603 * the idle_cnt based on the delay added to the requested period 1042*4667Smh27603 * by timeout and taskq. 1043*4667Smh27603 */ 1044*4667Smh27603 lbolt_cnt = lbolt - cpupm->lastquan_lbolt; 1045*4667Smh27603 cpupm->lastquan_lbolt = lbolt; 1046*4667Smh27603 mutex_exit(&cpu_lock); 1047*4667Smh27603 /* 1048*4667Smh27603 * Time taken between recording the current counts and 1049*4667Smh27603 * arranging the next call of this routine is an error in our 1050*4667Smh27603 * calculation. We minimize the error by calling 1051*4667Smh27603 * CPUDRV_PM_MONITOR_INIT() here instead of end of this routine. 1052*4667Smh27603 */ 1053*4667Smh27603 CPUDRV_PM_MONITOR_INIT(cpudsp); 1054*4667Smh27603 DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_pm_monitor: instance %d: " 1055*4667Smh27603 "idle count %d, user count %d, system count %d, pm_level %d, " 1056*4667Smh27603 "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt, 1057*4667Smh27603 system_cnt, cur_spd->pm_level, cpupm->pm_busycnt)); 1058*4667Smh27603 1059*4667Smh27603 #ifdef DEBUG 1060*4667Smh27603 /* 1061*4667Smh27603 * Notify that timeout and taskq has caused delays and we need to 1062*4667Smh27603 * scale our parameters accordingly. 1063*4667Smh27603 * 1064*4667Smh27603 * To get accurate result, don't turn on other DPRINTFs with 1065*4667Smh27603 * the following DPRINTF. PROM calls generated by other 1066*4667Smh27603 * DPRINTFs changes the timing. 1067*4667Smh27603 */ 1068*4667Smh27603 if (lbolt_cnt > cur_spd->quant_cnt) { 1069*4667Smh27603 DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_pm_monitor: instance %d: " 1070*4667Smh27603 "lbolt count %ld > quantum_count %u\n", 1071*4667Smh27603 ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt)); 1072*4667Smh27603 } 1073*4667Smh27603 #endif /* DEBUG */ 1074*4667Smh27603 1075*4667Smh27603 /* 1076*4667Smh27603 * Adjust counts based on the delay added by timeout and taskq. 1077*4667Smh27603 */ 1078*4667Smh27603 idle_cnt = (idle_cnt * cur_spd->quant_cnt) / lbolt_cnt; 1079*4667Smh27603 user_cnt = (user_cnt * cur_spd->quant_cnt) / lbolt_cnt; 1080*4667Smh27603 if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm && 1081*4667Smh27603 cur_spd->idle_blwm_cnt >= cpudrv_pm_idle_blwm_cnt_max)) { 1082*4667Smh27603 cur_spd->idle_blwm_cnt = 0; 1083*4667Smh27603 cur_spd->idle_bhwm_cnt = 0; 1084*4667Smh27603 /* 1085*4667Smh27603 * In normal situation, arrange to go to next higher speed. 1086*4667Smh27603 * If we are running in special direct pm mode, we just stay 1087*4667Smh27603 * at the current speed. 1088*4667Smh27603 */ 1089*4667Smh27603 if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) { 1090*4667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 1091*4667Smh27603 } else { 1092*4667Smh27603 new_spd = cur_spd->up_spd; 1093*4667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 1094*4667Smh27603 new_spd->pm_level); 1095*4667Smh27603 } 1096*4667Smh27603 } else if ((user_cnt <= cur_spd->user_lwm) && 1097*4667Smh27603 (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cp)) { 1098*4667Smh27603 cur_spd->idle_blwm_cnt = 0; 1099*4667Smh27603 cur_spd->idle_bhwm_cnt = 0; 1100*4667Smh27603 /* 1101*4667Smh27603 * Arrange to go to next lower speed by informing our idle 1102*4667Smh27603 * status to the power management framework. 1103*4667Smh27603 */ 1104*4667Smh27603 CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm); 1105*4667Smh27603 } else { 1106*4667Smh27603 /* 1107*4667Smh27603 * If we are between the idle water marks and have not 1108*4667Smh27603 * been here enough consecutive times to be considered 1109*4667Smh27603 * busy, just increment the count and return. 1110*4667Smh27603 */ 1111*4667Smh27603 if ((idle_cnt < cur_spd->idle_hwm) && 1112*4667Smh27603 (idle_cnt >= cur_spd->idle_lwm) && 1113*4667Smh27603 (cur_spd->idle_bhwm_cnt < cpudrv_pm_idle_bhwm_cnt_max)) { 1114*4667Smh27603 cur_spd->idle_blwm_cnt = 0; 1115*4667Smh27603 cur_spd->idle_bhwm_cnt++; 1116*4667Smh27603 mutex_exit(&cpudsp->lock); 1117*4667Smh27603 goto do_return; 1118*4667Smh27603 } 1119*4667Smh27603 if (idle_cnt < cur_spd->idle_lwm) { 1120*4667Smh27603 cur_spd->idle_blwm_cnt++; 1121*4667Smh27603 cur_spd->idle_bhwm_cnt = 0; 1122*4667Smh27603 } 1123*4667Smh27603 /* 1124*4667Smh27603 * Arranges to stay at the current speed. 1125*4667Smh27603 */ 1126*4667Smh27603 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 1127*4667Smh27603 } 1128*4667Smh27603 mutex_exit(&cpudsp->lock); 1129*4667Smh27603 do_return: 1130*4667Smh27603 mutex_enter(&cpupm->timeout_lock); 1131*4667Smh27603 ASSERT(cpupm->timeout_count > 0); 1132*4667Smh27603 cpupm->timeout_count--; 1133*4667Smh27603 cv_signal(&cpupm->timeout_cv); 1134*4667Smh27603 mutex_exit(&cpupm->timeout_lock); 1135*4667Smh27603 } 1136