xref: /onnv-gate/usr/src/uts/common/io/cpudrv.c (revision 10961:76b611950d1e)
14667Smh27603 /*
24667Smh27603  * CDDL HEADER START
34667Smh27603  *
44667Smh27603  * The contents of this file are subject to the terms of the
54667Smh27603  * Common Development and Distribution License (the "License").
64667Smh27603  * You may not use this file except in compliance with the License.
74667Smh27603  *
84667Smh27603  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
94667Smh27603  * or http://www.opensolaris.org/os/licensing.
104667Smh27603  * See the License for the specific language governing permissions
114667Smh27603  * and limitations under the License.
124667Smh27603  *
134667Smh27603  * When distributing Covered Code, include this CDDL HEADER in each
144667Smh27603  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
154667Smh27603  * If applicable, add the following below this CDDL HEADER, with the
164667Smh27603  * fields enclosed by brackets "[]" replaced with your own identifying
174667Smh27603  * information: Portions Copyright [yyyy] [name of copyright owner]
184667Smh27603  *
194667Smh27603  * CDDL HEADER END
204667Smh27603  */
214667Smh27603 /*
228627SMark.Haywood@Sun.COM  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
234667Smh27603  * Use is subject to license terms.
244667Smh27603  */
2510488SMark.Haywood@Sun.COM /*
2610488SMark.Haywood@Sun.COM  * Copyright (c) 2009,  Intel Corporation.
2710488SMark.Haywood@Sun.COM  * All Rights Reserved.
2810488SMark.Haywood@Sun.COM  */
294667Smh27603 
304667Smh27603 /*
314667Smh27603  * CPU Device driver. The driver is not DDI-compliant.
324667Smh27603  *
334667Smh27603  * The driver supports following features:
344667Smh27603  *	- Power management.
354667Smh27603  */
364667Smh27603 
374667Smh27603 #include <sys/types.h>
384667Smh27603 #include <sys/param.h>
394667Smh27603 #include <sys/errno.h>
404667Smh27603 #include <sys/modctl.h>
414667Smh27603 #include <sys/kmem.h>
424667Smh27603 #include <sys/conf.h>
434667Smh27603 #include <sys/cmn_err.h>
444667Smh27603 #include <sys/stat.h>
454667Smh27603 #include <sys/debug.h>
464667Smh27603 #include <sys/systm.h>
474667Smh27603 #include <sys/ddi.h>
484667Smh27603 #include <sys/sunddi.h>
495864Sesaxe #include <sys/sdt.h>
508906SEric.Saxe@Sun.COM #include <sys/epm.h>
514667Smh27603 #include <sys/machsystm.h>
524667Smh27603 #include <sys/x_call.h>
537319SMark.Haywood@Sun.COM #include <sys/cpudrv_mach.h>
544667Smh27603 #include <sys/msacct.h>
554667Smh27603 
564667Smh27603 /*
574667Smh27603  * CPU power management
584667Smh27603  *
594667Smh27603  * The supported power saving model is to slow down the CPU (on SPARC by
604667Smh27603  * dividing the CPU clock and on x86 by dropping down a P-state).
614667Smh27603  * Periodically we determine the amount of time the CPU is running
624667Smh27603  * idle thread and threads in user mode during the last quantum.  If the idle
634667Smh27603  * thread was running less than its low water mark for current speed for
644667Smh27603  * number of consecutive sampling periods, or number of running threads in
654667Smh27603  * user mode are above its high water mark, we arrange to go to the higher
664667Smh27603  * speed.  If the idle thread was running more than its high water mark without
674667Smh27603  * dropping a number of consecutive times below the mark, and number of threads
684667Smh27603  * running in user mode are below its low water mark, we arrange to go to the
694667Smh27603  * next lower speed.  While going down, we go through all the speeds.  While
704667Smh27603  * going up we go to the maximum speed to minimize impact on the user, but have
714667Smh27603  * provisions in the driver to go to other speeds.
724667Smh27603  *
734667Smh27603  * The driver does not have knowledge of a particular implementation of this
744667Smh27603  * scheme and will work with all CPUs supporting this model. On SPARC, the
754667Smh27603  * driver determines supported speeds by looking at 'clock-divisors' property
764667Smh27603  * created by OBP. On x86, the driver retrieves the supported speeds from
774667Smh27603  * ACPI.
784667Smh27603  */
794667Smh27603 
804667Smh27603 /*
814667Smh27603  * Configuration function prototypes and data structures
824667Smh27603  */
834667Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
844667Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
854667Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level);
864667Smh27603 
874667Smh27603 struct dev_ops cpudrv_ops = {
884667Smh27603 	DEVO_REV,		/* rev */
894667Smh27603 	0,			/* refcnt */
904667Smh27603 	nodev,			/* getinfo */
914667Smh27603 	nulldev,		/* identify */
924667Smh27603 	nulldev,		/* probe */
934667Smh27603 	cpudrv_attach,		/* attach */
944667Smh27603 	cpudrv_detach,		/* detach */
954667Smh27603 	nodev,			/* reset */
964667Smh27603 	(struct cb_ops *)NULL,	/* cb_ops */
974667Smh27603 	(struct bus_ops *)NULL,	/* bus_ops */
987656SSherry.Moore@Sun.COM 	cpudrv_power,		/* power */
997656SSherry.Moore@Sun.COM 	ddi_quiesce_not_needed,		/* quiesce */
1004667Smh27603 };
1014667Smh27603 
1024667Smh27603 static struct modldrv modldrv = {
1034667Smh27603 	&mod_driverops,			/* modops */
1047319SMark.Haywood@Sun.COM 	"CPU Driver",			/* linkinfo */
1054667Smh27603 	&cpudrv_ops,			/* dev_ops */
1064667Smh27603 };
1074667Smh27603 
1084667Smh27603 static struct modlinkage modlinkage = {
1094667Smh27603 	MODREV_1,		/* rev */
1104667Smh27603 	&modldrv,		/* linkage */
1114667Smh27603 	NULL
1124667Smh27603 };
1134667Smh27603 
1144667Smh27603 /*
1154667Smh27603  * Function prototypes
1164667Smh27603  */
1178906SEric.Saxe@Sun.COM static int cpudrv_init(cpudrv_devstate_t *cpudsp);
1188906SEric.Saxe@Sun.COM static void cpudrv_free(cpudrv_devstate_t *cpudsp);
1198906SEric.Saxe@Sun.COM static int cpudrv_comp_create(cpudrv_devstate_t *cpudsp);
1208906SEric.Saxe@Sun.COM static void cpudrv_monitor_disp(void *arg);
1218906SEric.Saxe@Sun.COM static void cpudrv_monitor(void *arg);
1224667Smh27603 
1234667Smh27603 /*
1244667Smh27603  * Driver global variables
1254667Smh27603  */
1264667Smh27603 uint_t cpudrv_debug = 0;
1274667Smh27603 void *cpudrv_state;
1288906SEric.Saxe@Sun.COM static uint_t cpudrv_idle_hwm = CPUDRV_IDLE_HWM;
1298906SEric.Saxe@Sun.COM static uint_t cpudrv_idle_lwm = CPUDRV_IDLE_LWM;
1308906SEric.Saxe@Sun.COM static uint_t cpudrv_idle_buf_zone = CPUDRV_IDLE_BUF_ZONE;
1318906SEric.Saxe@Sun.COM static uint_t cpudrv_idle_bhwm_cnt_max = CPUDRV_IDLE_BHWM_CNT_MAX;
1328906SEric.Saxe@Sun.COM static uint_t cpudrv_idle_blwm_cnt_max = CPUDRV_IDLE_BLWM_CNT_MAX;
1338906SEric.Saxe@Sun.COM static uint_t cpudrv_user_hwm = CPUDRV_USER_HWM;
1348906SEric.Saxe@Sun.COM 
1358906SEric.Saxe@Sun.COM boolean_t cpudrv_enabled = B_TRUE;
1364667Smh27603 
1374667Smh27603 /*
1384667Smh27603  * cpudrv_direct_pm allows user applications to directly control the
1394667Smh27603  * power state transitions (direct pm) without following the normal
1404667Smh27603  * direct pm protocol. This is needed because the normal protocol
1414667Smh27603  * requires that a device only be lowered when it is idle, and be
1424667Smh27603  * brought up when it request to do so by calling pm_raise_power().
1434667Smh27603  * Ignoring this protocol is harmless for CPU (other than speed).
1444667Smh27603  * Moreover it might be the case that CPU is never idle or wants
1454667Smh27603  * to be at higher speed because of the addition CPU cycles required
1464667Smh27603  * to run the user application.
1474667Smh27603  *
1484667Smh27603  * The driver will still report idle/busy status to the framework. Although
1494667Smh27603  * framework will ignore this information for direct pm devices and not
1504667Smh27603  * try to bring them down when idle, user applications can still use this
1514667Smh27603  * information if they wants.
1524667Smh27603  *
1534667Smh27603  * In the future, provide an ioctl to control setting of this mode. In
1544667Smh27603  * that case, this variable should move to the state structure and
1554667Smh27603  * be protected by the lock in the state structure.
1564667Smh27603  */
1574667Smh27603 int cpudrv_direct_pm = 0;
1584667Smh27603 
1594667Smh27603 /*
1604667Smh27603  * Arranges for the handler function to be called at the interval suitable
1614667Smh27603  * for current speed.
1624667Smh27603  */
1638906SEric.Saxe@Sun.COM #define	CPUDRV_MONITOR_INIT(cpudsp) { \
1648906SEric.Saxe@Sun.COM     if (cpudrv_is_enabled(cpudsp)) {	      \
1657319SMark.Haywood@Sun.COM 		ASSERT(mutex_owned(&(cpudsp)->lock)); \
1667319SMark.Haywood@Sun.COM 		(cpudsp)->cpudrv_pm.timeout_id = \
1678906SEric.Saxe@Sun.COM 		    timeout(cpudrv_monitor_disp, \
1687319SMark.Haywood@Sun.COM 		    (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \
1698906SEric.Saxe@Sun.COM 		    CPUDRV_QUANT_CNT_OTHR : \
1707319SMark.Haywood@Sun.COM 		    (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \
1717319SMark.Haywood@Sun.COM 	} \
1724667Smh27603 }
1734667Smh27603 
1744667Smh27603 /*
1754667Smh27603  * Arranges for the handler function not to be called back.
1764667Smh27603  */
1778906SEric.Saxe@Sun.COM #define	CPUDRV_MONITOR_FINI(cpudsp) { \
1784667Smh27603 	timeout_id_t tmp_tid; \
1794667Smh27603 	ASSERT(mutex_owned(&(cpudsp)->lock)); \
1804667Smh27603 	tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \
1814667Smh27603 	(cpudsp)->cpudrv_pm.timeout_id = 0; \
1824667Smh27603 	mutex_exit(&(cpudsp)->lock); \
1837319SMark.Haywood@Sun.COM 	if (tmp_tid != 0) { \
1847319SMark.Haywood@Sun.COM 		(void) untimeout(tmp_tid); \
1857319SMark.Haywood@Sun.COM 		mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \
1867319SMark.Haywood@Sun.COM 		while ((cpudsp)->cpudrv_pm.timeout_count != 0) \
1877319SMark.Haywood@Sun.COM 			cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \
1887319SMark.Haywood@Sun.COM 			    &(cpudsp)->cpudrv_pm.timeout_lock); \
1897319SMark.Haywood@Sun.COM 		mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \
1907319SMark.Haywood@Sun.COM 	} \
1914667Smh27603 	mutex_enter(&(cpudsp)->lock); \
1924667Smh27603 }
1934667Smh27603 
1944667Smh27603 int
_init(void)1954667Smh27603 _init(void)
1964667Smh27603 {
1974667Smh27603 	int	error;
1984667Smh27603 
1994667Smh27603 	DPRINTF(D_INIT, (" _init: function called\n"));
2004667Smh27603 	if ((error = ddi_soft_state_init(&cpudrv_state,
2014667Smh27603 	    sizeof (cpudrv_devstate_t), 0)) != 0) {
2024667Smh27603 		return (error);
2034667Smh27603 	}
2044667Smh27603 
2054667Smh27603 	if ((error = mod_install(&modlinkage)) != 0)  {
2064667Smh27603 		ddi_soft_state_fini(&cpudrv_state);
2074667Smh27603 	}
2084667Smh27603 
2094667Smh27603 	/*
2104667Smh27603 	 * Callbacks used by the PPM driver.
2114667Smh27603 	 */
2128906SEric.Saxe@Sun.COM 	CPUDRV_SET_PPM_CALLBACKS();
2134667Smh27603 	return (error);
2144667Smh27603 }
2154667Smh27603 
2164667Smh27603 int
_fini(void)2174667Smh27603 _fini(void)
2184667Smh27603 {
2194667Smh27603 	int	error;
2204667Smh27603 
2214667Smh27603 	DPRINTF(D_FINI, (" _fini: function called\n"));
2224667Smh27603 	if ((error = mod_remove(&modlinkage)) == 0) {
2234667Smh27603 		ddi_soft_state_fini(&cpudrv_state);
2244667Smh27603 	}
2254667Smh27603 
2264667Smh27603 	return (error);
2274667Smh27603 }
2284667Smh27603 
2294667Smh27603 int
_info(struct modinfo * modinfop)2304667Smh27603 _info(struct modinfo *modinfop)
2314667Smh27603 {
2324667Smh27603 	return (mod_info(&modlinkage, modinfop));
2334667Smh27603 }
2344667Smh27603 
2354667Smh27603 /*
2364667Smh27603  * Driver attach(9e) entry point.
2374667Smh27603  */
2384667Smh27603 static int
cpudrv_attach(dev_info_t * dip,ddi_attach_cmd_t cmd)2394667Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
2404667Smh27603 {
2414667Smh27603 	int			instance;
2424667Smh27603 	cpudrv_devstate_t	*cpudsp;
2434667Smh27603 
2444667Smh27603 	instance = ddi_get_instance(dip);
2454667Smh27603 
2464667Smh27603 	switch (cmd) {
2474667Smh27603 	case DDI_ATTACH:
2484667Smh27603 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
2494667Smh27603 		    "DDI_ATTACH called\n", instance));
2508906SEric.Saxe@Sun.COM 		if (!cpudrv_is_enabled(NULL))
2517319SMark.Haywood@Sun.COM 			return (DDI_FAILURE);
2524667Smh27603 		if (ddi_soft_state_zalloc(cpudrv_state, instance) !=
2534667Smh27603 		    DDI_SUCCESS) {
2544667Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2554667Smh27603 			    "can't allocate state", instance);
2568906SEric.Saxe@Sun.COM 			cpudrv_enabled = B_FALSE;
2574667Smh27603 			return (DDI_FAILURE);
2584667Smh27603 		}
2594667Smh27603 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
2604667Smh27603 		    NULL) {
2614667Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2624667Smh27603 			    "can't get state", instance);
2634667Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2648906SEric.Saxe@Sun.COM 			cpudrv_enabled = B_FALSE;
2654667Smh27603 			return (DDI_FAILURE);
2664667Smh27603 		}
2674667Smh27603 		cpudsp->dip = dip;
2684667Smh27603 
2694667Smh27603 		/*
2704667Smh27603 		 * Find CPU number for this dev_info node.
2714667Smh27603 		 */
2728906SEric.Saxe@Sun.COM 		if (!cpudrv_get_cpu_id(dip, &(cpudsp->cpu_id))) {
2734667Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2744667Smh27603 			    "can't convert dip to cpu_id", instance);
2754667Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2768906SEric.Saxe@Sun.COM 			cpudrv_enabled = B_FALSE;
2778906SEric.Saxe@Sun.COM 			return (DDI_FAILURE);
2788906SEric.Saxe@Sun.COM 		}
27910488SMark.Haywood@Sun.COM 
2807319SMark.Haywood@Sun.COM 		mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL);
2818906SEric.Saxe@Sun.COM 		if (cpudrv_is_enabled(cpudsp)) {
2828906SEric.Saxe@Sun.COM 			if (cpudrv_init(cpudsp) != DDI_SUCCESS) {
2838906SEric.Saxe@Sun.COM 				cpudrv_enabled = B_FALSE;
2848906SEric.Saxe@Sun.COM 				cpudrv_free(cpudsp);
2857319SMark.Haywood@Sun.COM 				ddi_soft_state_free(cpudrv_state, instance);
2867319SMark.Haywood@Sun.COM 				return (DDI_FAILURE);
2877319SMark.Haywood@Sun.COM 			}
2888906SEric.Saxe@Sun.COM 			if (cpudrv_comp_create(cpudsp) != DDI_SUCCESS) {
2898906SEric.Saxe@Sun.COM 				cpudrv_enabled = B_FALSE;
2908906SEric.Saxe@Sun.COM 				cpudrv_free(cpudsp);
2917319SMark.Haywood@Sun.COM 				ddi_soft_state_free(cpudrv_state, instance);
2927319SMark.Haywood@Sun.COM 				return (DDI_FAILURE);
2937319SMark.Haywood@Sun.COM 			}
2947319SMark.Haywood@Sun.COM 			if (ddi_prop_update_string(DDI_DEV_T_NONE,
2957319SMark.Haywood@Sun.COM 			    dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) {
2968906SEric.Saxe@Sun.COM 				cpudrv_enabled = B_FALSE;
2978906SEric.Saxe@Sun.COM 				cpudrv_free(cpudsp);
2987319SMark.Haywood@Sun.COM 				ddi_soft_state_free(cpudrv_state, instance);
2997319SMark.Haywood@Sun.COM 				return (DDI_FAILURE);
3007319SMark.Haywood@Sun.COM 			}
3017319SMark.Haywood@Sun.COM 
3027319SMark.Haywood@Sun.COM 			/*
3037319SMark.Haywood@Sun.COM 			 * Taskq is used to dispatch routine to monitor CPU
3047319SMark.Haywood@Sun.COM 			 * activities.
3057319SMark.Haywood@Sun.COM 			 */
30610488SMark.Haywood@Sun.COM 			cpudsp->cpudrv_pm.tq = ddi_taskq_create(dip,
30710488SMark.Haywood@Sun.COM 			    "cpudrv_monitor", CPUDRV_TASKQ_THREADS,
30810488SMark.Haywood@Sun.COM 			    TASKQ_DEFAULTPRI, 0);
3097319SMark.Haywood@Sun.COM 
3107319SMark.Haywood@Sun.COM 			mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL,
3117319SMark.Haywood@Sun.COM 			    MUTEX_DRIVER, NULL);
3127319SMark.Haywood@Sun.COM 			cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL,
3137319SMark.Haywood@Sun.COM 			    CV_DEFAULT, NULL);
3147319SMark.Haywood@Sun.COM 
3157319SMark.Haywood@Sun.COM 			/*
3167319SMark.Haywood@Sun.COM 			 * Driver needs to assume that CPU is running at
3177319SMark.Haywood@Sun.COM 			 * unknown speed at DDI_ATTACH and switch it to the
3187319SMark.Haywood@Sun.COM 			 * needed speed. We assume that initial needed speed
3197319SMark.Haywood@Sun.COM 			 * is full speed for us.
3207319SMark.Haywood@Sun.COM 			 */
3217319SMark.Haywood@Sun.COM 			/*
3228906SEric.Saxe@Sun.COM 			 * We need to take the lock because cpudrv_monitor()
3237319SMark.Haywood@Sun.COM 			 * will start running in parallel with attach().
3247319SMark.Haywood@Sun.COM 			 */
3257319SMark.Haywood@Sun.COM 			mutex_enter(&cpudsp->lock);
3267319SMark.Haywood@Sun.COM 			cpudsp->cpudrv_pm.cur_spd = NULL;
3277319SMark.Haywood@Sun.COM 			cpudsp->cpudrv_pm.pm_started = B_FALSE;
3287319SMark.Haywood@Sun.COM 			/*
3297319SMark.Haywood@Sun.COM 			 * We don't call pm_raise_power() directly from attach
3307319SMark.Haywood@Sun.COM 			 * because driver attach for a slave CPU node can
3317319SMark.Haywood@Sun.COM 			 * happen before the CPU is even initialized. We just
3327319SMark.Haywood@Sun.COM 			 * start the monitoring system which understands
3338409SMark.Haywood@Sun.COM 			 * unknown speed and moves CPU to top speed when it
3348409SMark.Haywood@Sun.COM 			 * has been initialized.
3357319SMark.Haywood@Sun.COM 			 */
3368906SEric.Saxe@Sun.COM 			CPUDRV_MONITOR_INIT(cpudsp);
3377319SMark.Haywood@Sun.COM 			mutex_exit(&cpudsp->lock);
3387319SMark.Haywood@Sun.COM 
3394667Smh27603 		}
3404667Smh27603 
34110488SMark.Haywood@Sun.COM 		if (!cpudrv_mach_init(cpudsp)) {
34210488SMark.Haywood@Sun.COM 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
34310488SMark.Haywood@Sun.COM 			    "cpudrv_mach_init failed", instance);
34410488SMark.Haywood@Sun.COM 			cpudrv_enabled = B_FALSE;
34510488SMark.Haywood@Sun.COM 			cpudrv_free(cpudsp);
34610488SMark.Haywood@Sun.COM 			ddi_soft_state_free(cpudrv_state, instance);
34710488SMark.Haywood@Sun.COM 			return (DDI_FAILURE);
34810488SMark.Haywood@Sun.COM 		}
34910488SMark.Haywood@Sun.COM 
3508906SEric.Saxe@Sun.COM 		CPUDRV_INSTALL_MAX_CHANGE_HANDLER(cpudsp);
3514667Smh27603 
35210488SMark.Haywood@Sun.COM 		(void) ddi_prop_update_int(DDI_DEV_T_NONE, dip,
35310488SMark.Haywood@Sun.COM 		    DDI_NO_AUTODETACH, 1);
3544667Smh27603 		ddi_report_dev(dip);
3554667Smh27603 		return (DDI_SUCCESS);
3564667Smh27603 
3574667Smh27603 	case DDI_RESUME:
3584667Smh27603 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
3594667Smh27603 		    "DDI_RESUME called\n", instance));
3607319SMark.Haywood@Sun.COM 
3617319SMark.Haywood@Sun.COM 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
3627319SMark.Haywood@Sun.COM 		ASSERT(cpudsp != NULL);
3637319SMark.Haywood@Sun.COM 
3647319SMark.Haywood@Sun.COM 		/*
3657319SMark.Haywood@Sun.COM 		 * Nothing to do for resume, if not doing active PM.
3667319SMark.Haywood@Sun.COM 		 */
3678906SEric.Saxe@Sun.COM 		if (!cpudrv_is_enabled(cpudsp))
3687319SMark.Haywood@Sun.COM 			return (DDI_SUCCESS);
3697319SMark.Haywood@Sun.COM 
3704667Smh27603 		mutex_enter(&cpudsp->lock);
3714667Smh27603 		/*
3724667Smh27603 		 * Driver needs to assume that CPU is running at unknown speed
3734667Smh27603 		 * at DDI_RESUME and switch it to the needed speed. We assume
3744667Smh27603 		 * that the needed speed is full speed for us.
3754667Smh27603 		 */
3764667Smh27603 		cpudsp->cpudrv_pm.cur_spd = NULL;
3778906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_INIT(cpudsp);
3784667Smh27603 		mutex_exit(&cpudsp->lock);
3798906SEric.Saxe@Sun.COM 		CPUDRV_REDEFINE_TOPSPEED(dip);
3804667Smh27603 		return (DDI_SUCCESS);
3814667Smh27603 
3824667Smh27603 	default:
3834667Smh27603 		return (DDI_FAILURE);
3844667Smh27603 	}
3854667Smh27603 }
3864667Smh27603 
3874667Smh27603 /*
3884667Smh27603  * Driver detach(9e) entry point.
3894667Smh27603  */
3904667Smh27603 static int
cpudrv_detach(dev_info_t * dip,ddi_detach_cmd_t cmd)3914667Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
3924667Smh27603 {
3934667Smh27603 	int			instance;
3944667Smh27603 	cpudrv_devstate_t	*cpudsp;
3954667Smh27603 	cpudrv_pm_t		*cpupm;
3964667Smh27603 
3974667Smh27603 	instance = ddi_get_instance(dip);
3984667Smh27603 
3994667Smh27603 	switch (cmd) {
4004667Smh27603 	case DDI_DETACH:
4014667Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
4024667Smh27603 		    "DDI_DETACH called\n", instance));
40310488SMark.Haywood@Sun.COM 
40410488SMark.Haywood@Sun.COM #if defined(__x86)
40510488SMark.Haywood@Sun.COM 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
40610488SMark.Haywood@Sun.COM 		ASSERT(cpudsp != NULL);
40710488SMark.Haywood@Sun.COM 
40810488SMark.Haywood@Sun.COM 		/*
40910488SMark.Haywood@Sun.COM 		 * Nothing to do for detach, if no doing active PM.
41010488SMark.Haywood@Sun.COM 		 */
41110488SMark.Haywood@Sun.COM 		if (!cpudrv_is_enabled(cpudsp))
41210488SMark.Haywood@Sun.COM 			return (DDI_SUCCESS);
41310488SMark.Haywood@Sun.COM 
41410488SMark.Haywood@Sun.COM 		/*
41510488SMark.Haywood@Sun.COM 		 * uninstall PPC/_TPC change notification handler
41610488SMark.Haywood@Sun.COM 		 */
41710488SMark.Haywood@Sun.COM 		CPUDRV_UNINSTALL_MAX_CHANGE_HANDLER(cpudsp);
41810488SMark.Haywood@Sun.COM 
41910488SMark.Haywood@Sun.COM 		/*
42010488SMark.Haywood@Sun.COM 		 * destruct platform specific resource
42110488SMark.Haywood@Sun.COM 		 */
42210488SMark.Haywood@Sun.COM 		if (!cpudrv_mach_fini(cpudsp))
42310488SMark.Haywood@Sun.COM 			return (DDI_FAILURE);
42410488SMark.Haywood@Sun.COM 
42510488SMark.Haywood@Sun.COM 		mutex_enter(&cpudsp->lock);
42610488SMark.Haywood@Sun.COM 		CPUDRV_MONITOR_FINI(cpudsp);
42710488SMark.Haywood@Sun.COM 		cv_destroy(&cpudsp->cpudrv_pm.timeout_cv);
42810488SMark.Haywood@Sun.COM 		mutex_destroy(&cpudsp->cpudrv_pm.timeout_lock);
42910488SMark.Haywood@Sun.COM 		ddi_taskq_destroy(cpudsp->cpudrv_pm.tq);
43010488SMark.Haywood@Sun.COM 		cpudrv_free(cpudsp);
43110488SMark.Haywood@Sun.COM 		mutex_exit(&cpudsp->lock);
43210488SMark.Haywood@Sun.COM 		mutex_destroy(&cpudsp->lock);
43310488SMark.Haywood@Sun.COM 		ddi_soft_state_free(cpudrv_state, instance);
43410488SMark.Haywood@Sun.COM 		(void) ddi_prop_update_int(DDI_DEV_T_NONE, dip,
43510488SMark.Haywood@Sun.COM 		    DDI_NO_AUTODETACH, 0);
43610488SMark.Haywood@Sun.COM 		return (DDI_SUCCESS);
43710488SMark.Haywood@Sun.COM 
43810488SMark.Haywood@Sun.COM #else
4394667Smh27603 		/*
4404667Smh27603 		 * If the only thing supported by the driver is power
4414667Smh27603 		 * management, we can in future enhance the driver and
4424667Smh27603 		 * framework that loads it to unload the driver when
4434667Smh27603 		 * user has disabled CPU power management.
4444667Smh27603 		 */
4454667Smh27603 		return (DDI_FAILURE);
44610488SMark.Haywood@Sun.COM #endif
4474667Smh27603 
4484667Smh27603 	case DDI_SUSPEND:
4494667Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
4504667Smh27603 		    "DDI_SUSPEND called\n", instance));
4517319SMark.Haywood@Sun.COM 
4527319SMark.Haywood@Sun.COM 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
4537319SMark.Haywood@Sun.COM 		ASSERT(cpudsp != NULL);
4547319SMark.Haywood@Sun.COM 
4557319SMark.Haywood@Sun.COM 		/*
4567319SMark.Haywood@Sun.COM 		 * Nothing to do for suspend, if not doing active PM.
4577319SMark.Haywood@Sun.COM 		 */
4588906SEric.Saxe@Sun.COM 		if (!cpudrv_is_enabled(cpudsp))
4597319SMark.Haywood@Sun.COM 			return (DDI_SUCCESS);
4607319SMark.Haywood@Sun.COM 
4614667Smh27603 		/*
4624667Smh27603 		 * During a checkpoint-resume sequence, framework will
4634667Smh27603 		 * stop interrupts to quiesce kernel activity. This will
4644667Smh27603 		 * leave our monitoring system ineffective. Handle this
4654667Smh27603 		 * by stopping our monitoring system and bringing CPU
4664667Smh27603 		 * to full speed. In case we are in special direct pm
4674667Smh27603 		 * mode, we leave the CPU at whatever speed it is. This
4684667Smh27603 		 * is harmless other than speed.
4694667Smh27603 		 */
4704667Smh27603 		mutex_enter(&cpudsp->lock);
4714667Smh27603 		cpupm = &(cpudsp->cpudrv_pm);
4724667Smh27603 
4734667Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - "
4748409SMark.Haywood@Sun.COM 		    "cur_spd %d, topspeed %d\n", instance,
4758409SMark.Haywood@Sun.COM 		    cpupm->cur_spd->pm_level,
4768906SEric.Saxe@Sun.COM 		    CPUDRV_TOPSPEED(cpupm)->pm_level));
4774667Smh27603 
4788906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_FINI(cpudsp);
4794667Smh27603 
4808409SMark.Haywood@Sun.COM 		if (!cpudrv_direct_pm && (cpupm->cur_spd !=
4818906SEric.Saxe@Sun.COM 		    CPUDRV_TOPSPEED(cpupm))) {
4824667Smh27603 			if (cpupm->pm_busycnt < 1) {
4838906SEric.Saxe@Sun.COM 				if ((pm_busy_component(dip, CPUDRV_COMP_NUM)
4844667Smh27603 				    == DDI_SUCCESS)) {
4854667Smh27603 					cpupm->pm_busycnt++;
4864667Smh27603 				} else {
4878906SEric.Saxe@Sun.COM 					CPUDRV_MONITOR_INIT(cpudsp);
4884667Smh27603 					mutex_exit(&cpudsp->lock);
4894667Smh27603 					cmn_err(CE_WARN, "cpudrv_detach: "
4904667Smh27603 					    "instance %d: can't busy CPU "
4914667Smh27603 					    "component", instance);
4924667Smh27603 					return (DDI_FAILURE);
4934667Smh27603 				}
4944667Smh27603 			}
4954667Smh27603 			mutex_exit(&cpudsp->lock);
4968906SEric.Saxe@Sun.COM 			if (pm_raise_power(dip, CPUDRV_COMP_NUM,
4978906SEric.Saxe@Sun.COM 			    CPUDRV_TOPSPEED(cpupm)->pm_level) !=
4988409SMark.Haywood@Sun.COM 			    DDI_SUCCESS) {
4994667Smh27603 				mutex_enter(&cpudsp->lock);
5008906SEric.Saxe@Sun.COM 				CPUDRV_MONITOR_INIT(cpudsp);
5014667Smh27603 				mutex_exit(&cpudsp->lock);
5024667Smh27603 				cmn_err(CE_WARN, "cpudrv_detach: instance %d: "
5038409SMark.Haywood@Sun.COM 				    "can't raise CPU power level to %d",
5048409SMark.Haywood@Sun.COM 				    instance,
5058906SEric.Saxe@Sun.COM 				    CPUDRV_TOPSPEED(cpupm)->pm_level);
5064667Smh27603 				return (DDI_FAILURE);
5074667Smh27603 			} else {
5084667Smh27603 				return (DDI_SUCCESS);
5094667Smh27603 			}
5104667Smh27603 		} else {
5114667Smh27603 			mutex_exit(&cpudsp->lock);
5124667Smh27603 			return (DDI_SUCCESS);
5134667Smh27603 		}
5144667Smh27603 
5154667Smh27603 	default:
5164667Smh27603 		return (DDI_FAILURE);
5174667Smh27603 	}
5184667Smh27603 }
5194667Smh27603 
5204667Smh27603 /*
5214667Smh27603  * Driver power(9e) entry point.
5224667Smh27603  *
5234667Smh27603  * Driver's notion of current power is set *only* in power(9e) entry point
5244667Smh27603  * after actual power change operation has been successfully completed.
5254667Smh27603  */
5264667Smh27603 /* ARGSUSED */
5274667Smh27603 static int
cpudrv_power(dev_info_t * dip,int comp,int level)5284667Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level)
5294667Smh27603 {
5304667Smh27603 	int			instance;
5314667Smh27603 	cpudrv_devstate_t	*cpudsp;
5328906SEric.Saxe@Sun.COM 	cpudrv_pm_t 		*cpudrvpm;
5334667Smh27603 	cpudrv_pm_spd_t		*new_spd;
5344667Smh27603 	boolean_t		is_ready;
5354667Smh27603 	int			ret;
5364667Smh27603 
5374667Smh27603 	instance = ddi_get_instance(dip);
5384667Smh27603 
5394667Smh27603 	DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n",
5404667Smh27603 	    instance, level));
5418906SEric.Saxe@Sun.COM 
5424667Smh27603 	if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) {
5438906SEric.Saxe@Sun.COM 		cmn_err(CE_WARN, "cpudrv_power: instance %d: can't "
5448906SEric.Saxe@Sun.COM 		    "get state", instance);
5454667Smh27603 		return (DDI_FAILURE);
5464667Smh27603 	}
5474667Smh27603 
548*10961Saubrey.li@intel.com 	/*
549*10961Saubrey.li@intel.com 	 * We're not ready until we can  get a cpu_t
550*10961Saubrey.li@intel.com 	 */
551*10961Saubrey.li@intel.com 	is_ready = (cpudrv_get_cpu(cpudsp) == DDI_SUCCESS);
552*10961Saubrey.li@intel.com 
5534667Smh27603 	mutex_enter(&cpudsp->lock);
5548906SEric.Saxe@Sun.COM 	cpudrvpm = &(cpudsp->cpudrv_pm);
5554667Smh27603 
5564667Smh27603 	/*
5574667Smh27603 	 * In normal operation, we fail if we are busy and request is
5584667Smh27603 	 * to lower the power level. We let this go through if the driver
5594667Smh27603 	 * is in special direct pm mode. On x86, we also let this through
5607319SMark.Haywood@Sun.COM 	 * if the change is due to a request to govern the max speed.
5614667Smh27603 	 */
5628906SEric.Saxe@Sun.COM 	if (!cpudrv_direct_pm && (cpudrvpm->pm_busycnt >= 1) &&
5638906SEric.Saxe@Sun.COM 	    !cpudrv_is_governor_thread(cpudrvpm)) {
5648906SEric.Saxe@Sun.COM 		if ((cpudrvpm->cur_spd != NULL) &&
5658906SEric.Saxe@Sun.COM 		    (level < cpudrvpm->cur_spd->pm_level)) {
5664667Smh27603 			mutex_exit(&cpudsp->lock);
5674667Smh27603 			return (DDI_FAILURE);
5684667Smh27603 		}
5694667Smh27603 	}
5704667Smh27603 
5718906SEric.Saxe@Sun.COM 	for (new_spd = cpudrvpm->head_spd; new_spd; new_spd =
5728906SEric.Saxe@Sun.COM 	    new_spd->down_spd) {
5734667Smh27603 		if (new_spd->pm_level == level)
5744667Smh27603 			break;
5754667Smh27603 	}
5764667Smh27603 	if (!new_spd) {
5778906SEric.Saxe@Sun.COM 		CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm);
5784667Smh27603 		mutex_exit(&cpudsp->lock);
5794667Smh27603 		cmn_err(CE_WARN, "cpudrv_power: instance %d: "
5804667Smh27603 		    "can't locate new CPU speed", instance);
5814667Smh27603 		return (DDI_FAILURE);
5824667Smh27603 	}
5834667Smh27603 
5844667Smh27603 	/*
5854667Smh27603 	 * We currently refuse to power manage if the CPU is not ready to
5864667Smh27603 	 * take cross calls (cross calls fail silently if CPU is not ready
5874667Smh27603 	 * for it).
5884667Smh27603 	 *
58910488SMark.Haywood@Sun.COM 	 * Additionally, for x86 platforms we cannot power manage an instance,
59010488SMark.Haywood@Sun.COM 	 * until it has been initialized.
5914667Smh27603 	 */
592*10961Saubrey.li@intel.com 	if (is_ready) {
593*10961Saubrey.li@intel.com 		is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id);
594*10961Saubrey.li@intel.com 		if (!is_ready) {
595*10961Saubrey.li@intel.com 			DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
596*10961Saubrey.li@intel.com 			    "CPU not ready for x-calls\n", instance));
597*10961Saubrey.li@intel.com 		} else if (!(is_ready = cpudrv_power_ready(cpudsp->cp))) {
598*10961Saubrey.li@intel.com 			DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
599*10961Saubrey.li@intel.com 			    "waiting for all CPUs to be power manageable\n",
600*10961Saubrey.li@intel.com 			    instance));
601*10961Saubrey.li@intel.com 		}
6024667Smh27603 	}
6034667Smh27603 	if (!is_ready) {
6048906SEric.Saxe@Sun.COM 		CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm);
6054667Smh27603 		mutex_exit(&cpudsp->lock);
6064667Smh27603 		return (DDI_FAILURE);
6074667Smh27603 	}
6084667Smh27603 
6094667Smh27603 	/*
6108906SEric.Saxe@Sun.COM 	 * Execute CPU specific routine on the requested CPU to
6118906SEric.Saxe@Sun.COM 	 * change its speed to normal-speed/divisor.
6125864Sesaxe 	 */
6138906SEric.Saxe@Sun.COM 	if ((ret = cpudrv_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) {
6148906SEric.Saxe@Sun.COM 		cmn_err(CE_WARN, "cpudrv_power: "
6158906SEric.Saxe@Sun.COM 		    "cpudrv_change_speed() return = %d", ret);
6168906SEric.Saxe@Sun.COM 		mutex_exit(&cpudsp->lock);
6178906SEric.Saxe@Sun.COM 		return (DDI_FAILURE);
6188906SEric.Saxe@Sun.COM 	}
6195864Sesaxe 
6205864Sesaxe 	/*
6214667Smh27603 	 * Reset idle threshold time for the new power level.
6224667Smh27603 	 */
6238906SEric.Saxe@Sun.COM 	if ((cpudrvpm->cur_spd != NULL) && (level <
6248906SEric.Saxe@Sun.COM 	    cpudrvpm->cur_spd->pm_level)) {
6258906SEric.Saxe@Sun.COM 		if (pm_idle_component(dip, CPUDRV_COMP_NUM) ==
6264667Smh27603 		    DDI_SUCCESS) {
6278906SEric.Saxe@Sun.COM 			if (cpudrvpm->pm_busycnt >= 1)
6288906SEric.Saxe@Sun.COM 				cpudrvpm->pm_busycnt--;
6298906SEric.Saxe@Sun.COM 		} else {
6308906SEric.Saxe@Sun.COM 			cmn_err(CE_WARN, "cpudrv_power: instance %d: "
6318906SEric.Saxe@Sun.COM 			    "can't idle CPU component",
6328906SEric.Saxe@Sun.COM 			    ddi_get_instance(dip));
6338906SEric.Saxe@Sun.COM 		}
6344667Smh27603 	}
6354667Smh27603 	/*
6364667Smh27603 	 * Reset various parameters because we are now running at new speed.
6374667Smh27603 	 */
6388906SEric.Saxe@Sun.COM 	cpudrvpm->lastquan_mstate[CMS_IDLE] = 0;
6398906SEric.Saxe@Sun.COM 	cpudrvpm->lastquan_mstate[CMS_SYSTEM] = 0;
6408906SEric.Saxe@Sun.COM 	cpudrvpm->lastquan_mstate[CMS_USER] = 0;
6418906SEric.Saxe@Sun.COM 	cpudrvpm->lastquan_ticks = 0;
6428906SEric.Saxe@Sun.COM 	cpudrvpm->cur_spd = new_spd;
6438906SEric.Saxe@Sun.COM 	CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm);
6444667Smh27603 	mutex_exit(&cpudsp->lock);
6454667Smh27603 
6464667Smh27603 	return (DDI_SUCCESS);
6474667Smh27603 }
6484667Smh27603 
6494667Smh27603 /*
6504667Smh27603  * Initialize power management data.
6514667Smh27603  */
6524667Smh27603 static int
cpudrv_init(cpudrv_devstate_t * cpudsp)6538906SEric.Saxe@Sun.COM cpudrv_init(cpudrv_devstate_t *cpudsp)
6544667Smh27603 {
6554667Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
6564667Smh27603 	cpudrv_pm_spd_t	*cur_spd;
6574667Smh27603 	cpudrv_pm_spd_t	*prev_spd = NULL;
6584667Smh27603 	int		*speeds;
6594667Smh27603 	uint_t		nspeeds;
6604667Smh27603 	int		idle_cnt_percent;
6614667Smh27603 	int		user_cnt_percent;
6624667Smh27603 	int		i;
6634667Smh27603 
6648906SEric.Saxe@Sun.COM 	CPUDRV_GET_SPEEDS(cpudsp, speeds, nspeeds);
6654667Smh27603 	if (nspeeds < 2) {
6664667Smh27603 		/* Need at least two speeds to power manage */
6678906SEric.Saxe@Sun.COM 		CPUDRV_FREE_SPEEDS(speeds, nspeeds);
6684667Smh27603 		return (DDI_FAILURE);
6694667Smh27603 	}
6704667Smh27603 	cpupm->num_spd = nspeeds;
6714667Smh27603 
6724667Smh27603 	/*
6734667Smh27603 	 * Calculate the watermarks and other parameters based on the
6744667Smh27603 	 * supplied speeds.
6754667Smh27603 	 *
6764667Smh27603 	 * One of the basic assumption is that for X amount of CPU work,
6774667Smh27603 	 * if CPU is slowed down by a factor of N, the time it takes to
6784667Smh27603 	 * do the same work will be N * X.
6794667Smh27603 	 *
6804667Smh27603 	 * The driver declares that a CPU is idle and ready for slowed down,
6814667Smh27603 	 * if amount of idle thread is more than the current speed idle_hwm
6824667Smh27603 	 * without dropping below idle_hwm a number of consecutive sampling
6834667Smh27603 	 * intervals and number of running threads in user mode are below
6844667Smh27603 	 * user_lwm.  We want to set the current user_lwm such that if we
6854667Smh27603 	 * just switched to the next slower speed with no change in real work
6864667Smh27603 	 * load, the amount of user threads at the slower speed will be such
6874667Smh27603 	 * that it falls below the slower speed's user_hwm.  If we didn't do
6884667Smh27603 	 * that then we will just come back to the higher speed as soon as we
6894667Smh27603 	 * go down even with no change in work load.
6904667Smh27603 	 * The user_hwm is a fixed precentage and not calculated dynamically.
6914667Smh27603 	 *
6924667Smh27603 	 * We bring the CPU up if idle thread at current speed is less than
6934667Smh27603 	 * the current speed idle_lwm for a number of consecutive sampling
6944667Smh27603 	 * intervals or user threads are above the user_hwm for the current
6954667Smh27603 	 * speed.
6964667Smh27603 	 */
6974667Smh27603 	for (i = 0; i < nspeeds; i++) {
6984667Smh27603 		cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP);
6994667Smh27603 		cur_spd->speed = speeds[i];
7004667Smh27603 		if (i == 0) {	/* normal speed */
7014667Smh27603 			cpupm->head_spd = cur_spd;
7028906SEric.Saxe@Sun.COM 			CPUDRV_TOPSPEED(cpupm) = cur_spd;
7038906SEric.Saxe@Sun.COM 			cur_spd->quant_cnt = CPUDRV_QUANT_CNT_NORMAL;
7044667Smh27603 			cur_spd->idle_hwm =
7058906SEric.Saxe@Sun.COM 			    (cpudrv_idle_hwm * cur_spd->quant_cnt) / 100;
7064667Smh27603 			/* can't speed anymore */
7074667Smh27603 			cur_spd->idle_lwm = 0;
7084667Smh27603 			cur_spd->user_hwm = UINT_MAX;
7094667Smh27603 		} else {
7108906SEric.Saxe@Sun.COM 			cur_spd->quant_cnt = CPUDRV_QUANT_CNT_OTHR;
7114667Smh27603 			ASSERT(prev_spd != NULL);
7124667Smh27603 			prev_spd->down_spd = cur_spd;
7134667Smh27603 			cur_spd->up_spd = cpupm->head_spd;
7144667Smh27603 
7154667Smh27603 			/*
7164667Smh27603 			 * Let's assume CPU is considered idle at full speed
7174667Smh27603 			 * when it is spending I% of time in running the idle
7184667Smh27603 			 * thread.  At full speed, CPU will be busy (100 - I) %
7194667Smh27603 			 * of times.  This % of busyness increases by factor of
7204667Smh27603 			 * N as CPU slows down.  CPU that is idle I% of times
7214667Smh27603 			 * in full speed, it is idle (100 - ((100 - I) * N)) %
7224667Smh27603 			 * of times in N speed.  The idle_lwm is a fixed
7234667Smh27603 			 * percentage.  A large value of N may result in
7244667Smh27603 			 * idle_hwm to go below idle_lwm.  We need to make sure
7254667Smh27603 			 * that there is at least a buffer zone seperation
7264667Smh27603 			 * between the idle_lwm and idle_hwm values.
7274667Smh27603 			 */
7288906SEric.Saxe@Sun.COM 			idle_cnt_percent = CPUDRV_IDLE_CNT_PERCENT(
7298906SEric.Saxe@Sun.COM 			    cpudrv_idle_hwm, speeds, i);
7304667Smh27603 			idle_cnt_percent = max(idle_cnt_percent,
7318906SEric.Saxe@Sun.COM 			    (cpudrv_idle_lwm + cpudrv_idle_buf_zone));
7324667Smh27603 			cur_spd->idle_hwm =
7334667Smh27603 			    (idle_cnt_percent * cur_spd->quant_cnt) / 100;
7344667Smh27603 			cur_spd->idle_lwm =
7358906SEric.Saxe@Sun.COM 			    (cpudrv_idle_lwm * cur_spd->quant_cnt) / 100;
7364667Smh27603 
7374667Smh27603 			/*
7384667Smh27603 			 * The lwm for user threads are determined such that
7394667Smh27603 			 * if CPU slows down, the load of work in the
7404667Smh27603 			 * new speed would still keep the CPU at or below the
7414667Smh27603 			 * user_hwm in the new speed.  This is to prevent
7424667Smh27603 			 * the quick jump back up to higher speed.
7434667Smh27603 			 */
7448906SEric.Saxe@Sun.COM 			cur_spd->user_hwm = (cpudrv_user_hwm *
7454667Smh27603 			    cur_spd->quant_cnt) / 100;
7468906SEric.Saxe@Sun.COM 			user_cnt_percent = CPUDRV_USER_CNT_PERCENT(
7478906SEric.Saxe@Sun.COM 			    cpudrv_user_hwm, speeds, i);
7484667Smh27603 			prev_spd->user_lwm =
7494667Smh27603 			    (user_cnt_percent * prev_spd->quant_cnt) / 100;
7504667Smh27603 		}
7514667Smh27603 		prev_spd = cur_spd;
7524667Smh27603 	}
7534667Smh27603 	/* Slowest speed. Can't slow down anymore */
7544667Smh27603 	cur_spd->idle_hwm = UINT_MAX;
7554667Smh27603 	cur_spd->user_lwm = -1;
7564667Smh27603 #ifdef	DEBUG
7578906SEric.Saxe@Sun.COM 	DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: head_spd spd %d, "
7584667Smh27603 	    "num_spd %d\n", ddi_get_instance(cpudsp->dip),
7594667Smh27603 	    cpupm->head_spd->speed, cpupm->num_spd));
7604667Smh27603 	for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) {
7618906SEric.Saxe@Sun.COM 		DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: speed %d, "
7624667Smh27603 		    "down_spd spd %d, idle_hwm %d, user_lwm %d, "
7634667Smh27603 		    "up_spd spd %d, idle_lwm %d, user_hwm %d, "
7644667Smh27603 		    "quant_cnt %d\n", ddi_get_instance(cpudsp->dip),
7654667Smh27603 		    cur_spd->speed,
7664667Smh27603 		    (cur_spd->down_spd ? cur_spd->down_spd->speed : 0),
7674667Smh27603 		    cur_spd->idle_hwm, cur_spd->user_lwm,
7684667Smh27603 		    (cur_spd->up_spd ? cur_spd->up_spd->speed : 0),
7694667Smh27603 		    cur_spd->idle_lwm, cur_spd->user_hwm,
7704667Smh27603 		    cur_spd->quant_cnt));
7714667Smh27603 	}
7724667Smh27603 #endif	/* DEBUG */
7738906SEric.Saxe@Sun.COM 	CPUDRV_FREE_SPEEDS(speeds, nspeeds);
7744667Smh27603 	return (DDI_SUCCESS);
7754667Smh27603 }
7764667Smh27603 
7774667Smh27603 /*
7784667Smh27603  * Free CPU power management data.
7794667Smh27603  */
7804667Smh27603 static void
cpudrv_free(cpudrv_devstate_t * cpudsp)7818906SEric.Saxe@Sun.COM cpudrv_free(cpudrv_devstate_t *cpudsp)
7824667Smh27603 {
7834667Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
7844667Smh27603 	cpudrv_pm_spd_t	*cur_spd, *next_spd;
7854667Smh27603 
7864667Smh27603 	cur_spd = cpupm->head_spd;
7874667Smh27603 	while (cur_spd) {
7884667Smh27603 		next_spd = cur_spd->down_spd;
7894667Smh27603 		kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t));
7904667Smh27603 		cur_spd = next_spd;
7914667Smh27603 	}
7924667Smh27603 	bzero(cpupm, sizeof (cpudrv_pm_t));
7934667Smh27603 }
7944667Smh27603 
7954667Smh27603 /*
7964667Smh27603  * Create pm-components property.
7974667Smh27603  */
7984667Smh27603 static int
cpudrv_comp_create(cpudrv_devstate_t * cpudsp)7998906SEric.Saxe@Sun.COM cpudrv_comp_create(cpudrv_devstate_t *cpudsp)
8004667Smh27603 {
8014667Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
8024667Smh27603 	cpudrv_pm_spd_t	*cur_spd;
8034667Smh27603 	char		**pmc;
8044667Smh27603 	int		size;
8054667Smh27603 	char		name[] = "NAME=CPU Speed";
8064667Smh27603 	int		i, j;
8074667Smh27603 	uint_t		comp_spd;
8084667Smh27603 	int		result = DDI_FAILURE;
8094667Smh27603 
8104667Smh27603 	pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP);
8118906SEric.Saxe@Sun.COM 	size = CPUDRV_COMP_SIZE();
8128906SEric.Saxe@Sun.COM 	if (cpupm->num_spd > CPUDRV_COMP_MAX_VAL) {
8138906SEric.Saxe@Sun.COM 		cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: "
8144667Smh27603 		    "number of speeds exceeded limits",
8154667Smh27603 		    ddi_get_instance(cpudsp->dip));
8164667Smh27603 		kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
8174667Smh27603 		return (result);
8184667Smh27603 	}
8194667Smh27603 
8204667Smh27603 	for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0;
8214667Smh27603 	    i--, cur_spd = cur_spd->down_spd) {
8224667Smh27603 		cur_spd->pm_level = i;
8234667Smh27603 		pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP);
8248906SEric.Saxe@Sun.COM 		comp_spd = CPUDRV_COMP_SPEED(cpupm, cur_spd);
8258906SEric.Saxe@Sun.COM 		if (comp_spd > CPUDRV_COMP_MAX_VAL) {
8268906SEric.Saxe@Sun.COM 			cmn_err(CE_WARN, "cpudrv_comp_create: "
8274667Smh27603 			    "instance %d: speed exceeded limits",
8284667Smh27603 			    ddi_get_instance(cpudsp->dip));
8294667Smh27603 			for (j = cpupm->num_spd; j >= i; j--) {
8304667Smh27603 				kmem_free(pmc[j], size * sizeof (char));
8314667Smh27603 			}
8324667Smh27603 			kmem_free(pmc, (cpupm->num_spd + 1) *
8334667Smh27603 			    sizeof (char *));
8344667Smh27603 			return (result);
8354667Smh27603 		}
8368906SEric.Saxe@Sun.COM 		CPUDRV_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd)
8378906SEric.Saxe@Sun.COM 		DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: "
8384667Smh27603 		    "instance %d: pm-components power level %d string '%s'\n",
8394667Smh27603 		    ddi_get_instance(cpudsp->dip), i, pmc[i]));
8404667Smh27603 	}
8414667Smh27603 	pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP);
8424667Smh27603 	(void) strcat(pmc[0], name);
8438906SEric.Saxe@Sun.COM 	DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: instance %d: "
8444667Smh27603 	    "pm-components component name '%s'\n",
8454667Smh27603 	    ddi_get_instance(cpudsp->dip), pmc[0]));
8464667Smh27603 
8474667Smh27603 	if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip,
8484667Smh27603 	    "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) {
8494667Smh27603 		result = DDI_SUCCESS;
8504667Smh27603 	} else {
8518906SEric.Saxe@Sun.COM 		cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: "
8524667Smh27603 		    "can't create pm-components property",
8534667Smh27603 		    ddi_get_instance(cpudsp->dip));
8544667Smh27603 	}
8554667Smh27603 
8564667Smh27603 	for (i = cpupm->num_spd; i > 0; i--) {
8574667Smh27603 		kmem_free(pmc[i], size * sizeof (char));
8584667Smh27603 	}
8594667Smh27603 	kmem_free(pmc[0], sizeof (name));
8604667Smh27603 	kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
8614667Smh27603 	return (result);
8624667Smh27603 }
8634667Smh27603 
8644667Smh27603 /*
8654667Smh27603  * Mark a component idle.
8664667Smh27603  */
8678906SEric.Saxe@Sun.COM #define	CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm) { \
8684667Smh27603 	if ((cpupm)->pm_busycnt >= 1) { \
8698906SEric.Saxe@Sun.COM 		if (pm_idle_component((dip), CPUDRV_COMP_NUM) == \
8704667Smh27603 		    DDI_SUCCESS) { \
8718906SEric.Saxe@Sun.COM 			DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \
8724667Smh27603 			    "instance %d: pm_idle_component called\n", \
8734667Smh27603 			    ddi_get_instance((dip)))); \
8744667Smh27603 			(cpupm)->pm_busycnt--; \
8754667Smh27603 		} else { \
8768906SEric.Saxe@Sun.COM 			cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \
8774667Smh27603 			    "can't idle CPU component", \
8784667Smh27603 			    ddi_get_instance((dip))); \
8794667Smh27603 		} \
8804667Smh27603 	} \
8814667Smh27603 }
8824667Smh27603 
8834667Smh27603 /*
8844667Smh27603  * Marks a component busy in both PM framework and driver state structure.
8854667Smh27603  */
8868906SEric.Saxe@Sun.COM #define	CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm) { \
8874667Smh27603 	if ((cpupm)->pm_busycnt < 1) { \
8888906SEric.Saxe@Sun.COM 		if (pm_busy_component((dip), CPUDRV_COMP_NUM) == \
8894667Smh27603 		    DDI_SUCCESS) { \
8908906SEric.Saxe@Sun.COM 			DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \
8914667Smh27603 			    "instance %d: pm_busy_component called\n", \
8924667Smh27603 			    ddi_get_instance((dip)))); \
8934667Smh27603 			(cpupm)->pm_busycnt++; \
8944667Smh27603 		} else { \
8958906SEric.Saxe@Sun.COM 			cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \
8964667Smh27603 			    "can't busy CPU component", \
8974667Smh27603 			    ddi_get_instance((dip))); \
8984667Smh27603 		} \
8994667Smh27603 	} \
9004667Smh27603 }
9014667Smh27603 
9024667Smh27603 /*
9034667Smh27603  * Marks a component busy and calls pm_raise_power().
9044667Smh27603  */
9059766SMark.Haywood@Sun.COM #define	CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_spd) { \
9069766SMark.Haywood@Sun.COM 	int ret; \
9074667Smh27603 	/* \
9084667Smh27603 	 * Mark driver and PM framework busy first so framework doesn't try \
9094667Smh27603 	 * to bring CPU to lower speed when we need to be at higher speed. \
9104667Smh27603 	 */ \
9118906SEric.Saxe@Sun.COM 	CPUDRV_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \
9124667Smh27603 	mutex_exit(&(cpudsp)->lock); \
9138906SEric.Saxe@Sun.COM 	DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " \
9144667Smh27603 	    "pm_raise_power called to %d\n", ddi_get_instance((dip)), \
9159766SMark.Haywood@Sun.COM 		(new_spd->pm_level))); \
9169766SMark.Haywood@Sun.COM 	ret = pm_raise_power((dip), CPUDRV_COMP_NUM, (new_spd->pm_level)); \
9179766SMark.Haywood@Sun.COM 	if (ret != DDI_SUCCESS) { \
9188906SEric.Saxe@Sun.COM 		cmn_err(CE_WARN, "cpudrv_monitor: instance %d: can't " \
9194667Smh27603 		    "raise CPU power level", ddi_get_instance((dip))); \
9204667Smh27603 	} \
9214667Smh27603 	mutex_enter(&(cpudsp)->lock); \
9229766SMark.Haywood@Sun.COM 	if (ret == DDI_SUCCESS && cpudsp->cpudrv_pm.cur_spd == NULL) { \
9239766SMark.Haywood@Sun.COM 		cpudsp->cpudrv_pm.cur_spd = new_spd; \
9249766SMark.Haywood@Sun.COM 	} \
9254667Smh27603 }
9264667Smh27603 
9274667Smh27603 /*
9284667Smh27603  * In order to monitor a CPU, we need to hold cpu_lock to access CPU
9294667Smh27603  * statistics. Holding cpu_lock is not allowed from a callout routine.
9304667Smh27603  * We dispatch a taskq to do that job.
9314667Smh27603  */
9324667Smh27603 static void
cpudrv_monitor_disp(void * arg)9338906SEric.Saxe@Sun.COM cpudrv_monitor_disp(void *arg)
9344667Smh27603 {
9354667Smh27603 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
9364667Smh27603 
9374667Smh27603 	/*
9384667Smh27603 	 * We are here because the last task has scheduled a timeout.
9394667Smh27603 	 * The queue should be empty at this time.
9404667Smh27603 	 */
9414667Smh27603 	mutex_enter(&cpudsp->cpudrv_pm.timeout_lock);
94210488SMark.Haywood@Sun.COM 	if ((ddi_taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_monitor, arg,
94310488SMark.Haywood@Sun.COM 	    DDI_NOSLEEP)) != DDI_SUCCESS) {
9444667Smh27603 		mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
9458906SEric.Saxe@Sun.COM 		DPRINTF(D_PM_MONITOR, ("cpudrv_monitor_disp: failed to "
9468906SEric.Saxe@Sun.COM 		    "dispatch the cpudrv_monitor taskq\n"));
9474667Smh27603 		mutex_enter(&cpudsp->lock);
9488906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_INIT(cpudsp);
9494667Smh27603 		mutex_exit(&cpudsp->lock);
9504667Smh27603 		return;
9514667Smh27603 	}
9524667Smh27603 	cpudsp->cpudrv_pm.timeout_count++;
9534667Smh27603 	mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
9544667Smh27603 }
9554667Smh27603 
9564667Smh27603 /*
9574667Smh27603  * Monitors each CPU for the amount of time idle thread was running in the
9584667Smh27603  * last quantum and arranges for the CPU to go to the lower or higher speed.
9594667Smh27603  * Called at the time interval appropriate for the current speed. The
9608906SEric.Saxe@Sun.COM  * time interval for normal speed is CPUDRV_QUANT_CNT_NORMAL. The time
9614667Smh27603  * interval for other speeds (including unknown speed) is
9628906SEric.Saxe@Sun.COM  * CPUDRV_QUANT_CNT_OTHR.
9634667Smh27603  */
9644667Smh27603 static void
cpudrv_monitor(void * arg)9658906SEric.Saxe@Sun.COM cpudrv_monitor(void *arg)
9664667Smh27603 {
9674667Smh27603 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
9684667Smh27603 	cpudrv_pm_t		*cpupm;
9694667Smh27603 	cpudrv_pm_spd_t		*cur_spd, *new_spd;
9704667Smh27603 	dev_info_t		*dip;
9714667Smh27603 	uint_t			idle_cnt, user_cnt, system_cnt;
9728627SMark.Haywood@Sun.COM 	clock_t			ticks;
9738627SMark.Haywood@Sun.COM 	uint_t			tick_cnt;
9744667Smh27603 	hrtime_t		msnsecs[NCMSTATES];
9754667Smh27603 	boolean_t		is_ready;
9764667Smh27603 
9774667Smh27603 #define	GET_CPU_MSTATE_CNT(state, cnt) \
9784667Smh27603 	msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \
9794667Smh27603 	if (cpupm->lastquan_mstate[state] > msnsecs[state]) \
9804667Smh27603 		msnsecs[state] = cpupm->lastquan_mstate[state]; \
9814667Smh27603 	cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \
9824667Smh27603 	cpupm->lastquan_mstate[state] = msnsecs[state]
9834667Smh27603 
984*10961Saubrey.li@intel.com 	/*
985*10961Saubrey.li@intel.com 	 * We're not ready until we can  get a cpu_t
986*10961Saubrey.li@intel.com 	 */
987*10961Saubrey.li@intel.com 	is_ready = (cpudrv_get_cpu(cpudsp) == DDI_SUCCESS);
988*10961Saubrey.li@intel.com 
9894667Smh27603 	mutex_enter(&cpudsp->lock);
9904667Smh27603 	cpupm = &(cpudsp->cpudrv_pm);
9914667Smh27603 	if (cpupm->timeout_id == 0) {
9924667Smh27603 		mutex_exit(&cpudsp->lock);
9934667Smh27603 		goto do_return;
9944667Smh27603 	}
9954667Smh27603 	cur_spd = cpupm->cur_spd;
9964667Smh27603 	dip = cpudsp->dip;
9974667Smh27603 
9984667Smh27603 	/*
9994667Smh27603 	 * We assume that a CPU is initialized and has a valid cpu_t
10004667Smh27603 	 * structure, if it is ready for cross calls. If this changes,
10014667Smh27603 	 * additional checks might be needed.
10024667Smh27603 	 *
100310488SMark.Haywood@Sun.COM 	 * Additionally, for x86 platforms we cannot power manage an
100410488SMark.Haywood@Sun.COM 	 * instance, until it has been initialized.
10054667Smh27603 	 */
1006*10961Saubrey.li@intel.com 	if (is_ready) {
1007*10961Saubrey.li@intel.com 		is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id);
1008*10961Saubrey.li@intel.com 		if (!is_ready) {
1009*10961Saubrey.li@intel.com 			DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: "
1010*10961Saubrey.li@intel.com 			    "CPU not ready for x-calls\n",
1011*10961Saubrey.li@intel.com 			    ddi_get_instance(dip)));
1012*10961Saubrey.li@intel.com 		} else if (!(is_ready = cpudrv_power_ready(cpudsp->cp))) {
1013*10961Saubrey.li@intel.com 			DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: "
1014*10961Saubrey.li@intel.com 			    "waiting for all CPUs to be power manageable\n",
1015*10961Saubrey.li@intel.com 			    ddi_get_instance(dip)));
1016*10961Saubrey.li@intel.com 		}
10174667Smh27603 	}
10184667Smh27603 	if (!is_ready) {
10194667Smh27603 		/*
10204667Smh27603 		 * Make sure that we are busy so that framework doesn't
10214667Smh27603 		 * try to bring us down in this situation.
10224667Smh27603 		 */
10238906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm);
10248906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_INIT(cpudsp);
10254667Smh27603 		mutex_exit(&cpudsp->lock);
10264667Smh27603 		goto do_return;
10274667Smh27603 	}
10284667Smh27603 
10294667Smh27603 	/*
10304667Smh27603 	 * Make sure that we are still not at unknown power level.
10314667Smh27603 	 */
10324667Smh27603 	if (cur_spd == NULL) {
10338906SEric.Saxe@Sun.COM 		DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: "
10344667Smh27603 		    "cur_spd is unknown\n", ddi_get_instance(dip)));
10358906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
10369766SMark.Haywood@Sun.COM 		    CPUDRV_TOPSPEED(cpupm));
10374667Smh27603 		/*
10384667Smh27603 		 * We just changed the speed. Wait till at least next
10394667Smh27603 		 * call to this routine before proceeding ahead.
10404667Smh27603 		 */
10418906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_INIT(cpudsp);
10424667Smh27603 		mutex_exit(&cpudsp->lock);
10434667Smh27603 		goto do_return;
10444667Smh27603 	}
10454667Smh27603 
10464877Smh27603 	if (!cpupm->pm_started) {
10474877Smh27603 		cpupm->pm_started = B_TRUE;
10488906SEric.Saxe@Sun.COM 		cpudrv_set_supp_freqs(cpudsp);
10494877Smh27603 	}
10504667Smh27603 
10518906SEric.Saxe@Sun.COM 	get_cpu_mstate(cpudsp->cp, msnsecs);
10524667Smh27603 	GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt);
10534667Smh27603 	GET_CPU_MSTATE_CNT(CMS_USER, user_cnt);
10544667Smh27603 	GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt);
10554667Smh27603 
10564667Smh27603 	/*
10574667Smh27603 	 * We can't do anything when we have just switched to a state
10584667Smh27603 	 * because there is no valid timestamp.
10594667Smh27603 	 */
10608627SMark.Haywood@Sun.COM 	if (cpupm->lastquan_ticks == 0) {
10618627SMark.Haywood@Sun.COM 		cpupm->lastquan_ticks = NSEC_TO_TICK(gethrtime());
10628906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_INIT(cpudsp);
10634667Smh27603 		mutex_exit(&cpudsp->lock);
10644667Smh27603 		goto do_return;
10654667Smh27603 	}
10664667Smh27603 
10674667Smh27603 	/*
10684667Smh27603 	 * Various watermarks are based on this routine being called back
10694667Smh27603 	 * exactly at the requested period. This is not guaranteed
10704667Smh27603 	 * because this routine is called from a taskq that is dispatched
10714667Smh27603 	 * from a timeout routine.  Handle this by finding out how many
10728627SMark.Haywood@Sun.COM 	 * ticks have elapsed since the last call and adjusting
10734667Smh27603 	 * the idle_cnt based on the delay added to the requested period
10744667Smh27603 	 * by timeout and taskq.
10754667Smh27603 	 */
10768627SMark.Haywood@Sun.COM 	ticks = NSEC_TO_TICK(gethrtime());
10778627SMark.Haywood@Sun.COM 	tick_cnt = ticks - cpupm->lastquan_ticks;
10788627SMark.Haywood@Sun.COM 	ASSERT(tick_cnt != 0);
10798627SMark.Haywood@Sun.COM 	cpupm->lastquan_ticks = ticks;
1080*10961Saubrey.li@intel.com 
10814667Smh27603 	/*
10824667Smh27603 	 * Time taken between recording the current counts and
10834667Smh27603 	 * arranging the next call of this routine is an error in our
10844667Smh27603 	 * calculation. We minimize the error by calling
10858906SEric.Saxe@Sun.COM 	 * CPUDRV_MONITOR_INIT() here instead of end of this routine.
10864667Smh27603 	 */
10878906SEric.Saxe@Sun.COM 	CPUDRV_MONITOR_INIT(cpudsp);
10888906SEric.Saxe@Sun.COM 	DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_monitor: instance %d: "
10894667Smh27603 	    "idle count %d, user count %d, system count %d, pm_level %d, "
10904667Smh27603 	    "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt,
10914667Smh27603 	    system_cnt, cur_spd->pm_level, cpupm->pm_busycnt));
10924667Smh27603 
10934667Smh27603 #ifdef	DEBUG
10944667Smh27603 	/*
10954667Smh27603 	 * Notify that timeout and taskq has caused delays and we need to
10964667Smh27603 	 * scale our parameters accordingly.
10974667Smh27603 	 *
10984667Smh27603 	 * To get accurate result, don't turn on other DPRINTFs with
10994667Smh27603 	 * the following DPRINTF. PROM calls generated by other
11004667Smh27603 	 * DPRINTFs changes the timing.
11014667Smh27603 	 */
11028627SMark.Haywood@Sun.COM 	if (tick_cnt > cur_spd->quant_cnt) {
11038906SEric.Saxe@Sun.COM 		DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_monitor: instance %d: "
11048627SMark.Haywood@Sun.COM 		    "tick count %d > quantum_count %u\n",
11058627SMark.Haywood@Sun.COM 		    ddi_get_instance(dip), tick_cnt, cur_spd->quant_cnt));
11064667Smh27603 	}
11074667Smh27603 #endif	/* DEBUG */
11084667Smh27603 
11094667Smh27603 	/*
11104667Smh27603 	 * Adjust counts based on the delay added by timeout and taskq.
11114667Smh27603 	 */
11128627SMark.Haywood@Sun.COM 	idle_cnt = (idle_cnt * cur_spd->quant_cnt) / tick_cnt;
11138627SMark.Haywood@Sun.COM 	user_cnt = (user_cnt * cur_spd->quant_cnt) / tick_cnt;
11148627SMark.Haywood@Sun.COM 
11154667Smh27603 	if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm &&
11168906SEric.Saxe@Sun.COM 	    cur_spd->idle_blwm_cnt >= cpudrv_idle_blwm_cnt_max)) {
11174667Smh27603 		cur_spd->idle_blwm_cnt = 0;
11184667Smh27603 		cur_spd->idle_bhwm_cnt = 0;
11194667Smh27603 		/*
11204667Smh27603 		 * In normal situation, arrange to go to next higher speed.
11214667Smh27603 		 * If we are running in special direct pm mode, we just stay
11224667Smh27603 		 * at the current speed.
11234667Smh27603 		 */
11244667Smh27603 		if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) {
11258906SEric.Saxe@Sun.COM 			CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm);
11264667Smh27603 		} else {
11274667Smh27603 			new_spd = cur_spd->up_spd;
11288906SEric.Saxe@Sun.COM 			CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
11299766SMark.Haywood@Sun.COM 			    new_spd);
11304667Smh27603 		}
11314667Smh27603 	} else if ((user_cnt <= cur_spd->user_lwm) &&
11328906SEric.Saxe@Sun.COM 	    (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cpudsp->cp)) {
11334667Smh27603 		cur_spd->idle_blwm_cnt = 0;
11344667Smh27603 		cur_spd->idle_bhwm_cnt = 0;
11354667Smh27603 		/*
11364667Smh27603 		 * Arrange to go to next lower speed by informing our idle
11374667Smh27603 		 * status to the power management framework.
11384667Smh27603 		 */
11398906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm);
11404667Smh27603 	} else {
11414667Smh27603 		/*
11424667Smh27603 		 * If we are between the idle water marks and have not
11434667Smh27603 		 * been here enough consecutive times to be considered
11444667Smh27603 		 * busy, just increment the count and return.
11454667Smh27603 		 */
11464667Smh27603 		if ((idle_cnt < cur_spd->idle_hwm) &&
11474667Smh27603 		    (idle_cnt >= cur_spd->idle_lwm) &&
11488906SEric.Saxe@Sun.COM 		    (cur_spd->idle_bhwm_cnt < cpudrv_idle_bhwm_cnt_max)) {
11494667Smh27603 			cur_spd->idle_blwm_cnt = 0;
11504667Smh27603 			cur_spd->idle_bhwm_cnt++;
11514667Smh27603 			mutex_exit(&cpudsp->lock);
11524667Smh27603 			goto do_return;
11534667Smh27603 		}
11544667Smh27603 		if (idle_cnt < cur_spd->idle_lwm) {
11554667Smh27603 			cur_spd->idle_blwm_cnt++;
11564667Smh27603 			cur_spd->idle_bhwm_cnt = 0;
11574667Smh27603 		}
11584667Smh27603 		/*
11594667Smh27603 		 * Arranges to stay at the current speed.
11604667Smh27603 		 */
11618906SEric.Saxe@Sun.COM 		CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm);
11624667Smh27603 	}
11634667Smh27603 	mutex_exit(&cpudsp->lock);
11644667Smh27603 do_return:
11654667Smh27603 	mutex_enter(&cpupm->timeout_lock);
11664667Smh27603 	ASSERT(cpupm->timeout_count > 0);
11674667Smh27603 	cpupm->timeout_count--;
11684667Smh27603 	cv_signal(&cpupm->timeout_cv);
11694667Smh27603 	mutex_exit(&cpupm->timeout_lock);
11704667Smh27603 }
1171*10961Saubrey.li@intel.com 
1172*10961Saubrey.li@intel.com /*
1173*10961Saubrey.li@intel.com  * get cpu_t structure for cpudrv_devstate_t
1174*10961Saubrey.li@intel.com  */
1175*10961Saubrey.li@intel.com int
cpudrv_get_cpu(cpudrv_devstate_t * cpudsp)1176*10961Saubrey.li@intel.com cpudrv_get_cpu(cpudrv_devstate_t *cpudsp)
1177*10961Saubrey.li@intel.com {
1178*10961Saubrey.li@intel.com 	ASSERT(cpudsp != NULL);
1179*10961Saubrey.li@intel.com 
1180*10961Saubrey.li@intel.com 	/*
1181*10961Saubrey.li@intel.com 	 * return DDI_SUCCESS if cpudrv_devstate_t
1182*10961Saubrey.li@intel.com 	 * already contains cpu_t structure
1183*10961Saubrey.li@intel.com 	 */
1184*10961Saubrey.li@intel.com 	if (cpudsp->cp != NULL)
1185*10961Saubrey.li@intel.com 		return (DDI_SUCCESS);
1186*10961Saubrey.li@intel.com 
1187*10961Saubrey.li@intel.com 	if (MUTEX_HELD(&cpu_lock)) {
1188*10961Saubrey.li@intel.com 		cpudsp->cp = cpu_get(cpudsp->cpu_id);
1189*10961Saubrey.li@intel.com 	} else {
1190*10961Saubrey.li@intel.com 		mutex_enter(&cpu_lock);
1191*10961Saubrey.li@intel.com 		cpudsp->cp = cpu_get(cpudsp->cpu_id);
1192*10961Saubrey.li@intel.com 		mutex_exit(&cpu_lock);
1193*10961Saubrey.li@intel.com 	}
1194*10961Saubrey.li@intel.com 
1195*10961Saubrey.li@intel.com 	if (cpudsp->cp == NULL)
1196*10961Saubrey.li@intel.com 		return (DDI_FAILURE);
1197*10961Saubrey.li@intel.com 
1198*10961Saubrey.li@intel.com 	return (DDI_SUCCESS);
1199*10961Saubrey.li@intel.com }
1200