1*3833Sxw161283 /* 2*3833Sxw161283 * CDDL HEADER START 3*3833Sxw161283 * 4*3833Sxw161283 * The contents of this file are subject to the terms of the 5*3833Sxw161283 * Common Development and Distribution License (the "License"). 6*3833Sxw161283 * You may not use this file except in compliance with the License. 7*3833Sxw161283 * 8*3833Sxw161283 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*3833Sxw161283 * or http://www.opensolaris.org/os/licensing. 10*3833Sxw161283 * See the License for the specific language governing permissions 11*3833Sxw161283 * and limitations under the License. 12*3833Sxw161283 * 13*3833Sxw161283 * When distributing Covered Code, include this CDDL HEADER in each 14*3833Sxw161283 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*3833Sxw161283 * If applicable, add the following below this CDDL HEADER, with the 16*3833Sxw161283 * fields enclosed by brackets "[]" replaced with your own identifying 17*3833Sxw161283 * information: Portions Copyright [yyyy] [name of copyright owner] 18*3833Sxw161283 * 19*3833Sxw161283 * CDDL HEADER END 20*3833Sxw161283 */ 21*3833Sxw161283 22*3833Sxw161283 /* 23*3833Sxw161283 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*3833Sxw161283 * Use is subject to license terms. 25*3833Sxw161283 */ 26*3833Sxw161283 27*3833Sxw161283 /* 28*3833Sxw161283 * This file is part of the Chelsio T1 Ethernet driver. 29*3833Sxw161283 * 30*3833Sxw161283 * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved. 31*3833Sxw161283 */ 32*3833Sxw161283 33*3833Sxw161283 #ifndef _CHELSIO_OSDEP_H 34*3833Sxw161283 #define _CHELSIO_OSDEP_H 35*3833Sxw161283 36*3833Sxw161283 #pragma ident "%Z%%M% %I% %E% SMI" 37*3833Sxw161283 38*3833Sxw161283 #ifdef __cplusplus 39*3833Sxw161283 extern "C" { 40*3833Sxw161283 #endif 41*3833Sxw161283 42*3833Sxw161283 /* 43*3833Sxw161283 * Solaris includes 44*3833Sxw161283 */ 45*3833Sxw161283 #define BIG_ENDIAN 4321 46*3833Sxw161283 #define LITTLE_ENDIAN 1234 47*3833Sxw161283 #if defined(__sparc) 48*3833Sxw161283 #define BYTE_ORDER BIG_ENDIAN 49*3833Sxw161283 #else 50*3833Sxw161283 #define BYTE_ORDER LITTLE_ENDIAN 51*3833Sxw161283 #endif 52*3833Sxw161283 53*3833Sxw161283 #include <sys/types.h> 54*3833Sxw161283 #include <sys/systm.h> 55*3833Sxw161283 #include <sys/param.h> 56*3833Sxw161283 #include <sys/kmem.h> 57*3833Sxw161283 #include <sys/stropts.h> 58*3833Sxw161283 #include <sys/cmn_err.h> 59*3833Sxw161283 #include <sys/varargs.h> 60*3833Sxw161283 #include <sys/stream.h> 61*3833Sxw161283 #include <sys/ddi.h> 62*3833Sxw161283 #include <sys/dlpi.h> 63*3833Sxw161283 #include <sys/ethernet.h> 64*3833Sxw161283 #include <sys/gld.h> 65*3833Sxw161283 #include "ostypes.h" 66*3833Sxw161283 67*3833Sxw161283 #include "oschtoe.h" 68*3833Sxw161283 #include "ch_compat.h" 69*3833Sxw161283 70*3833Sxw161283 #include "ch.h" 71*3833Sxw161283 72*3833Sxw161283 #define FILE_IDENT(a) static char *id = a 73*3833Sxw161283 74*3833Sxw161283 #define ETH_ALEN 6 75*3833Sxw161283 76*3833Sxw161283 typedef struct ch peobj; 77*3833Sxw161283 typedef uint32_t u_int32_t; 78*3833Sxw161283 typedef uint16_t u_int16_t; 79*3833Sxw161283 typedef kstat_t *p_kstat_t; 80*3833Sxw161283 81*3833Sxw161283 #define os_printf printf 82*3833Sxw161283 83*3833Sxw161283 #define memcpy(dst, src, cnt) bcopy((src), (dst), (cnt)) 84*3833Sxw161283 85*3833Sxw161283 #define adapter_name(chp) (chp->ch_name) 86*3833Sxw161283 87*3833Sxw161283 typedef struct ch adapter_t; 88*3833Sxw161283 89*3833Sxw161283 #define DELAY_US(x) DELAY(x) 90*3833Sxw161283 #define DELAY_MS(x) DELAY(1000*(x)) 91*3833Sxw161283 92*3833Sxw161283 #define TPI_LOCK(obj) mutex_enter(&obj->ch_lock); 93*3833Sxw161283 #define TPI_UNLOCK(obj) mutex_exit(&obj->ch_lock); 94*3833Sxw161283 #define MAC_LOCK(lock) mutex_enter(&(lock)) 95*3833Sxw161283 #define MAC_UNLOCK(lock) mutex_exit(&(lock)) 96*3833Sxw161283 #define __tpi_read tpi_read 97*3833Sxw161283 #define __tpi_write tpi_write 98*3833Sxw161283 99*3833Sxw161283 struct t1_rx_mode { 100*3833Sxw161283 struct ch *chp; 101*3833Sxw161283 struct ch_mc *mc; 102*3833Sxw161283 }; 103*3833Sxw161283 104*3833Sxw161283 #define t1_rx_mode_promisc(rmp) (rmp->chp->ch_flags & PEPROMISC) 105*3833Sxw161283 #define t1_rx_mode_allmulti(rmp) (rmp->chp->ch_flags & PEALLMULTI) 106*3833Sxw161283 #define t1_rx_mode_mc_cnt(rmp) (rmp->chp->ch_mc_cnt) 107*3833Sxw161283 uint8_t *t1_get_next_mcaddr(struct t1_rx_mode *); 108*3833Sxw161283 109*3833Sxw161283 #define __devinit 110*3833Sxw161283 111*3833Sxw161283 void t1_os_elmer0_ext_intr(adapter_t *adapter); 112*3833Sxw161283 113*3833Sxw161283 void t1_os_link_changed(ch_t *adapter, int port_id, int link_status, 114*3833Sxw161283 int speed, int duplex, int fc); 115*3833Sxw161283 116*3833Sxw161283 #define CH_DBG(fmt, ...) 117*3833Sxw161283 118*3833Sxw161283 #define CH_MSG(fmt, ...) 119*3833Sxw161283 120*3833Sxw161283 #define t1_os_set_hw_addr(a, b, c) memcpy(a->port[b].enaddr, c, ETH_ALEN) 121*3833Sxw161283 122*3833Sxw161283 /* kludge for now */ 123*3833Sxw161283 #define port_name(adapter, i) "chxge" 124*3833Sxw161283 125*3833Sxw161283 #define SPINLOCK kmutex_t 126*3833Sxw161283 #define SPIN_LOCK_INIT(x) mutex_init(&(x), NULL, MUTEX_DRIVER, NULL); 127*3833Sxw161283 #undef SPIN_LOCK 128*3833Sxw161283 #define SPIN_LOCK(x) mutex_enter(&(x)) 129*3833Sxw161283 #define SPIN_UNLOCK(x) mutex_exit(&(x)) 130*3833Sxw161283 #define SPIN_TRYLOCK(x) mutex_tryenter(&(x)) 131*3833Sxw161283 #define SPIN_LOCK_DESTROY(x) mutex_destroy(&(x)) 132*3833Sxw161283 133*3833Sxw161283 typedef struct ch_cyclic_s { 134*3833Sxw161283 timeout_id_t timer; 135*3833Sxw161283 void (*func)(void *); 136*3833Sxw161283 void *arg; 137*3833Sxw161283 clock_t period; 138*3833Sxw161283 } ch_cyclic_t, *p_ch_cyclic_t; 139*3833Sxw161283 140*3833Sxw161283 void ch_init_cyclic(void *, p_ch_cyclic_t, void (*)(void *), void *); 141*3833Sxw161283 void ch_start_cyclic(p_ch_cyclic_t, unsigned long); 142*3833Sxw161283 void ch_stop_cyclic(p_ch_cyclic_t); 143*3833Sxw161283 void ch_cyclic(p_ch_cyclic_t); 144*3833Sxw161283 145*3833Sxw161283 #ifdef __cplusplus 146*3833Sxw161283 } 147*3833Sxw161283 #endif 148*3833Sxw161283 149*3833Sxw161283 #endif /* _CHELSIO_OSDEP_H */ 150