11369Sdduvall /* 21369Sdduvall * CDDL HEADER START 31369Sdduvall * 41369Sdduvall * The contents of this file are subject to the terms of the 51369Sdduvall * Common Development and Distribution License (the "License"). 61369Sdduvall * You may not use this file except in compliance with the License. 71369Sdduvall * 81369Sdduvall * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 91369Sdduvall * or http://www.opensolaris.org/os/licensing. 101369Sdduvall * See the License for the specific language governing permissions 111369Sdduvall * and limitations under the License. 121369Sdduvall * 131369Sdduvall * When distributing Covered Code, include this CDDL HEADER in each 141369Sdduvall * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 151369Sdduvall * If applicable, add the following below this CDDL HEADER, with the 161369Sdduvall * fields enclosed by brackets "[]" replaced with your own identifying 171369Sdduvall * information: Portions Copyright [yyyy] [name of copyright owner] 181369Sdduvall * 191369Sdduvall * CDDL HEADER END 201369Sdduvall */ 211369Sdduvall 221369Sdduvall /* 231369Sdduvall * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 241369Sdduvall * Use is subject to license terms. 251369Sdduvall */ 261369Sdduvall 271369Sdduvall #pragma ident "%Z%%M% %I% %E% SMI" 281369Sdduvall 29*2675Szh199473 #include "bge_impl.h" 301369Sdduvall #include <sys/sdt.h> 311369Sdduvall 321369Sdduvall /* 331369Sdduvall * This is the string displayed by modinfo, etc. 341369Sdduvall * Make sure you keep the version ID up to date! 351369Sdduvall */ 361908Sly149593 static char bge_ident[] = "Broadcom Gb Ethernet v0.52"; 371369Sdduvall 381369Sdduvall /* 391369Sdduvall * Property names 401369Sdduvall */ 411369Sdduvall static char debug_propname[] = "bge-debug-flags"; 421369Sdduvall static char clsize_propname[] = "cache-line-size"; 431369Sdduvall static char latency_propname[] = "latency-timer"; 441369Sdduvall static char localmac_boolname[] = "local-mac-address?"; 451369Sdduvall static char localmac_propname[] = "local-mac-address"; 461369Sdduvall static char macaddr_propname[] = "mac-address"; 471369Sdduvall static char subdev_propname[] = "subsystem-id"; 481369Sdduvall static char subven_propname[] = "subsystem-vendor-id"; 491369Sdduvall static char rxrings_propname[] = "bge-rx-rings"; 501369Sdduvall static char txrings_propname[] = "bge-tx-rings"; 511865Sdilpreet static char fm_cap[] = "fm-capable"; 521908Sly149593 static char default_mtu[] = "default_mtu"; 531369Sdduvall 541369Sdduvall static int bge_add_intrs(bge_t *, int); 551369Sdduvall static void bge_rem_intrs(bge_t *); 561369Sdduvall 571369Sdduvall /* 581369Sdduvall * Describes the chip's DMA engine 591369Sdduvall */ 601369Sdduvall static ddi_dma_attr_t dma_attr = { 611369Sdduvall DMA_ATTR_V0, /* dma_attr version */ 621369Sdduvall 0x0000000000000000ull, /* dma_attr_addr_lo */ 631369Sdduvall 0xFFFFFFFFFFFFFFFFull, /* dma_attr_addr_hi */ 641369Sdduvall 0x00000000FFFFFFFFull, /* dma_attr_count_max */ 651369Sdduvall 0x0000000000000001ull, /* dma_attr_align */ 661369Sdduvall 0x00000FFF, /* dma_attr_burstsizes */ 671369Sdduvall 0x00000001, /* dma_attr_minxfer */ 681369Sdduvall 0x000000000000FFFFull, /* dma_attr_maxxfer */ 691369Sdduvall 0xFFFFFFFFFFFFFFFFull, /* dma_attr_seg */ 701369Sdduvall 1, /* dma_attr_sgllen */ 711369Sdduvall 0x00000001, /* dma_attr_granular */ 721865Sdilpreet DDI_DMA_FLAGERR /* dma_attr_flags */ 731369Sdduvall }; 741369Sdduvall 751369Sdduvall /* 761369Sdduvall * PIO access attributes for registers 771369Sdduvall */ 781369Sdduvall static ddi_device_acc_attr_t bge_reg_accattr = { 791369Sdduvall DDI_DEVICE_ATTR_V0, 801369Sdduvall DDI_NEVERSWAP_ACC, 811865Sdilpreet DDI_STRICTORDER_ACC, 821865Sdilpreet DDI_FLAGERR_ACC 831369Sdduvall }; 841369Sdduvall 851369Sdduvall /* 861369Sdduvall * DMA access attributes for descriptors: NOT to be byte swapped. 871369Sdduvall */ 881369Sdduvall static ddi_device_acc_attr_t bge_desc_accattr = { 891369Sdduvall DDI_DEVICE_ATTR_V0, 901369Sdduvall DDI_NEVERSWAP_ACC, 911865Sdilpreet DDI_STRICTORDER_ACC, 921865Sdilpreet DDI_FLAGERR_ACC 931369Sdduvall }; 941369Sdduvall 951369Sdduvall /* 961369Sdduvall * DMA access attributes for data: NOT to be byte swapped. 971369Sdduvall */ 981369Sdduvall static ddi_device_acc_attr_t bge_data_accattr = { 991369Sdduvall DDI_DEVICE_ATTR_V0, 1001369Sdduvall DDI_NEVERSWAP_ACC, 1011369Sdduvall DDI_STRICTORDER_ACC 1021369Sdduvall }; 1031369Sdduvall 1041369Sdduvall static ether_addr_t bge_broadcast_addr = { 1051369Sdduvall 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 1061369Sdduvall }; 1071369Sdduvall 1081369Sdduvall /* 1091369Sdduvall * Versions of the O/S up to Solaris 8 didn't support network booting 1101369Sdduvall * from any network interface except the first (NET0). Patching this 1111369Sdduvall * flag to a non-zero value will tell the driver to work around this 1121369Sdduvall * limitation by creating an extra (internal) pathname node. To do 1131369Sdduvall * this, just add a line like the following to the CLIENT'S etc/system 1141369Sdduvall * file ON THE ROOT FILESYSTEM SERVER before booting the client: 1151369Sdduvall * 1161369Sdduvall * set bge:bge_net1_boot_support = 1; 1171369Sdduvall */ 1181369Sdduvall static uint32_t bge_net1_boot_support = 1; 1191369Sdduvall 1202311Sseb static int bge_m_start(void *); 1212311Sseb static void bge_m_stop(void *); 1222311Sseb static int bge_m_promisc(void *, boolean_t); 1232311Sseb static int bge_m_multicst(void *, boolean_t, const uint8_t *); 1242311Sseb static int bge_m_unicst(void *, const uint8_t *); 1252311Sseb static void bge_m_resources(void *); 1262311Sseb static void bge_m_ioctl(void *, queue_t *, mblk_t *); 1272311Sseb static boolean_t bge_m_getcapab(void *, mac_capab_t, void *); 1282331Skrgopi static int bge_unicst_set(void *, const uint8_t *, 1292331Skrgopi mac_addr_slot_t); 1302331Skrgopi static int bge_m_unicst_add(void *, mac_multi_addr_t *); 1312331Skrgopi static int bge_m_unicst_remove(void *, mac_addr_slot_t); 1322331Skrgopi static int bge_m_unicst_modify(void *, mac_multi_addr_t *); 1332331Skrgopi static int bge_m_unicst_get(void *, mac_multi_addr_t *); 1342311Sseb 1352311Sseb #define BGE_M_CALLBACK_FLAGS (MC_RESOURCES | MC_IOCTL | MC_GETCAPAB) 1362311Sseb 1372311Sseb static mac_callbacks_t bge_m_callbacks = { 1382311Sseb BGE_M_CALLBACK_FLAGS, 1392311Sseb bge_m_stat, 1402311Sseb bge_m_start, 1412311Sseb bge_m_stop, 1422311Sseb bge_m_promisc, 1432311Sseb bge_m_multicst, 1442311Sseb bge_m_unicst, 1452311Sseb bge_m_tx, 1462311Sseb bge_m_resources, 1472311Sseb bge_m_ioctl, 1482311Sseb bge_m_getcapab 1492311Sseb }; 1502311Sseb 1511369Sdduvall /* 1521369Sdduvall * ========== Transmit and receive ring reinitialisation ========== 1531369Sdduvall */ 1541369Sdduvall 1551369Sdduvall /* 1561369Sdduvall * These <reinit> routines each reset the specified ring to an initial 1571369Sdduvall * state, assuming that the corresponding <init> routine has already 1581369Sdduvall * been called exactly once. 1591369Sdduvall */ 1601369Sdduvall 1611369Sdduvall static void 1621369Sdduvall bge_reinit_send_ring(send_ring_t *srp) 1631369Sdduvall { 1641369Sdduvall /* 1651369Sdduvall * Reinitialise control variables ... 1661369Sdduvall */ 1671369Sdduvall ASSERT(srp->tx_flow == 0); 1681369Sdduvall srp->tx_next = 0; 1691369Sdduvall srp->tx_free = srp->desc.nslots; 1701369Sdduvall 1711369Sdduvall ASSERT(mutex_owned(srp->tc_lock)); 1721369Sdduvall srp->tc_next = 0; 1731369Sdduvall 1741369Sdduvall /* 1751369Sdduvall * Zero and sync all the h/w Send Buffer Descriptors 1761369Sdduvall */ 1771369Sdduvall DMA_ZERO(srp->desc); 1781369Sdduvall DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV); 1791369Sdduvall } 1801369Sdduvall 1811369Sdduvall static void 1821369Sdduvall bge_reinit_recv_ring(recv_ring_t *rrp) 1831369Sdduvall { 1841369Sdduvall /* 1851369Sdduvall * Reinitialise control variables ... 1861369Sdduvall */ 1871369Sdduvall rrp->rx_next = 0; 1881369Sdduvall } 1891369Sdduvall 1901369Sdduvall static void 1911369Sdduvall bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring) 1921369Sdduvall { 1931369Sdduvall bge_rbd_t *hw_rbd_p; 1941369Sdduvall sw_rbd_t *srbdp; 1951369Sdduvall uint32_t bufsize; 1961369Sdduvall uint32_t nslots; 1971369Sdduvall uint32_t slot; 1981369Sdduvall 1991369Sdduvall static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = { 2001369Sdduvall RBD_FLAG_STD_RING, 2011369Sdduvall RBD_FLAG_JUMBO_RING, 2021369Sdduvall RBD_FLAG_MINI_RING 2031369Sdduvall }; 2041369Sdduvall 2051369Sdduvall /* 2061369Sdduvall * Zero, initialise and sync all the h/w Receive Buffer Descriptors 2071369Sdduvall * Note: all the remaining fields (<type>, <flags>, <ip_cksum>, 2081369Sdduvall * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>) 2091369Sdduvall * should be zeroed, and so don't need to be set up specifically 2101369Sdduvall * once the whole area has been cleared. 2111369Sdduvall */ 2121369Sdduvall DMA_ZERO(brp->desc); 2131369Sdduvall 2141369Sdduvall hw_rbd_p = DMA_VPTR(brp->desc); 2151369Sdduvall nslots = brp->desc.nslots; 2161369Sdduvall ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 2171369Sdduvall bufsize = brp->buf[0].size; 2181369Sdduvall srbdp = brp->sw_rbds; 2191369Sdduvall for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) { 2201369Sdduvall hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress; 2211369Sdduvall hw_rbd_p->index = slot; 2221369Sdduvall hw_rbd_p->len = bufsize; 2231369Sdduvall hw_rbd_p->opaque = srbdp->pbuf.token; 2241369Sdduvall hw_rbd_p->flags |= ring_type_flag[ring]; 2251369Sdduvall } 2261369Sdduvall 2271369Sdduvall DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV); 2281369Sdduvall 2291369Sdduvall /* 2301369Sdduvall * Finally, reinitialise the ring control variables ... 2311369Sdduvall */ 2321369Sdduvall brp->rf_next = (nslots != 0) ? (nslots-1) : 0; 2331369Sdduvall } 2341369Sdduvall 2351369Sdduvall /* 2361369Sdduvall * Reinitialize all rings 2371369Sdduvall */ 2381369Sdduvall static void 2391369Sdduvall bge_reinit_rings(bge_t *bgep) 2401369Sdduvall { 2411369Sdduvall uint64_t ring; 2421369Sdduvall 2431369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 2441369Sdduvall 2451369Sdduvall /* 2461369Sdduvall * Send Rings ... 2471369Sdduvall */ 2481369Sdduvall for (ring = 0; ring < bgep->chipid.tx_rings; ++ring) 2491369Sdduvall bge_reinit_send_ring(&bgep->send[ring]); 2501369Sdduvall 2511369Sdduvall /* 2521369Sdduvall * Receive Return Rings ... 2531369Sdduvall */ 2541369Sdduvall for (ring = 0; ring < bgep->chipid.rx_rings; ++ring) 2551369Sdduvall bge_reinit_recv_ring(&bgep->recv[ring]); 2561369Sdduvall 2571369Sdduvall /* 2581369Sdduvall * Receive Producer Rings ... 2591369Sdduvall */ 2601369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring) 2611369Sdduvall bge_reinit_buff_ring(&bgep->buff[ring], ring); 2621369Sdduvall } 2631369Sdduvall 2641369Sdduvall /* 2651369Sdduvall * ========== Internal state management entry points ========== 2661369Sdduvall */ 2671369Sdduvall 2681369Sdduvall #undef BGE_DBG 2691369Sdduvall #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 2701369Sdduvall 2711369Sdduvall /* 2721369Sdduvall * These routines provide all the functionality required by the 2731369Sdduvall * corresponding GLD entry points, but don't update the GLD state 2741369Sdduvall * so they can be called internally without disturbing our record 2751369Sdduvall * of what GLD thinks we should be doing ... 2761369Sdduvall */ 2771369Sdduvall 2781369Sdduvall /* 2791369Sdduvall * bge_reset() -- reset h/w & rings to initial state 2801369Sdduvall */ 2811865Sdilpreet static int 2821408Srandyf #ifdef BGE_IPMI_ASF 2831408Srandyf bge_reset(bge_t *bgep, uint_t asf_mode) 2841408Srandyf #else 2851369Sdduvall bge_reset(bge_t *bgep) 2861408Srandyf #endif 2871369Sdduvall { 2881369Sdduvall uint64_t ring; 2891865Sdilpreet int retval; 2901369Sdduvall 2911369Sdduvall BGE_TRACE(("bge_reset($%p)", (void *)bgep)); 2921369Sdduvall 2931369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 2941369Sdduvall 2951369Sdduvall /* 2961369Sdduvall * Grab all the other mutexes in the world (this should 2971369Sdduvall * ensure no other threads are manipulating driver state) 2981369Sdduvall */ 2991369Sdduvall for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 3001369Sdduvall mutex_enter(bgep->recv[ring].rx_lock); 3011369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 3021369Sdduvall mutex_enter(bgep->buff[ring].rf_lock); 3031369Sdduvall rw_enter(bgep->errlock, RW_WRITER); 3041369Sdduvall for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 3051369Sdduvall mutex_enter(bgep->send[ring].tc_lock); 3061369Sdduvall 3071408Srandyf #ifdef BGE_IPMI_ASF 3081865Sdilpreet retval = bge_chip_reset(bgep, B_TRUE, asf_mode); 3091408Srandyf #else 3101865Sdilpreet retval = bge_chip_reset(bgep, B_TRUE); 3111408Srandyf #endif 3121369Sdduvall bge_reinit_rings(bgep); 3131369Sdduvall 3141369Sdduvall /* 3151369Sdduvall * Free the world ... 3161369Sdduvall */ 3171369Sdduvall for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; ) 3181369Sdduvall mutex_exit(bgep->send[ring].tc_lock); 3191369Sdduvall rw_exit(bgep->errlock); 3201369Sdduvall for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; ) 3211369Sdduvall mutex_exit(bgep->buff[ring].rf_lock); 3221369Sdduvall for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; ) 3231369Sdduvall mutex_exit(bgep->recv[ring].rx_lock); 3241369Sdduvall 3251369Sdduvall BGE_DEBUG(("bge_reset($%p) done", (void *)bgep)); 3261865Sdilpreet return (retval); 3271369Sdduvall } 3281369Sdduvall 3291369Sdduvall /* 3301369Sdduvall * bge_stop() -- stop processing, don't reset h/w or rings 3311369Sdduvall */ 3321369Sdduvall static void 3331369Sdduvall bge_stop(bge_t *bgep) 3341369Sdduvall { 3351369Sdduvall BGE_TRACE(("bge_stop($%p)", (void *)bgep)); 3361369Sdduvall 3371369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 3381369Sdduvall 3391408Srandyf #ifdef BGE_IPMI_ASF 3401408Srandyf if (bgep->asf_enabled) { 3411408Srandyf bgep->asf_pseudostop = B_TRUE; 3421408Srandyf } else { 3431408Srandyf #endif 3441408Srandyf bge_chip_stop(bgep, B_FALSE); 3451408Srandyf #ifdef BGE_IPMI_ASF 3461408Srandyf } 3471408Srandyf #endif 3481369Sdduvall 3491369Sdduvall BGE_DEBUG(("bge_stop($%p) done", (void *)bgep)); 3501369Sdduvall } 3511369Sdduvall 3521369Sdduvall /* 3531369Sdduvall * bge_start() -- start transmitting/receiving 3541369Sdduvall */ 3551865Sdilpreet static int 3561369Sdduvall bge_start(bge_t *bgep, boolean_t reset_phys) 3571369Sdduvall { 3581865Sdilpreet int retval; 3591865Sdilpreet 3601369Sdduvall BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys)); 3611369Sdduvall 3621369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 3631369Sdduvall 3641369Sdduvall /* 3651369Sdduvall * Start chip processing, including enabling interrupts 3661369Sdduvall */ 3671865Sdilpreet retval = bge_chip_start(bgep, reset_phys); 3681369Sdduvall 3691369Sdduvall BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys)); 3701865Sdilpreet return (retval); 3711369Sdduvall } 3721369Sdduvall 3731369Sdduvall /* 3741369Sdduvall * bge_restart - restart transmitting/receiving after error or suspend 3751369Sdduvall */ 3761865Sdilpreet int 3771369Sdduvall bge_restart(bge_t *bgep, boolean_t reset_phys) 3781369Sdduvall { 3791865Sdilpreet int retval = DDI_SUCCESS; 3801369Sdduvall ASSERT(mutex_owned(bgep->genlock)); 3811369Sdduvall 3821408Srandyf #ifdef BGE_IPMI_ASF 3831408Srandyf if (bgep->asf_enabled) { 3841865Sdilpreet if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS) 3851865Sdilpreet retval = DDI_FAILURE; 3861408Srandyf } else 3871865Sdilpreet if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS) 3881865Sdilpreet retval = DDI_FAILURE; 3891408Srandyf #else 3901865Sdilpreet if (bge_reset(bgep) != DDI_SUCCESS) 3911865Sdilpreet retval = DDI_FAILURE; 3921408Srandyf #endif 3931369Sdduvall if (bgep->bge_mac_state == BGE_MAC_STARTED) { 3941865Sdilpreet if (bge_start(bgep, reset_phys) != DDI_SUCCESS) 3951865Sdilpreet retval = DDI_FAILURE; 3961369Sdduvall bgep->watchdog = 0; 3971369Sdduvall ddi_trigger_softintr(bgep->resched_id); 3981369Sdduvall } 3991369Sdduvall 4001369Sdduvall BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys)); 4011865Sdilpreet return (retval); 4021369Sdduvall } 4031369Sdduvall 4041369Sdduvall 4051369Sdduvall /* 4061369Sdduvall * ========== Nemo-required management entry points ========== 4071369Sdduvall */ 4081369Sdduvall 4091369Sdduvall #undef BGE_DBG 4101369Sdduvall #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 4111369Sdduvall 4121369Sdduvall /* 4131369Sdduvall * bge_m_stop() -- stop transmitting/receiving 4141369Sdduvall */ 4151369Sdduvall static void 4161369Sdduvall bge_m_stop(void *arg) 4171369Sdduvall { 4181369Sdduvall bge_t *bgep = arg; /* private device info */ 4191369Sdduvall 4201369Sdduvall BGE_TRACE(("bge_m_stop($%p)", arg)); 4211369Sdduvall 4221369Sdduvall /* 4231369Sdduvall * Just stop processing, then record new GLD state 4241369Sdduvall */ 4251369Sdduvall mutex_enter(bgep->genlock); 4261865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 4271865Sdilpreet /* can happen during autorecovery */ 4281865Sdilpreet mutex_exit(bgep->genlock); 4291865Sdilpreet return; 4301865Sdilpreet } 4311865Sdilpreet 4321369Sdduvall bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 4331369Sdduvall bge_stop(bgep); 4341369Sdduvall bgep->bge_mac_state = BGE_MAC_STOPPED; 4351369Sdduvall BGE_DEBUG(("bge_m_stop($%p) done", arg)); 4361865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 4371865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED); 4381369Sdduvall mutex_exit(bgep->genlock); 4391369Sdduvall } 4401369Sdduvall 4411369Sdduvall /* 4421369Sdduvall * bge_m_start() -- start transmitting/receiving 4431369Sdduvall */ 4441369Sdduvall static int 4451369Sdduvall bge_m_start(void *arg) 4461369Sdduvall { 4471369Sdduvall bge_t *bgep = arg; /* private device info */ 4481369Sdduvall 4491369Sdduvall BGE_TRACE(("bge_m_start($%p)", arg)); 4501369Sdduvall 4511369Sdduvall /* 4521369Sdduvall * Start processing and record new GLD state 4531369Sdduvall */ 4541369Sdduvall mutex_enter(bgep->genlock); 4551865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 4561865Sdilpreet /* can happen during autorecovery */ 4571865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4581865Sdilpreet mutex_exit(bgep->genlock); 4591865Sdilpreet return (EIO); 4601865Sdilpreet } 4611408Srandyf #ifdef BGE_IPMI_ASF 4621408Srandyf if (bgep->asf_enabled) { 4631408Srandyf if ((bgep->asf_status == ASF_STAT_RUN) && 4641408Srandyf (bgep->asf_pseudostop)) { 4651408Srandyf 4661408Srandyf bgep->link_up_msg = bgep->link_down_msg 4671408Srandyf = " (initialized)"; 4681408Srandyf bgep->bge_mac_state = BGE_MAC_STARTED; 4691408Srandyf mutex_exit(bgep->genlock); 4701408Srandyf return (0); 4711408Srandyf } 4721408Srandyf } 4731865Sdilpreet if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) { 4741408Srandyf #else 4751865Sdilpreet if (bge_reset(bgep) != DDI_SUCCESS) { 4761408Srandyf #endif 4771865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 4781865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 4791865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4801865Sdilpreet mutex_exit(bgep->genlock); 4811865Sdilpreet return (EIO); 4821865Sdilpreet } 4831369Sdduvall bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 4841865Sdilpreet if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) { 4851865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 4861865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 4871865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4881865Sdilpreet mutex_exit(bgep->genlock); 4891865Sdilpreet return (EIO); 4901865Sdilpreet } 4911369Sdduvall bgep->bge_mac_state = BGE_MAC_STARTED; 4921369Sdduvall BGE_DEBUG(("bge_m_start($%p) done", arg)); 4931408Srandyf 4941865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 4951865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 4961865Sdilpreet mutex_exit(bgep->genlock); 4971865Sdilpreet return (EIO); 4981865Sdilpreet } 4991865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 5001865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5011865Sdilpreet mutex_exit(bgep->genlock); 5021865Sdilpreet return (EIO); 5031865Sdilpreet } 5041408Srandyf #ifdef BGE_IPMI_ASF 5051408Srandyf if (bgep->asf_enabled) { 5061408Srandyf if (bgep->asf_status != ASF_STAT_RUN) { 5071408Srandyf /* start ASF heart beat */ 5081408Srandyf bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 5091408Srandyf (void *)bgep, 5101408Srandyf drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 5111408Srandyf bgep->asf_status = ASF_STAT_RUN; 5121408Srandyf } 5131408Srandyf } 5141408Srandyf #endif 5151369Sdduvall mutex_exit(bgep->genlock); 5161369Sdduvall 5171369Sdduvall return (0); 5181369Sdduvall } 5191369Sdduvall 5201369Sdduvall /* 5212331Skrgopi * bge_m_unicst() -- set the physical network address 5221369Sdduvall */ 5231369Sdduvall static int 5241369Sdduvall bge_m_unicst(void *arg, const uint8_t *macaddr) 5251369Sdduvall { 5262331Skrgopi /* 5272331Skrgopi * Request to set address in 5282331Skrgopi * address slot 0, i.e., default address 5292331Skrgopi */ 5302331Skrgopi return (bge_unicst_set(arg, macaddr, 0)); 5312331Skrgopi } 5322331Skrgopi 5332331Skrgopi /* 5342331Skrgopi * bge_unicst_set() -- set the physical network address 5352331Skrgopi */ 5362331Skrgopi static int 5372331Skrgopi bge_unicst_set(void *arg, const uint8_t *macaddr, mac_addr_slot_t slot) 5382331Skrgopi { 5391369Sdduvall bge_t *bgep = arg; /* private device info */ 5401369Sdduvall 5411369Sdduvall BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg, 5421369Sdduvall ether_sprintf((void *)macaddr))); 5431369Sdduvall /* 5441369Sdduvall * Remember the new current address in the driver state 5451369Sdduvall * Sync the chip's idea of the address too ... 5461369Sdduvall */ 5471369Sdduvall mutex_enter(bgep->genlock); 5481865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 5491865Sdilpreet /* can happen during autorecovery */ 5501865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5511865Sdilpreet mutex_exit(bgep->genlock); 5521865Sdilpreet return (EIO); 5531865Sdilpreet } 5542331Skrgopi ethaddr_copy(macaddr, bgep->curr_addr[slot].addr); 5551408Srandyf #ifdef BGE_IPMI_ASF 5561865Sdilpreet if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) { 5571865Sdilpreet #else 5581865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 5591865Sdilpreet #endif 5601865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 5611865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 5621865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 5631865Sdilpreet mutex_exit(bgep->genlock); 5641865Sdilpreet return (EIO); 5651865Sdilpreet } 5661865Sdilpreet #ifdef BGE_IPMI_ASF 5671408Srandyf if (bgep->asf_enabled) { 5681408Srandyf /* 5691408Srandyf * The above bge_chip_sync() function wrote the ethernet MAC 5701408Srandyf * addresses registers which destroyed the IPMI/ASF sideband. 5711408Srandyf * Here, we have to reset chip to make IPMI/ASF sideband work. 5721408Srandyf */ 5731408Srandyf if (bgep->asf_status == ASF_STAT_RUN) { 5741408Srandyf /* 5751408Srandyf * We must stop ASF heart beat before bge_chip_stop(), 5761408Srandyf * otherwise some computers (ex. IBM HS20 blade server) 5771408Srandyf * may crash. 5781408Srandyf */ 5791408Srandyf bge_asf_update_status(bgep); 5801408Srandyf bge_asf_stop_timer(bgep); 5811408Srandyf bgep->asf_status = ASF_STAT_STOP; 5821408Srandyf 5831408Srandyf bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET); 5841408Srandyf } 5851865Sdilpreet bge_chip_stop(bgep, B_FALSE); 5861408Srandyf 5871865Sdilpreet if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) { 5881865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 5891865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 5901865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 5911865Sdilpreet DDI_SERVICE_DEGRADED); 5921865Sdilpreet mutex_exit(bgep->genlock); 5931865Sdilpreet return (EIO); 5941865Sdilpreet } 5951865Sdilpreet 5961408Srandyf /* 5971408Srandyf * Start our ASF heartbeat counter as soon as possible. 5981408Srandyf */ 5991408Srandyf if (bgep->asf_status != ASF_STAT_RUN) { 6001408Srandyf /* start ASF heart beat */ 6011408Srandyf bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 6021408Srandyf (void *)bgep, 6031408Srandyf drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 6041408Srandyf bgep->asf_status = ASF_STAT_RUN; 6051408Srandyf } 6061408Srandyf } 6071408Srandyf #endif 6081369Sdduvall BGE_DEBUG(("bge_m_unicst_set($%p) done", arg)); 6091865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 6101865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 6111865Sdilpreet mutex_exit(bgep->genlock); 6121865Sdilpreet return (EIO); 6131865Sdilpreet } 6141865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 6151865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 6161865Sdilpreet mutex_exit(bgep->genlock); 6171865Sdilpreet return (EIO); 6181865Sdilpreet } 6191369Sdduvall mutex_exit(bgep->genlock); 6201369Sdduvall 6211369Sdduvall return (0); 6221369Sdduvall } 6231369Sdduvall 6241369Sdduvall /* 6252331Skrgopi * The following four routines are used as callbacks for multiple MAC 6262331Skrgopi * address support: 6272331Skrgopi * - bge_m_unicst_add(void *, mac_multi_addr_t *); 6282331Skrgopi * - bge_m_unicst_remove(void *, mac_addr_slot_t); 6292331Skrgopi * - bge_m_unicst_modify(void *, mac_multi_addr_t *); 6302331Skrgopi * - bge_m_unicst_get(void *, mac_multi_addr_t *); 6312331Skrgopi */ 6322331Skrgopi 6332331Skrgopi /* 6342331Skrgopi * bge_m_unicst_add() - will find an unused address slot, set the 6352331Skrgopi * address value to the one specified, reserve that slot and enable 6362331Skrgopi * the NIC to start filtering on the new MAC address. 6372331Skrgopi * address slot. Returns 0 on success. 6382331Skrgopi */ 6392331Skrgopi static int 6402331Skrgopi bge_m_unicst_add(void *arg, mac_multi_addr_t *maddr) 6412331Skrgopi { 6422331Skrgopi bge_t *bgep = arg; /* private device info */ 6432331Skrgopi mac_addr_slot_t slot; 6442406Skrgopi int err; 6452331Skrgopi 6462331Skrgopi if (mac_unicst_verify(bgep->mh, 6472331Skrgopi maddr->mma_addr, maddr->mma_addrlen) == B_FALSE) 6482331Skrgopi return (EINVAL); 6492331Skrgopi 6502331Skrgopi mutex_enter(bgep->genlock); 6512331Skrgopi if (bgep->unicst_addr_avail == 0) { 6522331Skrgopi /* no slots available */ 6532331Skrgopi mutex_exit(bgep->genlock); 6542331Skrgopi return (ENOSPC); 6552331Skrgopi } 6562331Skrgopi 6572331Skrgopi /* 6582331Skrgopi * Primary/default address is in slot 0. The next three 6592331Skrgopi * addresses are the multiple MAC addresses. So multiple 6602331Skrgopi * MAC address 0 is in slot 1, 1 in slot 2, and so on. 6612406Skrgopi * So the first multiple MAC address resides in slot 1. 6622331Skrgopi */ 6632406Skrgopi for (slot = 1; slot < bgep->unicst_addr_total; slot++) { 6642406Skrgopi if (bgep->curr_addr[slot].set == B_FALSE) { 6652406Skrgopi bgep->curr_addr[slot].set = B_TRUE; 6662331Skrgopi break; 6672331Skrgopi } 6682331Skrgopi } 6692331Skrgopi 6702406Skrgopi ASSERT(slot < bgep->unicst_addr_total); 6712331Skrgopi bgep->unicst_addr_avail--; 6722331Skrgopi mutex_exit(bgep->genlock); 6732331Skrgopi maddr->mma_slot = slot; 6742331Skrgopi 6752331Skrgopi if ((err = bge_unicst_set(bgep, maddr->mma_addr, slot)) != 0) { 6762331Skrgopi mutex_enter(bgep->genlock); 6772406Skrgopi bgep->curr_addr[slot].set = B_FALSE; 6782331Skrgopi bgep->unicst_addr_avail++; 6792331Skrgopi mutex_exit(bgep->genlock); 6802331Skrgopi } 6812331Skrgopi return (err); 6822331Skrgopi } 6832331Skrgopi 6842331Skrgopi /* 6852331Skrgopi * bge_m_unicst_remove() - removes a MAC address that was added by a 6862331Skrgopi * call to bge_m_unicst_add(). The slot number that was returned in 6872331Skrgopi * add() is passed in the call to remove the address. 6882331Skrgopi * Returns 0 on success. 6892331Skrgopi */ 6902331Skrgopi static int 6912331Skrgopi bge_m_unicst_remove(void *arg, mac_addr_slot_t slot) 6922331Skrgopi { 6932331Skrgopi bge_t *bgep = arg; /* private device info */ 6942331Skrgopi 6952406Skrgopi if (slot <= 0 || slot >= bgep->unicst_addr_total) 6962406Skrgopi return (EINVAL); 6972406Skrgopi 6982331Skrgopi mutex_enter(bgep->genlock); 6992406Skrgopi if (bgep->curr_addr[slot].set == B_TRUE) { 7002406Skrgopi bgep->curr_addr[slot].set = B_FALSE; 7012331Skrgopi bgep->unicst_addr_avail++; 7022331Skrgopi mutex_exit(bgep->genlock); 7032331Skrgopi /* 7042331Skrgopi * Copy the default address to the passed slot 7052331Skrgopi */ 7062406Skrgopi return (bge_unicst_set(bgep, bgep->curr_addr[0].addr, slot)); 7072331Skrgopi } 7082331Skrgopi mutex_exit(bgep->genlock); 7092331Skrgopi return (EINVAL); 7102331Skrgopi } 7112331Skrgopi 7122331Skrgopi /* 7132331Skrgopi * bge_m_unicst_modify() - modifies the value of an address that 7142331Skrgopi * has been added by bge_m_unicst_add(). The new address, address 7152331Skrgopi * length and the slot number that was returned in the call to add 7162331Skrgopi * should be passed to bge_m_unicst_modify(). mma_flags should be 7172331Skrgopi * set to 0. Returns 0 on success. 7182331Skrgopi */ 7192331Skrgopi static int 7202331Skrgopi bge_m_unicst_modify(void *arg, mac_multi_addr_t *maddr) 7212331Skrgopi { 7222331Skrgopi bge_t *bgep = arg; /* private device info */ 7232331Skrgopi mac_addr_slot_t slot; 7242331Skrgopi 7252331Skrgopi if (mac_unicst_verify(bgep->mh, 7262331Skrgopi maddr->mma_addr, maddr->mma_addrlen) == B_FALSE) 7272331Skrgopi return (EINVAL); 7282331Skrgopi 7292331Skrgopi slot = maddr->mma_slot; 7302331Skrgopi 7312406Skrgopi if (slot <= 0 || slot >= bgep->unicst_addr_total) 7322406Skrgopi return (EINVAL); 7332406Skrgopi 7342331Skrgopi mutex_enter(bgep->genlock); 7352406Skrgopi if (bgep->curr_addr[slot].set == B_TRUE) { 7362331Skrgopi mutex_exit(bgep->genlock); 7372331Skrgopi return (bge_unicst_set(bgep, maddr->mma_addr, slot)); 7382331Skrgopi } 7392331Skrgopi mutex_exit(bgep->genlock); 7402331Skrgopi 7412331Skrgopi return (EINVAL); 7422331Skrgopi } 7432331Skrgopi 7442331Skrgopi /* 7452331Skrgopi * bge_m_unicst_get() - will get the MAC address and all other 7462331Skrgopi * information related to the address slot passed in mac_multi_addr_t. 7472331Skrgopi * mma_flags should be set to 0 in the call. 7482331Skrgopi * On return, mma_flags can take the following values: 7492331Skrgopi * 1) MMAC_SLOT_UNUSED 7502331Skrgopi * 2) MMAC_SLOT_USED | MMAC_VENDOR_ADDR 7512331Skrgopi * 3) MMAC_SLOT_UNUSED | MMAC_VENDOR_ADDR 7522331Skrgopi * 4) MMAC_SLOT_USED 7532331Skrgopi */ 7542331Skrgopi static int 7552331Skrgopi bge_m_unicst_get(void *arg, mac_multi_addr_t *maddr) 7562331Skrgopi { 7572331Skrgopi bge_t *bgep = arg; /* private device info */ 7582331Skrgopi mac_addr_slot_t slot; 7592331Skrgopi 7602331Skrgopi slot = maddr->mma_slot; 7612331Skrgopi 7622406Skrgopi if (slot <= 0 || slot >= bgep->unicst_addr_total) 7632331Skrgopi return (EINVAL); 7642331Skrgopi 7652331Skrgopi mutex_enter(bgep->genlock); 7662406Skrgopi if (bgep->curr_addr[slot].set == B_TRUE) { 7672406Skrgopi ethaddr_copy(bgep->curr_addr[slot].addr, 7682331Skrgopi maddr->mma_addr); 7692331Skrgopi maddr->mma_flags = MMAC_SLOT_USED; 7702331Skrgopi } else { 7712331Skrgopi maddr->mma_flags = MMAC_SLOT_UNUSED; 7722331Skrgopi } 7732331Skrgopi mutex_exit(bgep->genlock); 7742331Skrgopi 7752331Skrgopi return (0); 7762331Skrgopi } 7772331Skrgopi 7782331Skrgopi /* 7791369Sdduvall * Compute the index of the required bit in the multicast hash map. 7801369Sdduvall * This must mirror the way the hardware actually does it! 7811369Sdduvall * See Broadcom document 570X-PG102-R page 125. 7821369Sdduvall */ 7831369Sdduvall static uint32_t 7841369Sdduvall bge_hash_index(const uint8_t *mca) 7851369Sdduvall { 7861369Sdduvall uint32_t hash; 7871369Sdduvall 7881369Sdduvall CRC32(hash, mca, ETHERADDRL, -1U, crc32_table); 7891369Sdduvall 7901369Sdduvall return (hash); 7911369Sdduvall } 7921369Sdduvall 7931369Sdduvall /* 7941369Sdduvall * bge_m_multicst_add() -- enable/disable a multicast address 7951369Sdduvall */ 7961369Sdduvall static int 7971369Sdduvall bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca) 7981369Sdduvall { 7991369Sdduvall bge_t *bgep = arg; /* private device info */ 8001369Sdduvall uint32_t hash; 8011369Sdduvall uint32_t index; 8021369Sdduvall uint32_t word; 8031369Sdduvall uint32_t bit; 8041369Sdduvall uint8_t *refp; 8051369Sdduvall 8061369Sdduvall BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg, 8071369Sdduvall (add) ? "add" : "remove", ether_sprintf((void *)mca))); 8081369Sdduvall 8091369Sdduvall /* 8101369Sdduvall * Precalculate all required masks, pointers etc ... 8111369Sdduvall */ 8121369Sdduvall hash = bge_hash_index(mca); 8131369Sdduvall index = hash % BGE_HASH_TABLE_SIZE; 8141369Sdduvall word = index/32u; 8151369Sdduvall bit = 1 << (index % 32u); 8161369Sdduvall refp = &bgep->mcast_refs[index]; 8171369Sdduvall 8181369Sdduvall BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d", 8191369Sdduvall hash, index, word, bit, *refp)); 8201369Sdduvall 8211369Sdduvall /* 8221369Sdduvall * We must set the appropriate bit in the hash map (and the 8231369Sdduvall * corresponding h/w register) when the refcount goes from 0 8241369Sdduvall * to >0, and clear it when the last ref goes away (refcount 8251369Sdduvall * goes from >0 back to 0). If we change the hash map, we 8261369Sdduvall * must also update the chip's hardware map registers. 8271369Sdduvall */ 8281369Sdduvall mutex_enter(bgep->genlock); 8291865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 8301865Sdilpreet /* can happen during autorecovery */ 8311865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 8321865Sdilpreet mutex_exit(bgep->genlock); 8331865Sdilpreet return (EIO); 8341865Sdilpreet } 8351369Sdduvall if (add) { 8361369Sdduvall if ((*refp)++ == 0) { 8371369Sdduvall bgep->mcast_hash[word] |= bit; 8381408Srandyf #ifdef BGE_IPMI_ASF 8391865Sdilpreet if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 8401408Srandyf #else 8411865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 8421408Srandyf #endif 8431865Sdilpreet (void) bge_check_acc_handle(bgep, 8441865Sdilpreet bgep->cfg_handle); 8451865Sdilpreet (void) bge_check_acc_handle(bgep, 8461865Sdilpreet bgep->io_handle); 8471865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 8481865Sdilpreet DDI_SERVICE_DEGRADED); 8491865Sdilpreet mutex_exit(bgep->genlock); 8501865Sdilpreet return (EIO); 8511865Sdilpreet } 8521369Sdduvall } 8531369Sdduvall } else { 8541369Sdduvall if (--(*refp) == 0) { 8551369Sdduvall bgep->mcast_hash[word] &= ~bit; 8561408Srandyf #ifdef BGE_IPMI_ASF 8571865Sdilpreet if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 8581408Srandyf #else 8591865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 8601408Srandyf #endif 8611865Sdilpreet (void) bge_check_acc_handle(bgep, 8621865Sdilpreet bgep->cfg_handle); 8631865Sdilpreet (void) bge_check_acc_handle(bgep, 8641865Sdilpreet bgep->io_handle); 8651865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 8661865Sdilpreet DDI_SERVICE_DEGRADED); 8671865Sdilpreet mutex_exit(bgep->genlock); 8681865Sdilpreet return (EIO); 8691865Sdilpreet } 8701369Sdduvall } 8711369Sdduvall } 8721369Sdduvall BGE_DEBUG(("bge_m_multicst($%p) done", arg)); 8731865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 8741865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 8751865Sdilpreet mutex_exit(bgep->genlock); 8761865Sdilpreet return (EIO); 8771865Sdilpreet } 8781865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 8791865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 8801865Sdilpreet mutex_exit(bgep->genlock); 8811865Sdilpreet return (EIO); 8821865Sdilpreet } 8831369Sdduvall mutex_exit(bgep->genlock); 8841369Sdduvall 8851369Sdduvall return (0); 8861369Sdduvall } 8871369Sdduvall 8881369Sdduvall /* 8891369Sdduvall * bge_m_promisc() -- set or reset promiscuous mode on the board 8901369Sdduvall * 8911369Sdduvall * Program the hardware to enable/disable promiscuous and/or 8921369Sdduvall * receive-all-multicast modes. 8931369Sdduvall */ 8941369Sdduvall static int 8951369Sdduvall bge_m_promisc(void *arg, boolean_t on) 8961369Sdduvall { 8971369Sdduvall bge_t *bgep = arg; 8981369Sdduvall 8991369Sdduvall BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on)); 9001369Sdduvall 9011369Sdduvall /* 9021369Sdduvall * Store MAC layer specified mode and pass to chip layer to update h/w 9031369Sdduvall */ 9041369Sdduvall mutex_enter(bgep->genlock); 9051865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 9061865Sdilpreet /* can happen during autorecovery */ 9071865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 9081865Sdilpreet mutex_exit(bgep->genlock); 9091865Sdilpreet return (EIO); 9101865Sdilpreet } 9111369Sdduvall bgep->promisc = on; 9121408Srandyf #ifdef BGE_IPMI_ASF 9131865Sdilpreet if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 9141408Srandyf #else 9151865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 9161408Srandyf #endif 9171865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 9181865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 9191865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 9201865Sdilpreet mutex_exit(bgep->genlock); 9211865Sdilpreet return (EIO); 9221865Sdilpreet } 9231369Sdduvall BGE_DEBUG(("bge_m_promisc_set($%p) done", arg)); 9241865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 9251865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 9261865Sdilpreet mutex_exit(bgep->genlock); 9271865Sdilpreet return (EIO); 9281865Sdilpreet } 9291865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 9301865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 9311865Sdilpreet mutex_exit(bgep->genlock); 9321865Sdilpreet return (EIO); 9331865Sdilpreet } 9341369Sdduvall mutex_exit(bgep->genlock); 9351369Sdduvall return (0); 9361369Sdduvall } 9371369Sdduvall 9382311Sseb /*ARGSUSED*/ 9392311Sseb static boolean_t 9402311Sseb bge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data) 9412311Sseb { 9422331Skrgopi bge_t *bgep = arg; 9432331Skrgopi 9442311Sseb switch (cap) { 9452311Sseb case MAC_CAPAB_HCKSUM: { 9462311Sseb uint32_t *txflags = cap_data; 9472311Sseb 9482311Sseb *txflags = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM; 9492311Sseb break; 9502311Sseb } 9512331Skrgopi 9522311Sseb case MAC_CAPAB_POLL: 9532311Sseb /* 9542311Sseb * There's nothing for us to fill in, simply returning 9552311Sseb * B_TRUE stating that we support polling is sufficient. 9562311Sseb */ 9572311Sseb break; 9582331Skrgopi 9592331Skrgopi case MAC_CAPAB_MULTIADDRESS: { 9602331Skrgopi multiaddress_capab_t *mmacp = cap_data; 9612331Skrgopi 9622331Skrgopi mutex_enter(bgep->genlock); 9632406Skrgopi /* 9642406Skrgopi * The number of MAC addresses made available by 9652406Skrgopi * this capability is one less than the total as 9662406Skrgopi * the primary address in slot 0 is counted in 9672406Skrgopi * the total. 9682406Skrgopi */ 9692406Skrgopi mmacp->maddr_naddr = bgep->unicst_addr_total - 1; 9702331Skrgopi mmacp->maddr_naddrfree = bgep->unicst_addr_avail; 9712331Skrgopi /* No multiple factory addresses, set mma_flag to 0 */ 9722331Skrgopi mmacp->maddr_flag = 0; 9732331Skrgopi mmacp->maddr_handle = bgep; 9742331Skrgopi mmacp->maddr_add = bge_m_unicst_add; 9752331Skrgopi mmacp->maddr_remove = bge_m_unicst_remove; 9762331Skrgopi mmacp->maddr_modify = bge_m_unicst_modify; 9772331Skrgopi mmacp->maddr_get = bge_m_unicst_get; 9782331Skrgopi mmacp->maddr_reserve = NULL; 9792331Skrgopi mutex_exit(bgep->genlock); 9802331Skrgopi break; 9812331Skrgopi } 9822331Skrgopi 9832311Sseb default: 9842311Sseb return (B_FALSE); 9852311Sseb } 9862311Sseb return (B_TRUE); 9872311Sseb } 9882311Sseb 9891369Sdduvall /* 9901369Sdduvall * Loopback ioctl code 9911369Sdduvall */ 9921369Sdduvall 9931369Sdduvall static lb_property_t loopmodes[] = { 9941369Sdduvall { normal, "normal", BGE_LOOP_NONE }, 9951369Sdduvall { external, "1000Mbps", BGE_LOOP_EXTERNAL_1000 }, 9961369Sdduvall { external, "100Mbps", BGE_LOOP_EXTERNAL_100 }, 9971369Sdduvall { external, "10Mbps", BGE_LOOP_EXTERNAL_10 }, 9981369Sdduvall { internal, "PHY", BGE_LOOP_INTERNAL_PHY }, 9991369Sdduvall { internal, "MAC", BGE_LOOP_INTERNAL_MAC } 10001369Sdduvall }; 10011369Sdduvall 10021369Sdduvall static enum ioc_reply 10031369Sdduvall bge_set_loop_mode(bge_t *bgep, uint32_t mode) 10041369Sdduvall { 10051369Sdduvall const char *msg; 10061369Sdduvall 10071369Sdduvall /* 10081369Sdduvall * If the mode isn't being changed, there's nothing to do ... 10091369Sdduvall */ 10101369Sdduvall if (mode == bgep->param_loop_mode) 10111369Sdduvall return (IOC_ACK); 10121369Sdduvall 10131369Sdduvall /* 10141369Sdduvall * Validate the requested mode and prepare a suitable message 10151369Sdduvall * to explain the link down/up cycle that the change will 10161369Sdduvall * probably induce ... 10171369Sdduvall */ 10181369Sdduvall switch (mode) { 10191369Sdduvall default: 10201369Sdduvall return (IOC_INVAL); 10211369Sdduvall 10221369Sdduvall case BGE_LOOP_NONE: 10231369Sdduvall msg = " (loopback disabled)"; 10241369Sdduvall break; 10251369Sdduvall 10261369Sdduvall case BGE_LOOP_EXTERNAL_1000: 10271369Sdduvall case BGE_LOOP_EXTERNAL_100: 10281369Sdduvall case BGE_LOOP_EXTERNAL_10: 10291369Sdduvall msg = " (external loopback selected)"; 10301369Sdduvall break; 10311369Sdduvall 10321369Sdduvall case BGE_LOOP_INTERNAL_PHY: 10331369Sdduvall msg = " (PHY internal loopback selected)"; 10341369Sdduvall break; 10351369Sdduvall 10361369Sdduvall case BGE_LOOP_INTERNAL_MAC: 10371369Sdduvall msg = " (MAC internal loopback selected)"; 10381369Sdduvall break; 10391369Sdduvall } 10401369Sdduvall 10411369Sdduvall /* 10421369Sdduvall * All OK; tell the caller to reprogram 10431369Sdduvall * the PHY and/or MAC for the new mode ... 10441369Sdduvall */ 10451369Sdduvall bgep->link_down_msg = bgep->link_up_msg = msg; 10461369Sdduvall bgep->param_loop_mode = mode; 10471369Sdduvall return (IOC_RESTART_ACK); 10481369Sdduvall } 10491369Sdduvall 10501369Sdduvall static enum ioc_reply 10511369Sdduvall bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 10521369Sdduvall { 10531369Sdduvall lb_info_sz_t *lbsp; 10541369Sdduvall lb_property_t *lbpp; 10551369Sdduvall uint32_t *lbmp; 10561369Sdduvall int cmd; 10571369Sdduvall 10581369Sdduvall _NOTE(ARGUNUSED(wq)) 10591369Sdduvall 10601369Sdduvall /* 10611369Sdduvall * Validate format of ioctl 10621369Sdduvall */ 10631369Sdduvall if (mp->b_cont == NULL) 10641369Sdduvall return (IOC_INVAL); 10651369Sdduvall 10661369Sdduvall cmd = iocp->ioc_cmd; 10671369Sdduvall switch (cmd) { 10681369Sdduvall default: 10691369Sdduvall /* NOTREACHED */ 10701369Sdduvall bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd); 10711369Sdduvall return (IOC_INVAL); 10721369Sdduvall 10731369Sdduvall case LB_GET_INFO_SIZE: 10741369Sdduvall if (iocp->ioc_count != sizeof (lb_info_sz_t)) 10751369Sdduvall return (IOC_INVAL); 10761369Sdduvall lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr; 10771369Sdduvall *lbsp = sizeof (loopmodes); 10781369Sdduvall return (IOC_REPLY); 10791369Sdduvall 10801369Sdduvall case LB_GET_INFO: 10811369Sdduvall if (iocp->ioc_count != sizeof (loopmodes)) 10821369Sdduvall return (IOC_INVAL); 10831369Sdduvall lbpp = (lb_property_t *)mp->b_cont->b_rptr; 10841369Sdduvall bcopy(loopmodes, lbpp, sizeof (loopmodes)); 10851369Sdduvall return (IOC_REPLY); 10861369Sdduvall 10871369Sdduvall case LB_GET_MODE: 10881369Sdduvall if (iocp->ioc_count != sizeof (uint32_t)) 10891369Sdduvall return (IOC_INVAL); 10901369Sdduvall lbmp = (uint32_t *)mp->b_cont->b_rptr; 10911369Sdduvall *lbmp = bgep->param_loop_mode; 10921369Sdduvall return (IOC_REPLY); 10931369Sdduvall 10941369Sdduvall case LB_SET_MODE: 10951369Sdduvall if (iocp->ioc_count != sizeof (uint32_t)) 10961369Sdduvall return (IOC_INVAL); 10971369Sdduvall lbmp = (uint32_t *)mp->b_cont->b_rptr; 10981369Sdduvall return (bge_set_loop_mode(bgep, *lbmp)); 10991369Sdduvall } 11001369Sdduvall } 11011369Sdduvall 11021369Sdduvall /* 11031369Sdduvall * Specific bge IOCTLs, the gld module handles the generic ones. 11041369Sdduvall */ 11051369Sdduvall static void 11061369Sdduvall bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp) 11071369Sdduvall { 11081369Sdduvall bge_t *bgep = arg; 11091369Sdduvall struct iocblk *iocp; 11101369Sdduvall enum ioc_reply status; 11111369Sdduvall boolean_t need_privilege; 11121369Sdduvall int err; 11131369Sdduvall int cmd; 11141369Sdduvall 11151369Sdduvall /* 11161369Sdduvall * Validate the command before bothering with the mutex ... 11171369Sdduvall */ 11181369Sdduvall iocp = (struct iocblk *)mp->b_rptr; 11191369Sdduvall iocp->ioc_error = 0; 11201369Sdduvall need_privilege = B_TRUE; 11211369Sdduvall cmd = iocp->ioc_cmd; 11221369Sdduvall switch (cmd) { 11231369Sdduvall default: 11241369Sdduvall miocnak(wq, mp, 0, EINVAL); 11251369Sdduvall return; 11261369Sdduvall 11271369Sdduvall case BGE_MII_READ: 11281369Sdduvall case BGE_MII_WRITE: 11291369Sdduvall case BGE_SEE_READ: 11301369Sdduvall case BGE_SEE_WRITE: 1131*2675Szh199473 case BGE_FLASH_READ: 1132*2675Szh199473 case BGE_FLASH_WRITE: 11331369Sdduvall case BGE_DIAG: 11341369Sdduvall case BGE_PEEK: 11351369Sdduvall case BGE_POKE: 11361369Sdduvall case BGE_PHY_RESET: 11371369Sdduvall case BGE_SOFT_RESET: 11381369Sdduvall case BGE_HARD_RESET: 11391369Sdduvall break; 11401369Sdduvall 11411369Sdduvall case LB_GET_INFO_SIZE: 11421369Sdduvall case LB_GET_INFO: 11431369Sdduvall case LB_GET_MODE: 11441369Sdduvall need_privilege = B_FALSE; 11451369Sdduvall /* FALLTHRU */ 11461369Sdduvall case LB_SET_MODE: 11471369Sdduvall break; 11481369Sdduvall 11491369Sdduvall case ND_GET: 11501369Sdduvall need_privilege = B_FALSE; 11511369Sdduvall /* FALLTHRU */ 11521369Sdduvall case ND_SET: 11531369Sdduvall break; 11541369Sdduvall } 11551369Sdduvall 11561369Sdduvall if (need_privilege) { 11571369Sdduvall /* 11581369Sdduvall * Check for specific net_config privilege on Solaris 10+. 11591369Sdduvall * Otherwise just check for root access ... 11601369Sdduvall */ 11611369Sdduvall if (secpolicy_net_config != NULL) 11621369Sdduvall err = secpolicy_net_config(iocp->ioc_cr, B_FALSE); 11631369Sdduvall else 11641369Sdduvall err = drv_priv(iocp->ioc_cr); 11651369Sdduvall if (err != 0) { 11661369Sdduvall miocnak(wq, mp, 0, err); 11671369Sdduvall return; 11681369Sdduvall } 11691369Sdduvall } 11701369Sdduvall 11711369Sdduvall mutex_enter(bgep->genlock); 11721865Sdilpreet if (!(bgep->progress & PROGRESS_INTR)) { 11731865Sdilpreet /* can happen during autorecovery */ 11741865Sdilpreet mutex_exit(bgep->genlock); 11751865Sdilpreet miocnak(wq, mp, 0, EIO); 11761865Sdilpreet return; 11771865Sdilpreet } 11781369Sdduvall 11791369Sdduvall switch (cmd) { 11801369Sdduvall default: 11811369Sdduvall _NOTE(NOTREACHED) 11821369Sdduvall status = IOC_INVAL; 11831369Sdduvall break; 11841369Sdduvall 11851369Sdduvall case BGE_MII_READ: 11861369Sdduvall case BGE_MII_WRITE: 11871369Sdduvall case BGE_SEE_READ: 11881369Sdduvall case BGE_SEE_WRITE: 1189*2675Szh199473 case BGE_FLASH_READ: 1190*2675Szh199473 case BGE_FLASH_WRITE: 11911369Sdduvall case BGE_DIAG: 11921369Sdduvall case BGE_PEEK: 11931369Sdduvall case BGE_POKE: 11941369Sdduvall case BGE_PHY_RESET: 11951369Sdduvall case BGE_SOFT_RESET: 11961369Sdduvall case BGE_HARD_RESET: 11971369Sdduvall status = bge_chip_ioctl(bgep, wq, mp, iocp); 11981369Sdduvall break; 11991369Sdduvall 12001369Sdduvall case LB_GET_INFO_SIZE: 12011369Sdduvall case LB_GET_INFO: 12021369Sdduvall case LB_GET_MODE: 12031369Sdduvall case LB_SET_MODE: 12041369Sdduvall status = bge_loop_ioctl(bgep, wq, mp, iocp); 12051369Sdduvall break; 12061369Sdduvall 12071369Sdduvall case ND_GET: 12081369Sdduvall case ND_SET: 12091369Sdduvall status = bge_nd_ioctl(bgep, wq, mp, iocp); 12101369Sdduvall break; 12111369Sdduvall } 12121369Sdduvall 12131369Sdduvall /* 12141369Sdduvall * Do we need to reprogram the PHY and/or the MAC? 12151369Sdduvall * Do it now, while we still have the mutex. 12161369Sdduvall * 12171369Sdduvall * Note: update the PHY first, 'cos it controls the 12181369Sdduvall * speed/duplex parameters that the MAC code uses. 12191369Sdduvall */ 12201369Sdduvall switch (status) { 12211369Sdduvall case IOC_RESTART_REPLY: 12221369Sdduvall case IOC_RESTART_ACK: 12231865Sdilpreet if (bge_phys_update(bgep) != DDI_SUCCESS) { 12241865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 12251865Sdilpreet DDI_SERVICE_DEGRADED); 12261865Sdilpreet status = IOC_INVAL; 12271865Sdilpreet } 12281408Srandyf #ifdef BGE_IPMI_ASF 1229*2675Szh199473 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 12301408Srandyf #else 12311865Sdilpreet if (bge_chip_sync(bgep) == DDI_FAILURE) { 12321408Srandyf #endif 12331865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 12341865Sdilpreet DDI_SERVICE_DEGRADED); 12351865Sdilpreet status = IOC_INVAL; 12361865Sdilpreet } 12371369Sdduvall if (bgep->intr_type == DDI_INTR_TYPE_MSI) 12381369Sdduvall bge_chip_msi_trig(bgep); 12391369Sdduvall break; 12401369Sdduvall } 12411369Sdduvall 12421865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 12431865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 12441865Sdilpreet status = IOC_INVAL; 12451865Sdilpreet } 12461865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 12471865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 12481865Sdilpreet status = IOC_INVAL; 12491865Sdilpreet } 12501369Sdduvall mutex_exit(bgep->genlock); 12511369Sdduvall 12521369Sdduvall /* 12531369Sdduvall * Finally, decide how to reply 12541369Sdduvall */ 12551369Sdduvall switch (status) { 12561369Sdduvall default: 12571369Sdduvall case IOC_INVAL: 12581369Sdduvall /* 12591369Sdduvall * Error, reply with a NAK and EINVAL or the specified error 12601369Sdduvall */ 12611369Sdduvall miocnak(wq, mp, 0, iocp->ioc_error == 0 ? 12621369Sdduvall EINVAL : iocp->ioc_error); 12631369Sdduvall break; 12641369Sdduvall 12651369Sdduvall case IOC_DONE: 12661369Sdduvall /* 12671369Sdduvall * OK, reply already sent 12681369Sdduvall */ 12691369Sdduvall break; 12701369Sdduvall 12711369Sdduvall case IOC_RESTART_ACK: 12721369Sdduvall case IOC_ACK: 12731369Sdduvall /* 12741369Sdduvall * OK, reply with an ACK 12751369Sdduvall */ 12761369Sdduvall miocack(wq, mp, 0, 0); 12771369Sdduvall break; 12781369Sdduvall 12791369Sdduvall case IOC_RESTART_REPLY: 12801369Sdduvall case IOC_REPLY: 12811369Sdduvall /* 12821369Sdduvall * OK, send prepared reply as ACK or NAK 12831369Sdduvall */ 12841369Sdduvall mp->b_datap->db_type = iocp->ioc_error == 0 ? 12851369Sdduvall M_IOCACK : M_IOCNAK; 12861369Sdduvall qreply(wq, mp); 12871369Sdduvall break; 12881369Sdduvall } 12891369Sdduvall } 12901369Sdduvall 12911369Sdduvall static void 12921369Sdduvall bge_m_resources(void *arg) 12931369Sdduvall { 12941369Sdduvall bge_t *bgep = arg; 12951369Sdduvall recv_ring_t *rrp; 12961369Sdduvall mac_rx_fifo_t mrf; 12971369Sdduvall int ring; 12981369Sdduvall 12991369Sdduvall mutex_enter(bgep->genlock); 13001369Sdduvall 13011369Sdduvall /* 13021369Sdduvall * Register Rx rings as resources and save mac 13031369Sdduvall * resource id for future reference 13041369Sdduvall */ 13051369Sdduvall mrf.mrf_type = MAC_RX_FIFO; 13061369Sdduvall mrf.mrf_blank = bge_chip_blank; 13071369Sdduvall mrf.mrf_arg = (void *)bgep; 13081369Sdduvall mrf.mrf_normal_blank_time = bge_rx_ticks_norm; 13091369Sdduvall mrf.mrf_normal_pkt_count = bge_rx_count_norm; 13101369Sdduvall 13111369Sdduvall for (ring = 0; ring < bgep->chipid.rx_rings; ring++) { 13121369Sdduvall rrp = &bgep->recv[ring]; 13132311Sseb rrp->handle = mac_resource_add(bgep->mh, 13141369Sdduvall (mac_resource_t *)&mrf); 13151369Sdduvall } 13161369Sdduvall 13171369Sdduvall mutex_exit(bgep->genlock); 13181369Sdduvall } 13191369Sdduvall 13201369Sdduvall /* 13211369Sdduvall * ========== Per-instance setup/teardown code ========== 13221369Sdduvall */ 13231369Sdduvall 13241369Sdduvall #undef BGE_DBG 13251369Sdduvall #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 13261369Sdduvall 13271369Sdduvall /* 13281369Sdduvall * Utility routine to carve a slice off a chunk of allocated memory, 13291369Sdduvall * updating the chunk descriptor accordingly. The size of the slice 13301369Sdduvall * is given by the product of the <qty> and <size> parameters. 13311369Sdduvall */ 13321369Sdduvall static void 13331369Sdduvall bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk, 13341369Sdduvall uint32_t qty, uint32_t size) 13351369Sdduvall { 13361369Sdduvall static uint32_t sequence = 0xbcd5704a; 13371369Sdduvall size_t totsize; 13381369Sdduvall 13391369Sdduvall totsize = qty*size; 13401369Sdduvall ASSERT(size >= 0); 13411369Sdduvall ASSERT(totsize <= chunk->alength); 13421369Sdduvall 13431369Sdduvall *slice = *chunk; 13441369Sdduvall slice->nslots = qty; 13451369Sdduvall slice->size = size; 13461369Sdduvall slice->alength = totsize; 13471369Sdduvall slice->token = ++sequence; 13481369Sdduvall 13491369Sdduvall chunk->mem_va = (caddr_t)chunk->mem_va + totsize; 13501369Sdduvall chunk->alength -= totsize; 13511369Sdduvall chunk->offset += totsize; 13521369Sdduvall chunk->cookie.dmac_laddress += totsize; 13531369Sdduvall chunk->cookie.dmac_size -= totsize; 13541369Sdduvall } 13551369Sdduvall 13561369Sdduvall /* 13571369Sdduvall * Initialise the specified Receive Producer (Buffer) Ring, using 13581369Sdduvall * the information in the <dma_area> descriptors that it contains 13591369Sdduvall * to set up all the other fields. This routine should be called 13601369Sdduvall * only once for each ring. 13611369Sdduvall */ 13621369Sdduvall static void 13631369Sdduvall bge_init_buff_ring(bge_t *bgep, uint64_t ring) 13641369Sdduvall { 13651369Sdduvall buff_ring_t *brp; 13661369Sdduvall bge_status_t *bsp; 13671369Sdduvall sw_rbd_t *srbdp; 13681369Sdduvall dma_area_t pbuf; 13691369Sdduvall uint32_t bufsize; 13701369Sdduvall uint32_t nslots; 13711369Sdduvall uint32_t slot; 13721369Sdduvall uint32_t split; 13731369Sdduvall 13741369Sdduvall static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = { 13751369Sdduvall NIC_MEM_SHADOW_BUFF_STD, 13761369Sdduvall NIC_MEM_SHADOW_BUFF_JUMBO, 13771369Sdduvall NIC_MEM_SHADOW_BUFF_MINI 13781369Sdduvall }; 13791369Sdduvall static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = { 13801369Sdduvall RECV_STD_PROD_INDEX_REG, 13811369Sdduvall RECV_JUMBO_PROD_INDEX_REG, 13821369Sdduvall RECV_MINI_PROD_INDEX_REG 13831369Sdduvall }; 13841369Sdduvall static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = { 13851369Sdduvall STATUS_STD_BUFF_CONS_INDEX, 13861369Sdduvall STATUS_JUMBO_BUFF_CONS_INDEX, 13871369Sdduvall STATUS_MINI_BUFF_CONS_INDEX 13881369Sdduvall }; 13891369Sdduvall 13901369Sdduvall BGE_TRACE(("bge_init_buff_ring($%p, %d)", 13911369Sdduvall (void *)bgep, ring)); 13921369Sdduvall 13931369Sdduvall brp = &bgep->buff[ring]; 13941369Sdduvall nslots = brp->desc.nslots; 13951369Sdduvall ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 13961369Sdduvall bufsize = brp->buf[0].size; 13971369Sdduvall 13981369Sdduvall /* 13991369Sdduvall * Set up the copy of the h/w RCB 14001369Sdduvall * 14011369Sdduvall * Note: unlike Send & Receive Return Rings, (where the max_len 14021369Sdduvall * field holds the number of slots), in a Receive Buffer Ring 14031369Sdduvall * this field indicates the size of each buffer in the ring. 14041369Sdduvall */ 14051369Sdduvall brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress; 14061369Sdduvall brp->hw_rcb.max_len = bufsize; 14071369Sdduvall brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 14081369Sdduvall brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring]; 14091369Sdduvall 14101369Sdduvall /* 14111369Sdduvall * Other one-off initialisation of per-ring data 14121369Sdduvall */ 14131369Sdduvall brp->bgep = bgep; 14141369Sdduvall bsp = DMA_VPTR(bgep->status_block); 14151369Sdduvall brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]]; 14161369Sdduvall brp->chip_mbx_reg = mailbox_regs[ring]; 14171369Sdduvall mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER, 14181369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 14191369Sdduvall 14201369Sdduvall /* 14211369Sdduvall * Allocate the array of s/w Receive Buffer Descriptors 14221369Sdduvall */ 14231369Sdduvall srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP); 14241369Sdduvall brp->sw_rbds = srbdp; 14251369Sdduvall 14261369Sdduvall /* 14271369Sdduvall * Now initialise each array element once and for all 14281369Sdduvall */ 14291369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 14301369Sdduvall pbuf = brp->buf[split]; 14311369Sdduvall for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot) 14321369Sdduvall bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize); 14331369Sdduvall ASSERT(pbuf.alength == 0); 14341369Sdduvall } 14351369Sdduvall } 14361369Sdduvall 14371369Sdduvall /* 14381369Sdduvall * Clean up initialisation done above before the memory is freed 14391369Sdduvall */ 14401369Sdduvall static void 14411369Sdduvall bge_fini_buff_ring(bge_t *bgep, uint64_t ring) 14421369Sdduvall { 14431369Sdduvall buff_ring_t *brp; 14441369Sdduvall sw_rbd_t *srbdp; 14451369Sdduvall 14461369Sdduvall BGE_TRACE(("bge_fini_buff_ring($%p, %d)", 14471369Sdduvall (void *)bgep, ring)); 14481369Sdduvall 14491369Sdduvall brp = &bgep->buff[ring]; 14501369Sdduvall srbdp = brp->sw_rbds; 14511369Sdduvall kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp)); 14521369Sdduvall 14531369Sdduvall mutex_destroy(brp->rf_lock); 14541369Sdduvall } 14551369Sdduvall 14561369Sdduvall /* 14571369Sdduvall * Initialise the specified Receive (Return) Ring, using the 14581369Sdduvall * information in the <dma_area> descriptors that it contains 14591369Sdduvall * to set up all the other fields. This routine should be called 14601369Sdduvall * only once for each ring. 14611369Sdduvall */ 14621369Sdduvall static void 14631369Sdduvall bge_init_recv_ring(bge_t *bgep, uint64_t ring) 14641369Sdduvall { 14651369Sdduvall recv_ring_t *rrp; 14661369Sdduvall bge_status_t *bsp; 14671369Sdduvall uint32_t nslots; 14681369Sdduvall 14691369Sdduvall BGE_TRACE(("bge_init_recv_ring($%p, %d)", 14701369Sdduvall (void *)bgep, ring)); 14711369Sdduvall 14721369Sdduvall /* 14731369Sdduvall * The chip architecture requires that receive return rings have 14741369Sdduvall * 512 or 1024 or 2048 elements per ring. See 570X-PG108-R page 103. 14751369Sdduvall */ 14761369Sdduvall rrp = &bgep->recv[ring]; 14771369Sdduvall nslots = rrp->desc.nslots; 14781369Sdduvall ASSERT(nslots == 0 || nslots == 512 || 14791369Sdduvall nslots == 1024 || nslots == 2048); 14801369Sdduvall 14811369Sdduvall /* 14821369Sdduvall * Set up the copy of the h/w RCB 14831369Sdduvall */ 14841369Sdduvall rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress; 14851369Sdduvall rrp->hw_rcb.max_len = nslots; 14861369Sdduvall rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 14871369Sdduvall rrp->hw_rcb.nic_ring_addr = 0; 14881369Sdduvall 14891369Sdduvall /* 14901369Sdduvall * Other one-off initialisation of per-ring data 14911369Sdduvall */ 14921369Sdduvall rrp->bgep = bgep; 14931369Sdduvall bsp = DMA_VPTR(bgep->status_block); 14941369Sdduvall rrp->prod_index_p = RECV_INDEX_P(bsp, ring); 14951369Sdduvall rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring); 14961369Sdduvall mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER, 14971369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 14981369Sdduvall } 14991369Sdduvall 15001369Sdduvall 15011369Sdduvall /* 15021369Sdduvall * Clean up initialisation done above before the memory is freed 15031369Sdduvall */ 15041369Sdduvall static void 15051369Sdduvall bge_fini_recv_ring(bge_t *bgep, uint64_t ring) 15061369Sdduvall { 15071369Sdduvall recv_ring_t *rrp; 15081369Sdduvall 15091369Sdduvall BGE_TRACE(("bge_fini_recv_ring($%p, %d)", 15101369Sdduvall (void *)bgep, ring)); 15111369Sdduvall 15121369Sdduvall rrp = &bgep->recv[ring]; 15131369Sdduvall if (rrp->rx_softint) 15141369Sdduvall ddi_remove_softintr(rrp->rx_softint); 15151369Sdduvall mutex_destroy(rrp->rx_lock); 15161369Sdduvall } 15171369Sdduvall 15181369Sdduvall /* 15191369Sdduvall * Initialise the specified Send Ring, using the information in the 15201369Sdduvall * <dma_area> descriptors that it contains to set up all the other 15211369Sdduvall * fields. This routine should be called only once for each ring. 15221369Sdduvall */ 15231369Sdduvall static void 15241369Sdduvall bge_init_send_ring(bge_t *bgep, uint64_t ring) 15251369Sdduvall { 15261369Sdduvall send_ring_t *srp; 15271369Sdduvall bge_status_t *bsp; 15281369Sdduvall sw_sbd_t *ssbdp; 15291369Sdduvall dma_area_t desc; 15301369Sdduvall dma_area_t pbuf; 15311369Sdduvall uint32_t nslots; 15321369Sdduvall uint32_t slot; 15331369Sdduvall uint32_t split; 15341369Sdduvall 15351369Sdduvall BGE_TRACE(("bge_init_send_ring($%p, %d)", 15361369Sdduvall (void *)bgep, ring)); 15371369Sdduvall 15381369Sdduvall /* 15391369Sdduvall * The chip architecture requires that host-based send rings 15401369Sdduvall * have 512 elements per ring. See 570X-PG102-R page 56. 15411369Sdduvall */ 15421369Sdduvall srp = &bgep->send[ring]; 15431369Sdduvall nslots = srp->desc.nslots; 15441369Sdduvall ASSERT(nslots == 0 || nslots == 512); 15451369Sdduvall 15461369Sdduvall /* 15471369Sdduvall * Set up the copy of the h/w RCB 15481369Sdduvall */ 15491369Sdduvall srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress; 15501369Sdduvall srp->hw_rcb.max_len = nslots; 15511369Sdduvall srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 15521369Sdduvall srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots); 15531369Sdduvall 15541369Sdduvall /* 15551369Sdduvall * Other one-off initialisation of per-ring data 15561369Sdduvall */ 15571369Sdduvall srp->bgep = bgep; 15581369Sdduvall bsp = DMA_VPTR(bgep->status_block); 15591369Sdduvall srp->cons_index_p = SEND_INDEX_P(bsp, ring); 15601369Sdduvall srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring); 15611369Sdduvall mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER, 15621369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 15631369Sdduvall mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER, 15641369Sdduvall DDI_INTR_PRI(bgep->intr_pri)); 15651369Sdduvall 15661369Sdduvall /* 15671369Sdduvall * Allocate the array of s/w Send Buffer Descriptors 15681369Sdduvall */ 15691369Sdduvall ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP); 15701369Sdduvall srp->sw_sbds = ssbdp; 15711369Sdduvall 15721369Sdduvall /* 15731369Sdduvall * Now initialise each array element once and for all 15741369Sdduvall */ 15751369Sdduvall desc = srp->desc; 15761369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 15771369Sdduvall pbuf = srp->buf[split]; 15781369Sdduvall for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) { 15791369Sdduvall bge_slice_chunk(&ssbdp->desc, &desc, 1, 15801369Sdduvall sizeof (bge_sbd_t)); 15811369Sdduvall bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1, 15821369Sdduvall bgep->chipid.snd_buff_size); 15831369Sdduvall } 15841369Sdduvall ASSERT(pbuf.alength == 0); 15851369Sdduvall } 15861369Sdduvall ASSERT(desc.alength == 0); 15871369Sdduvall } 15881369Sdduvall 15891369Sdduvall /* 15901369Sdduvall * Clean up initialisation done above before the memory is freed 15911369Sdduvall */ 15921369Sdduvall static void 15931369Sdduvall bge_fini_send_ring(bge_t *bgep, uint64_t ring) 15941369Sdduvall { 15951369Sdduvall send_ring_t *srp; 15961369Sdduvall sw_sbd_t *ssbdp; 15971369Sdduvall 15981369Sdduvall BGE_TRACE(("bge_fini_send_ring($%p, %d)", 15991369Sdduvall (void *)bgep, ring)); 16001369Sdduvall 16011369Sdduvall srp = &bgep->send[ring]; 16021369Sdduvall ssbdp = srp->sw_sbds; 16031369Sdduvall kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp)); 16041369Sdduvall 16051369Sdduvall mutex_destroy(srp->tx_lock); 16061369Sdduvall mutex_destroy(srp->tc_lock); 16071369Sdduvall } 16081369Sdduvall 16091369Sdduvall /* 16101369Sdduvall * Initialise all transmit, receive, and buffer rings. 16111369Sdduvall */ 16121865Sdilpreet void 16131369Sdduvall bge_init_rings(bge_t *bgep) 16141369Sdduvall { 16151369Sdduvall uint64_t ring; 16161369Sdduvall 16171369Sdduvall BGE_TRACE(("bge_init_rings($%p)", (void *)bgep)); 16181369Sdduvall 16191369Sdduvall /* 16201369Sdduvall * Perform one-off initialisation of each ring ... 16211369Sdduvall */ 16221369Sdduvall for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 16231369Sdduvall bge_init_send_ring(bgep, ring); 16241369Sdduvall for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 16251369Sdduvall bge_init_recv_ring(bgep, ring); 16261369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 16271369Sdduvall bge_init_buff_ring(bgep, ring); 16281369Sdduvall } 16291369Sdduvall 16301369Sdduvall /* 16311369Sdduvall * Undo the work of bge_init_rings() above before the memory is freed 16321369Sdduvall */ 16331865Sdilpreet void 16341369Sdduvall bge_fini_rings(bge_t *bgep) 16351369Sdduvall { 16361369Sdduvall uint64_t ring; 16371369Sdduvall 16381369Sdduvall BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep)); 16391369Sdduvall 16401369Sdduvall for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 16411369Sdduvall bge_fini_buff_ring(bgep, ring); 16421369Sdduvall for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 16431369Sdduvall bge_fini_recv_ring(bgep, ring); 16441369Sdduvall for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 16451369Sdduvall bge_fini_send_ring(bgep, ring); 16461369Sdduvall } 16471369Sdduvall 16481369Sdduvall /* 16491369Sdduvall * Allocate an area of memory and a DMA handle for accessing it 16501369Sdduvall */ 16511369Sdduvall static int 16521369Sdduvall bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p, 16531369Sdduvall uint_t dma_flags, dma_area_t *dma_p) 16541369Sdduvall { 16551369Sdduvall caddr_t va; 16561369Sdduvall int err; 16571369Sdduvall 16581369Sdduvall BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)", 16591369Sdduvall (void *)bgep, memsize, attr_p, dma_flags, dma_p)); 16601369Sdduvall 16611369Sdduvall /* 16621369Sdduvall * Allocate handle 16631369Sdduvall */ 16641369Sdduvall err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr, 16651369Sdduvall DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 16661369Sdduvall if (err != DDI_SUCCESS) 16671369Sdduvall return (DDI_FAILURE); 16681369Sdduvall 16691369Sdduvall /* 16701369Sdduvall * Allocate memory 16711369Sdduvall */ 16721369Sdduvall err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p, 16731369Sdduvall dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 16741369Sdduvall DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl); 16751369Sdduvall if (err != DDI_SUCCESS) 16761369Sdduvall return (DDI_FAILURE); 16771369Sdduvall 16781369Sdduvall /* 16791369Sdduvall * Bind the two together 16801369Sdduvall */ 16811369Sdduvall dma_p->mem_va = va; 16821369Sdduvall err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 16831369Sdduvall va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 16841369Sdduvall &dma_p->cookie, &dma_p->ncookies); 16851369Sdduvall 16861369Sdduvall BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies", 16871369Sdduvall dma_p->alength, err, dma_p->ncookies)); 16881369Sdduvall 16891369Sdduvall if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1) 16901369Sdduvall return (DDI_FAILURE); 16911369Sdduvall 16921369Sdduvall dma_p->nslots = ~0U; 16931369Sdduvall dma_p->size = ~0U; 16941369Sdduvall dma_p->token = ~0U; 16951369Sdduvall dma_p->offset = 0; 16961369Sdduvall return (DDI_SUCCESS); 16971369Sdduvall } 16981369Sdduvall 16991369Sdduvall /* 17001369Sdduvall * Free one allocated area of DMAable memory 17011369Sdduvall */ 17021369Sdduvall static void 17031369Sdduvall bge_free_dma_mem(dma_area_t *dma_p) 17041369Sdduvall { 17051369Sdduvall if (dma_p->dma_hdl != NULL) { 17061369Sdduvall if (dma_p->ncookies) { 17071369Sdduvall (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 17081369Sdduvall dma_p->ncookies = 0; 17091369Sdduvall } 17101369Sdduvall ddi_dma_free_handle(&dma_p->dma_hdl); 17111369Sdduvall dma_p->dma_hdl = NULL; 17121369Sdduvall } 17131369Sdduvall 17141369Sdduvall if (dma_p->acc_hdl != NULL) { 17151369Sdduvall ddi_dma_mem_free(&dma_p->acc_hdl); 17161369Sdduvall dma_p->acc_hdl = NULL; 17171369Sdduvall } 17181369Sdduvall } 17191369Sdduvall 17201369Sdduvall /* 17211369Sdduvall * This function allocates all the transmit and receive buffers 17221369Sdduvall * and descriptors, in four chunks (or one, if MONOLITHIC). 17231369Sdduvall */ 17241865Sdilpreet int 17251369Sdduvall bge_alloc_bufs(bge_t *bgep) 17261369Sdduvall { 17271369Sdduvall dma_area_t area; 17281369Sdduvall size_t rxbuffsize; 17291369Sdduvall size_t txbuffsize; 17301369Sdduvall size_t rxbuffdescsize; 17311369Sdduvall size_t rxdescsize; 17321369Sdduvall size_t txdescsize; 17331369Sdduvall uint64_t ring; 17341369Sdduvall uint64_t rx_rings = bgep->chipid.rx_rings; 17351369Sdduvall uint64_t tx_rings = bgep->chipid.tx_rings; 17361369Sdduvall int split; 17371369Sdduvall int err; 17381369Sdduvall 17391369Sdduvall BGE_TRACE(("bge_alloc_bufs($%p)", 17401369Sdduvall (void *)bgep)); 17411369Sdduvall 17421908Sly149593 rxbuffsize = BGE_STD_SLOTS_USED*bgep->chipid.std_buf_size; 17431369Sdduvall rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size; 17441369Sdduvall rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE; 17451369Sdduvall 17461369Sdduvall txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size; 17471369Sdduvall txbuffsize *= tx_rings; 17481369Sdduvall 17491369Sdduvall rxdescsize = rx_rings*bgep->chipid.recv_slots; 17501369Sdduvall rxdescsize *= sizeof (bge_rbd_t); 17511369Sdduvall 17521369Sdduvall rxbuffdescsize = BGE_STD_SLOTS_USED; 17531369Sdduvall rxbuffdescsize += bgep->chipid.jumbo_slots; 17541369Sdduvall rxbuffdescsize += BGE_MINI_SLOTS_USED; 17551369Sdduvall rxbuffdescsize *= sizeof (bge_rbd_t); 17561369Sdduvall 17571369Sdduvall txdescsize = tx_rings*BGE_SEND_SLOTS_USED; 17581369Sdduvall txdescsize *= sizeof (bge_sbd_t); 17591369Sdduvall txdescsize += sizeof (bge_statistics_t); 17601369Sdduvall txdescsize += sizeof (bge_status_t); 17611369Sdduvall txdescsize += BGE_STATUS_PADDING; 17621369Sdduvall 17631369Sdduvall #if BGE_MONOLITHIC 17641369Sdduvall 17651369Sdduvall err = bge_alloc_dma_mem(bgep, 17661369Sdduvall rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize, 17671369Sdduvall &bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area); 17681369Sdduvall if (err != DDI_SUCCESS) 17691369Sdduvall return (DDI_FAILURE); 17701369Sdduvall 17711369Sdduvall BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)", 17721369Sdduvall DMA_VPTR(area), 17731369Sdduvall (caddr_t)DMA_VPTR(area)+area.alength, 17741369Sdduvall area.cookie.dmac_laddress, 17751369Sdduvall area.cookie.dmac_laddress+area.alength)); 17761369Sdduvall 17771369Sdduvall bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize); 17781369Sdduvall bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize); 17791369Sdduvall bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize); 17801369Sdduvall bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize); 17811369Sdduvall 17821369Sdduvall #else 17831369Sdduvall /* 17841369Sdduvall * Allocate memory & handles for RX buffers 17851369Sdduvall */ 17861369Sdduvall ASSERT((rxbuffsize % BGE_SPLIT) == 0); 17871369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 17881369Sdduvall err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT, 17891369Sdduvall &bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE, 17901369Sdduvall &bgep->rx_buff[split]); 17911369Sdduvall if (err != DDI_SUCCESS) 17921369Sdduvall return (DDI_FAILURE); 17931369Sdduvall } 17941369Sdduvall 17951369Sdduvall /* 17961369Sdduvall * Allocate memory & handles for TX buffers 17971369Sdduvall */ 17981369Sdduvall ASSERT((txbuffsize % BGE_SPLIT) == 0); 17991369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 18001369Sdduvall err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT, 18011369Sdduvall &bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE, 18021369Sdduvall &bgep->tx_buff[split]); 18031369Sdduvall if (err != DDI_SUCCESS) 18041369Sdduvall return (DDI_FAILURE); 18051369Sdduvall } 18061369Sdduvall 18071369Sdduvall /* 18081369Sdduvall * Allocate memory & handles for receive return rings 18091369Sdduvall */ 18101369Sdduvall ASSERT((rxdescsize % rx_rings) == 0); 18111369Sdduvall for (split = 0; split < rx_rings; ++split) { 18121369Sdduvall err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings, 18131369Sdduvall &bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 18141369Sdduvall &bgep->rx_desc[split]); 18151369Sdduvall if (err != DDI_SUCCESS) 18161369Sdduvall return (DDI_FAILURE); 18171369Sdduvall } 18181369Sdduvall 18191369Sdduvall /* 18201369Sdduvall * Allocate memory & handles for buffer (producer) descriptor rings 18211369Sdduvall */ 18221369Sdduvall err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr, 18231369Sdduvall DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]); 18241369Sdduvall if (err != DDI_SUCCESS) 18251369Sdduvall return (DDI_FAILURE); 18261369Sdduvall 18271369Sdduvall /* 18281369Sdduvall * Allocate memory & handles for TX descriptor rings, 18291369Sdduvall * status block, and statistics area 18301369Sdduvall */ 18311369Sdduvall err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr, 18321369Sdduvall DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc); 18331369Sdduvall if (err != DDI_SUCCESS) 18341369Sdduvall return (DDI_FAILURE); 18351369Sdduvall 18361369Sdduvall #endif /* BGE_MONOLITHIC */ 18371369Sdduvall 18381369Sdduvall /* 18391369Sdduvall * Now carve up each of the allocated areas ... 18401369Sdduvall */ 18411369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 18421369Sdduvall area = bgep->rx_buff[split]; 18431369Sdduvall bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split], 18441369Sdduvall &area, BGE_STD_SLOTS_USED/BGE_SPLIT, 18451908Sly149593 bgep->chipid.std_buf_size); 18461369Sdduvall bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split], 18471369Sdduvall &area, bgep->chipid.jumbo_slots/BGE_SPLIT, 18481369Sdduvall bgep->chipid.recv_jumbo_size); 18491369Sdduvall bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split], 18501369Sdduvall &area, BGE_MINI_SLOTS_USED/BGE_SPLIT, 18511369Sdduvall BGE_MINI_BUFF_SIZE); 18521369Sdduvall ASSERT(area.alength >= 0); 18531369Sdduvall } 18541369Sdduvall 18551369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) { 18561369Sdduvall area = bgep->tx_buff[split]; 18571369Sdduvall for (ring = 0; ring < tx_rings; ++ring) 18581369Sdduvall bge_slice_chunk(&bgep->send[ring].buf[split], 18591369Sdduvall &area, BGE_SEND_SLOTS_USED/BGE_SPLIT, 18601369Sdduvall bgep->chipid.snd_buff_size); 18611369Sdduvall for (; ring < BGE_SEND_RINGS_MAX; ++ring) 18621369Sdduvall bge_slice_chunk(&bgep->send[ring].buf[split], 18631369Sdduvall &area, 0/BGE_SPLIT, 18641369Sdduvall bgep->chipid.snd_buff_size); 18651369Sdduvall ASSERT(area.alength >= 0); 18661369Sdduvall } 18671369Sdduvall 18681369Sdduvall for (ring = 0; ring < rx_rings; ++ring) 18691369Sdduvall bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring], 18701369Sdduvall bgep->chipid.recv_slots, sizeof (bge_rbd_t)); 18711369Sdduvall 18721369Sdduvall area = bgep->rx_desc[rx_rings]; 18731369Sdduvall for (; ring < BGE_RECV_RINGS_MAX; ++ring) 18741369Sdduvall bge_slice_chunk(&bgep->recv[ring].desc, &area, 18751369Sdduvall 0, sizeof (bge_rbd_t)); 18761369Sdduvall bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area, 18771369Sdduvall BGE_STD_SLOTS_USED, sizeof (bge_rbd_t)); 18781369Sdduvall bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area, 18791369Sdduvall bgep->chipid.jumbo_slots, sizeof (bge_rbd_t)); 18801369Sdduvall bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area, 18811369Sdduvall BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t)); 18821369Sdduvall ASSERT(area.alength == 0); 18831369Sdduvall 18841369Sdduvall area = bgep->tx_desc; 18851369Sdduvall for (ring = 0; ring < tx_rings; ++ring) 18861369Sdduvall bge_slice_chunk(&bgep->send[ring].desc, &area, 18871369Sdduvall BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t)); 18881369Sdduvall for (; ring < BGE_SEND_RINGS_MAX; ++ring) 18891369Sdduvall bge_slice_chunk(&bgep->send[ring].desc, &area, 18901369Sdduvall 0, sizeof (bge_sbd_t)); 18911369Sdduvall bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t)); 18921369Sdduvall bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t)); 18931369Sdduvall ASSERT(area.alength == BGE_STATUS_PADDING); 18941369Sdduvall DMA_ZERO(bgep->status_block); 18951369Sdduvall 18961369Sdduvall return (DDI_SUCCESS); 18971369Sdduvall } 18981369Sdduvall 18991369Sdduvall /* 19001369Sdduvall * This routine frees the transmit and receive buffers and descriptors. 19011369Sdduvall * Make sure the chip is stopped before calling it! 19021369Sdduvall */ 19031865Sdilpreet void 19041369Sdduvall bge_free_bufs(bge_t *bgep) 19051369Sdduvall { 19061369Sdduvall int split; 19071369Sdduvall 19081369Sdduvall BGE_TRACE(("bge_free_bufs($%p)", 19091369Sdduvall (void *)bgep)); 19101369Sdduvall 19111369Sdduvall #if BGE_MONOLITHIC 19121369Sdduvall bge_free_dma_mem(&bgep->rx_buff[0]); 19131369Sdduvall #else 19141369Sdduvall bge_free_dma_mem(&bgep->tx_desc); 19151369Sdduvall for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split) 19161369Sdduvall bge_free_dma_mem(&bgep->rx_desc[split]); 19171369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) 19181369Sdduvall bge_free_dma_mem(&bgep->tx_buff[split]); 19191369Sdduvall for (split = 0; split < BGE_SPLIT; ++split) 19201369Sdduvall bge_free_dma_mem(&bgep->rx_buff[split]); 19211369Sdduvall #endif /* BGE_MONOLITHIC */ 19221369Sdduvall } 19231369Sdduvall 19241369Sdduvall /* 19251369Sdduvall * Determine (initial) MAC address ("BIA") to use for this interface 19261369Sdduvall */ 19271369Sdduvall 19281369Sdduvall static void 19291369Sdduvall bge_find_mac_address(bge_t *bgep, chip_id_t *cidp) 19301369Sdduvall { 19311369Sdduvall struct ether_addr sysaddr; 19321369Sdduvall char propbuf[8]; /* "true" or "false", plus NUL */ 19331369Sdduvall uchar_t *bytes; 19341369Sdduvall int *ints; 19351369Sdduvall uint_t nelts; 19361369Sdduvall int err; 19371369Sdduvall 19381369Sdduvall BGE_TRACE(("bge_find_mac_address($%p)", 19391369Sdduvall (void *)bgep)); 19401369Sdduvall 19411369Sdduvall BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)", 19421369Sdduvall cidp->hw_mac_addr, 19431369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 19441369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 19451369Sdduvall 19461369Sdduvall /* 19471369Sdduvall * The "vendor's factory-set address" may already have 19481369Sdduvall * been extracted from the chip, but if the property 19491369Sdduvall * "local-mac-address" is set we use that instead. It 19501369Sdduvall * will normally be set by OBP, but it could also be 19511369Sdduvall * specified in a .conf file(!) 19521369Sdduvall * 19531369Sdduvall * There doesn't seem to be a way to define byte-array 19541369Sdduvall * properties in a .conf, so we check whether it looks 19551369Sdduvall * like an array of 6 ints instead. 19561369Sdduvall * 19571369Sdduvall * Then, we check whether it looks like an array of 6 19581369Sdduvall * bytes (which it should, if OBP set it). If we can't 19591369Sdduvall * make sense of it either way, we'll ignore it. 19601369Sdduvall */ 19611369Sdduvall err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo, 19621369Sdduvall DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts); 19631369Sdduvall if (err == DDI_PROP_SUCCESS) { 19641369Sdduvall if (nelts == ETHERADDRL) { 19651369Sdduvall while (nelts--) 19661369Sdduvall cidp->vendor_addr.addr[nelts] = ints[nelts]; 19672331Skrgopi cidp->vendor_addr.set = B_TRUE; 19681369Sdduvall } 19691369Sdduvall ddi_prop_free(ints); 19701369Sdduvall } 19711369Sdduvall 19721369Sdduvall err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 19731369Sdduvall DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts); 19741369Sdduvall if (err == DDI_PROP_SUCCESS) { 19751369Sdduvall if (nelts == ETHERADDRL) { 19761369Sdduvall while (nelts--) 19771369Sdduvall cidp->vendor_addr.addr[nelts] = bytes[nelts]; 19782331Skrgopi cidp->vendor_addr.set = B_TRUE; 19791369Sdduvall } 19801369Sdduvall ddi_prop_free(bytes); 19811369Sdduvall } 19821369Sdduvall 19831369Sdduvall BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)", 19841369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 19851369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 19861369Sdduvall 19871369Sdduvall /* 19881369Sdduvall * Look up the OBP property "local-mac-address?". Note that even 19891369Sdduvall * though its value is a string (which should be "true" or "false"), 19901369Sdduvall * it can't be decoded by ddi_prop_lookup_string(9F). So, we zero 19911369Sdduvall * the buffer first and then fetch the property as an untyped array; 19921369Sdduvall * this may or may not include a final NUL, but since there will 19931369Sdduvall * always be one left at the end of the buffer we can now treat it 19941369Sdduvall * as a string anyway. 19951369Sdduvall */ 19961369Sdduvall nelts = sizeof (propbuf); 19971369Sdduvall bzero(propbuf, nelts--); 19981369Sdduvall err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo, 19991369Sdduvall DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts); 20001369Sdduvall 20011369Sdduvall /* 20021369Sdduvall * Now, if the address still isn't set from the hardware (SEEPROM) 20031369Sdduvall * or the OBP or .conf property, OR if the user has foolishly set 20041369Sdduvall * 'local-mac-address? = false', use "the system address" instead 20051369Sdduvall * (but only if it's non-null i.e. has been set from the IDPROM). 20061369Sdduvall */ 20072331Skrgopi if (cidp->vendor_addr.set == B_FALSE || strcmp(propbuf, "false") == 0) 20081369Sdduvall if (localetheraddr(NULL, &sysaddr) != 0) { 20091369Sdduvall ethaddr_copy(&sysaddr, cidp->vendor_addr.addr); 20102331Skrgopi cidp->vendor_addr.set = B_TRUE; 20111369Sdduvall } 20121369Sdduvall 20131369Sdduvall BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)", 20141369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 20151369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 20161369Sdduvall 20171369Sdduvall /* 20181369Sdduvall * Finally(!), if there's a valid "mac-address" property (created 20191369Sdduvall * if we netbooted from this interface), we must use this instead 20201369Sdduvall * of any of the above to ensure that the NFS/install server doesn't 20211369Sdduvall * get confused by the address changing as Solaris takes over! 20221369Sdduvall */ 20231369Sdduvall err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 20241369Sdduvall DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts); 20251369Sdduvall if (err == DDI_PROP_SUCCESS) { 20261369Sdduvall if (nelts == ETHERADDRL) { 20271369Sdduvall while (nelts--) 20281369Sdduvall cidp->vendor_addr.addr[nelts] = bytes[nelts]; 20292331Skrgopi cidp->vendor_addr.set = B_TRUE; 20301369Sdduvall } 20311369Sdduvall ddi_prop_free(bytes); 20321369Sdduvall } 20331369Sdduvall 20341369Sdduvall BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)", 20351369Sdduvall ether_sprintf((void *)cidp->vendor_addr.addr), 20361369Sdduvall cidp->vendor_addr.set ? "" : "not ")); 20371369Sdduvall } 20381369Sdduvall 20391865Sdilpreet 20401865Sdilpreet /*ARGSUSED*/ 20411865Sdilpreet int 20421865Sdilpreet bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle) 20431865Sdilpreet { 20441865Sdilpreet ddi_fm_error_t de; 20451865Sdilpreet 20461865Sdilpreet ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 20471865Sdilpreet ddi_fm_acc_err_clear(handle, DDI_FME_VERSION); 20481865Sdilpreet return (de.fme_status); 20491865Sdilpreet } 20501865Sdilpreet 20511865Sdilpreet /*ARGSUSED*/ 20521865Sdilpreet int 20531865Sdilpreet bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle) 20541865Sdilpreet { 20551865Sdilpreet ddi_fm_error_t de; 20561865Sdilpreet 20571865Sdilpreet ASSERT(bgep->progress & PROGRESS_BUFS); 20581865Sdilpreet ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 20591865Sdilpreet return (de.fme_status); 20601865Sdilpreet } 20611865Sdilpreet 20621865Sdilpreet /* 20631865Sdilpreet * The IO fault service error handling callback function 20641865Sdilpreet */ 20651865Sdilpreet /*ARGSUSED*/ 20661865Sdilpreet static int 20671865Sdilpreet bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 20681865Sdilpreet { 20691865Sdilpreet /* 20701865Sdilpreet * as the driver can always deal with an error in any dma or 20711865Sdilpreet * access handle, we can just return the fme_status value. 20721865Sdilpreet */ 20731865Sdilpreet pci_ereport_post(dip, err, NULL); 20741865Sdilpreet return (err->fme_status); 20751865Sdilpreet } 20761865Sdilpreet 20771865Sdilpreet static void 20781865Sdilpreet bge_fm_init(bge_t *bgep) 20791865Sdilpreet { 20801865Sdilpreet ddi_iblock_cookie_t iblk; 20811865Sdilpreet 20821865Sdilpreet /* Only register with IO Fault Services if we have some capability */ 20831865Sdilpreet if (bgep->fm_capabilities) { 20841865Sdilpreet bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 20851865Sdilpreet bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 20861865Sdilpreet dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; 20871865Sdilpreet 20881865Sdilpreet /* Register capabilities with IO Fault Services */ 20891865Sdilpreet ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk); 20901865Sdilpreet 20911865Sdilpreet /* 20921865Sdilpreet * Initialize pci ereport capabilities if ereport capable 20931865Sdilpreet */ 20941865Sdilpreet if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 20951865Sdilpreet DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 20961865Sdilpreet pci_ereport_setup(bgep->devinfo); 20971865Sdilpreet 20981865Sdilpreet /* 20991865Sdilpreet * Register error callback if error callback capable 21001865Sdilpreet */ 21011865Sdilpreet if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 21021865Sdilpreet ddi_fm_handler_register(bgep->devinfo, 21031865Sdilpreet bge_fm_error_cb, (void*) bgep); 21041865Sdilpreet } else { 21051865Sdilpreet /* 21061865Sdilpreet * These fields have to be cleared of FMA if there are no 21071865Sdilpreet * FMA capabilities at runtime. 21081865Sdilpreet */ 21091865Sdilpreet bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 21101865Sdilpreet bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 21111865Sdilpreet dma_attr.dma_attr_flags = 0; 21121865Sdilpreet } 21131865Sdilpreet } 21141865Sdilpreet 21151865Sdilpreet static void 21161865Sdilpreet bge_fm_fini(bge_t *bgep) 21171865Sdilpreet { 21181865Sdilpreet /* Only unregister FMA capabilities if we registered some */ 21191865Sdilpreet if (bgep->fm_capabilities) { 21201865Sdilpreet 21211865Sdilpreet /* 21221865Sdilpreet * Release any resources allocated by pci_ereport_setup() 21231865Sdilpreet */ 21241865Sdilpreet if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 21251865Sdilpreet DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 21261865Sdilpreet pci_ereport_teardown(bgep->devinfo); 21271865Sdilpreet 21281865Sdilpreet /* 21291865Sdilpreet * Un-register error callback if error callback capable 21301865Sdilpreet */ 21311865Sdilpreet if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 21321865Sdilpreet ddi_fm_handler_unregister(bgep->devinfo); 21331865Sdilpreet 21341865Sdilpreet /* Unregister from IO Fault Services */ 21351865Sdilpreet ddi_fm_fini(bgep->devinfo); 21361865Sdilpreet } 21371865Sdilpreet } 21381865Sdilpreet 21391369Sdduvall static void 21401408Srandyf #ifdef BGE_IPMI_ASF 21411408Srandyf bge_unattach(bge_t *bgep, uint_t asf_mode) 21421408Srandyf #else 21431369Sdduvall bge_unattach(bge_t *bgep) 21441408Srandyf #endif 21451369Sdduvall { 21461369Sdduvall BGE_TRACE(("bge_unattach($%p)", 21471369Sdduvall (void *)bgep)); 21481369Sdduvall 21491369Sdduvall /* 21501369Sdduvall * Flag that no more activity may be initiated 21511369Sdduvall */ 21521369Sdduvall bgep->progress &= ~PROGRESS_READY; 21531369Sdduvall 21541369Sdduvall /* 21551369Sdduvall * Quiesce the PHY and MAC (leave it reset but still powered). 21561369Sdduvall * Clean up and free all BGE data structures 21571369Sdduvall */ 21581369Sdduvall if (bgep->cyclic_id) { 21591369Sdduvall mutex_enter(&cpu_lock); 21601369Sdduvall cyclic_remove(bgep->cyclic_id); 21611369Sdduvall mutex_exit(&cpu_lock); 21621369Sdduvall } 21631369Sdduvall if (bgep->progress & PROGRESS_KSTATS) 21641369Sdduvall bge_fini_kstats(bgep); 21651369Sdduvall if (bgep->progress & PROGRESS_NDD) 21661369Sdduvall bge_nd_cleanup(bgep); 21671369Sdduvall if (bgep->progress & PROGRESS_PHY) 21681369Sdduvall bge_phys_reset(bgep); 21691369Sdduvall if (bgep->progress & PROGRESS_HWINT) { 21701369Sdduvall mutex_enter(bgep->genlock); 21711408Srandyf #ifdef BGE_IPMI_ASF 21721865Sdilpreet if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS) 21731865Sdilpreet #else 21741865Sdilpreet if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS) 21751865Sdilpreet #endif 21761865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 21771865Sdilpreet DDI_SERVICE_UNAFFECTED); 21781865Sdilpreet #ifdef BGE_IPMI_ASF 21791408Srandyf if (bgep->asf_enabled) { 21801408Srandyf /* 21811408Srandyf * This register has been overlaid. We restore its 21821408Srandyf * initial value here. 21831408Srandyf */ 21841408Srandyf bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR, 21851408Srandyf BGE_NIC_DATA_SIG); 21861408Srandyf } 21871408Srandyf #endif 21881865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 21891865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 21901865Sdilpreet DDI_SERVICE_UNAFFECTED); 21911865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 21921865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 21931865Sdilpreet DDI_SERVICE_UNAFFECTED); 21941369Sdduvall mutex_exit(bgep->genlock); 21951369Sdduvall } 21961369Sdduvall if (bgep->progress & PROGRESS_INTR) { 21971865Sdilpreet bge_intr_disable(bgep); 21981369Sdduvall bge_fini_rings(bgep); 21991369Sdduvall } 22001865Sdilpreet if (bgep->progress & PROGRESS_HWINT) { 22011865Sdilpreet bge_rem_intrs(bgep); 22021865Sdilpreet rw_destroy(bgep->errlock); 22031865Sdilpreet mutex_destroy(bgep->softintrlock); 22041865Sdilpreet mutex_destroy(bgep->genlock); 22051865Sdilpreet } 22061369Sdduvall if (bgep->progress & PROGRESS_FACTOTUM) 22071369Sdduvall ddi_remove_softintr(bgep->factotum_id); 22081369Sdduvall if (bgep->progress & PROGRESS_RESCHED) 22091369Sdduvall ddi_remove_softintr(bgep->resched_id); 22101865Sdilpreet if (bgep->progress & PROGRESS_BUFS) 22111865Sdilpreet bge_free_bufs(bgep); 22121369Sdduvall if (bgep->progress & PROGRESS_REGS) 22131369Sdduvall ddi_regs_map_free(&bgep->io_handle); 22141369Sdduvall if (bgep->progress & PROGRESS_CFG) 22151369Sdduvall pci_config_teardown(&bgep->cfg_handle); 22161369Sdduvall 22171865Sdilpreet bge_fm_fini(bgep); 22181865Sdilpreet 22191369Sdduvall ddi_remove_minor_node(bgep->devinfo, NULL); 22201369Sdduvall kmem_free(bgep, sizeof (*bgep)); 22211369Sdduvall } 22221369Sdduvall 22231369Sdduvall static int 22241369Sdduvall bge_resume(dev_info_t *devinfo) 22251369Sdduvall { 22261369Sdduvall bge_t *bgep; /* Our private data */ 22271369Sdduvall chip_id_t *cidp; 22281369Sdduvall chip_id_t chipid; 22291369Sdduvall 22301369Sdduvall bgep = ddi_get_driver_private(devinfo); 22311369Sdduvall if (bgep == NULL) 22321369Sdduvall return (DDI_FAILURE); 22331369Sdduvall 22341369Sdduvall /* 22351369Sdduvall * Refuse to resume if the data structures aren't consistent 22361369Sdduvall */ 22371369Sdduvall if (bgep->devinfo != devinfo) 22381369Sdduvall return (DDI_FAILURE); 22391369Sdduvall 22401408Srandyf #ifdef BGE_IPMI_ASF 22411408Srandyf /* 22421408Srandyf * Power management hasn't been supported in BGE now. If you 22431408Srandyf * want to implement it, please add the ASF/IPMI related 22441408Srandyf * code here. 22451408Srandyf */ 22461408Srandyf 22471408Srandyf #endif 22481408Srandyf 22491369Sdduvall /* 22501369Sdduvall * Read chip ID & set up config space command register(s) 22511369Sdduvall * Refuse to resume if the chip has changed its identity! 22521369Sdduvall */ 22531369Sdduvall cidp = &bgep->chipid; 22541865Sdilpreet mutex_enter(bgep->genlock); 22551369Sdduvall bge_chip_cfg_init(bgep, &chipid, B_FALSE); 22561865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 22571865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 22581865Sdilpreet mutex_exit(bgep->genlock); 22591865Sdilpreet return (DDI_FAILURE); 22601865Sdilpreet } 22611865Sdilpreet mutex_exit(bgep->genlock); 22621369Sdduvall if (chipid.vendor != cidp->vendor) 22631369Sdduvall return (DDI_FAILURE); 22641369Sdduvall if (chipid.device != cidp->device) 22651369Sdduvall return (DDI_FAILURE); 22661369Sdduvall if (chipid.revision != cidp->revision) 22671369Sdduvall return (DDI_FAILURE); 22681369Sdduvall if (chipid.asic_rev != cidp->asic_rev) 22691369Sdduvall return (DDI_FAILURE); 22701369Sdduvall 22711369Sdduvall /* 22721369Sdduvall * All OK, reinitialise h/w & kick off GLD scheduling 22731369Sdduvall */ 22741369Sdduvall mutex_enter(bgep->genlock); 22751865Sdilpreet if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) { 22761865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 22771865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 22781865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 22791865Sdilpreet mutex_exit(bgep->genlock); 22801865Sdilpreet return (DDI_FAILURE); 22811865Sdilpreet } 22821865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 22831865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 22841865Sdilpreet mutex_exit(bgep->genlock); 22851865Sdilpreet return (DDI_FAILURE); 22861865Sdilpreet } 22871865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 22881865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 22891865Sdilpreet mutex_exit(bgep->genlock); 22901865Sdilpreet return (DDI_FAILURE); 22911865Sdilpreet } 22921369Sdduvall mutex_exit(bgep->genlock); 22931369Sdduvall return (DDI_SUCCESS); 22941369Sdduvall } 22951369Sdduvall 22961369Sdduvall /* 22971369Sdduvall * attach(9E) -- Attach a device to the system 22981369Sdduvall * 22991369Sdduvall * Called once for each board successfully probed. 23001369Sdduvall */ 23011369Sdduvall static int 23021369Sdduvall bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 23031369Sdduvall { 23041369Sdduvall bge_t *bgep; /* Our private data */ 23052311Sseb mac_register_t *macp; 23061369Sdduvall chip_id_t *cidp; 23071369Sdduvall cyc_handler_t cychand; 23081369Sdduvall cyc_time_t cyctime; 23091369Sdduvall caddr_t regs; 23101369Sdduvall int instance; 23111369Sdduvall int err; 23121369Sdduvall int intr_types; 23131408Srandyf #ifdef BGE_IPMI_ASF 23141408Srandyf uint32_t mhcrValue; 23151408Srandyf #endif 23161369Sdduvall 23171369Sdduvall instance = ddi_get_instance(devinfo); 23181369Sdduvall 23191369Sdduvall BGE_GTRACE(("bge_attach($%p, %d) instance %d", 23201369Sdduvall (void *)devinfo, cmd, instance)); 23211369Sdduvall BGE_BRKPT(NULL, "bge_attach"); 23221369Sdduvall 23231369Sdduvall switch (cmd) { 23241369Sdduvall default: 23251369Sdduvall return (DDI_FAILURE); 23261369Sdduvall 23271369Sdduvall case DDI_RESUME: 23281369Sdduvall return (bge_resume(devinfo)); 23291369Sdduvall 23301369Sdduvall case DDI_ATTACH: 23311369Sdduvall break; 23321369Sdduvall } 23331369Sdduvall 23341369Sdduvall bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP); 23351369Sdduvall ddi_set_driver_private(devinfo, bgep); 23361369Sdduvall bgep->bge_guard = BGE_GUARD; 23371369Sdduvall bgep->devinfo = devinfo; 23381369Sdduvall 23391369Sdduvall /* 23401369Sdduvall * Initialize more fields in BGE private data 23411369Sdduvall */ 23421369Sdduvall bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 23431369Sdduvall DDI_PROP_DONTPASS, debug_propname, bge_debug); 23441369Sdduvall (void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d", 23451369Sdduvall BGE_DRIVER_NAME, instance); 23461369Sdduvall 23471369Sdduvall /* 23481865Sdilpreet * Initialize for fma support 23491865Sdilpreet */ 23501865Sdilpreet bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 23511865Sdilpreet DDI_PROP_DONTPASS, fm_cap, 23521865Sdilpreet DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 23531865Sdilpreet DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 23541865Sdilpreet BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities)); 23551865Sdilpreet bge_fm_init(bgep); 23561865Sdilpreet 23571865Sdilpreet /* 23581369Sdduvall * Look up the IOMMU's page size for DVMA mappings (must be 23591369Sdduvall * a power of 2) and convert to a mask. This can be used to 23601369Sdduvall * determine whether a message buffer crosses a page boundary. 23611369Sdduvall * Note: in 2s complement binary notation, if X is a power of 23621369Sdduvall * 2, then -X has the representation "11...1100...00". 23631369Sdduvall */ 23641369Sdduvall bgep->pagemask = dvma_pagesize(devinfo); 23651369Sdduvall ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask)); 23661369Sdduvall bgep->pagemask = -bgep->pagemask; 23671369Sdduvall 23681369Sdduvall /* 23691369Sdduvall * Map config space registers 23701369Sdduvall * Read chip ID & set up config space command register(s) 23711369Sdduvall * 23721369Sdduvall * Note: this leaves the chip accessible by Memory Space 23731369Sdduvall * accesses, but with interrupts and Bus Mastering off. 23741369Sdduvall * This should ensure that nothing untoward will happen 23751369Sdduvall * if it has been left active by the (net-)bootloader. 23761369Sdduvall * We'll re-enable Bus Mastering once we've reset the chip, 23771369Sdduvall * and allow interrupts only when everything else is set up. 23781369Sdduvall */ 23791369Sdduvall err = pci_config_setup(devinfo, &bgep->cfg_handle); 23801408Srandyf #ifdef BGE_IPMI_ASF 23811408Srandyf mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR); 23821408Srandyf if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) { 23831408Srandyf bgep->asf_wordswapped = B_TRUE; 23841408Srandyf } else { 23851408Srandyf bgep->asf_wordswapped = B_FALSE; 23861408Srandyf } 23871408Srandyf bge_asf_get_config(bgep); 23881408Srandyf #endif 23891369Sdduvall if (err != DDI_SUCCESS) { 23901369Sdduvall bge_problem(bgep, "pci_config_setup() failed"); 23911369Sdduvall goto attach_fail; 23921369Sdduvall } 23931369Sdduvall bgep->progress |= PROGRESS_CFG; 23941369Sdduvall cidp = &bgep->chipid; 23951369Sdduvall bzero(cidp, sizeof (*cidp)); 23961369Sdduvall bge_chip_cfg_init(bgep, cidp, B_FALSE); 23971865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 23981865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 23991865Sdilpreet goto attach_fail; 24001865Sdilpreet } 24011369Sdduvall 24021408Srandyf #ifdef BGE_IPMI_ASF 24031408Srandyf if (DEVICE_5721_SERIES_CHIPSETS(bgep) || 24041408Srandyf DEVICE_5714_SERIES_CHIPSETS(bgep)) { 24051408Srandyf bgep->asf_newhandshake = B_TRUE; 24061408Srandyf } else { 24071408Srandyf bgep->asf_newhandshake = B_FALSE; 24081408Srandyf } 24091408Srandyf #endif 24101408Srandyf 24111369Sdduvall /* 24121369Sdduvall * Update those parts of the chip ID derived from volatile 24131369Sdduvall * registers with the values seen by OBP (in case the chip 24141369Sdduvall * has been reset externally and therefore lost them). 24151369Sdduvall */ 24161369Sdduvall cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24171369Sdduvall DDI_PROP_DONTPASS, subven_propname, cidp->subven); 24181369Sdduvall cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24191369Sdduvall DDI_PROP_DONTPASS, subdev_propname, cidp->subdev); 24201369Sdduvall cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24211369Sdduvall DDI_PROP_DONTPASS, clsize_propname, cidp->clsize); 24221369Sdduvall cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24231369Sdduvall DDI_PROP_DONTPASS, latency_propname, cidp->latency); 24241369Sdduvall cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24251369Sdduvall DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings); 24261369Sdduvall cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24271369Sdduvall DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings); 24281369Sdduvall 24291369Sdduvall if (bge_jumbo_enable == B_TRUE) { 24301369Sdduvall cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 24311369Sdduvall DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU); 24321369Sdduvall if ((cidp->default_mtu < BGE_DEFAULT_MTU)|| 24331369Sdduvall (cidp->default_mtu > BGE_MAXIMUM_MTU)) { 24341369Sdduvall cidp->default_mtu = BGE_DEFAULT_MTU; 24351369Sdduvall } 24361369Sdduvall } 24371369Sdduvall /* 24381369Sdduvall * Map operating registers 24391369Sdduvall */ 24401369Sdduvall err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER, 24411369Sdduvall ®s, 0, 0, &bge_reg_accattr, &bgep->io_handle); 24421369Sdduvall if (err != DDI_SUCCESS) { 24431369Sdduvall bge_problem(bgep, "ddi_regs_map_setup() failed"); 24441369Sdduvall goto attach_fail; 24451369Sdduvall } 24461369Sdduvall bgep->io_regs = regs; 24471369Sdduvall bgep->progress |= PROGRESS_REGS; 24481369Sdduvall 24491369Sdduvall /* 24501369Sdduvall * Characterise the device, so we know its requirements. 24511369Sdduvall * Then allocate the appropriate TX and RX descriptors & buffers. 24521369Sdduvall */ 24531865Sdilpreet if (bge_chip_id_init(bgep) == EIO) { 24541865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 24551865Sdilpreet goto attach_fail; 24561865Sdilpreet } 24571369Sdduvall err = bge_alloc_bufs(bgep); 24581369Sdduvall if (err != DDI_SUCCESS) { 24591369Sdduvall bge_problem(bgep, "DMA buffer allocation failed"); 24601369Sdduvall goto attach_fail; 24611369Sdduvall } 24621865Sdilpreet bgep->progress |= PROGRESS_BUFS; 24631369Sdduvall 24641369Sdduvall /* 24651369Sdduvall * Add the softint handlers: 24661369Sdduvall * 24671369Sdduvall * Both of these handlers are used to avoid restrictions on the 24681369Sdduvall * context and/or mutexes required for some operations. In 24691369Sdduvall * particular, the hardware interrupt handler and its subfunctions 24701369Sdduvall * can detect a number of conditions that we don't want to handle 24711369Sdduvall * in that context or with that set of mutexes held. So, these 24721369Sdduvall * softints are triggered instead: 24731369Sdduvall * 24742135Szh199473 * the <resched> softint is triggered if we have previously 24751369Sdduvall * had to refuse to send a packet because of resource shortage 24761369Sdduvall * (we've run out of transmit buffers), but the send completion 24771369Sdduvall * interrupt handler has now detected that more buffers have 24781369Sdduvall * become available. 24791369Sdduvall * 24801369Sdduvall * the <factotum> is triggered if the h/w interrupt handler 24811369Sdduvall * sees the <link state changed> or <error> bits in the status 24821369Sdduvall * block. It's also triggered periodically to poll the link 24831369Sdduvall * state, just in case we aren't getting link status change 24841369Sdduvall * interrupts ... 24851369Sdduvall */ 24861369Sdduvall err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id, 24871369Sdduvall NULL, NULL, bge_reschedule, (caddr_t)bgep); 24881369Sdduvall if (err != DDI_SUCCESS) { 24891369Sdduvall bge_problem(bgep, "ddi_add_softintr() failed"); 24901369Sdduvall goto attach_fail; 24911369Sdduvall } 24921369Sdduvall bgep->progress |= PROGRESS_RESCHED; 24931369Sdduvall err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id, 24941369Sdduvall NULL, NULL, bge_chip_factotum, (caddr_t)bgep); 24951369Sdduvall if (err != DDI_SUCCESS) { 24961369Sdduvall bge_problem(bgep, "ddi_add_softintr() failed"); 24971369Sdduvall goto attach_fail; 24981369Sdduvall } 24991369Sdduvall bgep->progress |= PROGRESS_FACTOTUM; 25001369Sdduvall 25011369Sdduvall /* Get supported interrupt types */ 25021369Sdduvall if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) { 25031369Sdduvall bge_error(bgep, "ddi_intr_get_supported_types failed\n"); 25041369Sdduvall 25051369Sdduvall goto attach_fail; 25061369Sdduvall } 25071369Sdduvall 2508*2675Szh199473 BGE_DEBUG(("%s: ddi_intr_get_supported_types() returned: %x", 2509*2675Szh199473 bgep->ifname, intr_types)); 25101369Sdduvall 25111369Sdduvall if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) { 25121369Sdduvall if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) { 25131369Sdduvall bge_error(bgep, "MSI registration failed, " 25141369Sdduvall "trying FIXED interrupt type\n"); 25151369Sdduvall } else { 2516*2675Szh199473 BGE_DEBUG(("%s: Using MSI interrupt type", 2517*2675Szh199473 bgep->ifname)); 25181369Sdduvall bgep->intr_type = DDI_INTR_TYPE_MSI; 25191865Sdilpreet bgep->progress |= PROGRESS_HWINT; 25201369Sdduvall } 25211369Sdduvall } 25221369Sdduvall 25231865Sdilpreet if (!(bgep->progress & PROGRESS_HWINT) && 25241369Sdduvall (intr_types & DDI_INTR_TYPE_FIXED)) { 25251369Sdduvall if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) { 25261369Sdduvall bge_error(bgep, "FIXED interrupt " 25271369Sdduvall "registration failed\n"); 25281369Sdduvall goto attach_fail; 25291369Sdduvall } 25301369Sdduvall 2531*2675Szh199473 BGE_DEBUG(("%s: Using FIXED interrupt type", bgep->ifname)); 25321369Sdduvall 25331369Sdduvall bgep->intr_type = DDI_INTR_TYPE_FIXED; 25341865Sdilpreet bgep->progress |= PROGRESS_HWINT; 25351369Sdduvall } 25361369Sdduvall 25371865Sdilpreet if (!(bgep->progress & PROGRESS_HWINT)) { 25381369Sdduvall bge_error(bgep, "No interrupts registered\n"); 25391369Sdduvall goto attach_fail; 25401369Sdduvall } 25411369Sdduvall 25421369Sdduvall /* 25431369Sdduvall * Note that interrupts are not enabled yet as 25441865Sdilpreet * mutex locks are not initialized. Initialize mutex locks. 25451865Sdilpreet */ 25461865Sdilpreet mutex_init(bgep->genlock, NULL, MUTEX_DRIVER, 25471865Sdilpreet DDI_INTR_PRI(bgep->intr_pri)); 25481865Sdilpreet mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER, 25491865Sdilpreet DDI_INTR_PRI(bgep->intr_pri)); 25501865Sdilpreet rw_init(bgep->errlock, NULL, RW_DRIVER, 25511865Sdilpreet DDI_INTR_PRI(bgep->intr_pri)); 25521865Sdilpreet 25531865Sdilpreet /* 25541865Sdilpreet * Initialize rings. 25551369Sdduvall */ 25561369Sdduvall bge_init_rings(bgep); 25571369Sdduvall 25581369Sdduvall /* 25591369Sdduvall * Now that mutex locks are initialized, enable interrupts. 25601369Sdduvall */ 25611865Sdilpreet bge_intr_enable(bgep); 25621865Sdilpreet bgep->progress |= PROGRESS_INTR; 25631369Sdduvall 25641369Sdduvall /* 25651369Sdduvall * Initialise link state variables 25661369Sdduvall * Stop, reset & reinitialise the chip. 25671369Sdduvall * Initialise the (internal) PHY. 25681369Sdduvall */ 25691369Sdduvall bgep->link_state = LINK_STATE_UNKNOWN; 25701369Sdduvall bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 25711369Sdduvall 25721369Sdduvall mutex_enter(bgep->genlock); 25731369Sdduvall 25741369Sdduvall /* 25751369Sdduvall * Reset chip & rings to initial state; also reset address 25761369Sdduvall * filtering, promiscuity, loopback mode. 25771369Sdduvall */ 25781408Srandyf #ifdef BGE_IPMI_ASF 25791865Sdilpreet if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) { 25801408Srandyf #else 25811865Sdilpreet if (bge_reset(bgep) != DDI_SUCCESS) { 25821408Srandyf #endif 25831865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 25841865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 25851865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 25861865Sdilpreet mutex_exit(bgep->genlock); 25871865Sdilpreet goto attach_fail; 25881865Sdilpreet } 25891369Sdduvall 2590*2675Szh199473 #ifdef BGE_IPMI_ASF 2591*2675Szh199473 if (bgep->asf_enabled) { 2592*2675Szh199473 bgep->asf_status = ASF_STAT_RUN_INIT; 2593*2675Szh199473 } 2594*2675Szh199473 #endif 2595*2675Szh199473 25961369Sdduvall bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash)); 25971369Sdduvall bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs)); 25981369Sdduvall bgep->promisc = B_FALSE; 25991369Sdduvall bgep->param_loop_mode = BGE_LOOP_NONE; 26001865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 26011865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 26021865Sdilpreet mutex_exit(bgep->genlock); 26031865Sdilpreet goto attach_fail; 26041865Sdilpreet } 26051865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 26061865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 26071865Sdilpreet mutex_exit(bgep->genlock); 26081865Sdilpreet goto attach_fail; 26091865Sdilpreet } 26101369Sdduvall 26111369Sdduvall mutex_exit(bgep->genlock); 26121369Sdduvall 26131865Sdilpreet if (bge_phys_init(bgep) == EIO) { 26141865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 26151865Sdilpreet goto attach_fail; 26161865Sdilpreet } 26171369Sdduvall bgep->progress |= PROGRESS_PHY; 26181369Sdduvall 26191369Sdduvall /* 26201369Sdduvall * Register NDD-tweakable parameters 26211369Sdduvall */ 26221369Sdduvall if (bge_nd_init(bgep)) { 26231369Sdduvall bge_problem(bgep, "bge_nd_init() failed"); 26241369Sdduvall goto attach_fail; 26251369Sdduvall } 26261369Sdduvall bgep->progress |= PROGRESS_NDD; 26271369Sdduvall 26281369Sdduvall /* 26291369Sdduvall * Create & initialise named kstats 26301369Sdduvall */ 26311369Sdduvall bge_init_kstats(bgep, instance); 26321369Sdduvall bgep->progress |= PROGRESS_KSTATS; 26331369Sdduvall 26341369Sdduvall /* 26351369Sdduvall * Determine whether to override the chip's own MAC address 26361369Sdduvall */ 26371369Sdduvall bge_find_mac_address(bgep, cidp); 26382331Skrgopi ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr[0].addr); 26392331Skrgopi bgep->curr_addr[0].set = B_TRUE; 26402331Skrgopi 26412406Skrgopi bgep->unicst_addr_total = MAC_ADDRESS_REGS_MAX; 26422406Skrgopi /* 26432406Skrgopi * Address available is one less than MAX 26442406Skrgopi * as primary address is not advertised 26452406Skrgopi * as a multiple MAC address. 26462406Skrgopi */ 26472331Skrgopi bgep->unicst_addr_avail = MAC_ADDRESS_REGS_MAX - 1; 26481369Sdduvall 26492311Sseb if ((macp = mac_alloc(MAC_VERSION)) == NULL) 26502311Sseb goto attach_fail; 26512311Sseb macp->m_type_ident = MAC_PLUGIN_IDENT_ETHER; 26522311Sseb macp->m_driver = bgep; 26531369Sdduvall macp->m_dip = devinfo; 26542331Skrgopi macp->m_src_addr = bgep->curr_addr[0].addr; 26552311Sseb macp->m_callbacks = &bge_m_callbacks; 26562311Sseb macp->m_min_sdu = 0; 26572311Sseb macp->m_max_sdu = cidp->ethmax_size - sizeof (struct ether_header); 26581369Sdduvall /* 26591369Sdduvall * Finally, we're ready to register ourselves with the MAC layer 26601369Sdduvall * interface; if this succeeds, we're all ready to start() 26611369Sdduvall */ 26622311Sseb err = mac_register(macp, &bgep->mh); 26632311Sseb mac_free(macp); 26642311Sseb if (err != 0) 26651369Sdduvall goto attach_fail; 26661369Sdduvall 26671369Sdduvall cychand.cyh_func = bge_chip_cyclic; 26681369Sdduvall cychand.cyh_arg = bgep; 26691369Sdduvall cychand.cyh_level = CY_LOCK_LEVEL; 26701369Sdduvall cyctime.cyt_when = 0; 26711369Sdduvall cyctime.cyt_interval = BGE_CYCLIC_PERIOD; 26721369Sdduvall mutex_enter(&cpu_lock); 26731369Sdduvall bgep->cyclic_id = cyclic_add(&cychand, &cyctime); 26741369Sdduvall mutex_exit(&cpu_lock); 26751369Sdduvall 26761369Sdduvall bgep->progress |= PROGRESS_READY; 26771369Sdduvall ASSERT(bgep->bge_guard == BGE_GUARD); 26781369Sdduvall return (DDI_SUCCESS); 26791369Sdduvall 26801369Sdduvall attach_fail: 26811408Srandyf #ifdef BGE_IPMI_ASF 2682*2675Szh199473 bge_unattach(bgep, ASF_MODE_SHUTDOWN); 26831408Srandyf #else 26841369Sdduvall bge_unattach(bgep); 26851408Srandyf #endif 26861369Sdduvall return (DDI_FAILURE); 26871369Sdduvall } 26881369Sdduvall 26891369Sdduvall /* 26901369Sdduvall * bge_suspend() -- suspend transmit/receive for powerdown 26911369Sdduvall */ 26921369Sdduvall static int 26931369Sdduvall bge_suspend(bge_t *bgep) 26941369Sdduvall { 26951369Sdduvall /* 26961369Sdduvall * Stop processing and idle (powerdown) the PHY ... 26971369Sdduvall */ 26981369Sdduvall mutex_enter(bgep->genlock); 26991408Srandyf #ifdef BGE_IPMI_ASF 27001408Srandyf /* 27011408Srandyf * Power management hasn't been supported in BGE now. If you 27021408Srandyf * want to implement it, please add the ASF/IPMI related 27031408Srandyf * code here. 27041408Srandyf */ 27051408Srandyf #endif 27061369Sdduvall bge_stop(bgep); 27071865Sdilpreet if (bge_phys_idle(bgep) != DDI_SUCCESS) { 27081865Sdilpreet (void) bge_check_acc_handle(bgep, bgep->io_handle); 27091865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 27101865Sdilpreet mutex_exit(bgep->genlock); 27111865Sdilpreet return (DDI_FAILURE); 27121865Sdilpreet } 27131865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 27141865Sdilpreet ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 27151865Sdilpreet mutex_exit(bgep->genlock); 27161865Sdilpreet return (DDI_FAILURE); 27171865Sdilpreet } 27181369Sdduvall mutex_exit(bgep->genlock); 27191369Sdduvall 27201369Sdduvall return (DDI_SUCCESS); 27211369Sdduvall } 27221369Sdduvall 27231369Sdduvall /* 27241369Sdduvall * detach(9E) -- Detach a device from the system 27251369Sdduvall */ 27261369Sdduvall static int 27271369Sdduvall bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 27281369Sdduvall { 27291369Sdduvall bge_t *bgep; 27301408Srandyf #ifdef BGE_IPMI_ASF 27311408Srandyf uint_t asf_mode; 27321408Srandyf asf_mode = ASF_MODE_NONE; 27331408Srandyf #endif 27341369Sdduvall 27351369Sdduvall BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd)); 27361369Sdduvall 27371369Sdduvall bgep = ddi_get_driver_private(devinfo); 27381369Sdduvall 27391369Sdduvall switch (cmd) { 27401369Sdduvall default: 27411369Sdduvall return (DDI_FAILURE); 27421369Sdduvall 27431369Sdduvall case DDI_SUSPEND: 27441369Sdduvall return (bge_suspend(bgep)); 27451369Sdduvall 27461369Sdduvall case DDI_DETACH: 27471369Sdduvall break; 27481369Sdduvall } 27491369Sdduvall 27501408Srandyf #ifdef BGE_IPMI_ASF 27511408Srandyf mutex_enter(bgep->genlock); 2752*2675Szh199473 if (bgep->asf_enabled && ((bgep->asf_status == ASF_STAT_RUN) || 2753*2675Szh199473 (bgep->asf_status == ASF_STAT_RUN_INIT))) { 27541408Srandyf 27551408Srandyf bge_asf_update_status(bgep); 2756*2675Szh199473 if (bgep->asf_status == ASF_STAT_RUN) { 2757*2675Szh199473 bge_asf_stop_timer(bgep); 2758*2675Szh199473 } 27591408Srandyf bgep->asf_status = ASF_STAT_STOP; 27601408Srandyf 27611408Srandyf bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET); 27621408Srandyf 27631408Srandyf if (bgep->asf_pseudostop) { 27641408Srandyf bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 27651408Srandyf bge_chip_stop(bgep, B_FALSE); 27661408Srandyf bgep->bge_mac_state = BGE_MAC_STOPPED; 27671408Srandyf bgep->asf_pseudostop = B_FALSE; 27681408Srandyf } 27691408Srandyf 27701408Srandyf asf_mode = ASF_MODE_POST_SHUTDOWN; 27711865Sdilpreet 27721865Sdilpreet if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 27731865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 27741865Sdilpreet DDI_SERVICE_UNAFFECTED); 27751865Sdilpreet if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 27761865Sdilpreet ddi_fm_service_impact(bgep->devinfo, 27771865Sdilpreet DDI_SERVICE_UNAFFECTED); 27781408Srandyf } 27791408Srandyf mutex_exit(bgep->genlock); 27801408Srandyf #endif 27811408Srandyf 27821369Sdduvall /* 27831369Sdduvall * Unregister from the GLD subsystem. This can fail, in 27841369Sdduvall * particular if there are DLPI style-2 streams still open - 27851369Sdduvall * in which case we just return failure without shutting 27861369Sdduvall * down chip operations. 27871369Sdduvall */ 27882311Sseb if (mac_unregister(bgep->mh) != 0) 27891369Sdduvall return (DDI_FAILURE); 27901369Sdduvall 27911369Sdduvall /* 27921369Sdduvall * All activity stopped, so we can clean up & exit 27931369Sdduvall */ 27941408Srandyf #ifdef BGE_IPMI_ASF 27951408Srandyf bge_unattach(bgep, asf_mode); 27961408Srandyf #else 27971369Sdduvall bge_unattach(bgep); 27981408Srandyf #endif 27991369Sdduvall return (DDI_SUCCESS); 28001369Sdduvall } 28011369Sdduvall 28021369Sdduvall 28031369Sdduvall /* 28041369Sdduvall * ========== Module Loading Data & Entry Points ========== 28051369Sdduvall */ 28061369Sdduvall 28071369Sdduvall #undef BGE_DBG 28081369Sdduvall #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 28091369Sdduvall 28101369Sdduvall DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach, 28111369Sdduvall nodev, NULL, D_MP, NULL); 28121369Sdduvall 28131369Sdduvall static struct modldrv bge_modldrv = { 28141369Sdduvall &mod_driverops, /* Type of module. This one is a driver */ 28151369Sdduvall bge_ident, /* short description */ 28161369Sdduvall &bge_dev_ops /* driver specific ops */ 28171369Sdduvall }; 28181369Sdduvall 28191369Sdduvall static struct modlinkage modlinkage = { 28201369Sdduvall MODREV_1, (void *)&bge_modldrv, NULL 28211369Sdduvall }; 28221369Sdduvall 28231369Sdduvall 28241369Sdduvall int 28251369Sdduvall _info(struct modinfo *modinfop) 28261369Sdduvall { 28271369Sdduvall return (mod_info(&modlinkage, modinfop)); 28281369Sdduvall } 28291369Sdduvall 28301369Sdduvall int 28311369Sdduvall _init(void) 28321369Sdduvall { 28331369Sdduvall int status; 28341369Sdduvall 28351369Sdduvall mac_init_ops(&bge_dev_ops, "bge"); 28361369Sdduvall status = mod_install(&modlinkage); 28371369Sdduvall if (status == DDI_SUCCESS) 28381369Sdduvall mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL); 28391369Sdduvall else 28401369Sdduvall mac_fini_ops(&bge_dev_ops); 28411369Sdduvall return (status); 28421369Sdduvall } 28431369Sdduvall 28441369Sdduvall int 28451369Sdduvall _fini(void) 28461369Sdduvall { 28471369Sdduvall int status; 28481369Sdduvall 28491369Sdduvall status = mod_remove(&modlinkage); 28501369Sdduvall if (status == DDI_SUCCESS) { 28511369Sdduvall mac_fini_ops(&bge_dev_ops); 28521369Sdduvall mutex_destroy(bge_log_mutex); 28531369Sdduvall } 28541369Sdduvall return (status); 28551369Sdduvall } 28561369Sdduvall 28571369Sdduvall 28581369Sdduvall /* 28591369Sdduvall * bge_add_intrs: 28601369Sdduvall * 28611369Sdduvall * Register FIXED or MSI interrupts. 28621369Sdduvall */ 28631369Sdduvall static int 28641369Sdduvall bge_add_intrs(bge_t *bgep, int intr_type) 28651369Sdduvall { 28661369Sdduvall dev_info_t *dip = bgep->devinfo; 28671369Sdduvall int avail, actual, intr_size, count = 0; 28681369Sdduvall int i, flag, ret; 28691369Sdduvall 2870*2675Szh199473 BGE_DEBUG(("bge_add_intrs($%p, 0x%x)", (void *)bgep, intr_type)); 28711369Sdduvall 28721369Sdduvall /* Get number of interrupts */ 28731369Sdduvall ret = ddi_intr_get_nintrs(dip, intr_type, &count); 28741369Sdduvall if ((ret != DDI_SUCCESS) || (count == 0)) { 28751369Sdduvall bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, " 28761369Sdduvall "count: %d", ret, count); 28771369Sdduvall 28781369Sdduvall return (DDI_FAILURE); 28791369Sdduvall } 28801369Sdduvall 28811369Sdduvall /* Get number of available interrupts */ 28821369Sdduvall ret = ddi_intr_get_navail(dip, intr_type, &avail); 28831369Sdduvall if ((ret != DDI_SUCCESS) || (avail == 0)) { 28841369Sdduvall bge_error(bgep, "ddi_intr_get_navail() failure, " 28851369Sdduvall "ret: %d, avail: %d\n", ret, avail); 28861369Sdduvall 28871369Sdduvall return (DDI_FAILURE); 28881369Sdduvall } 28891369Sdduvall 28901369Sdduvall if (avail < count) { 2891*2675Szh199473 BGE_DEBUG(("%s: nintrs() returned %d, navail returned %d", 2892*2675Szh199473 bgep->ifname, count, avail)); 28931369Sdduvall } 28941369Sdduvall 28951369Sdduvall /* 28961369Sdduvall * BGE hardware generates only single MSI even though it claims 28971369Sdduvall * to support multiple MSIs. So, hard code MSI count value to 1. 28981369Sdduvall */ 28991369Sdduvall if (intr_type == DDI_INTR_TYPE_MSI) { 29001369Sdduvall count = 1; 29011369Sdduvall flag = DDI_INTR_ALLOC_STRICT; 29021369Sdduvall } else { 29031369Sdduvall flag = DDI_INTR_ALLOC_NORMAL; 29041369Sdduvall } 29051369Sdduvall 29061369Sdduvall /* Allocate an array of interrupt handles */ 29071369Sdduvall intr_size = count * sizeof (ddi_intr_handle_t); 29081369Sdduvall bgep->htable = kmem_alloc(intr_size, KM_SLEEP); 29091369Sdduvall 29101369Sdduvall /* Call ddi_intr_alloc() */ 29111369Sdduvall ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0, 29121369Sdduvall count, &actual, flag); 29131369Sdduvall 29141369Sdduvall if ((ret != DDI_SUCCESS) || (actual == 0)) { 29151369Sdduvall bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret); 29161369Sdduvall 29171369Sdduvall kmem_free(bgep->htable, intr_size); 29181369Sdduvall return (DDI_FAILURE); 29191369Sdduvall } 29201369Sdduvall 29211369Sdduvall if (actual < count) { 2922*2675Szh199473 BGE_DEBUG(("%s: Requested: %d, Received: %d", 2923*2675Szh199473 bgep->ifname, count, actual)); 29241369Sdduvall } 29251369Sdduvall 29261369Sdduvall bgep->intr_cnt = actual; 29271369Sdduvall 29281369Sdduvall /* 29291369Sdduvall * Get priority for first msi, assume remaining are all the same 29301369Sdduvall */ 29311369Sdduvall if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) != 29321369Sdduvall DDI_SUCCESS) { 29331369Sdduvall bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret); 29341369Sdduvall 29351369Sdduvall /* Free already allocated intr */ 29361369Sdduvall for (i = 0; i < actual; i++) { 29371369Sdduvall (void) ddi_intr_free(bgep->htable[i]); 29381369Sdduvall } 29391369Sdduvall 29401369Sdduvall kmem_free(bgep->htable, intr_size); 29411369Sdduvall return (DDI_FAILURE); 29421369Sdduvall } 29431369Sdduvall 29441369Sdduvall /* Call ddi_intr_add_handler() */ 29451369Sdduvall for (i = 0; i < actual; i++) { 29461369Sdduvall if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr, 29471369Sdduvall (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) { 29481369Sdduvall bge_error(bgep, "ddi_intr_add_handler() " 29491369Sdduvall "failed %d\n", ret); 29501369Sdduvall 29511369Sdduvall /* Free already allocated intr */ 29521369Sdduvall for (i = 0; i < actual; i++) { 29531369Sdduvall (void) ddi_intr_free(bgep->htable[i]); 29541369Sdduvall } 29551369Sdduvall 29561369Sdduvall kmem_free(bgep->htable, intr_size); 29571369Sdduvall return (DDI_FAILURE); 29581369Sdduvall } 29591369Sdduvall } 29601369Sdduvall 29611369Sdduvall if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap)) 29621369Sdduvall != DDI_SUCCESS) { 29631369Sdduvall bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret); 29641369Sdduvall 29651369Sdduvall for (i = 0; i < actual; i++) { 29661369Sdduvall (void) ddi_intr_remove_handler(bgep->htable[i]); 29671369Sdduvall (void) ddi_intr_free(bgep->htable[i]); 29681369Sdduvall } 29691369Sdduvall 29701369Sdduvall kmem_free(bgep->htable, intr_size); 29711369Sdduvall return (DDI_FAILURE); 29721369Sdduvall } 29731369Sdduvall 29741369Sdduvall return (DDI_SUCCESS); 29751369Sdduvall } 29761369Sdduvall 29771369Sdduvall /* 29781369Sdduvall * bge_rem_intrs: 29791369Sdduvall * 29801369Sdduvall * Unregister FIXED or MSI interrupts 29811369Sdduvall */ 29821369Sdduvall static void 29831369Sdduvall bge_rem_intrs(bge_t *bgep) 29841369Sdduvall { 29851369Sdduvall int i; 29861369Sdduvall 2987*2675Szh199473 BGE_DEBUG(("bge_rem_intrs($%p)", (void *)bgep)); 29881369Sdduvall 29891865Sdilpreet /* Call ddi_intr_remove_handler() */ 29901865Sdilpreet for (i = 0; i < bgep->intr_cnt; i++) { 29911865Sdilpreet (void) ddi_intr_remove_handler(bgep->htable[i]); 29921865Sdilpreet (void) ddi_intr_free(bgep->htable[i]); 29931865Sdilpreet } 29941865Sdilpreet 29951865Sdilpreet kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t)); 29961865Sdilpreet } 29971865Sdilpreet 29981865Sdilpreet 29991865Sdilpreet void 30001865Sdilpreet bge_intr_enable(bge_t *bgep) 30011865Sdilpreet { 30021865Sdilpreet int i; 30031865Sdilpreet 30041865Sdilpreet if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 30051865Sdilpreet /* Call ddi_intr_block_enable() for MSI interrupts */ 30061865Sdilpreet (void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt); 30071865Sdilpreet } else { 30081865Sdilpreet /* Call ddi_intr_enable for MSI or FIXED interrupts */ 30091865Sdilpreet for (i = 0; i < bgep->intr_cnt; i++) { 30101865Sdilpreet (void) ddi_intr_enable(bgep->htable[i]); 30111865Sdilpreet } 30121865Sdilpreet } 30131865Sdilpreet } 30141865Sdilpreet 30151865Sdilpreet 30161865Sdilpreet void 30171865Sdilpreet bge_intr_disable(bge_t *bgep) 30181865Sdilpreet { 30191865Sdilpreet int i; 30201865Sdilpreet 30211369Sdduvall if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 30221369Sdduvall /* Call ddi_intr_block_disable() */ 30231369Sdduvall (void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt); 30241369Sdduvall } else { 30251369Sdduvall for (i = 0; i < bgep->intr_cnt; i++) { 30261369Sdduvall (void) ddi_intr_disable(bgep->htable[i]); 30271369Sdduvall } 30281369Sdduvall } 30291369Sdduvall } 3030