xref: /onnv-gate/usr/src/uts/common/io/bge/bge_main2.c (revision 2331:ad3ad2079123)
11369Sdduvall /*
21369Sdduvall  * CDDL HEADER START
31369Sdduvall  *
41369Sdduvall  * The contents of this file are subject to the terms of the
51369Sdduvall  * Common Development and Distribution License (the "License").
61369Sdduvall  * You may not use this file except in compliance with the License.
71369Sdduvall  *
81369Sdduvall  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
91369Sdduvall  * or http://www.opensolaris.org/os/licensing.
101369Sdduvall  * See the License for the specific language governing permissions
111369Sdduvall  * and limitations under the License.
121369Sdduvall  *
131369Sdduvall  * When distributing Covered Code, include this CDDL HEADER in each
141369Sdduvall  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
151369Sdduvall  * If applicable, add the following below this CDDL HEADER, with the
161369Sdduvall  * fields enclosed by brackets "[]" replaced with your own identifying
171369Sdduvall  * information: Portions Copyright [yyyy] [name of copyright owner]
181369Sdduvall  *
191369Sdduvall  * CDDL HEADER END
201369Sdduvall  */
211369Sdduvall 
221369Sdduvall /*
231369Sdduvall  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
241369Sdduvall  * Use is subject to license terms.
251369Sdduvall  */
261369Sdduvall 
271369Sdduvall #pragma ident	"%Z%%M%	%I%	%E% SMI"
281369Sdduvall 
291369Sdduvall #include "sys/bge_impl2.h"
301369Sdduvall #include <sys/sdt.h>
311369Sdduvall 
321369Sdduvall /*
331369Sdduvall  * This is the string displayed by modinfo, etc.
341369Sdduvall  * Make sure you keep the version ID up to date!
351369Sdduvall  */
361908Sly149593 static char bge_ident[] = "Broadcom Gb Ethernet v0.52";
371369Sdduvall 
381369Sdduvall /*
391369Sdduvall  * Property names
401369Sdduvall  */
411369Sdduvall static char debug_propname[] = "bge-debug-flags";
421369Sdduvall static char clsize_propname[] = "cache-line-size";
431369Sdduvall static char latency_propname[] = "latency-timer";
441369Sdduvall static char localmac_boolname[] = "local-mac-address?";
451369Sdduvall static char localmac_propname[] = "local-mac-address";
461369Sdduvall static char macaddr_propname[] = "mac-address";
471369Sdduvall static char subdev_propname[] = "subsystem-id";
481369Sdduvall static char subven_propname[] = "subsystem-vendor-id";
491369Sdduvall static char rxrings_propname[] = "bge-rx-rings";
501369Sdduvall static char txrings_propname[] = "bge-tx-rings";
511865Sdilpreet static char fm_cap[] = "fm-capable";
521908Sly149593 static char default_mtu[] = "default_mtu";
531369Sdduvall 
541369Sdduvall static int bge_add_intrs(bge_t *, int);
551369Sdduvall static void bge_rem_intrs(bge_t *);
561369Sdduvall 
571369Sdduvall /*
581369Sdduvall  * Describes the chip's DMA engine
591369Sdduvall  */
601369Sdduvall static ddi_dma_attr_t dma_attr = {
611369Sdduvall 	DMA_ATTR_V0,			/* dma_attr version	*/
621369Sdduvall 	0x0000000000000000ull,		/* dma_attr_addr_lo	*/
631369Sdduvall 	0xFFFFFFFFFFFFFFFFull,		/* dma_attr_addr_hi	*/
641369Sdduvall 	0x00000000FFFFFFFFull,		/* dma_attr_count_max	*/
651369Sdduvall 	0x0000000000000001ull,		/* dma_attr_align	*/
661369Sdduvall 	0x00000FFF,			/* dma_attr_burstsizes	*/
671369Sdduvall 	0x00000001,			/* dma_attr_minxfer	*/
681369Sdduvall 	0x000000000000FFFFull,		/* dma_attr_maxxfer	*/
691369Sdduvall 	0xFFFFFFFFFFFFFFFFull,		/* dma_attr_seg		*/
701369Sdduvall 	1,				/* dma_attr_sgllen 	*/
711369Sdduvall 	0x00000001,			/* dma_attr_granular 	*/
721865Sdilpreet 	DDI_DMA_FLAGERR			/* dma_attr_flags */
731369Sdduvall };
741369Sdduvall 
751369Sdduvall /*
761369Sdduvall  * PIO access attributes for registers
771369Sdduvall  */
781369Sdduvall static ddi_device_acc_attr_t bge_reg_accattr = {
791369Sdduvall 	DDI_DEVICE_ATTR_V0,
801369Sdduvall 	DDI_NEVERSWAP_ACC,
811865Sdilpreet 	DDI_STRICTORDER_ACC,
821865Sdilpreet 	DDI_FLAGERR_ACC
831369Sdduvall };
841369Sdduvall 
851369Sdduvall /*
861369Sdduvall  * DMA access attributes for descriptors: NOT to be byte swapped.
871369Sdduvall  */
881369Sdduvall static ddi_device_acc_attr_t bge_desc_accattr = {
891369Sdduvall 	DDI_DEVICE_ATTR_V0,
901369Sdduvall 	DDI_NEVERSWAP_ACC,
911865Sdilpreet 	DDI_STRICTORDER_ACC,
921865Sdilpreet 	DDI_FLAGERR_ACC
931369Sdduvall };
941369Sdduvall 
951369Sdduvall /*
961369Sdduvall  * DMA access attributes for data: NOT to be byte swapped.
971369Sdduvall  */
981369Sdduvall static ddi_device_acc_attr_t bge_data_accattr = {
991369Sdduvall 	DDI_DEVICE_ATTR_V0,
1001369Sdduvall 	DDI_NEVERSWAP_ACC,
1011369Sdduvall 	DDI_STRICTORDER_ACC
1021369Sdduvall };
1031369Sdduvall 
1041369Sdduvall static ether_addr_t bge_broadcast_addr = {
1051369Sdduvall 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
1061369Sdduvall };
1071369Sdduvall 
1081369Sdduvall /*
1091369Sdduvall  * Versions of the O/S up to Solaris 8 didn't support network booting
1101369Sdduvall  * from any network interface except the first (NET0).  Patching this
1111369Sdduvall  * flag to a non-zero value will tell the driver to work around this
1121369Sdduvall  * limitation by creating an extra (internal) pathname node.  To do
1131369Sdduvall  * this, just add a line like the following to the CLIENT'S etc/system
1141369Sdduvall  * file ON THE ROOT FILESYSTEM SERVER before booting the client:
1151369Sdduvall  *
1161369Sdduvall  *	set bge:bge_net1_boot_support = 1;
1171369Sdduvall  */
1181369Sdduvall static uint32_t bge_net1_boot_support = 1;
1191369Sdduvall 
1202311Sseb static int		bge_m_start(void *);
1212311Sseb static void		bge_m_stop(void *);
1222311Sseb static int		bge_m_promisc(void *, boolean_t);
1232311Sseb static int		bge_m_multicst(void *, boolean_t, const uint8_t *);
1242311Sseb static int		bge_m_unicst(void *, const uint8_t *);
1252311Sseb static void		bge_m_resources(void *);
1262311Sseb static void		bge_m_ioctl(void *, queue_t *, mblk_t *);
1272311Sseb static boolean_t	bge_m_getcapab(void *, mac_capab_t, void *);
128*2331Skrgopi static int		bge_unicst_set(void *, const uint8_t *,
129*2331Skrgopi     mac_addr_slot_t);
130*2331Skrgopi static int		bge_m_unicst_add(void *, mac_multi_addr_t *);
131*2331Skrgopi static int		bge_m_unicst_remove(void *, mac_addr_slot_t);
132*2331Skrgopi static int		bge_m_unicst_modify(void *, mac_multi_addr_t *);
133*2331Skrgopi static int		bge_m_unicst_get(void *, mac_multi_addr_t *);
1342311Sseb 
1352311Sseb #define	BGE_M_CALLBACK_FLAGS	(MC_RESOURCES | MC_IOCTL | MC_GETCAPAB)
1362311Sseb 
1372311Sseb static mac_callbacks_t bge_m_callbacks = {
1382311Sseb 	BGE_M_CALLBACK_FLAGS,
1392311Sseb 	bge_m_stat,
1402311Sseb 	bge_m_start,
1412311Sseb 	bge_m_stop,
1422311Sseb 	bge_m_promisc,
1432311Sseb 	bge_m_multicst,
1442311Sseb 	bge_m_unicst,
1452311Sseb 	bge_m_tx,
1462311Sseb 	bge_m_resources,
1472311Sseb 	bge_m_ioctl,
1482311Sseb 	bge_m_getcapab
1492311Sseb };
1502311Sseb 
1511369Sdduvall /*
1521369Sdduvall  * ========== Transmit and receive ring reinitialisation ==========
1531369Sdduvall  */
1541369Sdduvall 
1551369Sdduvall /*
1561369Sdduvall  * These <reinit> routines each reset the specified ring to an initial
1571369Sdduvall  * state, assuming that the corresponding <init> routine has already
1581369Sdduvall  * been called exactly once.
1591369Sdduvall  */
1601369Sdduvall 
1611369Sdduvall static void
1621369Sdduvall bge_reinit_send_ring(send_ring_t *srp)
1631369Sdduvall {
1641369Sdduvall 	/*
1651369Sdduvall 	 * Reinitialise control variables ...
1661369Sdduvall 	 */
1671369Sdduvall 	ASSERT(srp->tx_flow == 0);
1681369Sdduvall 	srp->tx_next = 0;
1691369Sdduvall 	srp->tx_free = srp->desc.nslots;
1701369Sdduvall 
1711369Sdduvall 	ASSERT(mutex_owned(srp->tc_lock));
1721369Sdduvall 	srp->tc_next = 0;
1731369Sdduvall 
1741369Sdduvall 	/*
1751369Sdduvall 	 * Zero and sync all the h/w Send Buffer Descriptors
1761369Sdduvall 	 */
1771369Sdduvall 	DMA_ZERO(srp->desc);
1781369Sdduvall 	DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV);
1791369Sdduvall }
1801369Sdduvall 
1811369Sdduvall static void
1821369Sdduvall bge_reinit_recv_ring(recv_ring_t *rrp)
1831369Sdduvall {
1841369Sdduvall 	/*
1851369Sdduvall 	 * Reinitialise control variables ...
1861369Sdduvall 	 */
1871369Sdduvall 	rrp->rx_next = 0;
1881369Sdduvall }
1891369Sdduvall 
1901369Sdduvall static void
1911369Sdduvall bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring)
1921369Sdduvall {
1931369Sdduvall 	bge_rbd_t *hw_rbd_p;
1941369Sdduvall 	sw_rbd_t *srbdp;
1951369Sdduvall 	uint32_t bufsize;
1961369Sdduvall 	uint32_t nslots;
1971369Sdduvall 	uint32_t slot;
1981369Sdduvall 
1991369Sdduvall 	static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = {
2001369Sdduvall 		RBD_FLAG_STD_RING,
2011369Sdduvall 		RBD_FLAG_JUMBO_RING,
2021369Sdduvall 		RBD_FLAG_MINI_RING
2031369Sdduvall 	};
2041369Sdduvall 
2051369Sdduvall 	/*
2061369Sdduvall 	 * Zero, initialise and sync all the h/w Receive Buffer Descriptors
2071369Sdduvall 	 * Note: all the remaining fields (<type>, <flags>, <ip_cksum>,
2081369Sdduvall 	 * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>)
2091369Sdduvall 	 * should be zeroed, and so don't need to be set up specifically
2101369Sdduvall 	 * once the whole area has been cleared.
2111369Sdduvall 	 */
2121369Sdduvall 	DMA_ZERO(brp->desc);
2131369Sdduvall 
2141369Sdduvall 	hw_rbd_p = DMA_VPTR(brp->desc);
2151369Sdduvall 	nslots = brp->desc.nslots;
2161369Sdduvall 	ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT);
2171369Sdduvall 	bufsize = brp->buf[0].size;
2181369Sdduvall 	srbdp = brp->sw_rbds;
2191369Sdduvall 	for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) {
2201369Sdduvall 		hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress;
2211369Sdduvall 		hw_rbd_p->index = slot;
2221369Sdduvall 		hw_rbd_p->len = bufsize;
2231369Sdduvall 		hw_rbd_p->opaque = srbdp->pbuf.token;
2241369Sdduvall 		hw_rbd_p->flags |= ring_type_flag[ring];
2251369Sdduvall 	}
2261369Sdduvall 
2271369Sdduvall 	DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV);
2281369Sdduvall 
2291369Sdduvall 	/*
2301369Sdduvall 	 * Finally, reinitialise the ring control variables ...
2311369Sdduvall 	 */
2321369Sdduvall 	brp->rf_next = (nslots != 0) ? (nslots-1) : 0;
2331369Sdduvall }
2341369Sdduvall 
2351369Sdduvall /*
2361369Sdduvall  * Reinitialize all rings
2371369Sdduvall  */
2381369Sdduvall static void
2391369Sdduvall bge_reinit_rings(bge_t *bgep)
2401369Sdduvall {
2411369Sdduvall 	uint64_t ring;
2421369Sdduvall 
2431369Sdduvall 	ASSERT(mutex_owned(bgep->genlock));
2441369Sdduvall 
2451369Sdduvall 	/*
2461369Sdduvall 	 * Send Rings ...
2471369Sdduvall 	 */
2481369Sdduvall 	for (ring = 0; ring < bgep->chipid.tx_rings; ++ring)
2491369Sdduvall 		bge_reinit_send_ring(&bgep->send[ring]);
2501369Sdduvall 
2511369Sdduvall 	/*
2521369Sdduvall 	 * Receive Return Rings ...
2531369Sdduvall 	 */
2541369Sdduvall 	for (ring = 0; ring < bgep->chipid.rx_rings; ++ring)
2551369Sdduvall 		bge_reinit_recv_ring(&bgep->recv[ring]);
2561369Sdduvall 
2571369Sdduvall 	/*
2581369Sdduvall 	 * Receive Producer Rings ...
2591369Sdduvall 	 */
2601369Sdduvall 	for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring)
2611369Sdduvall 		bge_reinit_buff_ring(&bgep->buff[ring], ring);
2621369Sdduvall }
2631369Sdduvall 
2641369Sdduvall /*
2651369Sdduvall  * ========== Internal state management entry points ==========
2661369Sdduvall  */
2671369Sdduvall 
2681369Sdduvall #undef	BGE_DBG
2691369Sdduvall #define	BGE_DBG		BGE_DBG_NEMO	/* debug flag for this code	*/
2701369Sdduvall 
2711369Sdduvall /*
2721369Sdduvall  * These routines provide all the functionality required by the
2731369Sdduvall  * corresponding GLD entry points, but don't update the GLD state
2741369Sdduvall  * so they can be called internally without disturbing our record
2751369Sdduvall  * of what GLD thinks we should be doing ...
2761369Sdduvall  */
2771369Sdduvall 
2781369Sdduvall /*
2791369Sdduvall  *	bge_reset() -- reset h/w & rings to initial state
2801369Sdduvall  */
2811865Sdilpreet static int
2821408Srandyf #ifdef BGE_IPMI_ASF
2831408Srandyf bge_reset(bge_t *bgep, uint_t asf_mode)
2841408Srandyf #else
2851369Sdduvall bge_reset(bge_t *bgep)
2861408Srandyf #endif
2871369Sdduvall {
2881369Sdduvall 	uint64_t	ring;
2891865Sdilpreet 	int retval;
2901369Sdduvall 
2911369Sdduvall 	BGE_TRACE(("bge_reset($%p)", (void *)bgep));
2921369Sdduvall 
2931369Sdduvall 	ASSERT(mutex_owned(bgep->genlock));
2941369Sdduvall 
2951369Sdduvall 	/*
2961369Sdduvall 	 * Grab all the other mutexes in the world (this should
2971369Sdduvall 	 * ensure no other threads are manipulating driver state)
2981369Sdduvall 	 */
2991369Sdduvall 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
3001369Sdduvall 		mutex_enter(bgep->recv[ring].rx_lock);
3011369Sdduvall 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
3021369Sdduvall 		mutex_enter(bgep->buff[ring].rf_lock);
3031369Sdduvall 	rw_enter(bgep->errlock, RW_WRITER);
3041369Sdduvall 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
3051369Sdduvall 		mutex_enter(bgep->send[ring].tc_lock);
3061369Sdduvall 
3071408Srandyf #ifdef BGE_IPMI_ASF
3081865Sdilpreet 	retval = bge_chip_reset(bgep, B_TRUE, asf_mode);
3091408Srandyf #else
3101865Sdilpreet 	retval = bge_chip_reset(bgep, B_TRUE);
3111408Srandyf #endif
3121369Sdduvall 	bge_reinit_rings(bgep);
3131369Sdduvall 
3141369Sdduvall 	/*
3151369Sdduvall 	 * Free the world ...
3161369Sdduvall 	 */
3171369Sdduvall 	for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; )
3181369Sdduvall 		mutex_exit(bgep->send[ring].tc_lock);
3191369Sdduvall 	rw_exit(bgep->errlock);
3201369Sdduvall 	for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; )
3211369Sdduvall 		mutex_exit(bgep->buff[ring].rf_lock);
3221369Sdduvall 	for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; )
3231369Sdduvall 		mutex_exit(bgep->recv[ring].rx_lock);
3241369Sdduvall 
3251369Sdduvall 	BGE_DEBUG(("bge_reset($%p) done", (void *)bgep));
3261865Sdilpreet 	return (retval);
3271369Sdduvall }
3281369Sdduvall 
3291369Sdduvall /*
3301369Sdduvall  *	bge_stop() -- stop processing, don't reset h/w or rings
3311369Sdduvall  */
3321369Sdduvall static void
3331369Sdduvall bge_stop(bge_t *bgep)
3341369Sdduvall {
3351369Sdduvall 	BGE_TRACE(("bge_stop($%p)", (void *)bgep));
3361369Sdduvall 
3371369Sdduvall 	ASSERT(mutex_owned(bgep->genlock));
3381369Sdduvall 
3391408Srandyf #ifdef BGE_IPMI_ASF
3401408Srandyf 	if (bgep->asf_enabled) {
3411408Srandyf 		bgep->asf_pseudostop = B_TRUE;
3421408Srandyf 	} else {
3431408Srandyf #endif
3441408Srandyf 		bge_chip_stop(bgep, B_FALSE);
3451408Srandyf #ifdef BGE_IPMI_ASF
3461408Srandyf 	}
3471408Srandyf #endif
3481369Sdduvall 
3491369Sdduvall 	BGE_DEBUG(("bge_stop($%p) done", (void *)bgep));
3501369Sdduvall }
3511369Sdduvall 
3521369Sdduvall /*
3531369Sdduvall  *	bge_start() -- start transmitting/receiving
3541369Sdduvall  */
3551865Sdilpreet static int
3561369Sdduvall bge_start(bge_t *bgep, boolean_t reset_phys)
3571369Sdduvall {
3581865Sdilpreet 	int retval;
3591865Sdilpreet 
3601369Sdduvall 	BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys));
3611369Sdduvall 
3621369Sdduvall 	ASSERT(mutex_owned(bgep->genlock));
3631369Sdduvall 
3641369Sdduvall 	/*
3651369Sdduvall 	 * Start chip processing, including enabling interrupts
3661369Sdduvall 	 */
3671865Sdilpreet 	retval = bge_chip_start(bgep, reset_phys);
3681369Sdduvall 
3691369Sdduvall 	BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys));
3701865Sdilpreet 	return (retval);
3711369Sdduvall }
3721369Sdduvall 
3731369Sdduvall /*
3741369Sdduvall  * bge_restart - restart transmitting/receiving after error or suspend
3751369Sdduvall  */
3761865Sdilpreet int
3771369Sdduvall bge_restart(bge_t *bgep, boolean_t reset_phys)
3781369Sdduvall {
3791865Sdilpreet 	int retval = DDI_SUCCESS;
3801369Sdduvall 	ASSERT(mutex_owned(bgep->genlock));
3811369Sdduvall 
3821408Srandyf #ifdef BGE_IPMI_ASF
3831408Srandyf 	if (bgep->asf_enabled) {
3841865Sdilpreet 		if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS)
3851865Sdilpreet 			retval = DDI_FAILURE;
3861408Srandyf 	} else
3871865Sdilpreet 		if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS)
3881865Sdilpreet 			retval = DDI_FAILURE;
3891408Srandyf #else
3901865Sdilpreet 	if (bge_reset(bgep) != DDI_SUCCESS)
3911865Sdilpreet 		retval = DDI_FAILURE;
3921408Srandyf #endif
3931369Sdduvall 	if (bgep->bge_mac_state == BGE_MAC_STARTED) {
3941865Sdilpreet 		if (bge_start(bgep, reset_phys) != DDI_SUCCESS)
3951865Sdilpreet 			retval = DDI_FAILURE;
3961369Sdduvall 		bgep->watchdog = 0;
3971369Sdduvall 		ddi_trigger_softintr(bgep->resched_id);
3981369Sdduvall 	}
3991369Sdduvall 
4001369Sdduvall 	BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys));
4011865Sdilpreet 	return (retval);
4021369Sdduvall }
4031369Sdduvall 
4041369Sdduvall 
4051369Sdduvall /*
4061369Sdduvall  * ========== Nemo-required management entry points ==========
4071369Sdduvall  */
4081369Sdduvall 
4091369Sdduvall #undef	BGE_DBG
4101369Sdduvall #define	BGE_DBG		BGE_DBG_NEMO	/* debug flag for this code	*/
4111369Sdduvall 
4121369Sdduvall /*
4131369Sdduvall  *	bge_m_stop() -- stop transmitting/receiving
4141369Sdduvall  */
4151369Sdduvall static void
4161369Sdduvall bge_m_stop(void *arg)
4171369Sdduvall {
4181369Sdduvall 	bge_t *bgep = arg;		/* private device info	*/
4191369Sdduvall 
4201369Sdduvall 	BGE_TRACE(("bge_m_stop($%p)", arg));
4211369Sdduvall 
4221369Sdduvall 	/*
4231369Sdduvall 	 * Just stop processing, then record new GLD state
4241369Sdduvall 	 */
4251369Sdduvall 	mutex_enter(bgep->genlock);
4261865Sdilpreet 	if (!(bgep->progress & PROGRESS_INTR)) {
4271865Sdilpreet 		/* can happen during autorecovery */
4281865Sdilpreet 		mutex_exit(bgep->genlock);
4291865Sdilpreet 		return;
4301865Sdilpreet 	}
4311865Sdilpreet 
4321369Sdduvall 	bgep->link_up_msg = bgep->link_down_msg = " (stopped)";
4331369Sdduvall 	bge_stop(bgep);
4341369Sdduvall 	bgep->bge_mac_state = BGE_MAC_STOPPED;
4351369Sdduvall 	BGE_DEBUG(("bge_m_stop($%p) done", arg));
4361865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
4371865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED);
4381369Sdduvall 	mutex_exit(bgep->genlock);
4391369Sdduvall }
4401369Sdduvall 
4411369Sdduvall /*
4421369Sdduvall  *	bge_m_start() -- start transmitting/receiving
4431369Sdduvall  */
4441369Sdduvall static int
4451369Sdduvall bge_m_start(void *arg)
4461369Sdduvall {
4471369Sdduvall 	bge_t *bgep = arg;		/* private device info	*/
4481369Sdduvall 
4491369Sdduvall 	BGE_TRACE(("bge_m_start($%p)", arg));
4501369Sdduvall 
4511369Sdduvall 	/*
4521369Sdduvall 	 * Start processing and record new GLD state
4531369Sdduvall 	 */
4541369Sdduvall 	mutex_enter(bgep->genlock);
4551865Sdilpreet 	if (!(bgep->progress & PROGRESS_INTR)) {
4561865Sdilpreet 		/* can happen during autorecovery */
4571865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
4581865Sdilpreet 		mutex_exit(bgep->genlock);
4591865Sdilpreet 		return (EIO);
4601865Sdilpreet 	}
4611408Srandyf #ifdef BGE_IPMI_ASF
4621408Srandyf 	if (bgep->asf_enabled) {
4631408Srandyf 		if ((bgep->asf_status == ASF_STAT_RUN) &&
4641408Srandyf 			(bgep->asf_pseudostop)) {
4651408Srandyf 
4661408Srandyf 			bgep->link_up_msg = bgep->link_down_msg
4671408Srandyf 				= " (initialized)";
4681408Srandyf 			bgep->bge_mac_state = BGE_MAC_STARTED;
4691408Srandyf 			mutex_exit(bgep->genlock);
4701408Srandyf 			return (0);
4711408Srandyf 		}
4721408Srandyf 	}
4731865Sdilpreet 	if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) {
4741408Srandyf #else
4751865Sdilpreet 	if (bge_reset(bgep) != DDI_SUCCESS) {
4761408Srandyf #endif
4771865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
4781865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
4791865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
4801865Sdilpreet 		mutex_exit(bgep->genlock);
4811865Sdilpreet 		return (EIO);
4821865Sdilpreet 	}
4831369Sdduvall 	bgep->link_up_msg = bgep->link_down_msg = " (initialized)";
4841865Sdilpreet 	if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) {
4851865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
4861865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
4871865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
4881865Sdilpreet 		mutex_exit(bgep->genlock);
4891865Sdilpreet 		return (EIO);
4901865Sdilpreet 	}
4911369Sdduvall 	bgep->bge_mac_state = BGE_MAC_STARTED;
4921369Sdduvall 	BGE_DEBUG(("bge_m_start($%p) done", arg));
4931408Srandyf 
4941865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
4951865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
4961865Sdilpreet 		mutex_exit(bgep->genlock);
4971865Sdilpreet 		return (EIO);
4981865Sdilpreet 	}
4991865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
5001865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
5011865Sdilpreet 		mutex_exit(bgep->genlock);
5021865Sdilpreet 		return (EIO);
5031865Sdilpreet 	}
5041408Srandyf #ifdef BGE_IPMI_ASF
5051408Srandyf 	if (bgep->asf_enabled) {
5061408Srandyf 		if (bgep->asf_status != ASF_STAT_RUN) {
5071408Srandyf 			/* start ASF heart beat */
5081408Srandyf 			bgep->asf_timeout_id = timeout(bge_asf_heartbeat,
5091408Srandyf 				(void *)bgep,
5101408Srandyf 				drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL));
5111408Srandyf 			bgep->asf_status = ASF_STAT_RUN;
5121408Srandyf 		}
5131408Srandyf 	}
5141408Srandyf #endif
5151369Sdduvall 	mutex_exit(bgep->genlock);
5161369Sdduvall 
5171369Sdduvall 	return (0);
5181369Sdduvall }
5191369Sdduvall 
5201369Sdduvall /*
521*2331Skrgopi  *	bge_m_unicst() -- set the physical network address
5221369Sdduvall  */
5231369Sdduvall static int
5241369Sdduvall bge_m_unicst(void *arg, const uint8_t *macaddr)
5251369Sdduvall {
526*2331Skrgopi 	/*
527*2331Skrgopi 	 * Request to set address in
528*2331Skrgopi 	 * address slot 0, i.e., default address
529*2331Skrgopi 	 */
530*2331Skrgopi 	return (bge_unicst_set(arg, macaddr, 0));
531*2331Skrgopi }
532*2331Skrgopi 
533*2331Skrgopi /*
534*2331Skrgopi  *	bge_unicst_set() -- set the physical network address
535*2331Skrgopi  */
536*2331Skrgopi static int
537*2331Skrgopi bge_unicst_set(void *arg, const uint8_t *macaddr, mac_addr_slot_t slot)
538*2331Skrgopi {
5391369Sdduvall 	bge_t *bgep = arg;		/* private device info	*/
5401369Sdduvall 
5411369Sdduvall 	BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg,
5421369Sdduvall 		ether_sprintf((void *)macaddr)));
5431369Sdduvall 	/*
5441369Sdduvall 	 * Remember the new current address in the driver state
5451369Sdduvall 	 * Sync the chip's idea of the address too ...
5461369Sdduvall 	 */
5471369Sdduvall 	mutex_enter(bgep->genlock);
5481865Sdilpreet 	if (!(bgep->progress & PROGRESS_INTR)) {
5491865Sdilpreet 		/* can happen during autorecovery */
5501865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
5511865Sdilpreet 		mutex_exit(bgep->genlock);
5521865Sdilpreet 		return (EIO);
5531865Sdilpreet 	}
554*2331Skrgopi 	ethaddr_copy(macaddr, bgep->curr_addr[slot].addr);
5551408Srandyf #ifdef BGE_IPMI_ASF
5561865Sdilpreet 	if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) {
5571865Sdilpreet #else
5581865Sdilpreet 	if (bge_chip_sync(bgep) == DDI_FAILURE) {
5591865Sdilpreet #endif
5601865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
5611865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
5621865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
5631865Sdilpreet 		mutex_exit(bgep->genlock);
5641865Sdilpreet 		return (EIO);
5651865Sdilpreet 	}
5661865Sdilpreet #ifdef BGE_IPMI_ASF
5671408Srandyf 	if (bgep->asf_enabled) {
5681408Srandyf 		/*
5691408Srandyf 		 * The above bge_chip_sync() function wrote the ethernet MAC
5701408Srandyf 		 * addresses registers which destroyed the IPMI/ASF sideband.
5711408Srandyf 		 * Here, we have to reset chip to make IPMI/ASF sideband work.
5721408Srandyf 		 */
5731408Srandyf 		if (bgep->asf_status == ASF_STAT_RUN) {
5741408Srandyf 			/*
5751408Srandyf 			 * We must stop ASF heart beat before bge_chip_stop(),
5761408Srandyf 			 * otherwise some computers (ex. IBM HS20 blade server)
5771408Srandyf 			 * may crash.
5781408Srandyf 			 */
5791408Srandyf 			bge_asf_update_status(bgep);
5801408Srandyf 			bge_asf_stop_timer(bgep);
5811408Srandyf 			bgep->asf_status = ASF_STAT_STOP;
5821408Srandyf 
5831408Srandyf 			bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET);
5841408Srandyf 		}
5851865Sdilpreet 		bge_chip_stop(bgep, B_FALSE);
5861408Srandyf 
5871865Sdilpreet 		if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) {
5881865Sdilpreet 			(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
5891865Sdilpreet 			(void) bge_check_acc_handle(bgep, bgep->io_handle);
5901865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
5911865Sdilpreet 			    DDI_SERVICE_DEGRADED);
5921865Sdilpreet 			mutex_exit(bgep->genlock);
5931865Sdilpreet 			return (EIO);
5941865Sdilpreet 		}
5951865Sdilpreet 
5961408Srandyf 		/*
5971408Srandyf 		 * Start our ASF heartbeat counter as soon as possible.
5981408Srandyf 		 */
5991408Srandyf 		if (bgep->asf_status != ASF_STAT_RUN) {
6001408Srandyf 			/* start ASF heart beat */
6011408Srandyf 			bgep->asf_timeout_id = timeout(bge_asf_heartbeat,
6021408Srandyf 				(void *)bgep,
6031408Srandyf 				drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL));
6041408Srandyf 			bgep->asf_status = ASF_STAT_RUN;
6051408Srandyf 		}
6061408Srandyf 	}
6071408Srandyf #endif
6081369Sdduvall 	BGE_DEBUG(("bge_m_unicst_set($%p) done", arg));
6091865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
6101865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
6111865Sdilpreet 		mutex_exit(bgep->genlock);
6121865Sdilpreet 		return (EIO);
6131865Sdilpreet 	}
6141865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
6151865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
6161865Sdilpreet 		mutex_exit(bgep->genlock);
6171865Sdilpreet 		return (EIO);
6181865Sdilpreet 	}
6191369Sdduvall 	mutex_exit(bgep->genlock);
6201369Sdduvall 
6211369Sdduvall 	return (0);
6221369Sdduvall }
6231369Sdduvall 
6241369Sdduvall /*
625*2331Skrgopi  * The following four routines are used as callbacks for multiple MAC
626*2331Skrgopi  * address support:
627*2331Skrgopi  *    -  bge_m_unicst_add(void *, mac_multi_addr_t *);
628*2331Skrgopi  *    -  bge_m_unicst_remove(void *, mac_addr_slot_t);
629*2331Skrgopi  *    -  bge_m_unicst_modify(void *, mac_multi_addr_t *);
630*2331Skrgopi  *    -  bge_m_unicst_get(void *, mac_multi_addr_t *);
631*2331Skrgopi  */
632*2331Skrgopi 
633*2331Skrgopi /*
634*2331Skrgopi  * bge_m_unicst_add() - will find an unused address slot, set the
635*2331Skrgopi  * address value to the one specified, reserve that slot and enable
636*2331Skrgopi  * the NIC to start filtering on the new MAC address.
637*2331Skrgopi  * address slot. Returns 0 on success.
638*2331Skrgopi  */
639*2331Skrgopi static int
640*2331Skrgopi bge_m_unicst_add(void *arg, mac_multi_addr_t *maddr)
641*2331Skrgopi {
642*2331Skrgopi 	bge_t *bgep = arg;		/* private device info	*/
643*2331Skrgopi 	mac_addr_slot_t slot;
644*2331Skrgopi 	int i, err;
645*2331Skrgopi 
646*2331Skrgopi 	if (mac_unicst_verify(bgep->mh,
647*2331Skrgopi 	    maddr->mma_addr, maddr->mma_addrlen) == B_FALSE)
648*2331Skrgopi 		return (EINVAL);
649*2331Skrgopi 
650*2331Skrgopi 	mutex_enter(bgep->genlock);
651*2331Skrgopi 	if (bgep->unicst_addr_avail == 0) {
652*2331Skrgopi 		/* no slots available */
653*2331Skrgopi 		mutex_exit(bgep->genlock);
654*2331Skrgopi 		return (ENOSPC);
655*2331Skrgopi 	}
656*2331Skrgopi 
657*2331Skrgopi 	/*
658*2331Skrgopi 	 * Primary/default address is in slot 0. The next three
659*2331Skrgopi 	 * addresses are the multiple MAC addresses. So multiple
660*2331Skrgopi 	 * MAC address 0 is in slot 1, 1 in slot 2, and so on.
661*2331Skrgopi 	 * When we return a slot number to the user, it is
662*2331Skrgopi 	 * actually slot number plus one to bge.
663*2331Skrgopi 	 */
664*2331Skrgopi 	for (i = 0; i < bgep->unicst_addr_total; i++) {
665*2331Skrgopi 		if (bgep->curr_addr[i + 1].set == B_FALSE) {
666*2331Skrgopi 			bgep->curr_addr[i + 1].set = B_TRUE;
667*2331Skrgopi 			slot = i;
668*2331Skrgopi 			break;
669*2331Skrgopi 		}
670*2331Skrgopi 	}
671*2331Skrgopi 
672*2331Skrgopi 	bgep->unicst_addr_avail--;
673*2331Skrgopi 	mutex_exit(bgep->genlock);
674*2331Skrgopi 	maddr->mma_slot = slot;
675*2331Skrgopi 
676*2331Skrgopi 	if ((err = bge_unicst_set(bgep, maddr->mma_addr, slot)) != 0) {
677*2331Skrgopi 		mutex_enter(bgep->genlock);
678*2331Skrgopi 		bgep->curr_addr[slot + 1].set = B_FALSE;
679*2331Skrgopi 		bgep->unicst_addr_avail++;
680*2331Skrgopi 		mutex_exit(bgep->genlock);
681*2331Skrgopi 	}
682*2331Skrgopi 	return (err);
683*2331Skrgopi }
684*2331Skrgopi 
685*2331Skrgopi /*
686*2331Skrgopi  * bge_m_unicst_remove() - removes a MAC address that was added by a
687*2331Skrgopi  * call to bge_m_unicst_add(). The slot number that was returned in
688*2331Skrgopi  * add() is passed in the call to remove the address.
689*2331Skrgopi  * Returns 0 on success.
690*2331Skrgopi  */
691*2331Skrgopi static int
692*2331Skrgopi bge_m_unicst_remove(void *arg, mac_addr_slot_t slot)
693*2331Skrgopi {
694*2331Skrgopi 	bge_t *bgep = arg;		/* private device info	*/
695*2331Skrgopi 
696*2331Skrgopi 	ASSERT(slot < bgep->unicst_addr_total);
697*2331Skrgopi 	mutex_enter(bgep->genlock);
698*2331Skrgopi 	if (bgep->curr_addr[slot + 1].set == B_TRUE) {
699*2331Skrgopi 		bgep->curr_addr[slot + 1].set = B_FALSE;
700*2331Skrgopi 		bgep->unicst_addr_avail++;
701*2331Skrgopi 		mutex_exit(bgep->genlock);
702*2331Skrgopi 		/*
703*2331Skrgopi 		 * Copy the default address to the passed slot
704*2331Skrgopi 		 */
705*2331Skrgopi 		return (bge_unicst_set(bgep,
706*2331Skrgopi 		    bgep->curr_addr[0].addr, slot + 1));
707*2331Skrgopi 	}
708*2331Skrgopi 	mutex_exit(bgep->genlock);
709*2331Skrgopi 	return (EINVAL);
710*2331Skrgopi }
711*2331Skrgopi 
712*2331Skrgopi /*
713*2331Skrgopi  * bge_m_unicst_modify() - modifies the value of an address that
714*2331Skrgopi  * has been added by bge_m_unicst_add(). The new address, address
715*2331Skrgopi  * length and the slot number that was returned in the call to add
716*2331Skrgopi  * should be passed to bge_m_unicst_modify(). mma_flags should be
717*2331Skrgopi  * set to 0. Returns 0 on success.
718*2331Skrgopi  */
719*2331Skrgopi static int
720*2331Skrgopi bge_m_unicst_modify(void *arg, mac_multi_addr_t *maddr)
721*2331Skrgopi {
722*2331Skrgopi 	bge_t *bgep = arg;		/* private device info	*/
723*2331Skrgopi 	mac_addr_slot_t slot;
724*2331Skrgopi 
725*2331Skrgopi 	if (mac_unicst_verify(bgep->mh,
726*2331Skrgopi 	    maddr->mma_addr, maddr->mma_addrlen) == B_FALSE)
727*2331Skrgopi 		return (EINVAL);
728*2331Skrgopi 
729*2331Skrgopi 	slot = maddr->mma_slot;
730*2331Skrgopi 
731*2331Skrgopi 	mutex_enter(bgep->genlock);
732*2331Skrgopi 	if (slot < bgep->unicst_addr_total &&
733*2331Skrgopi 	    bgep->curr_addr[slot].set == B_TRUE) {
734*2331Skrgopi 		mutex_exit(bgep->genlock);
735*2331Skrgopi 		return (bge_unicst_set(bgep, maddr->mma_addr, slot));
736*2331Skrgopi 	}
737*2331Skrgopi 	mutex_exit(bgep->genlock);
738*2331Skrgopi 
739*2331Skrgopi 	return (EINVAL);
740*2331Skrgopi }
741*2331Skrgopi 
742*2331Skrgopi /*
743*2331Skrgopi  * bge_m_unicst_get() - will get the MAC address and all other
744*2331Skrgopi  * information related to the address slot passed in mac_multi_addr_t.
745*2331Skrgopi  * mma_flags should be set to 0 in the call.
746*2331Skrgopi  * On return, mma_flags can take the following values:
747*2331Skrgopi  * 1) MMAC_SLOT_UNUSED
748*2331Skrgopi  * 2) MMAC_SLOT_USED | MMAC_VENDOR_ADDR
749*2331Skrgopi  * 3) MMAC_SLOT_UNUSED | MMAC_VENDOR_ADDR
750*2331Skrgopi  * 4) MMAC_SLOT_USED
751*2331Skrgopi  */
752*2331Skrgopi static int
753*2331Skrgopi bge_m_unicst_get(void *arg, mac_multi_addr_t *maddr)
754*2331Skrgopi {
755*2331Skrgopi 	bge_t *bgep = arg;		/* private device info	*/
756*2331Skrgopi 	mac_addr_slot_t slot;
757*2331Skrgopi 
758*2331Skrgopi 	slot = maddr->mma_slot;
759*2331Skrgopi 
760*2331Skrgopi 	if (slot < 0 || slot >= bgep->unicst_addr_total)
761*2331Skrgopi 		return (EINVAL);
762*2331Skrgopi 
763*2331Skrgopi 	mutex_enter(bgep->genlock);
764*2331Skrgopi 	if (bgep->curr_addr[slot + 1].set == B_TRUE) {
765*2331Skrgopi 		ethaddr_copy(bgep->curr_addr[slot + 1].addr,
766*2331Skrgopi 		    maddr->mma_addr);
767*2331Skrgopi 		maddr->mma_flags = MMAC_SLOT_USED;
768*2331Skrgopi 	} else {
769*2331Skrgopi 		maddr->mma_flags = MMAC_SLOT_UNUSED;
770*2331Skrgopi 	}
771*2331Skrgopi 	mutex_exit(bgep->genlock);
772*2331Skrgopi 
773*2331Skrgopi 	return (0);
774*2331Skrgopi }
775*2331Skrgopi 
776*2331Skrgopi /*
7771369Sdduvall  * Compute the index of the required bit in the multicast hash map.
7781369Sdduvall  * This must mirror the way the hardware actually does it!
7791369Sdduvall  * See Broadcom document 570X-PG102-R page 125.
7801369Sdduvall  */
7811369Sdduvall static uint32_t
7821369Sdduvall bge_hash_index(const uint8_t *mca)
7831369Sdduvall {
7841369Sdduvall 	uint32_t hash;
7851369Sdduvall 
7861369Sdduvall 	CRC32(hash, mca, ETHERADDRL, -1U, crc32_table);
7871369Sdduvall 
7881369Sdduvall 	return (hash);
7891369Sdduvall }
7901369Sdduvall 
7911369Sdduvall /*
7921369Sdduvall  *	bge_m_multicst_add() -- enable/disable a multicast address
7931369Sdduvall  */
7941369Sdduvall static int
7951369Sdduvall bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca)
7961369Sdduvall {
7971369Sdduvall 	bge_t *bgep = arg;		/* private device info	*/
7981369Sdduvall 	uint32_t hash;
7991369Sdduvall 	uint32_t index;
8001369Sdduvall 	uint32_t word;
8011369Sdduvall 	uint32_t bit;
8021369Sdduvall 	uint8_t *refp;
8031369Sdduvall 
8041369Sdduvall 	BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg,
8051369Sdduvall 		(add) ? "add" : "remove", ether_sprintf((void *)mca)));
8061369Sdduvall 
8071369Sdduvall 	/*
8081369Sdduvall 	 * Precalculate all required masks, pointers etc ...
8091369Sdduvall 	 */
8101369Sdduvall 	hash = bge_hash_index(mca);
8111369Sdduvall 	index = hash % BGE_HASH_TABLE_SIZE;
8121369Sdduvall 	word = index/32u;
8131369Sdduvall 	bit = 1 << (index % 32u);
8141369Sdduvall 	refp = &bgep->mcast_refs[index];
8151369Sdduvall 
8161369Sdduvall 	BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d",
8171369Sdduvall 		hash, index, word, bit, *refp));
8181369Sdduvall 
8191369Sdduvall 	/*
8201369Sdduvall 	 * We must set the appropriate bit in the hash map (and the
8211369Sdduvall 	 * corresponding h/w register) when the refcount goes from 0
8221369Sdduvall 	 * to >0, and clear it when the last ref goes away (refcount
8231369Sdduvall 	 * goes from >0 back to 0).  If we change the hash map, we
8241369Sdduvall 	 * must also update the chip's hardware map registers.
8251369Sdduvall 	 */
8261369Sdduvall 	mutex_enter(bgep->genlock);
8271865Sdilpreet 	if (!(bgep->progress & PROGRESS_INTR)) {
8281865Sdilpreet 		/* can happen during autorecovery */
8291865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
8301865Sdilpreet 		mutex_exit(bgep->genlock);
8311865Sdilpreet 		return (EIO);
8321865Sdilpreet 	}
8331369Sdduvall 	if (add) {
8341369Sdduvall 		if ((*refp)++ == 0) {
8351369Sdduvall 			bgep->mcast_hash[word] |= bit;
8361408Srandyf #ifdef BGE_IPMI_ASF
8371865Sdilpreet 			if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
8381408Srandyf #else
8391865Sdilpreet 			if (bge_chip_sync(bgep) == DDI_FAILURE) {
8401408Srandyf #endif
8411865Sdilpreet 				(void) bge_check_acc_handle(bgep,
8421865Sdilpreet 				    bgep->cfg_handle);
8431865Sdilpreet 				(void) bge_check_acc_handle(bgep,
8441865Sdilpreet 				    bgep->io_handle);
8451865Sdilpreet 				ddi_fm_service_impact(bgep->devinfo,
8461865Sdilpreet 				    DDI_SERVICE_DEGRADED);
8471865Sdilpreet 				mutex_exit(bgep->genlock);
8481865Sdilpreet 				return (EIO);
8491865Sdilpreet 			}
8501369Sdduvall 		}
8511369Sdduvall 	} else {
8521369Sdduvall 		if (--(*refp) == 0) {
8531369Sdduvall 			bgep->mcast_hash[word] &= ~bit;
8541408Srandyf #ifdef BGE_IPMI_ASF
8551865Sdilpreet 			if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
8561408Srandyf #else
8571865Sdilpreet 			if (bge_chip_sync(bgep) == DDI_FAILURE) {
8581408Srandyf #endif
8591865Sdilpreet 				(void) bge_check_acc_handle(bgep,
8601865Sdilpreet 				    bgep->cfg_handle);
8611865Sdilpreet 				(void) bge_check_acc_handle(bgep,
8621865Sdilpreet 				    bgep->io_handle);
8631865Sdilpreet 				ddi_fm_service_impact(bgep->devinfo,
8641865Sdilpreet 				    DDI_SERVICE_DEGRADED);
8651865Sdilpreet 				mutex_exit(bgep->genlock);
8661865Sdilpreet 				return (EIO);
8671865Sdilpreet 			}
8681369Sdduvall 		}
8691369Sdduvall 	}
8701369Sdduvall 	BGE_DEBUG(("bge_m_multicst($%p) done", arg));
8711865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
8721865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
8731865Sdilpreet 		mutex_exit(bgep->genlock);
8741865Sdilpreet 		return (EIO);
8751865Sdilpreet 	}
8761865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
8771865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
8781865Sdilpreet 		mutex_exit(bgep->genlock);
8791865Sdilpreet 		return (EIO);
8801865Sdilpreet 	}
8811369Sdduvall 	mutex_exit(bgep->genlock);
8821369Sdduvall 
8831369Sdduvall 	return (0);
8841369Sdduvall }
8851369Sdduvall 
8861369Sdduvall /*
8871369Sdduvall  * bge_m_promisc() -- set or reset promiscuous mode on the board
8881369Sdduvall  *
8891369Sdduvall  *	Program the hardware to enable/disable promiscuous and/or
8901369Sdduvall  *	receive-all-multicast modes.
8911369Sdduvall  */
8921369Sdduvall static int
8931369Sdduvall bge_m_promisc(void *arg, boolean_t on)
8941369Sdduvall {
8951369Sdduvall 	bge_t *bgep = arg;
8961369Sdduvall 
8971369Sdduvall 	BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on));
8981369Sdduvall 
8991369Sdduvall 	/*
9001369Sdduvall 	 * Store MAC layer specified mode and pass to chip layer to update h/w
9011369Sdduvall 	 */
9021369Sdduvall 	mutex_enter(bgep->genlock);
9031865Sdilpreet 	if (!(bgep->progress & PROGRESS_INTR)) {
9041865Sdilpreet 		/* can happen during autorecovery */
9051865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
9061865Sdilpreet 		mutex_exit(bgep->genlock);
9071865Sdilpreet 		return (EIO);
9081865Sdilpreet 	}
9091369Sdduvall 	bgep->promisc = on;
9101408Srandyf #ifdef BGE_IPMI_ASF
9111865Sdilpreet 	if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) {
9121408Srandyf #else
9131865Sdilpreet 	if (bge_chip_sync(bgep) == DDI_FAILURE) {
9141408Srandyf #endif
9151865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
9161865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
9171865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
9181865Sdilpreet 		mutex_exit(bgep->genlock);
9191865Sdilpreet 		return (EIO);
9201865Sdilpreet 	}
9211369Sdduvall 	BGE_DEBUG(("bge_m_promisc_set($%p) done", arg));
9221865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
9231865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
9241865Sdilpreet 		mutex_exit(bgep->genlock);
9251865Sdilpreet 		return (EIO);
9261865Sdilpreet 	}
9271865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
9281865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
9291865Sdilpreet 		mutex_exit(bgep->genlock);
9301865Sdilpreet 		return (EIO);
9311865Sdilpreet 	}
9321369Sdduvall 	mutex_exit(bgep->genlock);
9331369Sdduvall 	return (0);
9341369Sdduvall }
9351369Sdduvall 
9362311Sseb /*ARGSUSED*/
9372311Sseb static boolean_t
9382311Sseb bge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data)
9392311Sseb {
940*2331Skrgopi 	bge_t *bgep = arg;
941*2331Skrgopi 
9422311Sseb 	switch (cap) {
9432311Sseb 	case MAC_CAPAB_HCKSUM: {
9442311Sseb 		uint32_t *txflags = cap_data;
9452311Sseb 
9462311Sseb 		*txflags = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM;
9472311Sseb 		break;
9482311Sseb 	}
949*2331Skrgopi 
9502311Sseb 	case MAC_CAPAB_POLL:
9512311Sseb 		/*
9522311Sseb 		 * There's nothing for us to fill in, simply returning
9532311Sseb 		 * B_TRUE stating that we support polling is sufficient.
9542311Sseb 		 */
9552311Sseb 		break;
956*2331Skrgopi 
957*2331Skrgopi 	case MAC_CAPAB_MULTIADDRESS: {
958*2331Skrgopi 		multiaddress_capab_t	*mmacp = cap_data;
959*2331Skrgopi 
960*2331Skrgopi 		mutex_enter(bgep->genlock);
961*2331Skrgopi 		mmacp->maddr_naddr = bgep->unicst_addr_total;
962*2331Skrgopi 		mmacp->maddr_naddrfree = bgep->unicst_addr_avail;
963*2331Skrgopi 		/* No multiple factory addresses, set mma_flag to 0 */
964*2331Skrgopi 		mmacp->maddr_flag = 0;
965*2331Skrgopi 		mmacp->maddr_handle = bgep;
966*2331Skrgopi 		mmacp->maddr_add = bge_m_unicst_add;
967*2331Skrgopi 		mmacp->maddr_remove = bge_m_unicst_remove;
968*2331Skrgopi 		mmacp->maddr_modify = bge_m_unicst_modify;
969*2331Skrgopi 		mmacp->maddr_get = bge_m_unicst_get;
970*2331Skrgopi 		mmacp->maddr_reserve = NULL;
971*2331Skrgopi 		mutex_exit(bgep->genlock);
972*2331Skrgopi 		break;
973*2331Skrgopi 	}
974*2331Skrgopi 
9752311Sseb 	default:
9762311Sseb 		return (B_FALSE);
9772311Sseb 	}
9782311Sseb 	return (B_TRUE);
9792311Sseb }
9802311Sseb 
9811369Sdduvall /*
9821369Sdduvall  * Loopback ioctl code
9831369Sdduvall  */
9841369Sdduvall 
9851369Sdduvall static lb_property_t loopmodes[] = {
9861369Sdduvall 	{ normal,	"normal",	BGE_LOOP_NONE		},
9871369Sdduvall 	{ external,	"1000Mbps",	BGE_LOOP_EXTERNAL_1000	},
9881369Sdduvall 	{ external,	"100Mbps",	BGE_LOOP_EXTERNAL_100	},
9891369Sdduvall 	{ external,	"10Mbps",	BGE_LOOP_EXTERNAL_10	},
9901369Sdduvall 	{ internal,	"PHY",		BGE_LOOP_INTERNAL_PHY	},
9911369Sdduvall 	{ internal,	"MAC",		BGE_LOOP_INTERNAL_MAC	}
9921369Sdduvall };
9931369Sdduvall 
9941369Sdduvall static enum ioc_reply
9951369Sdduvall bge_set_loop_mode(bge_t *bgep, uint32_t mode)
9961369Sdduvall {
9971369Sdduvall 	const char *msg;
9981369Sdduvall 
9991369Sdduvall 	/*
10001369Sdduvall 	 * If the mode isn't being changed, there's nothing to do ...
10011369Sdduvall 	 */
10021369Sdduvall 	if (mode == bgep->param_loop_mode)
10031369Sdduvall 		return (IOC_ACK);
10041369Sdduvall 
10051369Sdduvall 	/*
10061369Sdduvall 	 * Validate the requested mode and prepare a suitable message
10071369Sdduvall 	 * to explain the link down/up cycle that the change will
10081369Sdduvall 	 * probably induce ...
10091369Sdduvall 	 */
10101369Sdduvall 	switch (mode) {
10111369Sdduvall 	default:
10121369Sdduvall 		return (IOC_INVAL);
10131369Sdduvall 
10141369Sdduvall 	case BGE_LOOP_NONE:
10151369Sdduvall 		msg = " (loopback disabled)";
10161369Sdduvall 		break;
10171369Sdduvall 
10181369Sdduvall 	case BGE_LOOP_EXTERNAL_1000:
10191369Sdduvall 	case BGE_LOOP_EXTERNAL_100:
10201369Sdduvall 	case BGE_LOOP_EXTERNAL_10:
10211369Sdduvall 		msg = " (external loopback selected)";
10221369Sdduvall 		break;
10231369Sdduvall 
10241369Sdduvall 	case BGE_LOOP_INTERNAL_PHY:
10251369Sdduvall 		msg = " (PHY internal loopback selected)";
10261369Sdduvall 		break;
10271369Sdduvall 
10281369Sdduvall 	case BGE_LOOP_INTERNAL_MAC:
10291369Sdduvall 		msg = " (MAC internal loopback selected)";
10301369Sdduvall 		break;
10311369Sdduvall 	}
10321369Sdduvall 
10331369Sdduvall 	/*
10341369Sdduvall 	 * All OK; tell the caller to reprogram
10351369Sdduvall 	 * the PHY and/or MAC for the new mode ...
10361369Sdduvall 	 */
10371369Sdduvall 	bgep->link_down_msg = bgep->link_up_msg = msg;
10381369Sdduvall 	bgep->param_loop_mode = mode;
10391369Sdduvall 	return (IOC_RESTART_ACK);
10401369Sdduvall }
10411369Sdduvall 
10421369Sdduvall static enum ioc_reply
10431369Sdduvall bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
10441369Sdduvall {
10451369Sdduvall 	lb_info_sz_t *lbsp;
10461369Sdduvall 	lb_property_t *lbpp;
10471369Sdduvall 	uint32_t *lbmp;
10481369Sdduvall 	int cmd;
10491369Sdduvall 
10501369Sdduvall 	_NOTE(ARGUNUSED(wq))
10511369Sdduvall 
10521369Sdduvall 	/*
10531369Sdduvall 	 * Validate format of ioctl
10541369Sdduvall 	 */
10551369Sdduvall 	if (mp->b_cont == NULL)
10561369Sdduvall 		return (IOC_INVAL);
10571369Sdduvall 
10581369Sdduvall 	cmd = iocp->ioc_cmd;
10591369Sdduvall 	switch (cmd) {
10601369Sdduvall 	default:
10611369Sdduvall 		/* NOTREACHED */
10621369Sdduvall 		bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd);
10631369Sdduvall 		return (IOC_INVAL);
10641369Sdduvall 
10651369Sdduvall 	case LB_GET_INFO_SIZE:
10661369Sdduvall 		if (iocp->ioc_count != sizeof (lb_info_sz_t))
10671369Sdduvall 			return (IOC_INVAL);
10681369Sdduvall 		lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr;
10691369Sdduvall 		*lbsp = sizeof (loopmodes);
10701369Sdduvall 		return (IOC_REPLY);
10711369Sdduvall 
10721369Sdduvall 	case LB_GET_INFO:
10731369Sdduvall 		if (iocp->ioc_count != sizeof (loopmodes))
10741369Sdduvall 			return (IOC_INVAL);
10751369Sdduvall 		lbpp = (lb_property_t *)mp->b_cont->b_rptr;
10761369Sdduvall 		bcopy(loopmodes, lbpp, sizeof (loopmodes));
10771369Sdduvall 		return (IOC_REPLY);
10781369Sdduvall 
10791369Sdduvall 	case LB_GET_MODE:
10801369Sdduvall 		if (iocp->ioc_count != sizeof (uint32_t))
10811369Sdduvall 			return (IOC_INVAL);
10821369Sdduvall 		lbmp = (uint32_t *)mp->b_cont->b_rptr;
10831369Sdduvall 		*lbmp = bgep->param_loop_mode;
10841369Sdduvall 		return (IOC_REPLY);
10851369Sdduvall 
10861369Sdduvall 	case LB_SET_MODE:
10871369Sdduvall 		if (iocp->ioc_count != sizeof (uint32_t))
10881369Sdduvall 			return (IOC_INVAL);
10891369Sdduvall 		lbmp = (uint32_t *)mp->b_cont->b_rptr;
10901369Sdduvall 		return (bge_set_loop_mode(bgep, *lbmp));
10911369Sdduvall 	}
10921369Sdduvall }
10931369Sdduvall 
10941369Sdduvall /*
10951369Sdduvall  * Specific bge IOCTLs, the gld module handles the generic ones.
10961369Sdduvall  */
10971369Sdduvall static void
10981369Sdduvall bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp)
10991369Sdduvall {
11001369Sdduvall 	bge_t *bgep = arg;
11011369Sdduvall 	struct iocblk *iocp;
11021369Sdduvall 	enum ioc_reply status;
11031369Sdduvall 	boolean_t need_privilege;
11041369Sdduvall 	int err;
11051369Sdduvall 	int cmd;
11061369Sdduvall 
11071369Sdduvall 	/*
11081369Sdduvall 	 * Validate the command before bothering with the mutex ...
11091369Sdduvall 	 */
11101369Sdduvall 	iocp = (struct iocblk *)mp->b_rptr;
11111369Sdduvall 	iocp->ioc_error = 0;
11121369Sdduvall 	need_privilege = B_TRUE;
11131369Sdduvall 	cmd = iocp->ioc_cmd;
11141369Sdduvall 	switch (cmd) {
11151369Sdduvall 	default:
11161369Sdduvall 		miocnak(wq, mp, 0, EINVAL);
11171369Sdduvall 		return;
11181369Sdduvall 
11191369Sdduvall 	case BGE_MII_READ:
11201369Sdduvall 	case BGE_MII_WRITE:
11211369Sdduvall 	case BGE_SEE_READ:
11221369Sdduvall 	case BGE_SEE_WRITE:
11231369Sdduvall 	case BGE_DIAG:
11241369Sdduvall 	case BGE_PEEK:
11251369Sdduvall 	case BGE_POKE:
11261369Sdduvall 	case BGE_PHY_RESET:
11271369Sdduvall 	case BGE_SOFT_RESET:
11281369Sdduvall 	case BGE_HARD_RESET:
11291369Sdduvall 		break;
11301369Sdduvall 
11311369Sdduvall 	case LB_GET_INFO_SIZE:
11321369Sdduvall 	case LB_GET_INFO:
11331369Sdduvall 	case LB_GET_MODE:
11341369Sdduvall 		need_privilege = B_FALSE;
11351369Sdduvall 		/* FALLTHRU */
11361369Sdduvall 	case LB_SET_MODE:
11371369Sdduvall 		break;
11381369Sdduvall 
11391369Sdduvall 	case ND_GET:
11401369Sdduvall 		need_privilege = B_FALSE;
11411369Sdduvall 		/* FALLTHRU */
11421369Sdduvall 	case ND_SET:
11431369Sdduvall 		break;
11441369Sdduvall 	}
11451369Sdduvall 
11461369Sdduvall 	if (need_privilege) {
11471369Sdduvall 		/*
11481369Sdduvall 		 * Check for specific net_config privilege on Solaris 10+.
11491369Sdduvall 		 * Otherwise just check for root access ...
11501369Sdduvall 		 */
11511369Sdduvall 		if (secpolicy_net_config != NULL)
11521369Sdduvall 			err = secpolicy_net_config(iocp->ioc_cr, B_FALSE);
11531369Sdduvall 		else
11541369Sdduvall 			err = drv_priv(iocp->ioc_cr);
11551369Sdduvall 		if (err != 0) {
11561369Sdduvall 			miocnak(wq, mp, 0, err);
11571369Sdduvall 			return;
11581369Sdduvall 		}
11591369Sdduvall 	}
11601369Sdduvall 
11611369Sdduvall 	mutex_enter(bgep->genlock);
11621865Sdilpreet 	if (!(bgep->progress & PROGRESS_INTR)) {
11631865Sdilpreet 		/* can happen during autorecovery */
11641865Sdilpreet 		mutex_exit(bgep->genlock);
11651865Sdilpreet 		miocnak(wq, mp, 0, EIO);
11661865Sdilpreet 		return;
11671865Sdilpreet 	}
11681369Sdduvall 
11691369Sdduvall 	switch (cmd) {
11701369Sdduvall 	default:
11711369Sdduvall 		_NOTE(NOTREACHED)
11721369Sdduvall 		status = IOC_INVAL;
11731369Sdduvall 		break;
11741369Sdduvall 
11751369Sdduvall 	case BGE_MII_READ:
11761369Sdduvall 	case BGE_MII_WRITE:
11771369Sdduvall 	case BGE_SEE_READ:
11781369Sdduvall 	case BGE_SEE_WRITE:
11791369Sdduvall 	case BGE_DIAG:
11801369Sdduvall 	case BGE_PEEK:
11811369Sdduvall 	case BGE_POKE:
11821369Sdduvall 	case BGE_PHY_RESET:
11831369Sdduvall 	case BGE_SOFT_RESET:
11841369Sdduvall 	case BGE_HARD_RESET:
11851369Sdduvall 		status = bge_chip_ioctl(bgep, wq, mp, iocp);
11861369Sdduvall 		break;
11871369Sdduvall 
11881369Sdduvall 	case LB_GET_INFO_SIZE:
11891369Sdduvall 	case LB_GET_INFO:
11901369Sdduvall 	case LB_GET_MODE:
11911369Sdduvall 	case LB_SET_MODE:
11921369Sdduvall 		status = bge_loop_ioctl(bgep, wq, mp, iocp);
11931369Sdduvall 		break;
11941369Sdduvall 
11951369Sdduvall 	case ND_GET:
11961369Sdduvall 	case ND_SET:
11971369Sdduvall 		status = bge_nd_ioctl(bgep, wq, mp, iocp);
11981369Sdduvall 		break;
11991369Sdduvall 	}
12001369Sdduvall 
12011369Sdduvall 	/*
12021369Sdduvall 	 * Do we need to reprogram the PHY and/or the MAC?
12031369Sdduvall 	 * Do it now, while we still have the mutex.
12041369Sdduvall 	 *
12051369Sdduvall 	 * Note: update the PHY first, 'cos it controls the
12061369Sdduvall 	 * speed/duplex parameters that the MAC code uses.
12071369Sdduvall 	 */
12081369Sdduvall 	switch (status) {
12091369Sdduvall 	case IOC_RESTART_REPLY:
12101369Sdduvall 	case IOC_RESTART_ACK:
12111865Sdilpreet 		if (bge_phys_update(bgep) != DDI_SUCCESS) {
12121865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
12131865Sdilpreet 			    DDI_SERVICE_DEGRADED);
12141865Sdilpreet 			status = IOC_INVAL;
12151865Sdilpreet 		}
12161408Srandyf #ifdef BGE_IPMI_ASF
12171865Sdilpreet 		if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) {
12181408Srandyf #else
12191865Sdilpreet 		if (bge_chip_sync(bgep) == DDI_FAILURE) {
12201408Srandyf #endif
12211865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
12221865Sdilpreet 			    DDI_SERVICE_DEGRADED);
12231865Sdilpreet 			status = IOC_INVAL;
12241865Sdilpreet 		}
12251369Sdduvall 		if (bgep->intr_type == DDI_INTR_TYPE_MSI)
12261369Sdduvall 			bge_chip_msi_trig(bgep);
12271369Sdduvall 		break;
12281369Sdduvall 	}
12291369Sdduvall 
12301865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
12311865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
12321865Sdilpreet 		status = IOC_INVAL;
12331865Sdilpreet 	}
12341865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
12351865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
12361865Sdilpreet 		status = IOC_INVAL;
12371865Sdilpreet 	}
12381369Sdduvall 	mutex_exit(bgep->genlock);
12391369Sdduvall 
12401369Sdduvall 	/*
12411369Sdduvall 	 * Finally, decide how to reply
12421369Sdduvall 	 */
12431369Sdduvall 	switch (status) {
12441369Sdduvall 	default:
12451369Sdduvall 	case IOC_INVAL:
12461369Sdduvall 		/*
12471369Sdduvall 		 * Error, reply with a NAK and EINVAL or the specified error
12481369Sdduvall 		 */
12491369Sdduvall 		miocnak(wq, mp, 0, iocp->ioc_error == 0 ?
12501369Sdduvall 			EINVAL : iocp->ioc_error);
12511369Sdduvall 		break;
12521369Sdduvall 
12531369Sdduvall 	case IOC_DONE:
12541369Sdduvall 		/*
12551369Sdduvall 		 * OK, reply already sent
12561369Sdduvall 		 */
12571369Sdduvall 		break;
12581369Sdduvall 
12591369Sdduvall 	case IOC_RESTART_ACK:
12601369Sdduvall 	case IOC_ACK:
12611369Sdduvall 		/*
12621369Sdduvall 		 * OK, reply with an ACK
12631369Sdduvall 		 */
12641369Sdduvall 		miocack(wq, mp, 0, 0);
12651369Sdduvall 		break;
12661369Sdduvall 
12671369Sdduvall 	case IOC_RESTART_REPLY:
12681369Sdduvall 	case IOC_REPLY:
12691369Sdduvall 		/*
12701369Sdduvall 		 * OK, send prepared reply as ACK or NAK
12711369Sdduvall 		 */
12721369Sdduvall 		mp->b_datap->db_type = iocp->ioc_error == 0 ?
12731369Sdduvall 			M_IOCACK : M_IOCNAK;
12741369Sdduvall 		qreply(wq, mp);
12751369Sdduvall 		break;
12761369Sdduvall 	}
12771369Sdduvall }
12781369Sdduvall 
12791369Sdduvall static void
12801369Sdduvall bge_m_resources(void *arg)
12811369Sdduvall {
12821369Sdduvall 	bge_t *bgep = arg;
12831369Sdduvall 	recv_ring_t *rrp;
12841369Sdduvall 	mac_rx_fifo_t mrf;
12851369Sdduvall 	int ring;
12861369Sdduvall 
12871369Sdduvall 	mutex_enter(bgep->genlock);
12881369Sdduvall 
12891369Sdduvall 	/*
12901369Sdduvall 	 * Register Rx rings as resources and save mac
12911369Sdduvall 	 * resource id for future reference
12921369Sdduvall 	 */
12931369Sdduvall 	mrf.mrf_type = MAC_RX_FIFO;
12941369Sdduvall 	mrf.mrf_blank = bge_chip_blank;
12951369Sdduvall 	mrf.mrf_arg = (void *)bgep;
12961369Sdduvall 	mrf.mrf_normal_blank_time = bge_rx_ticks_norm;
12971369Sdduvall 	mrf.mrf_normal_pkt_count = bge_rx_count_norm;
12981369Sdduvall 
12991369Sdduvall 	for (ring = 0; ring < bgep->chipid.rx_rings; ring++) {
13001369Sdduvall 		rrp = &bgep->recv[ring];
13012311Sseb 		rrp->handle = mac_resource_add(bgep->mh,
13021369Sdduvall 		    (mac_resource_t *)&mrf);
13031369Sdduvall 	}
13041369Sdduvall 
13051369Sdduvall 	mutex_exit(bgep->genlock);
13061369Sdduvall }
13071369Sdduvall 
13081369Sdduvall /*
13091369Sdduvall  * ========== Per-instance setup/teardown code ==========
13101369Sdduvall  */
13111369Sdduvall 
13121369Sdduvall #undef	BGE_DBG
13131369Sdduvall #define	BGE_DBG		BGE_DBG_INIT	/* debug flag for this code	*/
13141369Sdduvall 
13151369Sdduvall /*
13161369Sdduvall  * Utility routine to carve a slice off a chunk of allocated memory,
13171369Sdduvall  * updating the chunk descriptor accordingly.  The size of the slice
13181369Sdduvall  * is given by the product of the <qty> and <size> parameters.
13191369Sdduvall  */
13201369Sdduvall static void
13211369Sdduvall bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk,
13221369Sdduvall 	uint32_t qty, uint32_t size)
13231369Sdduvall {
13241369Sdduvall 	static uint32_t sequence = 0xbcd5704a;
13251369Sdduvall 	size_t totsize;
13261369Sdduvall 
13271369Sdduvall 	totsize = qty*size;
13281369Sdduvall 	ASSERT(size >= 0);
13291369Sdduvall 	ASSERT(totsize <= chunk->alength);
13301369Sdduvall 
13311369Sdduvall 	*slice = *chunk;
13321369Sdduvall 	slice->nslots = qty;
13331369Sdduvall 	slice->size = size;
13341369Sdduvall 	slice->alength = totsize;
13351369Sdduvall 	slice->token = ++sequence;
13361369Sdduvall 
13371369Sdduvall 	chunk->mem_va = (caddr_t)chunk->mem_va + totsize;
13381369Sdduvall 	chunk->alength -= totsize;
13391369Sdduvall 	chunk->offset += totsize;
13401369Sdduvall 	chunk->cookie.dmac_laddress += totsize;
13411369Sdduvall 	chunk->cookie.dmac_size -= totsize;
13421369Sdduvall }
13431369Sdduvall 
13441369Sdduvall /*
13451369Sdduvall  * Initialise the specified Receive Producer (Buffer) Ring, using
13461369Sdduvall  * the information in the <dma_area> descriptors that it contains
13471369Sdduvall  * to set up all the other fields. This routine should be called
13481369Sdduvall  * only once for each ring.
13491369Sdduvall  */
13501369Sdduvall static void
13511369Sdduvall bge_init_buff_ring(bge_t *bgep, uint64_t ring)
13521369Sdduvall {
13531369Sdduvall 	buff_ring_t *brp;
13541369Sdduvall 	bge_status_t *bsp;
13551369Sdduvall 	sw_rbd_t *srbdp;
13561369Sdduvall 	dma_area_t pbuf;
13571369Sdduvall 	uint32_t bufsize;
13581369Sdduvall 	uint32_t nslots;
13591369Sdduvall 	uint32_t slot;
13601369Sdduvall 	uint32_t split;
13611369Sdduvall 
13621369Sdduvall 	static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = {
13631369Sdduvall 		NIC_MEM_SHADOW_BUFF_STD,
13641369Sdduvall 		NIC_MEM_SHADOW_BUFF_JUMBO,
13651369Sdduvall 		NIC_MEM_SHADOW_BUFF_MINI
13661369Sdduvall 	};
13671369Sdduvall 	static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = {
13681369Sdduvall 		RECV_STD_PROD_INDEX_REG,
13691369Sdduvall 		RECV_JUMBO_PROD_INDEX_REG,
13701369Sdduvall 		RECV_MINI_PROD_INDEX_REG
13711369Sdduvall 	};
13721369Sdduvall 	static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = {
13731369Sdduvall 		STATUS_STD_BUFF_CONS_INDEX,
13741369Sdduvall 		STATUS_JUMBO_BUFF_CONS_INDEX,
13751369Sdduvall 		STATUS_MINI_BUFF_CONS_INDEX
13761369Sdduvall 	};
13771369Sdduvall 
13781369Sdduvall 	BGE_TRACE(("bge_init_buff_ring($%p, %d)",
13791369Sdduvall 		(void *)bgep, ring));
13801369Sdduvall 
13811369Sdduvall 	brp = &bgep->buff[ring];
13821369Sdduvall 	nslots = brp->desc.nslots;
13831369Sdduvall 	ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT);
13841369Sdduvall 	bufsize = brp->buf[0].size;
13851369Sdduvall 
13861369Sdduvall 	/*
13871369Sdduvall 	 * Set up the copy of the h/w RCB
13881369Sdduvall 	 *
13891369Sdduvall 	 * Note: unlike Send & Receive Return Rings, (where the max_len
13901369Sdduvall 	 * field holds the number of slots), in a Receive Buffer Ring
13911369Sdduvall 	 * this field indicates the size of each buffer in the ring.
13921369Sdduvall 	 */
13931369Sdduvall 	brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress;
13941369Sdduvall 	brp->hw_rcb.max_len = bufsize;
13951369Sdduvall 	brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
13961369Sdduvall 	brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring];
13971369Sdduvall 
13981369Sdduvall 	/*
13991369Sdduvall 	 * Other one-off initialisation of per-ring data
14001369Sdduvall 	 */
14011369Sdduvall 	brp->bgep = bgep;
14021369Sdduvall 	bsp = DMA_VPTR(bgep->status_block);
14031369Sdduvall 	brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]];
14041369Sdduvall 	brp->chip_mbx_reg = mailbox_regs[ring];
14051369Sdduvall 	mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER,
14061369Sdduvall 	    DDI_INTR_PRI(bgep->intr_pri));
14071369Sdduvall 
14081369Sdduvall 	/*
14091369Sdduvall 	 * Allocate the array of s/w Receive Buffer Descriptors
14101369Sdduvall 	 */
14111369Sdduvall 	srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP);
14121369Sdduvall 	brp->sw_rbds = srbdp;
14131369Sdduvall 
14141369Sdduvall 	/*
14151369Sdduvall 	 * Now initialise each array element once and for all
14161369Sdduvall 	 */
14171369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split) {
14181369Sdduvall 		pbuf = brp->buf[split];
14191369Sdduvall 		for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot)
14201369Sdduvall 			bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize);
14211369Sdduvall 		ASSERT(pbuf.alength == 0);
14221369Sdduvall 	}
14231369Sdduvall }
14241369Sdduvall 
14251369Sdduvall /*
14261369Sdduvall  * Clean up initialisation done above before the memory is freed
14271369Sdduvall  */
14281369Sdduvall static void
14291369Sdduvall bge_fini_buff_ring(bge_t *bgep, uint64_t ring)
14301369Sdduvall {
14311369Sdduvall 	buff_ring_t *brp;
14321369Sdduvall 	sw_rbd_t *srbdp;
14331369Sdduvall 
14341369Sdduvall 	BGE_TRACE(("bge_fini_buff_ring($%p, %d)",
14351369Sdduvall 		(void *)bgep, ring));
14361369Sdduvall 
14371369Sdduvall 	brp = &bgep->buff[ring];
14381369Sdduvall 	srbdp = brp->sw_rbds;
14391369Sdduvall 	kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp));
14401369Sdduvall 
14411369Sdduvall 	mutex_destroy(brp->rf_lock);
14421369Sdduvall }
14431369Sdduvall 
14441369Sdduvall /*
14451369Sdduvall  * Initialise the specified Receive (Return) Ring, using the
14461369Sdduvall  * information in the <dma_area> descriptors that it contains
14471369Sdduvall  * to set up all the other fields. This routine should be called
14481369Sdduvall  * only once for each ring.
14491369Sdduvall  */
14501369Sdduvall static void
14511369Sdduvall bge_init_recv_ring(bge_t *bgep, uint64_t ring)
14521369Sdduvall {
14531369Sdduvall 	recv_ring_t *rrp;
14541369Sdduvall 	bge_status_t *bsp;
14551369Sdduvall 	uint32_t nslots;
14561369Sdduvall 
14571369Sdduvall 	BGE_TRACE(("bge_init_recv_ring($%p, %d)",
14581369Sdduvall 		(void *)bgep, ring));
14591369Sdduvall 
14601369Sdduvall 	/*
14611369Sdduvall 	 * The chip architecture requires that receive return rings have
14621369Sdduvall 	 * 512 or 1024 or 2048 elements per ring.  See 570X-PG108-R page 103.
14631369Sdduvall 	 */
14641369Sdduvall 	rrp = &bgep->recv[ring];
14651369Sdduvall 	nslots = rrp->desc.nslots;
14661369Sdduvall 	ASSERT(nslots == 0 || nslots == 512 ||
14671369Sdduvall 		nslots == 1024 || nslots == 2048);
14681369Sdduvall 
14691369Sdduvall 	/*
14701369Sdduvall 	 * Set up the copy of the h/w RCB
14711369Sdduvall 	 */
14721369Sdduvall 	rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress;
14731369Sdduvall 	rrp->hw_rcb.max_len = nslots;
14741369Sdduvall 	rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
14751369Sdduvall 	rrp->hw_rcb.nic_ring_addr = 0;
14761369Sdduvall 
14771369Sdduvall 	/*
14781369Sdduvall 	 * Other one-off initialisation of per-ring data
14791369Sdduvall 	 */
14801369Sdduvall 	rrp->bgep = bgep;
14811369Sdduvall 	bsp = DMA_VPTR(bgep->status_block);
14821369Sdduvall 	rrp->prod_index_p = RECV_INDEX_P(bsp, ring);
14831369Sdduvall 	rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring);
14841369Sdduvall 	mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER,
14851369Sdduvall 	    DDI_INTR_PRI(bgep->intr_pri));
14861369Sdduvall }
14871369Sdduvall 
14881369Sdduvall 
14891369Sdduvall /*
14901369Sdduvall  * Clean up initialisation done above before the memory is freed
14911369Sdduvall  */
14921369Sdduvall static void
14931369Sdduvall bge_fini_recv_ring(bge_t *bgep, uint64_t ring)
14941369Sdduvall {
14951369Sdduvall 	recv_ring_t *rrp;
14961369Sdduvall 
14971369Sdduvall 	BGE_TRACE(("bge_fini_recv_ring($%p, %d)",
14981369Sdduvall 		(void *)bgep, ring));
14991369Sdduvall 
15001369Sdduvall 	rrp = &bgep->recv[ring];
15011369Sdduvall 	if (rrp->rx_softint)
15021369Sdduvall 		ddi_remove_softintr(rrp->rx_softint);
15031369Sdduvall 	mutex_destroy(rrp->rx_lock);
15041369Sdduvall }
15051369Sdduvall 
15061369Sdduvall /*
15071369Sdduvall  * Initialise the specified Send Ring, using the information in the
15081369Sdduvall  * <dma_area> descriptors that it contains to set up all the other
15091369Sdduvall  * fields. This routine should be called only once for each ring.
15101369Sdduvall  */
15111369Sdduvall static void
15121369Sdduvall bge_init_send_ring(bge_t *bgep, uint64_t ring)
15131369Sdduvall {
15141369Sdduvall 	send_ring_t *srp;
15151369Sdduvall 	bge_status_t *bsp;
15161369Sdduvall 	sw_sbd_t *ssbdp;
15171369Sdduvall 	dma_area_t desc;
15181369Sdduvall 	dma_area_t pbuf;
15191369Sdduvall 	uint32_t nslots;
15201369Sdduvall 	uint32_t slot;
15211369Sdduvall 	uint32_t split;
15221369Sdduvall 
15231369Sdduvall 	BGE_TRACE(("bge_init_send_ring($%p, %d)",
15241369Sdduvall 		(void *)bgep, ring));
15251369Sdduvall 
15261369Sdduvall 	/*
15271369Sdduvall 	 * The chip architecture requires that host-based send rings
15281369Sdduvall 	 * have 512 elements per ring.  See 570X-PG102-R page 56.
15291369Sdduvall 	 */
15301369Sdduvall 	srp = &bgep->send[ring];
15311369Sdduvall 	nslots = srp->desc.nslots;
15321369Sdduvall 	ASSERT(nslots == 0 || nslots == 512);
15331369Sdduvall 
15341369Sdduvall 	/*
15351369Sdduvall 	 * Set up the copy of the h/w RCB
15361369Sdduvall 	 */
15371369Sdduvall 	srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress;
15381369Sdduvall 	srp->hw_rcb.max_len = nslots;
15391369Sdduvall 	srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED;
15401369Sdduvall 	srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots);
15411369Sdduvall 
15421369Sdduvall 	/*
15431369Sdduvall 	 * Other one-off initialisation of per-ring data
15441369Sdduvall 	 */
15451369Sdduvall 	srp->bgep = bgep;
15461369Sdduvall 	bsp = DMA_VPTR(bgep->status_block);
15471369Sdduvall 	srp->cons_index_p = SEND_INDEX_P(bsp, ring);
15481369Sdduvall 	srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring);
15491369Sdduvall 	mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER,
15501369Sdduvall 	    DDI_INTR_PRI(bgep->intr_pri));
15511369Sdduvall 	mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER,
15521369Sdduvall 	    DDI_INTR_PRI(bgep->intr_pri));
15531369Sdduvall 
15541369Sdduvall 	/*
15551369Sdduvall 	 * Allocate the array of s/w Send Buffer Descriptors
15561369Sdduvall 	 */
15571369Sdduvall 	ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP);
15581369Sdduvall 	srp->sw_sbds = ssbdp;
15591369Sdduvall 
15601369Sdduvall 	/*
15611369Sdduvall 	 * Now initialise each array element once and for all
15621369Sdduvall 	 */
15631369Sdduvall 	desc = srp->desc;
15641369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split) {
15651369Sdduvall 		pbuf = srp->buf[split];
15661369Sdduvall 		for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) {
15671369Sdduvall 			bge_slice_chunk(&ssbdp->desc, &desc, 1,
15681369Sdduvall 				sizeof (bge_sbd_t));
15691369Sdduvall 			bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1,
15701369Sdduvall 				bgep->chipid.snd_buff_size);
15711369Sdduvall 		}
15721369Sdduvall 		ASSERT(pbuf.alength == 0);
15731369Sdduvall 	}
15741369Sdduvall 	ASSERT(desc.alength == 0);
15751369Sdduvall }
15761369Sdduvall 
15771369Sdduvall /*
15781369Sdduvall  * Clean up initialisation done above before the memory is freed
15791369Sdduvall  */
15801369Sdduvall static void
15811369Sdduvall bge_fini_send_ring(bge_t *bgep, uint64_t ring)
15821369Sdduvall {
15831369Sdduvall 	send_ring_t *srp;
15841369Sdduvall 	sw_sbd_t *ssbdp;
15851369Sdduvall 
15861369Sdduvall 	BGE_TRACE(("bge_fini_send_ring($%p, %d)",
15871369Sdduvall 		(void *)bgep, ring));
15881369Sdduvall 
15891369Sdduvall 	srp = &bgep->send[ring];
15901369Sdduvall 	ssbdp = srp->sw_sbds;
15911369Sdduvall 	kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp));
15921369Sdduvall 
15931369Sdduvall 	mutex_destroy(srp->tx_lock);
15941369Sdduvall 	mutex_destroy(srp->tc_lock);
15951369Sdduvall }
15961369Sdduvall 
15971369Sdduvall /*
15981369Sdduvall  * Initialise all transmit, receive, and buffer rings.
15991369Sdduvall  */
16001865Sdilpreet void
16011369Sdduvall bge_init_rings(bge_t *bgep)
16021369Sdduvall {
16031369Sdduvall 	uint64_t ring;
16041369Sdduvall 
16051369Sdduvall 	BGE_TRACE(("bge_init_rings($%p)", (void *)bgep));
16061369Sdduvall 
16071369Sdduvall 	/*
16081369Sdduvall 	 * Perform one-off initialisation of each ring ...
16091369Sdduvall 	 */
16101369Sdduvall 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
16111369Sdduvall 		bge_init_send_ring(bgep, ring);
16121369Sdduvall 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
16131369Sdduvall 		bge_init_recv_ring(bgep, ring);
16141369Sdduvall 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
16151369Sdduvall 		bge_init_buff_ring(bgep, ring);
16161369Sdduvall }
16171369Sdduvall 
16181369Sdduvall /*
16191369Sdduvall  * Undo the work of bge_init_rings() above before the memory is freed
16201369Sdduvall  */
16211865Sdilpreet void
16221369Sdduvall bge_fini_rings(bge_t *bgep)
16231369Sdduvall {
16241369Sdduvall 	uint64_t ring;
16251369Sdduvall 
16261369Sdduvall 	BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep));
16271369Sdduvall 
16281369Sdduvall 	for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring)
16291369Sdduvall 		bge_fini_buff_ring(bgep, ring);
16301369Sdduvall 	for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring)
16311369Sdduvall 		bge_fini_recv_ring(bgep, ring);
16321369Sdduvall 	for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring)
16331369Sdduvall 		bge_fini_send_ring(bgep, ring);
16341369Sdduvall }
16351369Sdduvall 
16361369Sdduvall /*
16371369Sdduvall  * Allocate an area of memory and a DMA handle for accessing it
16381369Sdduvall  */
16391369Sdduvall static int
16401369Sdduvall bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p,
16411369Sdduvall 	uint_t dma_flags, dma_area_t *dma_p)
16421369Sdduvall {
16431369Sdduvall 	caddr_t va;
16441369Sdduvall 	int err;
16451369Sdduvall 
16461369Sdduvall 	BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)",
16471369Sdduvall 		(void *)bgep, memsize, attr_p, dma_flags, dma_p));
16481369Sdduvall 
16491369Sdduvall 	/*
16501369Sdduvall 	 * Allocate handle
16511369Sdduvall 	 */
16521369Sdduvall 	err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr,
16531369Sdduvall 		DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl);
16541369Sdduvall 	if (err != DDI_SUCCESS)
16551369Sdduvall 		return (DDI_FAILURE);
16561369Sdduvall 
16571369Sdduvall 	/*
16581369Sdduvall 	 * Allocate memory
16591369Sdduvall 	 */
16601369Sdduvall 	err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p,
16611369Sdduvall 		dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING),
16621369Sdduvall 		DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl);
16631369Sdduvall 	if (err != DDI_SUCCESS)
16641369Sdduvall 		return (DDI_FAILURE);
16651369Sdduvall 
16661369Sdduvall 	/*
16671369Sdduvall 	 * Bind the two together
16681369Sdduvall 	 */
16691369Sdduvall 	dma_p->mem_va = va;
16701369Sdduvall 	err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL,
16711369Sdduvall 		va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL,
16721369Sdduvall 		&dma_p->cookie, &dma_p->ncookies);
16731369Sdduvall 
16741369Sdduvall 	BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies",
16751369Sdduvall 		dma_p->alength, err, dma_p->ncookies));
16761369Sdduvall 
16771369Sdduvall 	if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1)
16781369Sdduvall 		return (DDI_FAILURE);
16791369Sdduvall 
16801369Sdduvall 	dma_p->nslots = ~0U;
16811369Sdduvall 	dma_p->size = ~0U;
16821369Sdduvall 	dma_p->token = ~0U;
16831369Sdduvall 	dma_p->offset = 0;
16841369Sdduvall 	return (DDI_SUCCESS);
16851369Sdduvall }
16861369Sdduvall 
16871369Sdduvall /*
16881369Sdduvall  * Free one allocated area of DMAable memory
16891369Sdduvall  */
16901369Sdduvall static void
16911369Sdduvall bge_free_dma_mem(dma_area_t *dma_p)
16921369Sdduvall {
16931369Sdduvall 	if (dma_p->dma_hdl != NULL) {
16941369Sdduvall 		if (dma_p->ncookies) {
16951369Sdduvall 			(void) ddi_dma_unbind_handle(dma_p->dma_hdl);
16961369Sdduvall 			dma_p->ncookies = 0;
16971369Sdduvall 		}
16981369Sdduvall 		ddi_dma_free_handle(&dma_p->dma_hdl);
16991369Sdduvall 		dma_p->dma_hdl = NULL;
17001369Sdduvall 	}
17011369Sdduvall 
17021369Sdduvall 	if (dma_p->acc_hdl != NULL) {
17031369Sdduvall 		ddi_dma_mem_free(&dma_p->acc_hdl);
17041369Sdduvall 		dma_p->acc_hdl = NULL;
17051369Sdduvall 	}
17061369Sdduvall }
17071369Sdduvall 
17081369Sdduvall /*
17091369Sdduvall  * This function allocates all the transmit and receive buffers
17101369Sdduvall  * and descriptors, in four chunks (or one, if MONOLITHIC).
17111369Sdduvall  */
17121865Sdilpreet int
17131369Sdduvall bge_alloc_bufs(bge_t *bgep)
17141369Sdduvall {
17151369Sdduvall 	dma_area_t area;
17161369Sdduvall 	size_t rxbuffsize;
17171369Sdduvall 	size_t txbuffsize;
17181369Sdduvall 	size_t rxbuffdescsize;
17191369Sdduvall 	size_t rxdescsize;
17201369Sdduvall 	size_t txdescsize;
17211369Sdduvall 	uint64_t ring;
17221369Sdduvall 	uint64_t rx_rings = bgep->chipid.rx_rings;
17231369Sdduvall 	uint64_t tx_rings = bgep->chipid.tx_rings;
17241369Sdduvall 	int split;
17251369Sdduvall 	int err;
17261369Sdduvall 
17271369Sdduvall 	BGE_TRACE(("bge_alloc_bufs($%p)",
17281369Sdduvall 		(void *)bgep));
17291369Sdduvall 
17301908Sly149593 	rxbuffsize = BGE_STD_SLOTS_USED*bgep->chipid.std_buf_size;
17311369Sdduvall 	rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size;
17321369Sdduvall 	rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE;
17331369Sdduvall 
17341369Sdduvall 	txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size;
17351369Sdduvall 	txbuffsize *= tx_rings;
17361369Sdduvall 
17371369Sdduvall 	rxdescsize = rx_rings*bgep->chipid.recv_slots;
17381369Sdduvall 	rxdescsize *= sizeof (bge_rbd_t);
17391369Sdduvall 
17401369Sdduvall 	rxbuffdescsize = BGE_STD_SLOTS_USED;
17411369Sdduvall 	rxbuffdescsize += bgep->chipid.jumbo_slots;
17421369Sdduvall 	rxbuffdescsize += BGE_MINI_SLOTS_USED;
17431369Sdduvall 	rxbuffdescsize *= sizeof (bge_rbd_t);
17441369Sdduvall 
17451369Sdduvall 	txdescsize = tx_rings*BGE_SEND_SLOTS_USED;
17461369Sdduvall 	txdescsize *= sizeof (bge_sbd_t);
17471369Sdduvall 	txdescsize += sizeof (bge_statistics_t);
17481369Sdduvall 	txdescsize += sizeof (bge_status_t);
17491369Sdduvall 	txdescsize += BGE_STATUS_PADDING;
17501369Sdduvall 
17511369Sdduvall #if	BGE_MONOLITHIC
17521369Sdduvall 
17531369Sdduvall 	err = bge_alloc_dma_mem(bgep,
17541369Sdduvall 		rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize,
17551369Sdduvall 		&bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area);
17561369Sdduvall 	if (err != DDI_SUCCESS)
17571369Sdduvall 		return (DDI_FAILURE);
17581369Sdduvall 
17591369Sdduvall 	BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)",
17601369Sdduvall 		DMA_VPTR(area),
17611369Sdduvall 		(caddr_t)DMA_VPTR(area)+area.alength,
17621369Sdduvall 		area.cookie.dmac_laddress,
17631369Sdduvall 		area.cookie.dmac_laddress+area.alength));
17641369Sdduvall 
17651369Sdduvall 	bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize);
17661369Sdduvall 	bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize);
17671369Sdduvall 	bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize);
17681369Sdduvall 	bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize);
17691369Sdduvall 
17701369Sdduvall #else
17711369Sdduvall 	/*
17721369Sdduvall 	 * Allocate memory & handles for RX buffers
17731369Sdduvall 	 */
17741369Sdduvall 	ASSERT((rxbuffsize % BGE_SPLIT) == 0);
17751369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split) {
17761369Sdduvall 		err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT,
17771369Sdduvall 			&bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE,
17781369Sdduvall 			&bgep->rx_buff[split]);
17791369Sdduvall 		if (err != DDI_SUCCESS)
17801369Sdduvall 			return (DDI_FAILURE);
17811369Sdduvall 	}
17821369Sdduvall 
17831369Sdduvall 	/*
17841369Sdduvall 	 * Allocate memory & handles for TX buffers
17851369Sdduvall 	 */
17861369Sdduvall 	ASSERT((txbuffsize % BGE_SPLIT) == 0);
17871369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split) {
17881369Sdduvall 		err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT,
17891369Sdduvall 			&bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE,
17901369Sdduvall 			&bgep->tx_buff[split]);
17911369Sdduvall 		if (err != DDI_SUCCESS)
17921369Sdduvall 			return (DDI_FAILURE);
17931369Sdduvall 	}
17941369Sdduvall 
17951369Sdduvall 	/*
17961369Sdduvall 	 * Allocate memory & handles for receive return rings
17971369Sdduvall 	 */
17981369Sdduvall 	ASSERT((rxdescsize % rx_rings) == 0);
17991369Sdduvall 	for (split = 0; split < rx_rings; ++split) {
18001369Sdduvall 		err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings,
18011369Sdduvall 			&bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
18021369Sdduvall 			&bgep->rx_desc[split]);
18031369Sdduvall 		if (err != DDI_SUCCESS)
18041369Sdduvall 			return (DDI_FAILURE);
18051369Sdduvall 	}
18061369Sdduvall 
18071369Sdduvall 	/*
18081369Sdduvall 	 * Allocate memory & handles for buffer (producer) descriptor rings
18091369Sdduvall 	 */
18101369Sdduvall 	err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr,
18111369Sdduvall 		DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]);
18121369Sdduvall 	if (err != DDI_SUCCESS)
18131369Sdduvall 		return (DDI_FAILURE);
18141369Sdduvall 
18151369Sdduvall 	/*
18161369Sdduvall 	 * Allocate memory & handles for TX descriptor rings,
18171369Sdduvall 	 * status block, and statistics area
18181369Sdduvall 	 */
18191369Sdduvall 	err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr,
18201369Sdduvall 		DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc);
18211369Sdduvall 	if (err != DDI_SUCCESS)
18221369Sdduvall 		return (DDI_FAILURE);
18231369Sdduvall 
18241369Sdduvall #endif	/* BGE_MONOLITHIC */
18251369Sdduvall 
18261369Sdduvall 	/*
18271369Sdduvall 	 * Now carve up each of the allocated areas ...
18281369Sdduvall 	 */
18291369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split) {
18301369Sdduvall 		area = bgep->rx_buff[split];
18311369Sdduvall 		bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split],
18321369Sdduvall 			&area, BGE_STD_SLOTS_USED/BGE_SPLIT,
18331908Sly149593 			bgep->chipid.std_buf_size);
18341369Sdduvall 		bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split],
18351369Sdduvall 			&area, bgep->chipid.jumbo_slots/BGE_SPLIT,
18361369Sdduvall 			bgep->chipid.recv_jumbo_size);
18371369Sdduvall 		bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split],
18381369Sdduvall 			&area, BGE_MINI_SLOTS_USED/BGE_SPLIT,
18391369Sdduvall 			BGE_MINI_BUFF_SIZE);
18401369Sdduvall 		ASSERT(area.alength >= 0);
18411369Sdduvall 	}
18421369Sdduvall 
18431369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split) {
18441369Sdduvall 		area = bgep->tx_buff[split];
18451369Sdduvall 		for (ring = 0; ring < tx_rings; ++ring)
18461369Sdduvall 			bge_slice_chunk(&bgep->send[ring].buf[split],
18471369Sdduvall 				&area, BGE_SEND_SLOTS_USED/BGE_SPLIT,
18481369Sdduvall 				bgep->chipid.snd_buff_size);
18491369Sdduvall 		for (; ring < BGE_SEND_RINGS_MAX; ++ring)
18501369Sdduvall 			bge_slice_chunk(&bgep->send[ring].buf[split],
18511369Sdduvall 				&area, 0/BGE_SPLIT,
18521369Sdduvall 				bgep->chipid.snd_buff_size);
18531369Sdduvall 		ASSERT(area.alength >= 0);
18541369Sdduvall 	}
18551369Sdduvall 
18561369Sdduvall 	for (ring = 0; ring < rx_rings; ++ring)
18571369Sdduvall 		bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring],
18581369Sdduvall 			bgep->chipid.recv_slots, sizeof (bge_rbd_t));
18591369Sdduvall 
18601369Sdduvall 	area = bgep->rx_desc[rx_rings];
18611369Sdduvall 	for (; ring < BGE_RECV_RINGS_MAX; ++ring)
18621369Sdduvall 		bge_slice_chunk(&bgep->recv[ring].desc, &area,
18631369Sdduvall 			0, sizeof (bge_rbd_t));
18641369Sdduvall 	bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area,
18651369Sdduvall 		BGE_STD_SLOTS_USED, sizeof (bge_rbd_t));
18661369Sdduvall 	bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area,
18671369Sdduvall 		bgep->chipid.jumbo_slots, sizeof (bge_rbd_t));
18681369Sdduvall 	bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area,
18691369Sdduvall 		BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t));
18701369Sdduvall 	ASSERT(area.alength == 0);
18711369Sdduvall 
18721369Sdduvall 	area = bgep->tx_desc;
18731369Sdduvall 	for (ring = 0; ring < tx_rings; ++ring)
18741369Sdduvall 		bge_slice_chunk(&bgep->send[ring].desc, &area,
18751369Sdduvall 			BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t));
18761369Sdduvall 	for (; ring < BGE_SEND_RINGS_MAX; ++ring)
18771369Sdduvall 		bge_slice_chunk(&bgep->send[ring].desc, &area,
18781369Sdduvall 			0, sizeof (bge_sbd_t));
18791369Sdduvall 	bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t));
18801369Sdduvall 	bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t));
18811369Sdduvall 	ASSERT(area.alength == BGE_STATUS_PADDING);
18821369Sdduvall 	DMA_ZERO(bgep->status_block);
18831369Sdduvall 
18841369Sdduvall 	return (DDI_SUCCESS);
18851369Sdduvall }
18861369Sdduvall 
18871369Sdduvall /*
18881369Sdduvall  * This routine frees the transmit and receive buffers and descriptors.
18891369Sdduvall  * Make sure the chip is stopped before calling it!
18901369Sdduvall  */
18911865Sdilpreet void
18921369Sdduvall bge_free_bufs(bge_t *bgep)
18931369Sdduvall {
18941369Sdduvall 	int split;
18951369Sdduvall 
18961369Sdduvall 	BGE_TRACE(("bge_free_bufs($%p)",
18971369Sdduvall 		(void *)bgep));
18981369Sdduvall 
18991369Sdduvall #if	BGE_MONOLITHIC
19001369Sdduvall 	bge_free_dma_mem(&bgep->rx_buff[0]);
19011369Sdduvall #else
19021369Sdduvall 	bge_free_dma_mem(&bgep->tx_desc);
19031369Sdduvall 	for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split)
19041369Sdduvall 		bge_free_dma_mem(&bgep->rx_desc[split]);
19051369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split)
19061369Sdduvall 		bge_free_dma_mem(&bgep->tx_buff[split]);
19071369Sdduvall 	for (split = 0; split < BGE_SPLIT; ++split)
19081369Sdduvall 		bge_free_dma_mem(&bgep->rx_buff[split]);
19091369Sdduvall #endif	/* BGE_MONOLITHIC */
19101369Sdduvall }
19111369Sdduvall 
19121369Sdduvall /*
19131369Sdduvall  * Determine (initial) MAC address ("BIA") to use for this interface
19141369Sdduvall  */
19151369Sdduvall 
19161369Sdduvall static void
19171369Sdduvall bge_find_mac_address(bge_t *bgep, chip_id_t *cidp)
19181369Sdduvall {
19191369Sdduvall 	struct ether_addr sysaddr;
19201369Sdduvall 	char propbuf[8];		/* "true" or "false", plus NUL	*/
19211369Sdduvall 	uchar_t *bytes;
19221369Sdduvall 	int *ints;
19231369Sdduvall 	uint_t nelts;
19241369Sdduvall 	int err;
19251369Sdduvall 
19261369Sdduvall 	BGE_TRACE(("bge_find_mac_address($%p)",
19271369Sdduvall 		(void *)bgep));
19281369Sdduvall 
19291369Sdduvall 	BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)",
19301369Sdduvall 		cidp->hw_mac_addr,
19311369Sdduvall 		ether_sprintf((void *)cidp->vendor_addr.addr),
19321369Sdduvall 		cidp->vendor_addr.set ? "" : "not "));
19331369Sdduvall 
19341369Sdduvall 	/*
19351369Sdduvall 	 * The "vendor's factory-set address" may already have
19361369Sdduvall 	 * been extracted from the chip, but if the property
19371369Sdduvall 	 * "local-mac-address" is set we use that instead.  It
19381369Sdduvall 	 * will normally be set by OBP, but it could also be
19391369Sdduvall 	 * specified in a .conf file(!)
19401369Sdduvall 	 *
19411369Sdduvall 	 * There doesn't seem to be a way to define byte-array
19421369Sdduvall 	 * properties in a .conf, so we check whether it looks
19431369Sdduvall 	 * like an array of 6 ints instead.
19441369Sdduvall 	 *
19451369Sdduvall 	 * Then, we check whether it looks like an array of 6
19461369Sdduvall 	 * bytes (which it should, if OBP set it).  If we can't
19471369Sdduvall 	 * make sense of it either way, we'll ignore it.
19481369Sdduvall 	 */
19491369Sdduvall 	err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo,
19501369Sdduvall 		DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts);
19511369Sdduvall 	if (err == DDI_PROP_SUCCESS) {
19521369Sdduvall 		if (nelts == ETHERADDRL) {
19531369Sdduvall 			while (nelts--)
19541369Sdduvall 				cidp->vendor_addr.addr[nelts] = ints[nelts];
1955*2331Skrgopi 			cidp->vendor_addr.set = B_TRUE;
19561369Sdduvall 		}
19571369Sdduvall 		ddi_prop_free(ints);
19581369Sdduvall 	}
19591369Sdduvall 
19601369Sdduvall 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo,
19611369Sdduvall 		DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts);
19621369Sdduvall 	if (err == DDI_PROP_SUCCESS) {
19631369Sdduvall 		if (nelts == ETHERADDRL) {
19641369Sdduvall 			while (nelts--)
19651369Sdduvall 				cidp->vendor_addr.addr[nelts] = bytes[nelts];
1966*2331Skrgopi 			cidp->vendor_addr.set = B_TRUE;
19671369Sdduvall 		}
19681369Sdduvall 		ddi_prop_free(bytes);
19691369Sdduvall 	}
19701369Sdduvall 
19711369Sdduvall 	BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)",
19721369Sdduvall 		ether_sprintf((void *)cidp->vendor_addr.addr),
19731369Sdduvall 		cidp->vendor_addr.set ? "" : "not "));
19741369Sdduvall 
19751369Sdduvall 	/*
19761369Sdduvall 	 * Look up the OBP property "local-mac-address?".  Note that even
19771369Sdduvall 	 * though its value is a string (which should be "true" or "false"),
19781369Sdduvall 	 * it can't be decoded by ddi_prop_lookup_string(9F).  So, we zero
19791369Sdduvall 	 * the buffer first and then fetch the property as an untyped array;
19801369Sdduvall 	 * this may or may not include a final NUL, but since there will
19811369Sdduvall 	 * always be one left at the end of the buffer we can now treat it
19821369Sdduvall 	 * as a string anyway.
19831369Sdduvall 	 */
19841369Sdduvall 	nelts = sizeof (propbuf);
19851369Sdduvall 	bzero(propbuf, nelts--);
19861369Sdduvall 	err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo,
19871369Sdduvall 		DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts);
19881369Sdduvall 
19891369Sdduvall 	/*
19901369Sdduvall 	 * Now, if the address still isn't set from the hardware (SEEPROM)
19911369Sdduvall 	 * or the OBP or .conf property, OR if the user has foolishly set
19921369Sdduvall 	 * 'local-mac-address? = false', use "the system address" instead
19931369Sdduvall 	 * (but only if it's non-null i.e. has been set from the IDPROM).
19941369Sdduvall 	 */
1995*2331Skrgopi 	if (cidp->vendor_addr.set == B_FALSE || strcmp(propbuf, "false") == 0)
19961369Sdduvall 		if (localetheraddr(NULL, &sysaddr) != 0) {
19971369Sdduvall 			ethaddr_copy(&sysaddr, cidp->vendor_addr.addr);
1998*2331Skrgopi 			cidp->vendor_addr.set = B_TRUE;
19991369Sdduvall 		}
20001369Sdduvall 
20011369Sdduvall 	BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)",
20021369Sdduvall 		ether_sprintf((void *)cidp->vendor_addr.addr),
20031369Sdduvall 		cidp->vendor_addr.set ? "" : "not "));
20041369Sdduvall 
20051369Sdduvall 	/*
20061369Sdduvall 	 * Finally(!), if there's a valid "mac-address" property (created
20071369Sdduvall 	 * if we netbooted from this interface), we must use this instead
20081369Sdduvall 	 * of any of the above to ensure that the NFS/install server doesn't
20091369Sdduvall 	 * get confused by the address changing as Solaris takes over!
20101369Sdduvall 	 */
20111369Sdduvall 	err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo,
20121369Sdduvall 		DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts);
20131369Sdduvall 	if (err == DDI_PROP_SUCCESS) {
20141369Sdduvall 		if (nelts == ETHERADDRL) {
20151369Sdduvall 			while (nelts--)
20161369Sdduvall 				cidp->vendor_addr.addr[nelts] = bytes[nelts];
2017*2331Skrgopi 			cidp->vendor_addr.set = B_TRUE;
20181369Sdduvall 		}
20191369Sdduvall 		ddi_prop_free(bytes);
20201369Sdduvall 	}
20211369Sdduvall 
20221369Sdduvall 	BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)",
20231369Sdduvall 		ether_sprintf((void *)cidp->vendor_addr.addr),
20241369Sdduvall 		cidp->vendor_addr.set ? "" : "not "));
20251369Sdduvall }
20261369Sdduvall 
20271865Sdilpreet 
20281865Sdilpreet /*ARGSUSED*/
20291865Sdilpreet int
20301865Sdilpreet bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle)
20311865Sdilpreet {
20321865Sdilpreet 	ddi_fm_error_t de;
20331865Sdilpreet 
20341865Sdilpreet 	ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
20351865Sdilpreet 	ddi_fm_acc_err_clear(handle, DDI_FME_VERSION);
20361865Sdilpreet 	return (de.fme_status);
20371865Sdilpreet }
20381865Sdilpreet 
20391865Sdilpreet /*ARGSUSED*/
20401865Sdilpreet int
20411865Sdilpreet bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle)
20421865Sdilpreet {
20431865Sdilpreet 	ddi_fm_error_t de;
20441865Sdilpreet 
20451865Sdilpreet 	ASSERT(bgep->progress & PROGRESS_BUFS);
20461865Sdilpreet 	ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
20471865Sdilpreet 	return (de.fme_status);
20481865Sdilpreet }
20491865Sdilpreet 
20501865Sdilpreet /*
20511865Sdilpreet  * The IO fault service error handling callback function
20521865Sdilpreet  */
20531865Sdilpreet /*ARGSUSED*/
20541865Sdilpreet static int
20551865Sdilpreet bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
20561865Sdilpreet {
20571865Sdilpreet 	/*
20581865Sdilpreet 	 * as the driver can always deal with an error in any dma or
20591865Sdilpreet 	 * access handle, we can just return the fme_status value.
20601865Sdilpreet 	 */
20611865Sdilpreet 	pci_ereport_post(dip, err, NULL);
20621865Sdilpreet 	return (err->fme_status);
20631865Sdilpreet }
20641865Sdilpreet 
20651865Sdilpreet static void
20661865Sdilpreet bge_fm_init(bge_t *bgep)
20671865Sdilpreet {
20681865Sdilpreet 	ddi_iblock_cookie_t iblk;
20691865Sdilpreet 
20701865Sdilpreet 	/* Only register with IO Fault Services if we have some capability */
20711865Sdilpreet 	if (bgep->fm_capabilities) {
20721865Sdilpreet 		bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
20731865Sdilpreet 		bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC;
20741865Sdilpreet 		dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
20751865Sdilpreet 
20761865Sdilpreet 		/* Register capabilities with IO Fault Services */
20771865Sdilpreet 		ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk);
20781865Sdilpreet 
20791865Sdilpreet 		/*
20801865Sdilpreet 		 * Initialize pci ereport capabilities if ereport capable
20811865Sdilpreet 		 */
20821865Sdilpreet 		if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) ||
20831865Sdilpreet 		    DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
20841865Sdilpreet 			pci_ereport_setup(bgep->devinfo);
20851865Sdilpreet 
20861865Sdilpreet 		/*
20871865Sdilpreet 		 * Register error callback if error callback capable
20881865Sdilpreet 		 */
20891865Sdilpreet 		if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
20901865Sdilpreet 			ddi_fm_handler_register(bgep->devinfo,
20911865Sdilpreet 			bge_fm_error_cb, (void*) bgep);
20921865Sdilpreet 	} else {
20931865Sdilpreet 		/*
20941865Sdilpreet 		 * These fields have to be cleared of FMA if there are no
20951865Sdilpreet 		 * FMA capabilities at runtime.
20961865Sdilpreet 		 */
20971865Sdilpreet 		bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
20981865Sdilpreet 		bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
20991865Sdilpreet 		dma_attr.dma_attr_flags = 0;
21001865Sdilpreet 	}
21011865Sdilpreet }
21021865Sdilpreet 
21031865Sdilpreet static void
21041865Sdilpreet bge_fm_fini(bge_t *bgep)
21051865Sdilpreet {
21061865Sdilpreet 	/* Only unregister FMA capabilities if we registered some */
21071865Sdilpreet 	if (bgep->fm_capabilities) {
21081865Sdilpreet 
21091865Sdilpreet 		/*
21101865Sdilpreet 		 * Release any resources allocated by pci_ereport_setup()
21111865Sdilpreet 		 */
21121865Sdilpreet 		if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) ||
21131865Sdilpreet 		    DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
21141865Sdilpreet 			pci_ereport_teardown(bgep->devinfo);
21151865Sdilpreet 
21161865Sdilpreet 		/*
21171865Sdilpreet 		 * Un-register error callback if error callback capable
21181865Sdilpreet 		 */
21191865Sdilpreet 		if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities))
21201865Sdilpreet 			ddi_fm_handler_unregister(bgep->devinfo);
21211865Sdilpreet 
21221865Sdilpreet 		/* Unregister from IO Fault Services */
21231865Sdilpreet 		ddi_fm_fini(bgep->devinfo);
21241865Sdilpreet 	}
21251865Sdilpreet }
21261865Sdilpreet 
21271369Sdduvall static void
21281408Srandyf #ifdef BGE_IPMI_ASF
21291408Srandyf bge_unattach(bge_t *bgep, uint_t asf_mode)
21301408Srandyf #else
21311369Sdduvall bge_unattach(bge_t *bgep)
21321408Srandyf #endif
21331369Sdduvall {
21341369Sdduvall 	BGE_TRACE(("bge_unattach($%p)",
21351369Sdduvall 		(void *)bgep));
21361369Sdduvall 
21371369Sdduvall 	/*
21381369Sdduvall 	 * Flag that no more activity may be initiated
21391369Sdduvall 	 */
21401369Sdduvall 	bgep->progress &= ~PROGRESS_READY;
21411369Sdduvall 
21421369Sdduvall 	/*
21431369Sdduvall 	 * Quiesce the PHY and MAC (leave it reset but still powered).
21441369Sdduvall 	 * Clean up and free all BGE data structures
21451369Sdduvall 	 */
21461369Sdduvall 	if (bgep->cyclic_id) {
21471369Sdduvall 		mutex_enter(&cpu_lock);
21481369Sdduvall 		cyclic_remove(bgep->cyclic_id);
21491369Sdduvall 		mutex_exit(&cpu_lock);
21501369Sdduvall 	}
21511369Sdduvall 	if (bgep->progress & PROGRESS_KSTATS)
21521369Sdduvall 		bge_fini_kstats(bgep);
21531369Sdduvall 	if (bgep->progress & PROGRESS_NDD)
21541369Sdduvall 		bge_nd_cleanup(bgep);
21551369Sdduvall 	if (bgep->progress & PROGRESS_PHY)
21561369Sdduvall 		bge_phys_reset(bgep);
21571369Sdduvall 	if (bgep->progress & PROGRESS_HWINT) {
21581369Sdduvall 		mutex_enter(bgep->genlock);
21591408Srandyf #ifdef BGE_IPMI_ASF
21601865Sdilpreet 		if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS)
21611865Sdilpreet #else
21621865Sdilpreet 		if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS)
21631865Sdilpreet #endif
21641865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
21651865Sdilpreet 			    DDI_SERVICE_UNAFFECTED);
21661865Sdilpreet #ifdef BGE_IPMI_ASF
21671408Srandyf 		if (bgep->asf_enabled) {
21681408Srandyf 			/*
21691408Srandyf 			 * This register has been overlaid. We restore its
21701408Srandyf 			 * initial value here.
21711408Srandyf 			 */
21721408Srandyf 			bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR,
21731408Srandyf 			    BGE_NIC_DATA_SIG);
21741408Srandyf 		}
21751408Srandyf #endif
21761865Sdilpreet 		if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK)
21771865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
21781865Sdilpreet 			    DDI_SERVICE_UNAFFECTED);
21791865Sdilpreet 		if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
21801865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
21811865Sdilpreet 			    DDI_SERVICE_UNAFFECTED);
21821369Sdduvall 		mutex_exit(bgep->genlock);
21831369Sdduvall 	}
21841369Sdduvall 	if (bgep->progress & PROGRESS_INTR) {
21851865Sdilpreet 		bge_intr_disable(bgep);
21861369Sdduvall 		bge_fini_rings(bgep);
21871369Sdduvall 	}
21881865Sdilpreet 	if (bgep->progress & PROGRESS_HWINT) {
21891865Sdilpreet 		bge_rem_intrs(bgep);
21901865Sdilpreet 		rw_destroy(bgep->errlock);
21911865Sdilpreet 		mutex_destroy(bgep->softintrlock);
21921865Sdilpreet 		mutex_destroy(bgep->genlock);
21931865Sdilpreet 	}
21941369Sdduvall 	if (bgep->progress & PROGRESS_FACTOTUM)
21951369Sdduvall 		ddi_remove_softintr(bgep->factotum_id);
21961369Sdduvall 	if (bgep->progress & PROGRESS_RESCHED)
21971369Sdduvall 		ddi_remove_softintr(bgep->resched_id);
21981865Sdilpreet 	if (bgep->progress & PROGRESS_BUFS)
21991865Sdilpreet 		bge_free_bufs(bgep);
22001369Sdduvall 	if (bgep->progress & PROGRESS_REGS)
22011369Sdduvall 		ddi_regs_map_free(&bgep->io_handle);
22021369Sdduvall 	if (bgep->progress & PROGRESS_CFG)
22031369Sdduvall 		pci_config_teardown(&bgep->cfg_handle);
22041369Sdduvall 
22051865Sdilpreet 	bge_fm_fini(bgep);
22061865Sdilpreet 
22071369Sdduvall 	ddi_remove_minor_node(bgep->devinfo, NULL);
22081369Sdduvall 	kmem_free(bgep, sizeof (*bgep));
22091369Sdduvall }
22101369Sdduvall 
22111369Sdduvall static int
22121369Sdduvall bge_resume(dev_info_t *devinfo)
22131369Sdduvall {
22141369Sdduvall 	bge_t *bgep;				/* Our private data	*/
22151369Sdduvall 	chip_id_t *cidp;
22161369Sdduvall 	chip_id_t chipid;
22171369Sdduvall 
22181369Sdduvall 	bgep = ddi_get_driver_private(devinfo);
22191369Sdduvall 	if (bgep == NULL)
22201369Sdduvall 		return (DDI_FAILURE);
22211369Sdduvall 
22221369Sdduvall 	/*
22231369Sdduvall 	 * Refuse to resume if the data structures aren't consistent
22241369Sdduvall 	 */
22251369Sdduvall 	if (bgep->devinfo != devinfo)
22261369Sdduvall 		return (DDI_FAILURE);
22271369Sdduvall 
22281408Srandyf #ifdef BGE_IPMI_ASF
22291408Srandyf 	/*
22301408Srandyf 	 * Power management hasn't been supported in BGE now. If you
22311408Srandyf 	 * want to implement it, please add the ASF/IPMI related
22321408Srandyf 	 * code here.
22331408Srandyf 	 */
22341408Srandyf 
22351408Srandyf #endif
22361408Srandyf 
22371369Sdduvall 	/*
22381369Sdduvall 	 * Read chip ID & set up config space command register(s)
22391369Sdduvall 	 * Refuse to resume if the chip has changed its identity!
22401369Sdduvall 	 */
22411369Sdduvall 	cidp = &bgep->chipid;
22421865Sdilpreet 	mutex_enter(bgep->genlock);
22431369Sdduvall 	bge_chip_cfg_init(bgep, &chipid, B_FALSE);
22441865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
22451865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
22461865Sdilpreet 		mutex_exit(bgep->genlock);
22471865Sdilpreet 		return (DDI_FAILURE);
22481865Sdilpreet 	}
22491865Sdilpreet 	mutex_exit(bgep->genlock);
22501369Sdduvall 	if (chipid.vendor != cidp->vendor)
22511369Sdduvall 		return (DDI_FAILURE);
22521369Sdduvall 	if (chipid.device != cidp->device)
22531369Sdduvall 		return (DDI_FAILURE);
22541369Sdduvall 	if (chipid.revision != cidp->revision)
22551369Sdduvall 		return (DDI_FAILURE);
22561369Sdduvall 	if (chipid.asic_rev != cidp->asic_rev)
22571369Sdduvall 		return (DDI_FAILURE);
22581369Sdduvall 
22591369Sdduvall 	/*
22601369Sdduvall 	 * All OK, reinitialise h/w & kick off GLD scheduling
22611369Sdduvall 	 */
22621369Sdduvall 	mutex_enter(bgep->genlock);
22631865Sdilpreet 	if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) {
22641865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
22651865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
22661865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
22671865Sdilpreet 		mutex_exit(bgep->genlock);
22681865Sdilpreet 		return (DDI_FAILURE);
22691865Sdilpreet 	}
22701865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
22711865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
22721865Sdilpreet 		mutex_exit(bgep->genlock);
22731865Sdilpreet 		return (DDI_FAILURE);
22741865Sdilpreet 	}
22751865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
22761865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
22771865Sdilpreet 		mutex_exit(bgep->genlock);
22781865Sdilpreet 		return (DDI_FAILURE);
22791865Sdilpreet 	}
22801369Sdduvall 	mutex_exit(bgep->genlock);
22811369Sdduvall 	return (DDI_SUCCESS);
22821369Sdduvall }
22831369Sdduvall 
22841369Sdduvall /*
22851369Sdduvall  * attach(9E) -- Attach a device to the system
22861369Sdduvall  *
22871369Sdduvall  * Called once for each board successfully probed.
22881369Sdduvall  */
22891369Sdduvall static int
22901369Sdduvall bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd)
22911369Sdduvall {
22921369Sdduvall 	bge_t *bgep;				/* Our private data	*/
22932311Sseb 	mac_register_t *macp;
22941369Sdduvall 	chip_id_t *cidp;
22951369Sdduvall 	cyc_handler_t cychand;
22961369Sdduvall 	cyc_time_t cyctime;
22971369Sdduvall 	caddr_t regs;
22981369Sdduvall 	int instance;
22991369Sdduvall 	int err;
23001369Sdduvall 	int intr_types;
23011408Srandyf #ifdef BGE_IPMI_ASF
23021408Srandyf 	uint32_t mhcrValue;
23031408Srandyf #endif
23041369Sdduvall 
23051369Sdduvall 	instance = ddi_get_instance(devinfo);
23061369Sdduvall 
23071369Sdduvall 	BGE_GTRACE(("bge_attach($%p, %d) instance %d",
23081369Sdduvall 		(void *)devinfo, cmd, instance));
23091369Sdduvall 	BGE_BRKPT(NULL, "bge_attach");
23101369Sdduvall 
23111369Sdduvall 	switch (cmd) {
23121369Sdduvall 	default:
23131369Sdduvall 		return (DDI_FAILURE);
23141369Sdduvall 
23151369Sdduvall 	case DDI_RESUME:
23161369Sdduvall 		return (bge_resume(devinfo));
23171369Sdduvall 
23181369Sdduvall 	case DDI_ATTACH:
23191369Sdduvall 		break;
23201369Sdduvall 	}
23211369Sdduvall 
23221369Sdduvall 	bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP);
23231369Sdduvall 	ddi_set_driver_private(devinfo, bgep);
23241369Sdduvall 	bgep->bge_guard = BGE_GUARD;
23251369Sdduvall 	bgep->devinfo = devinfo;
23261369Sdduvall 
23271369Sdduvall 	/*
23281369Sdduvall 	 * Initialize more fields in BGE private data
23291369Sdduvall 	 */
23301369Sdduvall 	bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
23311369Sdduvall 		DDI_PROP_DONTPASS, debug_propname, bge_debug);
23321369Sdduvall 	(void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d",
23331369Sdduvall 		BGE_DRIVER_NAME, instance);
23341369Sdduvall 
23351369Sdduvall 	/*
23361865Sdilpreet 	 * Initialize for fma support
23371865Sdilpreet 	 */
23381865Sdilpreet 	bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
23391865Sdilpreet 	    DDI_PROP_DONTPASS, fm_cap,
23401865Sdilpreet 	    DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE |
23411865Sdilpreet 	    DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE);
23421865Sdilpreet 	BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities));
23431865Sdilpreet 	bge_fm_init(bgep);
23441865Sdilpreet 
23451865Sdilpreet 	/*
23461369Sdduvall 	 * Look up the IOMMU's page size for DVMA mappings (must be
23471369Sdduvall 	 * a power of 2) and convert to a mask.  This can be used to
23481369Sdduvall 	 * determine whether a message buffer crosses a page boundary.
23491369Sdduvall 	 * Note: in 2s complement binary notation, if X is a power of
23501369Sdduvall 	 * 2, then -X has the representation "11...1100...00".
23511369Sdduvall 	 */
23521369Sdduvall 	bgep->pagemask = dvma_pagesize(devinfo);
23531369Sdduvall 	ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask));
23541369Sdduvall 	bgep->pagemask = -bgep->pagemask;
23551369Sdduvall 
23561369Sdduvall 	/*
23571369Sdduvall 	 * Map config space registers
23581369Sdduvall 	 * Read chip ID & set up config space command register(s)
23591369Sdduvall 	 *
23601369Sdduvall 	 * Note: this leaves the chip accessible by Memory Space
23611369Sdduvall 	 * accesses, but with interrupts and Bus Mastering off.
23621369Sdduvall 	 * This should ensure that nothing untoward will happen
23631369Sdduvall 	 * if it has been left active by the (net-)bootloader.
23641369Sdduvall 	 * We'll re-enable Bus Mastering once we've reset the chip,
23651369Sdduvall 	 * and allow interrupts only when everything else is set up.
23661369Sdduvall 	 */
23671369Sdduvall 	err = pci_config_setup(devinfo, &bgep->cfg_handle);
23681408Srandyf #ifdef BGE_IPMI_ASF
23691408Srandyf 	mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR);
23701408Srandyf 	if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) {
23711408Srandyf 		bgep->asf_wordswapped = B_TRUE;
23721408Srandyf 	} else {
23731408Srandyf 		bgep->asf_wordswapped = B_FALSE;
23741408Srandyf 	}
23751408Srandyf 	bge_asf_get_config(bgep);
23761408Srandyf #endif
23771369Sdduvall 	if (err != DDI_SUCCESS) {
23781369Sdduvall 		bge_problem(bgep, "pci_config_setup() failed");
23791369Sdduvall 		goto attach_fail;
23801369Sdduvall 	}
23811369Sdduvall 	bgep->progress |= PROGRESS_CFG;
23821369Sdduvall 	cidp = &bgep->chipid;
23831369Sdduvall 	bzero(cidp, sizeof (*cidp));
23841369Sdduvall 	bge_chip_cfg_init(bgep, cidp, B_FALSE);
23851865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
23861865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
23871865Sdilpreet 		goto attach_fail;
23881865Sdilpreet 	}
23891369Sdduvall 
23901408Srandyf #ifdef BGE_IPMI_ASF
23911408Srandyf 	if (DEVICE_5721_SERIES_CHIPSETS(bgep) ||
23921408Srandyf 	    DEVICE_5714_SERIES_CHIPSETS(bgep)) {
23931408Srandyf 		bgep->asf_newhandshake = B_TRUE;
23941408Srandyf 	} else {
23951408Srandyf 		bgep->asf_newhandshake = B_FALSE;
23961408Srandyf 	}
23971408Srandyf #endif
23981408Srandyf 
23991369Sdduvall 	/*
24001369Sdduvall 	 * Update those parts of the chip ID derived from volatile
24011369Sdduvall 	 * registers with the values seen by OBP (in case the chip
24021369Sdduvall 	 * has been reset externally and therefore lost them).
24031369Sdduvall 	 */
24041369Sdduvall 	cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24051369Sdduvall 		DDI_PROP_DONTPASS, subven_propname, cidp->subven);
24061369Sdduvall 	cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24071369Sdduvall 		DDI_PROP_DONTPASS, subdev_propname, cidp->subdev);
24081369Sdduvall 	cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24091369Sdduvall 		DDI_PROP_DONTPASS, clsize_propname, cidp->clsize);
24101369Sdduvall 	cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24111369Sdduvall 		DDI_PROP_DONTPASS, latency_propname, cidp->latency);
24121369Sdduvall 	cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24131369Sdduvall 		DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings);
24141369Sdduvall 	cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24151369Sdduvall 		DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings);
24161369Sdduvall 
24171369Sdduvall 	if (bge_jumbo_enable == B_TRUE) {
24181369Sdduvall 		cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo,
24191369Sdduvall 			DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU);
24201369Sdduvall 		if ((cidp->default_mtu < BGE_DEFAULT_MTU)||
24211369Sdduvall 			(cidp->default_mtu > BGE_MAXIMUM_MTU)) {
24221369Sdduvall 			cidp->default_mtu = BGE_DEFAULT_MTU;
24231369Sdduvall 		}
24241369Sdduvall 	}
24251369Sdduvall 	/*
24261369Sdduvall 	 * Map operating registers
24271369Sdduvall 	 */
24281369Sdduvall 	err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER,
24291369Sdduvall 		&regs, 0, 0, &bge_reg_accattr, &bgep->io_handle);
24301369Sdduvall 	if (err != DDI_SUCCESS) {
24311369Sdduvall 		bge_problem(bgep, "ddi_regs_map_setup() failed");
24321369Sdduvall 		goto attach_fail;
24331369Sdduvall 	}
24341369Sdduvall 	bgep->io_regs = regs;
24351369Sdduvall 	bgep->progress |= PROGRESS_REGS;
24361369Sdduvall 
24371369Sdduvall 	/*
24381369Sdduvall 	 * Characterise the device, so we know its requirements.
24391369Sdduvall 	 * Then allocate the appropriate TX and RX descriptors & buffers.
24401369Sdduvall 	 */
24411865Sdilpreet 	if (bge_chip_id_init(bgep) == EIO) {
24421865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
24431865Sdilpreet 		goto attach_fail;
24441865Sdilpreet 	}
24451369Sdduvall 	err = bge_alloc_bufs(bgep);
24461369Sdduvall 	if (err != DDI_SUCCESS) {
24471369Sdduvall 		bge_problem(bgep, "DMA buffer allocation failed");
24481369Sdduvall 		goto attach_fail;
24491369Sdduvall 	}
24501865Sdilpreet 	bgep->progress |= PROGRESS_BUFS;
24511369Sdduvall 
24521369Sdduvall 	/*
24531369Sdduvall 	 * Add the softint handlers:
24541369Sdduvall 	 *
24551369Sdduvall 	 * Both of these handlers are used to avoid restrictions on the
24561369Sdduvall 	 * context and/or mutexes required for some operations.  In
24571369Sdduvall 	 * particular, the hardware interrupt handler and its subfunctions
24581369Sdduvall 	 * can detect a number of conditions that we don't want to handle
24591369Sdduvall 	 * in that context or with that set of mutexes held.  So, these
24601369Sdduvall 	 * softints are triggered instead:
24611369Sdduvall 	 *
24622135Szh199473 	 * the <resched> softint is triggered if we have previously
24631369Sdduvall 	 * had to refuse to send a packet because of resource shortage
24641369Sdduvall 	 * (we've run out of transmit buffers), but the send completion
24651369Sdduvall 	 * interrupt handler has now detected that more buffers have
24661369Sdduvall 	 * become available.
24671369Sdduvall 	 *
24681369Sdduvall 	 * the <factotum> is triggered if the h/w interrupt handler
24691369Sdduvall 	 * sees the <link state changed> or <error> bits in the status
24701369Sdduvall 	 * block.  It's also triggered periodically to poll the link
24711369Sdduvall 	 * state, just in case we aren't getting link status change
24721369Sdduvall 	 * interrupts ...
24731369Sdduvall 	 */
24741369Sdduvall 	err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id,
24751369Sdduvall 		NULL, NULL, bge_reschedule, (caddr_t)bgep);
24761369Sdduvall 	if (err != DDI_SUCCESS) {
24771369Sdduvall 		bge_problem(bgep, "ddi_add_softintr() failed");
24781369Sdduvall 		goto attach_fail;
24791369Sdduvall 	}
24801369Sdduvall 	bgep->progress |= PROGRESS_RESCHED;
24811369Sdduvall 	err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id,
24821369Sdduvall 		NULL, NULL, bge_chip_factotum, (caddr_t)bgep);
24831369Sdduvall 	if (err != DDI_SUCCESS) {
24841369Sdduvall 		bge_problem(bgep, "ddi_add_softintr() failed");
24851369Sdduvall 		goto attach_fail;
24861369Sdduvall 	}
24871369Sdduvall 	bgep->progress |= PROGRESS_FACTOTUM;
24881369Sdduvall 
24891369Sdduvall 	/* Get supported interrupt types */
24901369Sdduvall 	if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) {
24911369Sdduvall 		bge_error(bgep, "ddi_intr_get_supported_types failed\n");
24921369Sdduvall 
24931369Sdduvall 		goto attach_fail;
24941369Sdduvall 	}
24951369Sdduvall 
24961369Sdduvall 	bge_log(bgep, "ddi_intr_get_supported_types() returned: %x",
24971369Sdduvall 	    intr_types);
24981369Sdduvall 
24991369Sdduvall 	if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) {
25001369Sdduvall 		if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) {
25011369Sdduvall 			bge_error(bgep, "MSI registration failed, "
25021369Sdduvall 			    "trying FIXED interrupt type\n");
25031369Sdduvall 		} else {
25041369Sdduvall 			bge_log(bgep, "Using MSI interrupt type\n");
25051369Sdduvall 
25061369Sdduvall 			bgep->intr_type = DDI_INTR_TYPE_MSI;
25071865Sdilpreet 			bgep->progress |= PROGRESS_HWINT;
25081369Sdduvall 		}
25091369Sdduvall 	}
25101369Sdduvall 
25111865Sdilpreet 	if (!(bgep->progress & PROGRESS_HWINT) &&
25121369Sdduvall 	    (intr_types & DDI_INTR_TYPE_FIXED)) {
25131369Sdduvall 		if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) {
25141369Sdduvall 			bge_error(bgep, "FIXED interrupt "
25151369Sdduvall 			    "registration failed\n");
25161369Sdduvall 			goto attach_fail;
25171369Sdduvall 		}
25181369Sdduvall 
25191369Sdduvall 		bge_log(bgep, "Using FIXED interrupt type\n");
25201369Sdduvall 
25211369Sdduvall 		bgep->intr_type = DDI_INTR_TYPE_FIXED;
25221865Sdilpreet 		bgep->progress |= PROGRESS_HWINT;
25231369Sdduvall 	}
25241369Sdduvall 
25251865Sdilpreet 	if (!(bgep->progress & PROGRESS_HWINT)) {
25261369Sdduvall 		bge_error(bgep, "No interrupts registered\n");
25271369Sdduvall 		goto attach_fail;
25281369Sdduvall 	}
25291369Sdduvall 
25301369Sdduvall 	/*
25311369Sdduvall 	 * Note that interrupts are not enabled yet as
25321865Sdilpreet 	 * mutex locks are not initialized. Initialize mutex locks.
25331865Sdilpreet 	 */
25341865Sdilpreet 	mutex_init(bgep->genlock, NULL, MUTEX_DRIVER,
25351865Sdilpreet 	    DDI_INTR_PRI(bgep->intr_pri));
25361865Sdilpreet 	mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER,
25371865Sdilpreet 	    DDI_INTR_PRI(bgep->intr_pri));
25381865Sdilpreet 	rw_init(bgep->errlock, NULL, RW_DRIVER,
25391865Sdilpreet 	    DDI_INTR_PRI(bgep->intr_pri));
25401865Sdilpreet 
25411865Sdilpreet 	/*
25421865Sdilpreet 	 * Initialize rings.
25431369Sdduvall 	 */
25441369Sdduvall 	bge_init_rings(bgep);
25451369Sdduvall 
25461369Sdduvall 	/*
25471369Sdduvall 	 * Now that mutex locks are initialized, enable interrupts.
25481369Sdduvall 	 */
25491865Sdilpreet 	bge_intr_enable(bgep);
25501865Sdilpreet 	bgep->progress |= PROGRESS_INTR;
25511369Sdduvall 
25521369Sdduvall 	/*
25531369Sdduvall 	 * Initialise link state variables
25541369Sdduvall 	 * Stop, reset & reinitialise the chip.
25551369Sdduvall 	 * Initialise the (internal) PHY.
25561369Sdduvall 	 */
25571369Sdduvall 	bgep->link_state = LINK_STATE_UNKNOWN;
25581369Sdduvall 	bgep->link_up_msg = bgep->link_down_msg = " (initialized)";
25591369Sdduvall 
25601369Sdduvall 	mutex_enter(bgep->genlock);
25611369Sdduvall 
25621369Sdduvall 	/*
25631369Sdduvall 	 * Reset chip & rings to initial state; also reset address
25641369Sdduvall 	 * filtering, promiscuity, loopback mode.
25651369Sdduvall 	 */
25661408Srandyf #ifdef BGE_IPMI_ASF
25671865Sdilpreet 	if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) {
25681408Srandyf #else
25691865Sdilpreet 	if (bge_reset(bgep) != DDI_SUCCESS) {
25701408Srandyf #endif
25711865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->cfg_handle);
25721865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
25731865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
25741865Sdilpreet 		mutex_exit(bgep->genlock);
25751865Sdilpreet 		goto attach_fail;
25761865Sdilpreet 	}
25771369Sdduvall 
25781369Sdduvall 	bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash));
25791369Sdduvall 	bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs));
25801369Sdduvall 	bgep->promisc = B_FALSE;
25811369Sdduvall 	bgep->param_loop_mode = BGE_LOOP_NONE;
25821865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) {
25831865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
25841865Sdilpreet 		mutex_exit(bgep->genlock);
25851865Sdilpreet 		goto attach_fail;
25861865Sdilpreet 	}
25871865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
25881865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
25891865Sdilpreet 		mutex_exit(bgep->genlock);
25901865Sdilpreet 		goto attach_fail;
25911865Sdilpreet 	}
25921369Sdduvall 
25931369Sdduvall 	mutex_exit(bgep->genlock);
25941369Sdduvall 
25951865Sdilpreet 	if (bge_phys_init(bgep) == EIO) {
25961865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST);
25971865Sdilpreet 		goto attach_fail;
25981865Sdilpreet 	}
25991369Sdduvall 	bgep->progress |= PROGRESS_PHY;
26001369Sdduvall 
26011369Sdduvall 	/*
26021369Sdduvall 	 * Register NDD-tweakable parameters
26031369Sdduvall 	 */
26041369Sdduvall 	if (bge_nd_init(bgep)) {
26051369Sdduvall 		bge_problem(bgep, "bge_nd_init() failed");
26061369Sdduvall 		goto attach_fail;
26071369Sdduvall 	}
26081369Sdduvall 	bgep->progress |= PROGRESS_NDD;
26091369Sdduvall 
26101369Sdduvall 	/*
26111369Sdduvall 	 * Create & initialise named kstats
26121369Sdduvall 	 */
26131369Sdduvall 	bge_init_kstats(bgep, instance);
26141369Sdduvall 	bgep->progress |= PROGRESS_KSTATS;
26151369Sdduvall 
26161369Sdduvall 	/*
26171369Sdduvall 	 * Determine whether to override the chip's own MAC address
26181369Sdduvall 	 */
26191369Sdduvall 	bge_find_mac_address(bgep, cidp);
2620*2331Skrgopi 	ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr[0].addr);
2621*2331Skrgopi 	bgep->curr_addr[0].set = B_TRUE;
2622*2331Skrgopi 
2623*2331Skrgopi 	bgep->unicst_addr_avail = MAC_ADDRESS_REGS_MAX - 1;
2624*2331Skrgopi 	bgep->unicst_addr_total = MAC_ADDRESS_REGS_MAX - 1;
26251369Sdduvall 
26262311Sseb 	if ((macp = mac_alloc(MAC_VERSION)) == NULL)
26272311Sseb 		goto attach_fail;
26282311Sseb 	macp->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
26292311Sseb 	macp->m_driver = bgep;
26301369Sdduvall 	macp->m_dip = devinfo;
2631*2331Skrgopi 	macp->m_src_addr = bgep->curr_addr[0].addr;
26322311Sseb 	macp->m_callbacks = &bge_m_callbacks;
26332311Sseb 	macp->m_min_sdu = 0;
26342311Sseb 	macp->m_max_sdu = cidp->ethmax_size - sizeof (struct ether_header);
26351369Sdduvall 	/*
26361369Sdduvall 	 * Finally, we're ready to register ourselves with the MAC layer
26371369Sdduvall 	 * interface; if this succeeds, we're all ready to start()
26381369Sdduvall 	 */
26392311Sseb 	err = mac_register(macp, &bgep->mh);
26402311Sseb 	mac_free(macp);
26412311Sseb 	if (err != 0)
26421369Sdduvall 		goto attach_fail;
26431369Sdduvall 
26441369Sdduvall 	cychand.cyh_func = bge_chip_cyclic;
26451369Sdduvall 	cychand.cyh_arg = bgep;
26461369Sdduvall 	cychand.cyh_level = CY_LOCK_LEVEL;
26471369Sdduvall 	cyctime.cyt_when = 0;
26481369Sdduvall 	cyctime.cyt_interval = BGE_CYCLIC_PERIOD;
26491369Sdduvall 	mutex_enter(&cpu_lock);
26501369Sdduvall 	bgep->cyclic_id = cyclic_add(&cychand, &cyctime);
26511369Sdduvall 	mutex_exit(&cpu_lock);
26521369Sdduvall 
26531369Sdduvall 	bgep->progress |= PROGRESS_READY;
26541369Sdduvall 	ASSERT(bgep->bge_guard == BGE_GUARD);
26551369Sdduvall 	return (DDI_SUCCESS);
26561369Sdduvall 
26571369Sdduvall attach_fail:
26581408Srandyf #ifdef BGE_IPMI_ASF
26591408Srandyf 	bge_unattach(bgep, ASF_MODE_NONE);
26601408Srandyf #else
26611369Sdduvall 	bge_unattach(bgep);
26621408Srandyf #endif
26631369Sdduvall 	return (DDI_FAILURE);
26641369Sdduvall }
26651369Sdduvall 
26661369Sdduvall /*
26671369Sdduvall  *	bge_suspend() -- suspend transmit/receive for powerdown
26681369Sdduvall  */
26691369Sdduvall static int
26701369Sdduvall bge_suspend(bge_t *bgep)
26711369Sdduvall {
26721369Sdduvall 	/*
26731369Sdduvall 	 * Stop processing and idle (powerdown) the PHY ...
26741369Sdduvall 	 */
26751369Sdduvall 	mutex_enter(bgep->genlock);
26761408Srandyf #ifdef BGE_IPMI_ASF
26771408Srandyf 	/*
26781408Srandyf 	 * Power management hasn't been supported in BGE now. If you
26791408Srandyf 	 * want to implement it, please add the ASF/IPMI related
26801408Srandyf 	 * code here.
26811408Srandyf 	 */
26821408Srandyf #endif
26831369Sdduvall 	bge_stop(bgep);
26841865Sdilpreet 	if (bge_phys_idle(bgep) != DDI_SUCCESS) {
26851865Sdilpreet 		(void) bge_check_acc_handle(bgep, bgep->io_handle);
26861865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
26871865Sdilpreet 		mutex_exit(bgep->genlock);
26881865Sdilpreet 		return (DDI_FAILURE);
26891865Sdilpreet 	}
26901865Sdilpreet 	if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) {
26911865Sdilpreet 		ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED);
26921865Sdilpreet 		mutex_exit(bgep->genlock);
26931865Sdilpreet 		return (DDI_FAILURE);
26941865Sdilpreet 	}
26951369Sdduvall 	mutex_exit(bgep->genlock);
26961369Sdduvall 
26971369Sdduvall 	return (DDI_SUCCESS);
26981369Sdduvall }
26991369Sdduvall 
27001369Sdduvall /*
27011369Sdduvall  * detach(9E) -- Detach a device from the system
27021369Sdduvall  */
27031369Sdduvall static int
27041369Sdduvall bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd)
27051369Sdduvall {
27061369Sdduvall 	bge_t *bgep;
27071408Srandyf #ifdef BGE_IPMI_ASF
27081408Srandyf 	uint_t asf_mode;
27091408Srandyf 	asf_mode = ASF_MODE_NONE;
27101408Srandyf #endif
27111369Sdduvall 
27121369Sdduvall 	BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd));
27131369Sdduvall 
27141369Sdduvall 	bgep = ddi_get_driver_private(devinfo);
27151369Sdduvall 
27161369Sdduvall 	switch (cmd) {
27171369Sdduvall 	default:
27181369Sdduvall 		return (DDI_FAILURE);
27191369Sdduvall 
27201369Sdduvall 	case DDI_SUSPEND:
27211369Sdduvall 		return (bge_suspend(bgep));
27221369Sdduvall 
27231369Sdduvall 	case DDI_DETACH:
27241369Sdduvall 		break;
27251369Sdduvall 	}
27261369Sdduvall 
27271408Srandyf #ifdef BGE_IPMI_ASF
27281408Srandyf 	mutex_enter(bgep->genlock);
27291408Srandyf 	if (bgep->asf_enabled && (bgep->asf_status == ASF_STAT_RUN)) {
27301408Srandyf 
27311408Srandyf 		bge_asf_update_status(bgep);
27321408Srandyf 		bge_asf_stop_timer(bgep);
27331408Srandyf 		bgep->asf_status = ASF_STAT_STOP;
27341408Srandyf 
27351408Srandyf 		bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET);
27361408Srandyf 
27371408Srandyf 		if (bgep->asf_pseudostop) {
27381408Srandyf 			bgep->link_up_msg = bgep->link_down_msg = " (stopped)";
27391408Srandyf 			bge_chip_stop(bgep, B_FALSE);
27401408Srandyf 			bgep->bge_mac_state = BGE_MAC_STOPPED;
27411408Srandyf 			bgep->asf_pseudostop = B_FALSE;
27421408Srandyf 		}
27431408Srandyf 
27441408Srandyf 		asf_mode = ASF_MODE_POST_SHUTDOWN;
27451865Sdilpreet 
27461865Sdilpreet 		if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK)
27471865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
27481865Sdilpreet 			    DDI_SERVICE_UNAFFECTED);
27491865Sdilpreet 		if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK)
27501865Sdilpreet 			ddi_fm_service_impact(bgep->devinfo,
27511865Sdilpreet 			    DDI_SERVICE_UNAFFECTED);
27521408Srandyf 	}
27531408Srandyf 	mutex_exit(bgep->genlock);
27541408Srandyf #endif
27551408Srandyf 
27561369Sdduvall 	/*
27571369Sdduvall 	 * Unregister from the GLD subsystem.  This can fail, in
27581369Sdduvall 	 * particular if there are DLPI style-2 streams still open -
27591369Sdduvall 	 * in which case we just return failure without shutting
27601369Sdduvall 	 * down chip operations.
27611369Sdduvall 	 */
27622311Sseb 	if (mac_unregister(bgep->mh) != 0)
27631369Sdduvall 		return (DDI_FAILURE);
27641369Sdduvall 
27651369Sdduvall 	/*
27661369Sdduvall 	 * All activity stopped, so we can clean up & exit
27671369Sdduvall 	 */
27681408Srandyf #ifdef BGE_IPMI_ASF
27691408Srandyf 	bge_unattach(bgep, asf_mode);
27701408Srandyf #else
27711369Sdduvall 	bge_unattach(bgep);
27721408Srandyf #endif
27731369Sdduvall 	return (DDI_SUCCESS);
27741369Sdduvall }
27751369Sdduvall 
27761369Sdduvall 
27771369Sdduvall /*
27781369Sdduvall  * ========== Module Loading Data & Entry Points ==========
27791369Sdduvall  */
27801369Sdduvall 
27811369Sdduvall #undef	BGE_DBG
27821369Sdduvall #define	BGE_DBG		BGE_DBG_INIT	/* debug flag for this code	*/
27831369Sdduvall 
27841369Sdduvall DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach,
27851369Sdduvall     nodev, NULL, D_MP, NULL);
27861369Sdduvall 
27871369Sdduvall static struct modldrv bge_modldrv = {
27881369Sdduvall 	&mod_driverops,		/* Type of module.  This one is a driver */
27891369Sdduvall 	bge_ident,		/* short description */
27901369Sdduvall 	&bge_dev_ops		/* driver specific ops */
27911369Sdduvall };
27921369Sdduvall 
27931369Sdduvall static struct modlinkage modlinkage = {
27941369Sdduvall 	MODREV_1, (void *)&bge_modldrv, NULL
27951369Sdduvall };
27961369Sdduvall 
27971369Sdduvall 
27981369Sdduvall int
27991369Sdduvall _info(struct modinfo *modinfop)
28001369Sdduvall {
28011369Sdduvall 	return (mod_info(&modlinkage, modinfop));
28021369Sdduvall }
28031369Sdduvall 
28041369Sdduvall int
28051369Sdduvall _init(void)
28061369Sdduvall {
28071369Sdduvall 	int status;
28081369Sdduvall 
28091369Sdduvall 	mac_init_ops(&bge_dev_ops, "bge");
28101369Sdduvall 	status = mod_install(&modlinkage);
28111369Sdduvall 	if (status == DDI_SUCCESS)
28121369Sdduvall 		mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL);
28131369Sdduvall 	else
28141369Sdduvall 		mac_fini_ops(&bge_dev_ops);
28151369Sdduvall 	return (status);
28161369Sdduvall }
28171369Sdduvall 
28181369Sdduvall int
28191369Sdduvall _fini(void)
28201369Sdduvall {
28211369Sdduvall 	int status;
28221369Sdduvall 
28231369Sdduvall 	status = mod_remove(&modlinkage);
28241369Sdduvall 	if (status == DDI_SUCCESS) {
28251369Sdduvall 		mac_fini_ops(&bge_dev_ops);
28261369Sdduvall 		mutex_destroy(bge_log_mutex);
28271369Sdduvall 	}
28281369Sdduvall 	return (status);
28291369Sdduvall }
28301369Sdduvall 
28311369Sdduvall 
28321369Sdduvall /*
28331369Sdduvall  * bge_add_intrs:
28341369Sdduvall  *
28351369Sdduvall  * Register FIXED or MSI interrupts.
28361369Sdduvall  */
28371369Sdduvall static int
28381369Sdduvall bge_add_intrs(bge_t *bgep, int	intr_type)
28391369Sdduvall {
28401369Sdduvall 	dev_info_t	*dip = bgep->devinfo;
28411369Sdduvall 	int		avail, actual, intr_size, count = 0;
28421369Sdduvall 	int		i, flag, ret;
28431369Sdduvall 
28441369Sdduvall 	bge_log(bgep, "bge_add_intrs: interrupt type 0x%x\n", intr_type);
28451369Sdduvall 
28461369Sdduvall 	/* Get number of interrupts */
28471369Sdduvall 	ret = ddi_intr_get_nintrs(dip, intr_type, &count);
28481369Sdduvall 	if ((ret != DDI_SUCCESS) || (count == 0)) {
28491369Sdduvall 		bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, "
28501369Sdduvall 		    "count: %d", ret, count);
28511369Sdduvall 
28521369Sdduvall 		return (DDI_FAILURE);
28531369Sdduvall 	}
28541369Sdduvall 
28551369Sdduvall 	/* Get number of available interrupts */
28561369Sdduvall 	ret = ddi_intr_get_navail(dip, intr_type, &avail);
28571369Sdduvall 	if ((ret != DDI_SUCCESS) || (avail == 0)) {
28581369Sdduvall 		bge_error(bgep, "ddi_intr_get_navail() failure, "
28591369Sdduvall 		    "ret: %d, avail: %d\n", ret, avail);
28601369Sdduvall 
28611369Sdduvall 		return (DDI_FAILURE);
28621369Sdduvall 	}
28631369Sdduvall 
28641369Sdduvall 	if (avail < count) {
28651369Sdduvall 		bge_log(bgep, "nitrs() returned %d, navail returned %d\n",
28661369Sdduvall 		    count, avail);
28671369Sdduvall 	}
28681369Sdduvall 
28691369Sdduvall 	/*
28701369Sdduvall 	 * BGE hardware generates only single MSI even though it claims
28711369Sdduvall 	 * to support multiple MSIs. So, hard code MSI count value to 1.
28721369Sdduvall 	 */
28731369Sdduvall 	if (intr_type == DDI_INTR_TYPE_MSI) {
28741369Sdduvall 		count = 1;
28751369Sdduvall 		flag = DDI_INTR_ALLOC_STRICT;
28761369Sdduvall 	} else {
28771369Sdduvall 		flag = DDI_INTR_ALLOC_NORMAL;
28781369Sdduvall 	}
28791369Sdduvall 
28801369Sdduvall 	/* Allocate an array of interrupt handles */
28811369Sdduvall 	intr_size = count * sizeof (ddi_intr_handle_t);
28821369Sdduvall 	bgep->htable = kmem_alloc(intr_size, KM_SLEEP);
28831369Sdduvall 
28841369Sdduvall 	/* Call ddi_intr_alloc() */
28851369Sdduvall 	ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0,
28861369Sdduvall 	    count, &actual, flag);
28871369Sdduvall 
28881369Sdduvall 	if ((ret != DDI_SUCCESS) || (actual == 0)) {
28891369Sdduvall 		bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret);
28901369Sdduvall 
28911369Sdduvall 		kmem_free(bgep->htable, intr_size);
28921369Sdduvall 		return (DDI_FAILURE);
28931369Sdduvall 	}
28941369Sdduvall 
28951369Sdduvall 	if (actual < count) {
28961369Sdduvall 		bge_log(bgep, "Requested: %d, Received: %d\n", count, actual);
28971369Sdduvall 	}
28981369Sdduvall 
28991369Sdduvall 	bgep->intr_cnt = actual;
29001369Sdduvall 
29011369Sdduvall 	/*
29021369Sdduvall 	 * Get priority for first msi, assume remaining are all the same
29031369Sdduvall 	 */
29041369Sdduvall 	if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) !=
29051369Sdduvall 	    DDI_SUCCESS) {
29061369Sdduvall 		bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret);
29071369Sdduvall 
29081369Sdduvall 		/* Free already allocated intr */
29091369Sdduvall 		for (i = 0; i < actual; i++) {
29101369Sdduvall 			(void) ddi_intr_free(bgep->htable[i]);
29111369Sdduvall 		}
29121369Sdduvall 
29131369Sdduvall 		kmem_free(bgep->htable, intr_size);
29141369Sdduvall 		return (DDI_FAILURE);
29151369Sdduvall 	}
29161369Sdduvall 
29171369Sdduvall 	/* Call ddi_intr_add_handler() */
29181369Sdduvall 	for (i = 0; i < actual; i++) {
29191369Sdduvall 		if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr,
29201369Sdduvall 		    (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) {
29211369Sdduvall 			bge_error(bgep, "ddi_intr_add_handler() "
29221369Sdduvall 			    "failed %d\n", ret);
29231369Sdduvall 
29241369Sdduvall 			/* Free already allocated intr */
29251369Sdduvall 			for (i = 0; i < actual; i++) {
29261369Sdduvall 				(void) ddi_intr_free(bgep->htable[i]);
29271369Sdduvall 			}
29281369Sdduvall 
29291369Sdduvall 			kmem_free(bgep->htable, intr_size);
29301369Sdduvall 			return (DDI_FAILURE);
29311369Sdduvall 		}
29321369Sdduvall 	}
29331369Sdduvall 
29341369Sdduvall 	if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap))
29351369Sdduvall 		!= DDI_SUCCESS) {
29361369Sdduvall 		bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret);
29371369Sdduvall 
29381369Sdduvall 		for (i = 0; i < actual; i++) {
29391369Sdduvall 			(void) ddi_intr_remove_handler(bgep->htable[i]);
29401369Sdduvall 			(void) ddi_intr_free(bgep->htable[i]);
29411369Sdduvall 		}
29421369Sdduvall 
29431369Sdduvall 		kmem_free(bgep->htable, intr_size);
29441369Sdduvall 		return (DDI_FAILURE);
29451369Sdduvall 	}
29461369Sdduvall 
29471369Sdduvall 	return (DDI_SUCCESS);
29481369Sdduvall }
29491369Sdduvall 
29501369Sdduvall /*
29511369Sdduvall  * bge_rem_intrs:
29521369Sdduvall  *
29531369Sdduvall  * Unregister FIXED or MSI interrupts
29541369Sdduvall  */
29551369Sdduvall static void
29561369Sdduvall bge_rem_intrs(bge_t *bgep)
29571369Sdduvall {
29581369Sdduvall 	int	i;
29591369Sdduvall 
29601369Sdduvall 	bge_log(bgep, "bge_rem_intrs\n");
29611369Sdduvall 
29621865Sdilpreet 	/* Call ddi_intr_remove_handler() */
29631865Sdilpreet 	for (i = 0; i < bgep->intr_cnt; i++) {
29641865Sdilpreet 		(void) ddi_intr_remove_handler(bgep->htable[i]);
29651865Sdilpreet 		(void) ddi_intr_free(bgep->htable[i]);
29661865Sdilpreet 	}
29671865Sdilpreet 
29681865Sdilpreet 	kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t));
29691865Sdilpreet }
29701865Sdilpreet 
29711865Sdilpreet 
29721865Sdilpreet void
29731865Sdilpreet bge_intr_enable(bge_t *bgep)
29741865Sdilpreet {
29751865Sdilpreet 	int i;
29761865Sdilpreet 
29771865Sdilpreet 	if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) {
29781865Sdilpreet 		/* Call ddi_intr_block_enable() for MSI interrupts */
29791865Sdilpreet 		(void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt);
29801865Sdilpreet 	} else {
29811865Sdilpreet 		/* Call ddi_intr_enable for MSI or FIXED interrupts */
29821865Sdilpreet 		for (i = 0; i < bgep->intr_cnt; i++) {
29831865Sdilpreet 			(void) ddi_intr_enable(bgep->htable[i]);
29841865Sdilpreet 		}
29851865Sdilpreet 	}
29861865Sdilpreet }
29871865Sdilpreet 
29881865Sdilpreet 
29891865Sdilpreet void
29901865Sdilpreet bge_intr_disable(bge_t *bgep)
29911865Sdilpreet {
29921865Sdilpreet 	int i;
29931865Sdilpreet 
29941369Sdduvall 	if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) {
29951369Sdduvall 		/* Call ddi_intr_block_disable() */
29961369Sdduvall 		(void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt);
29971369Sdduvall 	} else {
29981369Sdduvall 		for (i = 0; i < bgep->intr_cnt; i++) {
29991369Sdduvall 			(void) ddi_intr_disable(bgep->htable[i]);
30001369Sdduvall 		}
30011369Sdduvall 	}
30021369Sdduvall }
3003